Interleaving method and communication device

Abstract

The invention provides an interleaving method in channel coding and a communication device thereof. The degree of a variable node is considered when a to-be-interleaved code word sequence is interleaved. Based on the conception of interleaving according to degree, the energy levels of bits in a code word sequence obtained after interleaving and bit positions contained in a QAM symbol meet the condition that a column with a large column weight corresponds to the bit position of a low energy level of the QAM symbol, and a column with a small column weight corresponds to the bit position of a high energy level of the QAM symbol. And the interleaving complexity can be further simplified on the basis. According to the interleaving method, the hardware complexity of interleaving can be reduced, and meanwhile, the interleaving performance superior to that of row-column interleaving can be obtained.

Description

Technical Field

[0001] The present application relates to the field of channel coding, and more specifically, to an interleaving method in channel coding and a related communication device. Background Art

[0002] Low density parity check (LDPC) is a channel coding scheme that is very close to the Shannon limit. It has the characteristics of good performance and low complexity. It has been identified by the 3rd generation partnership project (3GPP) as the data channel coding scheme for the 5th generation (5G) mobile networks.

[0003] In order to improve the decoding performance, LDPC currently generally uses row-column bit interleaving to map the LDPC system bits to the high-energy level bits of quadrature amplitude modulation (QAM), thereby protecting the LDPC system bits. By using row-column interleaving, even if the final decoding of LDPC cannot achieve the correctness of the overall coded bits, the correctness of the information bits can be improved. However, the hardware implementation process of the row-column interleaving process is complex, and in high-throughput scenarios, it will seriously affect the overall decoding rate and become a bottleneck for the system decoding throughput. Summary of the invention

[0004] The present application provides an interleaving method and a communication device, which can reduce the hardware complexity of interleaving while keeping the interleaving performance basically unchanged.

[0005] In a first aspect, an interleaving method is provided, the method comprising: obtaining a first codeword sequence to be interleaved, the first codeword sequence corresponding to a base matrix of a low-density parity-check code LDPC, the column weight of the columns contained in the base matrix being related to the energy level of the bit position contained in an orthogonal amplitude modulation (QAM) symbol, the first codeword sequence comprising X groups, X being greater than or equal to 2, and X being a positive integer; interleaving the first codeword sequence to obtain a second codeword sequence; mapping the second codeword sequence to an orthogonal amplitude modulation (QAM) symbol; and outputting the modulated QAM symbol.

[0006] In the technical solution of the present application, the first codeword sequence is interleaved according to the "degree", so that the column weight of the base matrix (or the degree of the tanner graph) is related to the energy level of the bit position contained in the QAM symbol, which can reduce the hardware complexity of the interleaving. In addition, the interleaving performance can also be improved.

[0007] In combination with the first aspect, in certain implementations of the first aspect, the column weight of the base matrix is ​​related to the energy level of the bit position contained in the QAM symbol, including: the column weight of the base matrix includes at least two intervals, the minimum column weight in the first interval of the at least two intervals is greater than the maximum column weight in the second interval of the at least two intervals, and the energy level corresponding to the first interval is less than the energy level corresponding to the second interval. Alternatively, the average column weight of the first interval is greater than the average column weight of the second interval, and the energy level corresponding to the first interval is less than the energy level of the second interval.

[0008] In combination with the first aspect, in certain implementations of the first aspect, each of the at least two intervals includes one or more column weights, wherein the at least two intervals include a third interval, and the column weights included in the third interval change non-continuously and monotonically.

[0009] In this implementation, if the column weights within the interval vary non-monotonically, the degree distribution is freer and the decoding threshold is better.

[0010] In combination with the first aspect, in certain implementations of the first aspect, the columns contained in the base matrix correspond to at least two subsets; the interleaving of the first codeword sequence to obtain the second codeword sequence includes: interleaving the bits in the first codeword sequence corresponding to the first subset of the at least two subsets to obtain the second codeword sequence, wherein the first subset is the information column with the smallest degree in the base matrix, and the bits in the first subset are located at the first A bit positions of the QAM symbol in order from high to low energy levels after interleaving, and A is a positive integer.

[0011] In this implementation, the degree and whether it is an information bit are considered at the same time, and the information bit protection can be taken into account on the basis of fast convergence. For example, the information bit is always mapped to the bit position with high energy level, so that when the overall decoding is wrong, there may still be a situation where the information bit is correct.

[0012] In combination with the first aspect, in some implementations of the first aspect, the number N of variable nodes with the smallest degree in the A and the base matrix is min And the length E of the first codeword sequence satisfies the following relationship:

[0013]

[0014] Among them, round represents the rounding function.

[0015] In combination with the first aspect, in certain implementations of the first aspect, the columns contained in the base matrix correspond to at least two subsets; the interleaving of the first codeword sequence to obtain the second codeword sequence includes: interleaving a second subset of the at least two subsets to obtain the second codeword sequence, the second subset being the information column with the largest degree among the at least two subsets, the bits in the second subset corresponding to the first A bit positions of the QAM symbol in order from low to high energy levels, and A being a positive integer.

[0016] In this implementation, the degree and whether it is an information bit are considered at the same time, so that information bit protection can be taken into account on the basis of fast convergence.

[0017] In combination with the first aspect, in some implementations of the first aspect, the number N of variable nodes with the largest degree in the A and the base matrix is max And the length E of the first codeword sequence satisfies the following relationship:

[0018]

[0019] Among them, round represents the rounding function.

[0020] In combination with the first aspect, in certain implementations of the first aspect, the columns contained in the base matrix correspond to at least two subsets; the interleaving of the first codeword sequence to obtain the second codeword sequence includes: interleaving the bits in a first subset of the at least two subsets to obtain the second codeword sequence, the first subset being the information column with the smallest degree in the at least two subsets, and the bits in the first subset corresponding to A bit positions of other energy levels of the QAM symbol except the lowest energy level.

[0021] In this implementation, the degree and whether it is an information bit are considered at the same time, so that information bit protection can be taken into account on the basis of fast convergence.

[0022] In combination with the first aspect, in some implementations of the first aspect, the number N of variable nodes with the smallest degree in the A and the base matrix is min And the length E of the first codeword sequence satisfies the following relationship:

[0023]

[0024] Here, round represents a rounding function.

[0025] In combination with the first aspect, in certain implementations of the first aspect, the columns contained in the base matrix correspond to at least two subsets; the interleaving of the first codeword sequence to obtain the second codeword sequence includes: interleaving the bits in a second subset of the at least two subsets to obtain the second codeword sequence, the second subset being the information column with the largest degree in the at least two subsets, and the bits in the second subset corresponding to A bits of other energy levels other than the highest energy level of the QAM symbol, where A is a positive integer.

[0026] In this implementation, the degree and whether it is an information bit are considered at the same time, so that information bit protection can be taken into account on the basis of fast convergence.

[0027] In combination with the first aspect, in some implementations of the first aspect, the number N of variable nodes with the largest degree in the A and the base matrix is max And the length E of the first codeword sequence satisfies the following relationship:

[0028]

[0029] Among them, round represents the rounding function.

[0030] In combination with the first aspect, in certain implementations of the first aspect, the at least two intervals include interval [1], interval [4,7] and interval [8,11], wherein the interval [8,11] corresponds to energy levels other than the highest energy level.

[0031] In combination with the first aspect, in some implementations of the first aspect, X=2, the QAM symbol includes Q m bits; the Q m A bits of the bits are from the first group of the X groups, and the Q m The remaining Q m - A bits are from the second group of the X groups, the A bits correspond to the first interval of the at least two intervals in descending order of column weight, and the A bits are located in the Q m The energy levels of the bits are in the order of the first A bits from low to high, where A is a positive integer.

[0032] In this implementation, the node with the highest priority is given to the lowest energy level, which can ensure the performance of LDPC under high code rate conditions (no extended check nodes, many high-degree nodes) and accelerate the convergence speed of decoding.

[0033] In combination with the first aspect, in some implementations of the first aspect, the value of A is determined based on the number N of variable nodes with the largest degree in the base matrix. maxand the length E of the first codeword sequence is determined by N max and E are positive integers.

[0034] In combination with the first aspect, in some implementations of the first aspect, the A, N max and E satisfy the following relationship:

[0035]

[0036] Among them, round represents the rounding function.

[0037] In combination with the first aspect, in some implementations of the first aspect, X=2, the QAM symbol includes Q m bits; the Q m A bits of the bits are from the first group of the X groups, and the Q m The remaining Q m - A bits are from the second group of the X groups, the A bits correspond to the first interval of the at least two intervals in the order from low to high column weight, and the A bits are located in the Q m The energy levels of the bits are the first A bit positions in descending order, where A is a positive integer.

[0038] In this implementation, the node with the smallest degree is prioritized to correspond to the highest energy level, which can ensure the performance of LDPC under low code rate conditions. More check nodes are expanded, and there are more low-degree nodes, which can speed up the convergence of decoding.

[0039] In combination with the first aspect, in some implementations of the first aspect, the value of A is determined based on the number N of variable nodes with the smallest degree in the base matrix. min and the length E of the first codeword sequence is determined by N min and E are positive integers.

[0040] In combination with the first aspect, in certain implementations of the first aspect, the A, N min and E satisfy the following relationship:

[0041]

[0042] Among them, round represents the rounding function.

[0043] In combination with the first aspect, in some implementations of the first aspect, X=2, the QAM symbol includes Q m bits; the Q m A bits of the bits are from the first group of the X groups, and the Q m The remaining Q m- A bits are from the second group of the X groups, the A bits correspond to the first interval of the at least two intervals in descending order of column weight, and the A bits are located in the Q m There are A bit positions corresponding to energy levels other than the highest energy level in the bits, where A is a positive integer.

[0044] In this implementation, priority is given to ensuring that the maximum degree does not correspond to the highest energy level, ensuring the performance of LDPC under high code rates, without extended check nodes, and with many high-degree nodes, which can speed up the convergence of decoding.

[0045] In combination with the first aspect, in some implementations of the first aspect, the value of A is determined based on the number N of variable nodes with the largest degree in the base matrix. max and the length E of the first codeword sequence is determined by N max and E are positive integers.

[0046] In combination with the first aspect, in certain implementations of the first aspect, the A, N max and E satisfy the following relationship:

[0047]

[0048] Among them, round represents the rounding function.

[0049] In combination with the first aspect, in some implementations of the first aspect, X=2, the QAM symbol includes Q m bits; the Q m A bits of the bits are from the first group of the X groups, and the Q m The remaining Q m - A bits are from the second group of the X groups, the A bits correspond to the first interval of the at least two intervals in the order from low to high column weight, and the A bits are located in the Q m There are A bit positions corresponding to energy levels other than the lowest energy level in the bits, where A is a positive integer.

[0050] In this implementation, priority is given to ensuring that the minimum degree does not correspond to the minimum energy level, ensuring the performance of LDPC under low code rates, expanding the number of check nodes and low-degree nodes, and accelerating the convergence speed of decoding.

[0051] In combination with the first aspect, in some implementations of the first aspect, the value of A is determined based on the number N of variable nodes with the smallest degree in the base matrix. min and the length E of the first codeword sequence is determined by N min and E are positive integers.

[0052] In combination with the first aspect, in certain implementations of the first aspect, the A, N min and E satisfy the following relationship:

[0053]

[0054] Among them, round represents the rounding function.

[0055] In combination with the first aspect, in some implementations of the first aspect, X=3, the QAM symbol includes Q m bits; the Q m A bits of the bits are from the first group of the X groups, and the Q m The other B bits of the A bits that are different from the A bits are from the second group of the X groups, and the Q m The remaining Q m -AB bits are from the third group of the X groups, wherein the A bits correspond to the first interval of the at least two intervals in the order of column weight from low to high, the B bits correspond to the first interval of the at least two intervals in the order of column weight from high to low, and the A bits are located in the Q m The first A bit positions in the order of energy from low to high among the bits, the B bits are located in the Q m The first B bit positions of the bits in order from high to low energy levels, A and B are positive integers.

[0056] In this implementation, the more groups the first codeword sequence has, the more strictly low-degree nodes correspond to high energy levels, and the faster the convergence speed.

[0057] In combination with the first aspect, in some implementations of the first aspect, A and B respectively satisfy the following relationship:

[0058]

[0059]

[0060] Among them, round represents the rounding function, N max Represents the number of variable nodes with the largest degree in the base matrix, N min The table represents the number of variable nodes with the smallest degree in the base matrix, and E represents the length of the first codeword sequence.

[0061] In a second aspect, a deinterleaving method is provided, the method comprising: obtaining a QAM symbol to be demodulated; demodulating the QAM symbol to obtain a first information sequence; deinterleaving the first information sequence to obtain a second information sequence, wherein the second information sequence corresponds to a base matrix of LDPC, the column weights of the columns contained in the base matrix are related to the energy levels of the bit positions contained in the QAM symbol, and the second information sequence includes X groups, X is greater than or equal to 2, and X is a positive integer; and outputting the second information sequence.

[0062] The beneficial technical effects of the method of the second aspect can be referred to the description of the first aspect and will not be elaborated here.

[0063] In the second aspect or any implementation thereof, those skilled in the art should understand that the bits (which may include information bits and check bits) sent by the encoding device are embodied as LLR information at the decoding device. m The LLR information can correspond to the Q contained in the QAM symbol. m bit positions, and each LLR information indicates the probability that the bit at the corresponding bit position is 0 or 1. This description is also applicable to the second aspect or any implementation thereof, and will not be repeated below.

[0064] The decoding device performs deinterleaving according to the correspondence between the column weight of the base matrix and the energy level of the bit position contained in the QAM symbol, which is the same as that of the encoding device, to obtain a deinterleaved sequence. The deinterleaving process will not be described in detail. Further, the decoding device can decode the deinterleaved sequence.

[0065] In a third aspect, a communication device is provided, wherein the communication device has the function of implementing the method of the first aspect or the second aspect, or the method in any possible implementation of the first aspect or the second aspect. The function can be implemented by hardware, or can be implemented by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above functions.

[0066] In a fourth aspect, the present application provides a communication device, comprising at least one processor, wherein the at least one processor is coupled to at least one memory, wherein the at least one memory is used to store a computer program or instruction, and the at least one processor is used to call and run the computer program or instruction from the at least one memory, so that the communication device executes the method in the first aspect or any possible implementation thereof, or executes the method in the second aspect or any possible implementation thereof.

[0067] In one example, the communication device described in the third aspect or the fourth aspect may be an encoding device or a decoding device.

[0068] In a fifth aspect, the present application provides a communication device, including a communication interface and a circuit, wherein the communication interface is used to receive a first codeword sequence to be interleaved, and input the first codeword sequence to the circuit; the circuit interleaves the first codeword sequence based on the interleaving method provided by the present application, and maps the obtained second codeword sequence to a QAM symbol; the communication interface is also used to output the modulated QAM symbol. Exemplarily, the communication device in the fifth aspect is a coding device

[0069] In a sixth aspect, a communication device is provided, comprising a communication interface and a circuit, wherein the communication interface is used to receive a QAM symbol to be demodulated and input the QAM symbol to the circuit; the circuit demodulates the QAM symbol based on the deinterleaving method provided in the present application to obtain a first information sequence, and deinterleaves the first information sequence to obtain a second information sequence; the communication interface is also used to output the second information sequence. Furthermore, the circuit can also be used to determine information bits based on the second information sequence; and the communication interface is also used to output the information bits. Exemplarily, the communication device of the sixth aspect is a decoding device.

[0070] In a seventh aspect, the present application provides a computer-readable storage medium, in which computer program code or instructions are stored. When the computer instructions are executed on a computer, the method in the first aspect or any possible implementation thereof is implemented, or the method in the second aspect or any possible implementation thereof is implemented.

[0071] In an eighth aspect, the present application provides a computer program product, comprising computer program code or instructions, which, when the computer program code or instructions are run on a computer, enables the method in the first aspect or any possible implementation thereof to be implemented, or enables the method in the second aspect or any possible implementation thereof to be implemented.

[0072] In a ninth aspect, the present application provides a wireless communication system, comprising a communication device as in any one of the third to sixth aspects, such as an encoding device and / or a decoding device. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] Figure 1 is an example of an LDPC basis matrix.

[0074] Figure 2 A schematic diagram of extracting different matrix regions from a base matrix based on different coding rates.

[0075] Figure 3 This is an example of information bit protection for LDPC.

[0076] Figure 4Schematic diagram of row-column interleaved reading and writing.

[0077] Figure 5 Schematic diagram of achieving row-column interleaving through memory splicing.

[0078] Figure 6 Schematic diagram of a system architecture applicable to an embodiment of the present application.

[0079] Figure 7 A schematic flow chart of the interleaving method and deinterleaving method provided in the present application.

[0080] Figure 8 A schematic diagram of the corresponding relationship between the energy level provided in this application and the column weight of the basis matrix.

[0081] Fig. 9 Schematic diagram of Scheme 1 provided in this application.

[0082] Fig.10 Schematic diagram of Scheme 2 provided in this application.

[0083] Fig.11 A schematic diagram of an example of Scheme 5 provided in this application.

[0084] Fig.12 A schematic diagram of an example of Scheme 7 provided in this application.

[0085] Fig.13 This is a comparison chart of the BLER performance simulation of the interleaving method provided in this application.

[0086] Fig.14 A schematic structural diagram of a communication device provided in this application.

[0087] Fig.15 A schematic structural diagram of another communication device provided in this application.

[0088] Fig.16 A schematic structural diagram of yet another communication device provided in the present application. DETAILED DESCRIPTION

[0089] The technical solution in this application will be described below in conjunction with the accompanying drawings.

[0090] In order to facilitate understanding of the technical solutions provided by the present application, a brief introduction is given to the relevant technologies or concepts involved in the embodiments of the present application.

[0091] Low-density parity-check codes (LDPC) are a channel coding scheme. The mainstream LDPC has a quasi-cyclic (QC) structure. The tanner graph corresponding to the base matrix is ​​called the base graph (BG). The BG graph model of QC-LDPC is BG = (X, Y, F), where X corresponds to the variable, Y corresponds to the check equation, and F is its edge relationship, which is expanded by a factor of z. c After the QC expansion of , we get the Tanner graph, which is a bipartite graph G = (V, C, E), where V is a variable node, C is a check node, and E is its edge relationship. The variable nodes correspond to the codeword bits one by one, so the codeword bits correspond to the column weight of the matrix or the degree of the variable node in the Tanner graph from their corresponding variable nodes. The corresponding number of columns in the check matrix N = |V| = Z C |X|, the number of check matrix rows M = |C| = Z C |Y|, the number of non-zero elements of the check matrix is ​​|E|=Z|F|. The base graph of LDPC of 5G includes BG1 and BG2, which have a common matrix structure, such as Figure 1 As shown, part A corresponds to the high-rate information column area, and part B corresponds to the high-rate core check area. Part C is a zero matrix, and area D is the incremental redundant area of ​​the matrix, corresponding to the low-rate matrix. Part E is the incremental redundant area, which is a unit matrix structure. The value of the base matrix is ​​0 or 1, and a value of 0 indicates an empty element, and a value of 1 indicates an edge in the base graph, or the corresponding check node is associated with the corresponding variable node.

[0092] Figure 2 This is a schematic diagram of extracting different matrix areas from the base matrix based on different code rates. Among them, area A and area B constitute the highest code rate matrix, which is completely implemented by BG1 in the peak throughput scenario of 5G (for example, the code length is longer, the number of information bits in different scenarios can be 1,000 to 2,000, or greater than 8,000, etc.). The number of columns in area A of BG1 is 22, the number of columns in area B is 4, and the number of punctured columns is 2. The supported code rate is 22 / (22+4-2)=11 / 12≈0.917, or a code rate slightly higher than this can be supported through additional puncturing. The entire base matrix is ​​designed according to the minimum code rate. When it is necessary to support different code rates, part of the upper left corner of the matrix is ​​intercepted for use.

[0093] The 5G communication protocol supports high-order modulation schemes, such as quadrature amplitude modulation (QAM). When the channel conditions are good and the bit rate is high, the transmitter modulates the bits to be transmitted into a high-order symbol and sends the modulation symbol. The receiver receives the modulation symbol and demodulates it, and then decodes it. In the QAM modulation scheme, one QAM symbol corresponds to multiple bits, and these multiple bits have different energy levels. Taking QAM64 as an example, each symbol corresponds to log 2 64 = 6 bits, with 3 different energy levels. By default, the first and second bits correspond to the highest energy level 1, the third and fourth bits correspond to the second highest energy level 2, and the fifth and sixth bits correspond to the lowest energy level 3. Each symbol of QAM256 corresponds to log 2 256=8 bits correspond to 4 energy levels, where the first and second bits correspond to energy level 1, the third and fourth bits correspond to energy level 2, the fifth and sixth bits correspond to energy level 3, and the seventh and eighth bits correspond to energy level 4. The energy from energy level 1 to energy level 4 decreases successively.

[0094] In the 5G communication protocol, LDPC currently uses the row-column interleaving method to interleave the coded bits to be transmitted, the purpose of which is to protect the information bits of LDPC under QAM modulation. For example, the information bits of LDPC are mapped to the bit positions of the high energy level of the QAM symbol as much as possible. In addition, the information bits can be information bits, or information bits containing CRC check bits.

[0095] Figure 3 This is an example of information bit protection in LDPC. In this example, the information length of LDPC is 8448 and the transmission length is 12672, which is an LDPC with a code rate of 2 / 3. In the coding protocol of the new radio (NR), BG1 coding is used and the selected lifting size is 384, so there are 22 information columns, each of which includes 384 bits. The NR protocol stipulates that the first two columns are punctured, so the number of check columns should be 12672 / 384-(22-2)=13 columns, such as Figure 3 As shown in Figure 1. The core check column includes 4 columns, and the extended check column includes 9 columns. These 13 columns are used as the check columns of the LDPC. After the first two columns are punctured and not sent, there are 20 columns left for the system bit, plus 13 check columns, resulting in 33 columns for transmission. The column indexes of these 33 transmission columns are as follows: Figure 3 3 to 35 shown in . 22 information columns / 33 transmission columns=2 / 3, which is the code rate of this LDPC.

[0096] 5G stipulates that rate matching is performed after LDPC encoding to obtain the bit sequence to be sent. The bit sequence to be sent usually needs to be interleaved to obtain the bit sequence to be modulated, and then modulated and sent.

[0097] The most commonly used interleaving method is row-column interleaving, which rearranges the bit order by writing rows and reading columns. Assume that the bit sequence to be transmitted after rate matching is represented as e, and the bit sequence to be modulated after interleaving is represented as sequence f. If row-column interleaving is used, the relationship between sequence f and sequence e can be as follows:

[0098]

[0099] Among them, E represents the sending length, Q m represents the number of bits contained in each modulation symbol, j represents the index of the QAM symbol, and i represents the index of the bit position contained in each QAM symbol. For a bit sequence with a transmission length of E, the number of QAM symbols is E / Q m Therefore, the value of j ranges from 0 to E / Q m -1. If the number of bits contained in a QAM symbol is Q m , then the value of i ranges from 0 to Q m -1.

[0100] From the relationship between sequence e and sequence f, we can see that the position index in sequence e is i·E / Q m +j bits, after bit interleaving, have position index i+j·Q in sequence f. m The bits in the sequence f are then mapped onto QAM symbols in sequence.

[0101] Taking the above QAM64 as an example, Q m =6, corresponding to 3 energy levels. According to the relationship between the above sequence f and sequence e, it can be seen that the 3rd to 13th columns of the system bits are mapped to the first and second bit positions of each QAM symbol, which are the two bit positions with the highest energy. The 14th to 22nd columns of the system bits and the 1st and 2nd columns of the extended check bits will be mapped to the third and fourth bit positions of the QAM symbol, which are the two bit positions with the second highest energy. The 3rd and 4th columns of the core check and all the columns of the extended check bits are mapped to the fifth and sixth bit positions of the QAM symbol, which are the two bit positions with the lowest energy.

[0102] Figure 4 This is a schematic diagram of row-column interleaved reading and writing. Figure 4, when the transmitter performs interleaving, it writes row by row in the order of address 0, address 1, address 2, ..., address 7, and then reads out column by column. Specifically, the bit at the first bit position of each address is read first, then the bit at the second bit position of each address is read, and so on. It can be seen that the transmitter writes 8 bits and reads 1 bit when performing interleaving. This method is more complicated to implement in the memory. When the receiver performs deinterleaving, it has 8 log-likelihood ratio (LLR) inputs and 1 LLR output, which will inhibit the speed of deinterleaving and thus affect the overall decoding rate. The throughput bottleneck of the decoder may shift from decoding to deinterleaving, especially in ultra-high throughput scenarios. In addition, high-order modulation methods make the deinterleaving process more complicated and become a system bottleneck. If you want to increase the speed of deinterleaving, you need to consume a lot of hardware resources. For example, if you want to support 8-bit writing and 8-bit reading in parallel, you need to expand the bit width of the memory, such as Figure 5 .

[0103] Figure 5 The figure is a schematic diagram of realizing row-column interleaving by splicing memories. For example, by splicing 8 memories together, 8-bit writing and 8-bit reading can be achieved. However, this method will greatly increase the hardware cost. For example, if 24 LLRs need to be read and written in parallel, assuming that each LLR has a quantization bit width of 8 bits, a total bit width of 24×8×8=1536 bits is required, and the hardware cost is very high.

[0104] Based on the above technical status, the present application provides an interleaving method, a deinterleaving method and a corresponding communication device in channel coding, so as to reduce the complexity of bit interleaving while keeping the interleaving performance basically unchanged.

[0105] Figure 6 Schematic diagram of a system architecture applicable to an embodiment of the present application. Figure 6 The system architecture may include an encoding device and a decoding device. The encoding device is not limited to one or more, and the decoding device is not limited to one or more. Exemplarily, one of the encoding device and the decoding device may be a network device, and the other may be a terminal device.

[0106] The terminal device in the embodiment of the present application includes various communication kits (communication kits) with wireless communication functions, which may include, for example, antennas, power supply templates, cables, and wireless fidelity (WiFi) modules, etc.), handheld devices, vehicle-mounted devices, or other processing devices connected to a wireless modem, and may specifically refer to user equipment (UE), users, access terminals, user units, user stations, mobile stations, mobile stations, remote stations, remote terminals, mobile devices, user terminals, terminals, wireless communication devices, user agents, user devices, wireless modems, machine type communication devices, or other processing devices connected to wireless modems. It may also be a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a wireless terminal in industrial control, a terminal in self-driving, a terminal in remote medical, a terminal in smart grid, a terminal in transportation safety, a terminal in smart city, a terminal in smart home, or a terminal device in a future communication network. Of course, the terminal device in this application may also refer to a chip, a modem, a system on a chip (SoC) that is mainly responsible for related communication functions in the device, or a communication platform that may include a radio frequency (RF) part, etc.

[0107] The network device in the embodiment of the present application may include, but is not limited to: a next-generation base station (gNodeB, gNB) in a fifth-generation (5th generation, 5G) communication system, a base station in a sixth-generation (6th generation, 6G) mobile communication system, a base station in a future mobile communication system, an access point (AP) in a wireless fidelity (WiFi) system, a wireless relay node, a wireless backhaul node, a transmission point (TP) or a transmission reception point (TRP), an evolved node B (evolved node B, eNB) in a long-term evolution (LTE) system, a network device in a non-terrestrial network (NTN) communication system, etc. The network device may also be one or a group (i.e., multiple) antenna panels of a base station. In addition, the network device may also be a network node constituting a gNB or TP, such as a baseband unit (BBU), a centralized unit (CU), a distributed unit (DU), or a radio unit (RU). Alternatively, the network device may also be a device-to-device (D2D) communication system, a machine-to-machine (M2M) communication system, an Internet of Things (IoT), an Internet of Vehicles communication system, or a device that performs network-side functions in other communication systems, without limitation.

[0108] In the embodiments of the present application, the device for realizing the terminal function may be a terminal, or a device capable of supporting the terminal to realize the corresponding function, such as a chip (or a chip system) or a circuit, which may be installed in the terminal. In addition, the device for realizing the function of a network device may be a network device, or a device capable of supporting the network device to realize the corresponding function, such as a chip (or a chip system) or a circuit, which may be installed in the network device. Optionally, the chip system may include a chip, or include a chip and other discrete devices.

[0109] exist Figure 6 In the system architecture shown, in uplink communication, the encoding device is a terminal device and the decoding device is a network device. In downlink communication, the encoding device is a network device and the decoding device is a terminal device.

[0110] Figure 7A schematic flow chart of the interleaving method and deinterleaving method provided in the present application. Among them, S210 to S240 in method 200 can be performed by an encoding device, or by a device (such as a chip, a chip system or a circuit, etc.) applied to the encoding device; S250 to S280 can be performed by a decoding device, or by a device (such as a chip, a chip system or a circuit, etc.) applied to the decoding device. The following is an illustration taking the encoding device and the decoding device as examples.

[0111] In addition, the technical solution of the present application can be applied to the QAM modulation method, but is also applicable to some other modulation methods, such as pulse amplitude modulation (PAM), phase shift keying (PSK) modulation, etc.

[0112] In summary, the technical solution of the present application proposes the concept of interleaving by "degree", which may refer to taking into account the degree of the variable node when interleaving the codeword sequence to be interleaved. Based on the concept of interleaving by degree, the energy levels of the bits in the codeword sequence obtained after interleaving and the bit positions contained in the QAM symbol satisfy the corresponding correspondence, which can simplify the hardware complexity of interleaving. In addition, the interleaving performance of the interleaving by "degree" of the present application is better than that of row-column interleaving.

[0113] S210, the encoding device obtains a first codeword sequence to be interleaved, the first codeword sequence corresponds to a base matrix of LDPC. The column weight of the columns included in the base matrix is ​​related to the energy level of the bit position included in the QAM symbol. The first codeword sequence includes X groups, X is greater than or equal to 2, and X is a positive integer.

[0114] In the field of channel coding, the column weight of a matrix may refer to the number of 1s in the columns of the matrix. In LDPC, the column weight also represents the degree of a variable node, so the correspondence between the column weight and the energy level in each embodiment is also the correspondence between the degree of the variable node and the energy level, and the two are essentially the same.

[0115] In an embodiment of the present application, the column weight of the columns included in the base matrix is ​​related to the energy level of the bit position included in the QAM symbol. In one example, it can be specifically: the column weight of the base matrix includes at least two intervals, and the at least two intervals include a first interval and a second interval, wherein the minimum column weight in the first interval is greater than the maximum column weight in the second interval, and the energy level corresponding to the first interval is less than the energy level corresponding to the second interval. In another example, the average column weight of the first interval is greater than the average column weight of the second interval, and the energy level corresponding to the first interval is less than the energy level corresponding to the second interval. As for how to divide the corresponding relationship between the interval (such as the first interval and / or the second interval) and the energy level, it can be a priority relationship between the interval (such as the first interval and / or the second interval) and the energy level, rather than an absolute relationship, that is, the first interval corresponds to a low energy level first, and the second interval corresponds to a high energy level first. Therefore, in actual situations, when using regions with different code rates and matrices, it may be the case that the energy level of some bits corresponding to the first interval is the same as that of the second interval.

[0116] The first interval and the second interval are examples of any two intervals of the at least two intervals. Therefore, in comparison, if the column weight in an interval is large, the energy level corresponding to the interval is low, and if the column weight in an interval is small, the energy level corresponding to the interval is high.

[0117] In an embodiment of the present application, an interval may include one or more column weights, without limitation. Furthermore, when an interval contains two or more column weights, the column weight within the interval may be monotonically changing or non-monotonic, and the present application does not limit it. For example, the at least two intervals include a third interval, and the column weight contained in the third interval changes monotonically discontinuously. The third interval refers to any one of the at least two intervals. For example, the third interval may be the first interval or the second interval mentioned above, or it may be any other interval of the at least two intervals. The third interval may be one or more, without limitation. Among them, if the column weight within the interval changes monotonically, the hardware implementation is relatively simple and the correspondence with the energy level is clearer. If the column weight within the interval changes non-monotonically, the degree distribution is freer and the decoding threshold is better.

[0118] Therefore, the column weights of the columns included in the base matrix are numerically continuous or discontinuous. In the case where the column weights of the columns included in the base matrix are discontinuous, after the columns included in the base matrix are divided into the at least two intervals, the column weights included in any interval may be continuous or discontinuous. As an example, the column weights of the columns included in the base matrix include the values ​​1, 4, 7, 8, and 11. If the column weights are divided into three intervals, namely interval [1], interval [4,7], and interval [8,11], these three intervals are monotonically increasing in order from small to large column weights. Within intervals [4,7] and interval [8,11], the column weights are discontinuous.

[0119] In another example, the correspondence between the column weights of the columns included in the base matrix and the energy levels of the bit positions included in the QAM symbol can be: the energy level corresponding to the first column in the base matrix is ​​higher than the energy level corresponding to the second column, wherein the column weight of the first column is less than the column weight of the second column. The first column and the second column are examples of any two columns in the base matrix. In other words, a column with a smaller column weight corresponds to a higher energy level, while a column with a larger column weight corresponds to a lower energy level.

[0120] Figure 8 A schematic diagram of the corresponding relationship between the energy level provided in this application and the column weight of the basis matrix. Figure 8 What is shown in is only a schematic correspondence. That is, columns with smaller column weights correspond to bit positions of lower energy levels of QAM symbols, and columns with larger column weights correspond to bit positions of higher energy levels of QAM symbols. Therefore, through interleaving, the order of the bits in the first codeword sequence is reordered to obtain the second codeword sequence, and then the bits in the second codeword sequence are mapped to the QAM symbols in sequence, thereby achieving the purpose of interleaving by "degree". According to the simulation results of the present application, the interleaving method of interleaving by "degree" provided in the present application can reduce the hardware complexity of interleaving. In addition, the interleaving performance is also better than that of row-column interleaving.

[0121] S220: The encoding device interleaves the first codeword sequence to obtain a second codeword sequence.

[0122] In the present application, as an example, the degree-based interleaving itself can be implemented by row-column interleaving. One implementation method can be to interleave the rate-matched codeword sequence (e.g., the first codeword sequence) through quasi-cyclic (QC)-LDPC cyclic block-level interleaving, so that when the codeword sequence obtained after interleaving (e.g., the second codeword sequence) is mapped to the QAM symbol, the energy level between the bit in the second codeword sequence and the bit position of the QAM symbol has the following relationship: Figure 8Another implementation method may be to design a base matrix so that the energy levels of the bits in the codeword sequence obtained by encoding based on the base matrix and the bit positions of the QAM symbol have the following relationship: Figure 8 The correspondence shown is then achieved by relying on row-column interleaving to achieve the effect of degree interleaving.

[0123] S230: The encoding device maps the second codeword sequence to QAM symbols.

[0124] S240: Output the modulated QAM symbol.

[0125] After the encoding device completes interleaving and modulation, it outputs the modulated QAM symbols.

[0126] Accordingly, the decoding device may execute the following S250 to S280 .

[0127] S250: The decoding device obtains the QAM symbol to be demodulated.

[0128] S260: The decoding device demodulates the QAM symbol to obtain a first information sequence to be deinterleaved.

[0129] The first information sequence is a sequence of LLR information obtained after demodulation, wherein each LLR information represents the probability that the bit at the corresponding bit position is 0 or 1.

[0130] S270. The decoding device deinterleaves the first information sequence to obtain a second information sequence.

[0131] The second information sequence is a sequence of LLR information.

[0132] S280. The decoding device outputs a second information sequence.

[0133] S240 to S280 describe the process of demodulation and deinterleaving. In addition, the decoding device can also determine the information bits according to the second information sequence to complete decoding.

[0134] In S250 to S280, the demodulation and deinterleaving processes performed by the decoding device are respectively the inverse processes of the modulation and interleaving performed by the encoding device, and the principle is the same as that of the encoding device. On the decoding device side, the correspondence between the column weight of the base matrix and the energy level of the bit position contained in the QAM symbol is the same as that of the encoding device side. Based on the method description on the encoding device side, those skilled in the art can know how to perform demodulation and deinterleaving on the decoding device side, which will not be described in detail.

[0135] The above Figure 8The corresponding relationship between the base matrix and the energy level shown in is the interleaving effect that needs to be achieved by degree-based interleaving in this application. Figure 8 The degree-based interleaving scheme shown in is simplified to achieve a compromise between hardware complexity and interleaving performance. For example, under the premise that the interleaving performance is acceptable, the simplified interleaving scheme may further reduce the hardware complexity.

[0136] Some simplified interleaving schemes based on degree interleaving are provided below, such as Scheme 1 to Scheme 4 below.

[0137] In the following example, it is assumed that the I path and Q path in the QAM symbol each contain q bits, so each QAM symbol contains 2q bits, Q m =2q, q is a positive integer. It should be noted that all implementations in the present application can be used according to the I path and the Q path respectively, or it can be assumed that the symbols of the same energy level of the I path and the Q path are bound for operation without limitation.

[0138] Solution 1

[0139] The node with the largest degree corresponds to the lowest energy level.

[0140] Specifically, the bits in the first codeword sequence are divided into two groups, that is, X=2. The first A bits in order of energy level from low to high are divided into one group (for example, called the first group), and the remaining bits are divided into one group (for example, called the second group). When mapping the bits in the first codeword sequence to QAM symbols, the Q corresponding to each QAM symbol is m The A bits with lower energy among the bits come from the first group of the first codeword sequence, and the remaining Q m -A bits are from the second group of the first codeword sequence, where A is a positive integer.

[0141] As an example, the value of A is determined by the number of variable nodes with the largest degree, N. max and the length E of the first codeword sequence. The lengths of the first codeword sequence and the second codeword sequence are equal, that is, the lengths of the codeword sequences remain unchanged before and after interleaving.

[0142] For example, A, N max and E satisfy the following relationship (1):

[0143]

[0144] Wherein, round represents a rounding function. Optionally, round can also be replaced by a ceil function or a floor function, which is used for rounding up and rounding down, respectively. The description of the round function and the round function being replaced by the ceil function or the floor function is also applicable in the following other embodiments involving the round function, and will not be repeated below.

[0145] Fig. 9 This is a schematic diagram of solution 1 provided by the present application. Wherein, address 0_0 represents the 0th bit position of address 0, address 0_1 represents the 1st bit position of address 0, and so on. The meanings of the addresses involved in other embodiments below are similar and will not be repeated here. In this example, A=2, Q m =6.

[0146] As an example, the pseudo code of the interleaving process of scheme 1 may be as follows:

[0147]

[0148] In the above pseudo code, sequence f is the second code word sequence, and sequence e is the first code word sequence.

[0149] In addition, in the embodiments of the pseudocode of the present application, it is assumed that the first codeword sequence is a sequence that has been arranged by degree, and the degrees corresponding to the sequence elements are from large to small, that is, a larger degree corresponds to an element with a smaller sequence index, and a smaller degree corresponds to an element with a larger sequence index, which will not be repeated in the following embodiments.

[0150] Solution 2

[0151] The node with the smallest degree corresponds to the highest energy level.

[0152] Specifically, the bits in the first codeword sequence are divided into two groups, that is, X=2. The first A bits in order of energy level from high to low are divided into one group (called the first group), and the remaining bits are divided into another group (called the second group). When mapping the bits in the first codeword sequence to QAM symbols, the Q corresponding to each QAM symbol is m A bits of the A bits come from the first group of the first codeword sequence, and the remaining Q bits come from the first group of the first codeword sequence. m -A bits are from the second group of the first codeword sequence.

[0153] As an example, the value of A is determined by the number of variable nodes with the smallest degree N. min And the length E of the first codeword sequence is determined.

[0154] For example, A, N min and E satisfy the following relationship (2):

[0155]

[0156] Wherein, round represents a rounding function. Optionally, the round function can also be replaced by a ceil function or a floor function.

[0157] Fig.10 This is a schematic diagram of Scheme 2 provided in this application. In this example, A=2, Q m =6.

[0158] As an example, the pseudo code of the interleaving process of scheme 2 may be as follows:

[0159]

[0160] In the above pseudo code, sequence f is the second code word sequence, and sequence e is the first code word sequence.

[0161] Solution 3

[0162] The maximum degree node does not correspond to the highest energy level

[0163] The bits in the first codeword sequence are divided into two groups, wherein A bits corresponding to non-highest energy levels are divided into one group (called the first group), and the remaining bits are divided into another group (called the second group). When mapping the bits in the first codeword sequence to QAM symbols, the Q corresponding to each QAM symbol m The first A bits in the order of energy levels from high to low are from the second group of the first codeword sequence, and the remaining Q m - A bits are from the first group of the first codeword sequence.

[0164] As an example, the value of A is determined by the number of variable nodes with the largest degree, N. max And the length E of the first codeword sequence is determined.

[0165] For example, A, N max and E satisfy the following relation (3):

[0166]

[0167] Wherein, round represents a rounding function. Optionally, round can also be a ceil function or a floor function.

[0168] As an example, the pseudo code of the interleaving process of scheme 3 may be as follows:

[0169]

[0170] In the above pseudo code, sequence f is the second code word sequence, and sequence e is the first code word sequence.

[0171] Solution 4

[0172] The node with the smallest degree does not correspond to the lowest energy level.

[0173] The bits in the first codeword sequence are divided into two groups, wherein A bits corresponding to non-lowest energy levels are divided into one group (called the first group), and the remaining bits are divided into another group (called the second group). When mapping the bits in the first codeword sequence to QAM symbols, the Q corresponding to each QAM symbol m The first A bits in the order of energy levels from low to high are from the first group of the first codeword sequence, and the remaining Q m The bits at -A bit positions are from the second group of the first codeword sequence.

[0174] As an example, A values ​​are based on the number of variable nodes with the smallest degree N min And the length E of the first codeword sequence is determined.

[0175] For example, A, N mim and E satisfy the following relation (4):

[0176]

[0177] As an example, the pseudo code of the interleaving algorithm of scheme 4 may be as follows:

[0178]

[0179] In the above pseudo code, sequence f is the second code word sequence, and sequence e is the first code word sequence.

[0180] The above schemes 1 to 4 are examples of dividing the first codeword sequence into two groups, i.e., X=2, for QAM mapping. In other implementations, the bits in the first codeword sequence may also be divided into more than two groups, for example, three groups or more than three groups, and X is equal to or greater than 3, as shown in the following scheme 5.

[0181] Solution 5

[0182] In the case where the first codeword sequence is divided into three or more groups, X≥3, when performing QAM symbol mapping, it can be combined with one or more of the above-mentioned schemes 1 to 4, for example, the variable node with the greatest satisfaction corresponds to the lowest energy level (combined with scheme 1), or the variable node with the least satisfaction corresponds to the highest energy level (combined with scheme 2), or both correspondences are satisfied at the same time, that is, combined with scheme 1 and scheme 2 at the same time. On this basis, those skilled in the art can understand that in the case of X≥3, it can also be combined with any one or more of the above-mentioned schemes 1 to 4, and a variety of specific implementations will be obtained, which will not be listed one by one in this article. An example of scheme 5 is given below.

[0183] As an example, the bits in the first codeword sequence are divided into three groups, and the above-mentioned schemes 1 and 2 are combined. In this example, the bits corresponding to the variable node with the smallest degree (that is, the column with the smallest column weight, which may be one column or multiple columns) are divided into one group (called the first group), the bits corresponding to the variable node with the largest degree (that is, the column with the largest column weight, which may be one column or multiple columns) are divided into one group (called the second group), and the remaining bits are divided into one group (called the third group). At the same time, the bits of the first group are mapped to the first A bit positions of each QAM symbol in order from high to low energy levels, the bits of the second group are mapped to the first B bit positions of each QAM symbol in order from low to high energy levels, and the remaining bits in the first codeword sequence except the first group and the second group are mapped to the remaining Q bits of each QAM symbol. m -AB bit positions. A and B are positive integers. A refers to the calculation method of A in the above-mentioned formula (1) in solution 1, and B refers to the calculation method of A in the above-mentioned formula (2) in solution 2.

[0184] Fig.11 This is a schematic diagram of an example of Scheme 5 provided in this application. In this example, A=2, B=2, Q m =8.

[0185] As an example, the pseudo code of the interleaving algorithm of Scheme 5 may be as follows:

[0186]

[0187] In the above pseudo code, sequence f is the second code word sequence, and sequence e is the first code word sequence.

[0188] As another example, the bits in the first codeword sequence are divided into three groups, and the above-mentioned schemes 3 and 4 are combined. In this example, the bits corresponding to the variable node with the largest degree in the first codeword sequence are divided into the first group, the bits corresponding to the variable node with the smallest degree are divided into the second group, and the remaining bits are divided into the third group. Among them, the bits of the first group are mapped to the other A bit positions of each QAM symbol except the first A bit positions in order from low to high energy, and the bits of the second group are mapped to the other B bit positions of each QAM symbol except the first B bit positions in order from high to low energy. Among them, A refers to the value of A in the relationship (3) in the above-mentioned scheme 3, and B refers to the calculation method of A in the relationship (4) in the above-mentioned scheme 4.

[0189] The simulation results of this application show that the more groups the first codeword sequence has, that is, the larger the value of X, the better the interleaving performance, but the corresponding hardware complexity will increase. Therefore, in actual use, a compromise can be made between the number of groups X and the hardware complexity according to hardware conditions and scenario requirements.

[0190] It can be seen that the above schemes 1 to 5 group the bits in the first codeword sequence according to the variable node with the largest degree or the variable node with the smallest degree (or the maximum column weight or the minimum column weight of the base matrix), and the corresponding correspondence between the energy levels of the bit positions of the QAM symbols is satisfied. In combination with scheme 6, an example is provided below of dividing the degree of the variable node into at least two intervals, and then establishing a corresponding relationship between the energy levels of the bit positions of the QAM symbols based on the at least two intervals.

[0191] Solution 6

[0192] According to the degree distribution of the variable nodes in the basis matrix, the degree is divided into at least two intervals, denoted as [d 1 ,d 2 ],[d 3 ,d 4 ],...,[d 2k-1 ,d 2k ], where d k As k varies monotonically, for example, d k As k increases or decreases monotonically, on this basis, it is combined with the above schemes 1 to 5.

[0193] As an example, the degree distribution is divided into at least two intervals and combined with Scheme 1, then the interval with the largest degree [d 2k-1 ,d 2k ] corresponds to the lowest energy level; if combined with Scheme 2, the interval with the smallest degree [d 1 ,d 2] corresponds to the highest energy level; if combined with Scheme 3, the interval with the largest degree [d 2k-1 ,d 2k ] does not correspond to the highest energy level; if combined with Scheme 4, the interval with the smallest degree [d 1 ,d 2 ] does not correspond to the minimum energy level. In addition, if combined with Scheme 5, the at least two intervals can be specifically three intervals, and at the same time satisfy one or more of the corresponding relationships in Schemes 1 to 4. For example, assuming that the at least two intervals include a first interval, a second interval, and a third interval, the degree distribution from the first interval to the third interval decreases monotonically, the first interval corresponds to the minimum energy level, the third interval corresponds to the maximum energy level, and the second interval corresponds to other energy levels other than the minimum energy level and the maximum energy level.

[0194] As an example, the degree distribution is divided into intervals [1], [4, 7], [8, 11] in a monotonically increasing manner. If combined with the above solution 1, the column corresponding to the interval [8, 11] corresponds to the lowest energy level. If combined with the above solution 2, the column corresponding to the interval [1] corresponds to the highest energy level.

[0195] It can be understood that there are many combinations in the above scheme 6. Based on the design concept of the present application, those skilled in the art can know how to combine these schemes and whether they can be combined, and they will not be listed here one by one.

[0196] In one or more embodiments of the present application, the "degree" may be related to the code rate. Since LDPC needs to support flexible code rates, different regions of the base matrix may be intercepted as the matrix for encoding or decoding, so the matrix used for encoding or decoding may change with different code rates, and then the column weight of the matrix used for encoding or decoding may also change with different code rates. Some possible implementations are given below.

[0197] In one implementation, the column weight described in some of the above schemes may be the column weight of the complete base matrix, or the column weight of the matrix area corresponding to the lowest code rate supported in the current communication scenario in the base matrix. For example, in a high throughput scenario, the matrix area corresponding to the high code rate of the base matrix is ​​intercepted, and the column weight may be the column weight corresponding to the high code rate area supported by the base matrix. For another example, in a scenario where hardware conditions are limited, such as a limited buffer (LBRM), the column weight may be the column weight corresponding to the lowest code rate area supported by the base matrix.

[0198] In another implementation, the column weight described in some of the above schemes may be the column weight corresponding to the highest code rate supported by the base matrix. The highest code rate may be the highest code rate indicated by the modulation coding scheme (MCS), or the core area ( Figure 1 The code rate corresponding to the A area and B area in the matrix is ​​used for sorting, and the degree of the extended check node is considered to be the smallest. The reason is that the high-throughput peak scenario is the highest code rate scenario that the base matrix can support, and the fast convergence requirements of this part should be met as much as possible.

[0199] In one implementation, the encoding device or decoding device side can obtain at least two indicator sequences, each indicator sequence corresponding to a code rate interval or a matrix row number interval. In actual use, the corresponding indicator sequence is selected according to the transmission code rate or the number of matrix rows used. The base matrix used in the code rate range corresponding to the at least two indicator sequences is reordered according to the columns to obtain the first code word sequence. Optionally, the at least two code rate intervals include the code rate corresponding to the core matrix of the base matrix.

[0200] Solution 7

[0201] The columns of the base matrix can be divided into at least two subsets, and the bits in at least one of the at least two subsets need to consider both the "degree" and whether it is an information bit when performing energy level mapping of the QAM symbol. In other words, when performing QAM mapping on the bits in the at least one subset, information bit protection and interleaving by "degree" of the present application are considered at the same time.

[0202] As an example, the columns of the base matrix can be divided into three subsets, the first subset is the information column, the second subset is the core check column, and the third subset is the extended check column. As another example, the columns of the base matrix can be divided into two subsets, the first subset is the information column and the core check column, and the second subset is the extended check column.

[0203] The division of the at least two subsets may be combined with any one of the above-mentioned solutions 1 to 4. In the case of no contradiction, it may also be combined with multiple solutions in solutions 1 to 4. Some examples are given below.

[0204] As an example, the energy level mapping of the bits in the second subset is combined with scheme 1, while considering information bit protection. For example, the information column with the largest degree in the second subset corresponds to the first A bit positions of the QAM symbol in order from low to high energy levels, where A is a positive integer.

[0205] Among them, A satisfies the following relationship:

[0206]

[0207] As another example, the energy level mapping of the bits in the first subset is combined with Scheme 2 while considering information bit protection. For example, the information column with the smallest degree in the first subset corresponds to the first A bit positions of the QAM symbol in descending order of energy level.

[0208] Among them, A satisfies the following relationship:

[0209]

[0210] As another example, the energy level mapping of the bits in the second subset is combined with Scheme 3, while considering whether they are information bits. For example, the information column with the largest degree in the second subset corresponds to the A bit positions of energy levels other than the highest energy level of the QAM symbol.

[0211] Among them, A satisfies the following relationship:

[0212]

[0213] As another example, the energy level mapping of the bits in the first subset is combined with Scheme 4, while considering information bit protection. For example, the smallest information column in the first subset corresponds to the A bit positions of the QAM symbol at energy levels other than the lowest energy level.

[0214] Among them, A satisfies the following relationship:

[0215]

[0216] The parameter descriptions in these relational expressions in Scheme 7 can be found above and will not be repeated here.

[0217] As another example, the bit positions contained in the QAM symbol are divided into three groups according to the energy level, and the non-information bits correspond to the first A bit positions in the order of energy level from low to high, the information bits with the smallest degree correspond to the first B bit positions in the order of energy level from high to low as one group, and the other bits are located in the remaining Q of the QAM symbol. m -AB bit positions.

[0218] In this example, A can be determined by the code rate r, and B is determined by the length E of the first codeword sequence and the number N of variable nodes with the smallest degree in the information bit. min Sure.

[0219] For example, A or B satisfies the following relationship (7-5):

[0220] A=round((1-r)·Q m )

[0221]

[0222] Wherein, round represents a rounding function. Optionally, the round function can also be replaced by a ceil function or a floor function.

[0223] Fig.12 This is a schematic diagram of Scheme 7 provided in this application. In this example, A=2, B=2, Q m =8.

[0224] As an example, the pseudo code of the interleaving algorithm of Scheme 7 may be as follows:

[0225]

[0226] In the above pseudo code, sequence f is the second code word sequence, and sequence e is the first code word sequence.

[0227] The advantage of scheme 7 is that it can take into account information bit protection on the basis of fast convergence. That is, the information bit is always mapped to the bit position with the highest energy level of the QAM symbol, so that even if the overall decoding of the transmitted codeword is wrong, there will still be information bits that are correctly decoded, which increases the probability of successfully decoding the information bit.

[0228] Fig.13 This is a block error rate (BLER) performance simulation comparison chart of the interleaving method provided in this application. Fig.13 The horizontal axis is the signal to noise ratio (SNR), and the vertical axis is the block error rate BLER. The code length is 8448, and the number of iterations is 4. It can be seen that the simplified interleaving scheme of the present application is very close to the relatively strict degree-based interleaving performance while greatly reducing the complexity. The slope of BLER-SNR has a slight loss, but the overall performance difference is very small. It can be seen that the interleaving method provided by the present application has lower hardware complexity while keeping the performance of degree-based interleaving basically unchanged.

[0229] The interleaving method or deinterleaving method provided by the present application is described in detail above. The communication device provided by the present application is introduced below.

[0230] like Fig.14 , the present application provides a communication device 1000.

[0231] The communication device 1000 may be a coding device, or a device applied to a coding device and capable of realizing the corresponding functions of the coding device in the embodiment of the method of the present application, such as a chip, a chip system or a circuit, etc. Alternatively, the communication device 1000 may be a decoding device, or a device applied to a decoding device and capable of realizing the corresponding functions of the decoding device in the embodiment of the method of the present application, such as a chip, a chip system or a circuit, etc.

[0232] Optionally, the communication device 1000 includes a processing module 1001, which can be a processor, a processing board, a processing unit, or a processing device. When the communication device 1000 is a coding device or a device applied to a coding device, the processing module 1001 is used to interleave the first codeword sequence to be interleaved to obtain a second codeword sequence, and map the second codeword sequence to a QAM symbol. The specific process can refer to the detailed description of the interleaving process in the method embodiment, which will not be repeated here. When the communication device 1000 is a decoding device or a device applied to a decoding device, the processing module 1001 is used to demodulate the QAM symbol to be demodulated to obtain a first information sequence, and deinterleave the first information sequence to obtain a second information sequence. The specific process can refer to the description of the deinterleaving process in the method embodiment, which will not be repeated here.

[0233] Optionally, the communication device 1000 further includes a communication module 1002, which may also be referred to as a transceiver module, a transceiver, a transceiver, or a transceiver device, etc., for performing receiving (or inputting) and / or sending (or outputting) operations. For example, when the communication device 1000 is an encoding device or a device applied to an encoding device, the communication module 1002 may be used to obtain a first codeword sequence to be interleaved, output modulated QAM symbols, etc. When the communication device 1000 is a decoding device or a device applied to a decoding device, the communication module 1002 may be used to obtain a QAM symbol to be demodulated, and output a second information sequence, etc.

[0234] In some embodiments, the aforementioned communication module and / or processing module may be implemented by a virtual module, for example, the processing module may be implemented by a software function unit or a virtual device, and the communication module may be implemented by a software function or a virtual device. Alternatively, the processing module or the communication module may also be implemented by a physical device, for example, if the device is implemented using a chip / circuit (e.g., an integrated circuit, a dedicated circuit, a logic circuit, etc.). The communication module may be an input / output circuit and / or a communication interface, performing input operations (corresponding to the aforementioned receiving operations) and output operations (corresponding to the aforementioned sending operations); the processing module is an integrated processor or microprocessor or circuit (e.g., an integrated circuit, a logic circuit, etc.).

[0235] The division of modules in this application is schematic and is only a logical function division. There may be other division methods in actual implementation. In addition, each functional module in each example of this application may be integrated into one processor, or may exist physically separately, or two or more modules may be integrated into one module. The above-mentioned integrated modules may be implemented in the form of hardware or in the form of software functional modules.

[0236] like Fig.15 The present application also provides a communication device 1100. The communication device 1100 includes at least one processor 1110, which implements the functions of the encoding device or decoding device described in the above method embodiments.

[0237] Optionally, the processor 1110 is coupled to a memory, and the memory may be located within the communication device, or the memory may be integrated with the processor, or the memory may be located outside the communication device. The communication device 1100 may also include at least one memory 1120. The memory 1120 stores the computer programs, instructions, or data necessary for implementing any of the above method embodiments; the processor 1110 may execute the computer programs, instructions, or data stored in the memory 1120 to complete the interleaving method or deinterleaving method of any of the above embodiments.

[0238] Optionally, the communication device 1100 may further include a communication interface 1130, and the communication device 1100 may exchange information with other devices through the communication interface 1130. Exemplarily, the communication interface 1130 may be a transceiver, circuit, bus, module, pin, or other types of interfaces.

[0239] The coupling in this application is an indirect coupling or communication connection between devices, units or modules, which can be electrical, mechanical or other forms, and is used for information exchange between devices, units or modules. The processor 1110 may cooperate with the memory 1120 and the communication interface 1130. The specific connection medium between the above-mentioned processor 1110, memory 1120 and communication interface 1130 is not limited in this application.

[0240] like Fig.16 , the present application also provides a chip (or chip system). The chip (or chip system) 30 may include a circuit 31 and an input / input interface 32. The circuit 31 may be a logic circuit, an integrated circuit, etc., and the input / output interface 32 may also be an input / output circuit, or an interface circuit, which can input information (or receive information) and output information (or send information). Optionally, the chip system may be composed of chips, or may include chips and other discrete devices. The chip 30 may be used to execute the methods performed by the encoding device or the decoding device in each embodiment of the present application.

[0241] In addition, the present application also provides a computer-readable storage medium, in which computer instructions are stored. When the computer instructions are run on a computer, the operations and / or processing performed by the encoding device or decoding device in each method embodiment of the present application are executed.

[0242] The present application also provides a computer program product, which includes computer program code or instructions. When the computer program code or instructions are run on a computer, the operations and / or processing performed by the encoding device or decoding device in the various method embodiments of the present application are executed.

[0243] In addition, the present application also provides a chip, the chip including a processor. A memory for storing a computer program is provided independently of the chip, and the processor is used to execute the computer program stored in the memory, so that the operation and / or processing performed by the encoding device or the decoding device in any method embodiment is executed.

[0244] Furthermore, the chip may further include a communication interface. The communication interface may be an input / output interface, or an interface circuit, etc. Furthermore, the chip may further include a memory.

[0245] The present application provides a communication system, including an encoding device and a decoding device, wherein the encoding device is used to implement S210 to S240, and the decoding device is used to implement S250 to S280. In some embodiments, the encoding device is Fig.14 or Fig.15 a communication device as an encoding device, or Fig.16 A chip used to implement an encoding device.

[0246] In various embodiments of the present application, "plurality" includes two or more than two.

[0247] In this application, the processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, and may implement or execute the methods, steps, and logic block diagrams disclosed in this application. A general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the method disclosed in this application may be directly embodied as being executed by a hardware processor, or may be executed by a combination of hardware and software modules in the processor.

[0248] The memory may be a non-volatile memory, such as a hard disk drive (HDD) or a solid-state drive (SSD), or a volatile memory, such as a random-access memory (RAM). The memory is any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory in the present application may also be a circuit or any other device that can realize a storage function, for storing program instructions and / or data.

[0249] The technical solution provided in this application can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in this application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a terminal device, an access network device or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more available media integrated. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a digital video disc (DVD)), or a semiconductor medium, etc.

[0250] In the present application, under the premise of no logical contradiction, the examples may reference each other, for example, the methods and / or terms between method embodiments may reference each other, for example, the functions and / or terms between device embodiments may reference each other, for example, the functions and / or terms between device examples and method examples may reference each other.

[0251] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0252] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0253] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0254] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0255] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0256] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0257] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. An interleaving method, It is characterized in that include: Obtain a first codeword sequence to be interleaved, the first codeword sequence corresponds to a base matrix of a low-density parity check code LDPC, the column weight of the columns included in the base matrix is ​​related to the energy level of the bit position included in the orthogonal amplitude modulation QAM symbol, the first codeword sequence includes X groups, X is greater than or equal to 2, and X is a positive integer; Interleaving the first codeword sequence to obtain a second codeword sequence; Mapping the second codeword sequence onto QAM symbols; Output modulated QAM symbols.

2. The method according to claim 1, It is characterized in that The column weight of the base matrix is ​​related to the energy level of the bit position contained in the QAM symbol, including: The column weight of the base matrix includes at least two intervals, the minimum column weight in a first interval of the at least two intervals is greater than the maximum column weight in a second interval of the at least two intervals, and the energy level corresponding to the first interval is less than the energy level corresponding to the second interval.

3. The method according to claim 2, It is characterized in that Each of the at least two intervals includes one or more column weights, wherein the at least two intervals include a third interval, and the column weights included in the third interval change non-continuously and monotonically.

4. The method according to any one of claims 1 to 3, It is characterized in that The columns included in the base matrix correspond to at least two subsets; The step of interleaving the first codeword sequence to obtain the second codeword sequence includes: The second codeword sequence is obtained by interleaving the bits in the first subset corresponding to the bits in the first subset of the at least two subsets, wherein the first subset is the information column with the smallest degree in the base matrix, and the bits in the first subset correspond to the first A bit positions of the QAM symbol in order from high to low energy levels, and A is a positive integer.

5. The method according to claim 4, It is characterized in that The number N of variable nodes with the smallest degree in A and the base matrix min And the length E of the first codeword sequence satisfies the following relationship: Among them, round represents the rounding function.

6. The method according to any one of claims 1 to 5, It is characterized in that The columns included in the base matrix correspond to at least two subsets; The step of interleaving the first codeword sequence to obtain the second codeword sequence includes: The interleaving is performed on a second subset of the at least two subsets to obtain the second codeword sequence, wherein the second subset is the information column with the largest degree among the at least two subsets, and the bits in the second subset correspond to the first A bit positions of the QAM symbol in order from low to high energy levels, where A is a positive integer.

7. The method according to claim 6, It is characterized in that The number N of variable nodes with the largest degree in A and the base matrix max And the length E of the first codeword sequence satisfies the following relationship: Among them, round represents the rounding function.

8. The method according to any one of claims 1 to 3, It is characterized in that The columns included in the base matrix correspond to at least two subsets; The step of interleaving the first codeword sequence to obtain the second codeword sequence includes: The interleaving is performed on the bits in the first subset of the at least two subsets to obtain the second codeword sequence, wherein the first subset is the information column with the smallest degree among the at least two subsets, and the bits in the first subset correspond to A bit positions of other energy levels of the QAM symbol except the lowest energy level.

9. The method according to claim 8, It is characterized in that The number N of variable nodes with the smallest degree in A and the base matrix min And the length E of the first codeword sequence satisfies the following relationship: Here, round represents a rounding function.

10. The method according to any one of claims 1 to 3, It is characterized in that The columns included in the base matrix correspond to at least two subsets; The step of interleaving the first codeword sequence to obtain the second codeword sequence includes: The interleaving is performed on the bits in the second subset of the at least two subsets to obtain the second codeword sequence, where the second subset is the information column with the largest degree in the at least two subsets, and the bits in the second subset correspond to A bits of other energy levels other than the highest energy level of the QAM symbol, where A is a positive integer.

11. The method according to claim 10, It is characterized in that The number N of variable nodes with the largest degree in A and the base matrix max And the length E of the first codeword sequence satisfies the following relationship: Among them, round represents the rounding function.

12. The method according to any one of claims 1 to 3, It is characterized in that X=2, the QAM symbol includes Q m bits; The Q m A bits of the bits are from the first group of the X groups, and the Q m The remaining Q m - A bits are from the second group of the X groups, the A bits correspond to the first interval of the at least two intervals in descending order of column weight, and the A bits are located in the Q m The energy levels of the bits are in the order of the first A bits from low to high, where A is a positive integer.

13. The method according to claim 12, It is characterized in that The value of A is determined based on the number N of variable nodes with the largest degree in the base matrix. max and the length E of the first codeword sequence is determined by N max and E are positive integers.

14. The method according to claim 13, It is characterized in that The A,N max and E satisfy the following relationship: Among them, round represents the rounding function.

15. The method according to any one of claims 1 to 3, It is characterized in that X=2, the QAM symbol includes Q m bits; The Q m A bits of the bits are from the first group of the X groups, and the Q m The remaining Q m - A bits are from the second group of the X groups, the A bits correspond to the first interval of the at least two intervals in the order from low to high column weight, and the A bits are located in the Q m The energy levels of the bits are the first A bit positions in descending order, where A is a positive integer.

16. The method according to claim 15, It is characterized in that The value of A is determined based on the number N of variable nodes with the smallest degree in the base matrix. min and the length E of the first codeword sequence is determined by N min and E are positive integers.

17. The method according to claim 16, It is characterized in that The A,N min and E satisfy the following relationship: Among them, round represents the rounding function.

18. The method according to any one of claims 1 to 3, It is characterized in that X=2, the QAM symbol includes Q m bits; The Q m A bits of the bits are from the first group of the X groups, and the Q m The remaining Q m - A bits are from the second group of the X groups, the A bits correspond to the first interval of the at least two intervals in descending order of column weight, and the A bits are located in the Q m There are A bit positions corresponding to energy levels other than the highest energy level in the bits, where A is a positive integer.

19. The method according to claim 18, It is characterized in that The value of A is determined based on the number N of variable nodes with the largest degree in the base matrix. max and the length E of the first codeword sequence is determined by N max and E are positive integers.

20. The method according to claim 19, It is characterized in that The A,N max and E satisfy the following relationship: Among them, round represents the rounding function.

21. The method according to any one of claims 1 to 3, It is characterized in that X=2, the QAM symbol includes Q m bits; The Q m A bits of the bits are from the first group of the X groups, and the Q m The remaining Q m - A bits are from the second group of the X groups, the A bits correspond to the first interval of the at least two intervals in the order from low to high column weight, and the A bits are located in the Q m There are A bit positions corresponding to energy levels other than the lowest energy level in the bits, where A is a positive integer.

22. The method according to claim 21, It is characterized in that The value of A is determined based on the number N of variable nodes with the smallest degree in the base matrix. min and the length E of the first codeword sequence is determined by N min and E are positive integers.

23. The method according to claim 22, It is characterized in that The A,N min and E satisfy the following relationship: Among them, round represents the rounding function.

24. The method according to any one of claims 1 to 3, It is characterized in that X=3, the QAM symbol includes Q m bits; The Q m The first A bits in the order of energy level from low to high are from the first group of the X groups, and the Q m The bits in the first B bit positions in the order of energy level from high to low in the bits are from the second group of the X groups, and the Q m The remaining Q m -AB bits are from a third group of the X groups, wherein the A bits correspond to the first interval of the at least two intervals in descending order of column weight, and the B bits correspond to the first interval of the at least two intervals in descending order of column weight.

25. The method according to claim 24, It is characterized in that A and B respectively satisfy the following relationship: Among them, round represents the rounding function, N max Represents the number of variable nodes with the largest degree in the base matrix, N min The table represents the number of variable nodes with the smallest degree in the base matrix, and E represents the length of the first codeword sequence.

26. A communication device, It is characterized in that include: A communication module, configured to obtain a first codeword sequence to be interleaved, wherein the first codeword sequence corresponds to a base matrix of LDPC, the column weight of the columns included in the base matrix is ​​related to the energy level of the bit position included in the QAM symbol, and the first codeword sequence includes X groups, X is greater than or equal to 2, and X is a positive integer; Processing modules for: Interleaving the first codeword sequence to obtain a second codeword sequence; Mapping the second codeword sequence onto QAM symbols; The communication module is also used to output the modulated QAM symbols.

27. A communication device, It is characterized in that It includes a communication interface and a circuit, wherein the communication interface is used to receive a first codeword sequence to be interleaved and input the first codeword sequence to the circuit; the circuit is used to execute the method as described in any one of claims 1-25 to interleave the first codeword sequence to obtain a second codeword sequence, and map the second codeword sequence to QAM symbols; the communication interface is also used to output modulated QAM symbols.

28. A communication device, It is characterized in that The method comprises a module or a unit for executing the method as claimed in any one of claims 1 to 25.

29. A communication device, It is characterized in that include: A processor, the processor is coupled to the memory, and the processor is used to execute the computer program or instructions stored in the memory to enable the communication device to perform the method according to any one of claims 1 to 25.

30. A computer readable storage medium, It is characterized in that The computer-readable storage medium stores computer instructions. When the computer instructions are executed on a computer, the method according to any one of claims 1 to 25 is implemented.

Images