Power device and its manufacturing method

Abstract

The present application discloses a power device and a preparation method thereof, wherein the device comprises: a substrate, the substrate comprising a first surface; an epitaxial layer, the epitaxial layer being arranged on the first surface; an active region, the active region being arranged on a side of the epitaxial layer facing away from the substrate; a variable doping terminal structure, the variable doping terminal structure being arranged on a side of the epitaxial layer facing away from the substrate, the variable doping terminal structure comprising a plurality of film layers stacked in a first direction, the first direction being perpendicular to the substrate and pointing in a direction away from the substrate, the plurality of film layers having different doping concentrations, the length of the plurality of film layers in a second direction decreasing along the first direction, the plurality of film layers having a slope structure at one end in the second direction, the second direction being perpendicular to the first direction and pointing from the active region to the slope structure, so as to solve the problems in the prior art of the terminal structure of the power device being complex in preparation process, limited in injection doping depth, difficult in process control, and difficult in achieving the designed doping target.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a power device and a method for manufacturing the same. Background Art

[0002] In the design and manufacture of power devices, a terminal structure is usually set around the active area to solve the problem of reduced voltage resistance caused by the curvature of the cell cylindrical junction outside the active area. Figure 1 As shown in the figure, the field-limiting ring terminal structure is widely used due to its simple manufacturing process and good voltage resistance. However, the field-limiting ring terminal structure requires many voltage-resistant P-type rings (for N-type devices) to share the voltage strength of the terminal structure, resulting in a large chip area. Especially in high-voltage devices, the terminal has gradually been abandoned because its protection capability for the device is too low.

[0003] In recent years, lateral variable doping (VLD) and junction termination (JTE) have been widely adopted to achieve higher withstand voltage in a smaller terminal area. Figure 2 As shown, the structure consists of multiple continuous voltage-withstand rings, with the junction depth and doping concentration of the voltage-withstand rings decreasing from the active area to the terminal edge, achieving a high voltage-withstand level in a smaller area. However, the VLD structure relies on implantation doping, which is a complex process. Furthermore, the junction depth of some voltage-withstand rings is deep, making process control difficult and leading to high process difficulty. This is particularly true in silicon carbide devices, where the implantation doping depth is limited and the impurity activation rate is significantly affected by the process, making it difficult to achieve design goals.

[0004] The terminal of the JTE structure is as follows Figure 3 As shown, higher withstand voltage can be achieved in a smaller area. However, the JTE terminal also requires implantation doping. The shallowly doped portion is highly sensitive to impurity concentration, making process control difficult. Furthermore, the high surface electric field prevents it from being well-used. Especially in silicon carbide power devices, the impurity activation rate is significantly affected by the process, making it difficult to achieve the pre-designed doping target. Summary of the Invention

[0005] The present application provides a power device and a preparation method thereof to solve the problem in the prior art that the preparation process of the terminal structure of the power device is complex and the implantation doping depth is limited, which makes process control difficult.

[0006] According to one aspect of the present application, a power device is provided, comprising: a substrate, the substrate comprising a first surface; an epitaxial layer, the epitaxial layer being arranged on the first surface; an active region, the active region being arranged on a side of the epitaxial layer facing away from the substrate; a variable-doped terminal structure, the variable-doped terminal structure being arranged on a side of the epitaxial layer facing away from the substrate, the variable-doped terminal structure comprising a plurality of film layers stacked in a first direction, the first direction being perpendicular to the substrate and pointing in a direction away from the substrate, the plurality of film layers having different doping concentrations, the lengths of the plurality of film layers in a second direction decreasing along the first direction, the plurality of film layers having a slope structure at one end of the second direction, the second direction being perpendicular to the first direction and pointing from the active region to the slope structure.

[0007] Optionally, the film layer in contact with the epitaxial layer among the multiple film layers is the first film layer, the doping concentration of the first film layer is the first doping concentration, and the doping concentrations of the remaining film layers are all greater than the first doping concentration and increase along the first direction.

[0008] Optionally, the doping concentration of the epitaxial layer is a second doping concentration, the doping concentration of the substrate is a third doping concentration, and the second doping concentration is less than the third doping concentration; the doping type of the substrate is the same as the doping type of the epitaxial layer; the doping type of the variable doping terminal structure is different from the doping type of the epitaxial layer.

[0009] Optionally, the active area has at least one trench gate structure, and the trench gate structure includes: a gate, the gate is arranged on the side of the variable-doped terminal structure away from the slope structure, and the depth of the gate in the first direction is greater than or equal to the depth of the variable-doped terminal structure; and a gate oxide layer, the gate oxide layer is located at least on the bottom surface of the gate and two opposite side surfaces of the gate in the first direction.

[0010] Optionally, the active area also includes: a first heavily doped region, which is arranged on a side of the gate away from the variable-doped terminal structure in the second direction and away from the side of the substrate in the first direction, wherein the depth of the first heavily doped region in the first direction is less than the depth of the variable-doped terminal structure, and the doping type of the first heavily doped region is different from the doping type of the variable-doped terminal structure.

[0011] Optionally, the active area includes: a second heavily doped region, the second heavily doped region is located in the epitaxial layer, and the second heavily doped region is located on the side of the variable doped terminal structure away from the slope structure, and the doping type of the second heavily doped region is the same as the doping type of the variable doped terminal structure.

[0012] According to another aspect of the present application, a method for preparing a power device is provided, comprising: providing a substrate, the substrate comprising a first surface; forming an epitaxial layer on the first surface; forming a variable doping terminal structure on a side of the epitaxial layer away from the substrate, wherein the variable doping terminal structure comprises a multilayer film layer stacked in a first direction, the first direction being perpendicular to the substrate and pointing in a direction away from the substrate, the multilayer film layers having different doping concentrations, the length of the multilayer film layer in a second direction decreasing along the first direction, the multilayer film layer having a slope structure at one end of the second direction, the second direction being perpendicular to the first direction; forming an active region on a side of the epitaxial layer away from the substrate, the active region being formed on a side of the variable doping terminal structure away from the slope structure.

[0013] Optionally, the step of forming the variable doping terminal structure includes: using an epitaxial growth process to form a stacked multilayer epitaxial layer on the surface of the epitaxial layer away from the substrate, the multilayer epitaxial layer having different doping concentrations; using an etching method to form the slope structure at one end of the multilayer epitaxial layer away from the active area in the second direction to form a variable doping terminal structure.

[0014] Optionally, the step of forming the active area includes: using a doping process to form a first heavily doped region on the side of the variable-doped terminal structure away from the slope structure, wherein the depth of the first heavily doped region in the first direction is less than the depth of the variable-doped terminal structure, and the length of the first heavily doped region in the second direction is less than the length of the multilayer film layer at the side away from the substrate and at the maximum vertical distance from the substrate; the doping type of the first heavily doped region is different from the doping type of the variable-doped terminal structure; using an etching process to form a groove at one end of the first heavily doped region that contacts the variable-doped terminal structure, and forming a gate oxide layer on the inside of the groove; using a deposition process to fill the groove on the surface of the gate oxide layer to form a gate.

[0015] Optionally, the step of forming the active region includes: doping to form a second heavily doped region on a side of the variable-doped terminal structure away from the slope structure, wherein the doping type of the second heavily doped region is the same as the doping type of the variable-doped terminal structure.

[0016] The technical solution of the present invention is applied to provide a power device, wherein a substrate includes a first surface, an epitaxial layer is arranged on the first surface, an active area is arranged on a side of the epitaxial layer away from the substrate, and a variable doping terminal structure is arranged on a side of the epitaxial layer away from the substrate. Since the variable doping terminal structure includes a multilayer film layer stacked in a first direction, the first direction is perpendicular to the substrate and points in a direction away from the substrate, the multilayer film layer has different doping concentrations, the length of the multilayer film layer in the second direction decreases along the first direction, the multilayer film layer has a slope structure at one end in the second direction, the second direction is parallel to the first direction and is a direction from the active area to the slope structure, and the slopes of each layer of the slope structure are different from those of the non-slope layers. The film layers with the same doping concentration correspond one to one, so that the same surface variable doping structure as the lateral variable doping (VLD) structure can be achieved, that is, the junction depth and doping concentration gradually decrease from the active area to the edge of the terminal structure, achieving the same high voltage resistance level as VLD; and the above-mentioned terminal structure with multiple film layers and variable doping can be prepared by epitaxial growth and etching processes. In the epitaxial growth process, the doping concentration of impurities is relatively easy to control, and the activation rate is relatively fixed, and it is easy to achieve the target doping distribution. It is not only suitable for silicon-based power devices, but also can reduce the process difficulty of ion implantation in silicon carbide power devices, thereby improving the protection capability of the terminal structure to the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings, which constitute part of this application, are intended to provide a further understanding of this application. The exemplary embodiments and descriptions of this application are intended to explain this application and do not constitute an improper limitation on this application. In the accompanying drawings:

[0018] Figure 1 This is a schematic cross-sectional view of a field limiting ring terminal structure provided by the prior art;

[0019] Figure 2 This is a schematic cross-sectional view of a terminal structure with laterally variable doping according to the prior art;

[0020] Figure 3 It is a schematic cross-sectional structure diagram of a terminal structure of a junction terminal provided according to the prior art;

[0021] Figure 4 is a schematic cross-sectional structural diagram of a first power device provided according to an embodiment of the present application;

[0022] Figure 5 is a schematic cross-sectional structural diagram of a second power device provided according to an embodiment of the present application;

[0023] Figure 6 is a schematic cross-sectional structural diagram of a third power device provided according to an embodiment of the present application;

[0024] Figure 7 is a schematic cross-sectional structural diagram of a fourth power device provided according to an embodiment of the present application;

[0025] Figure 8 is a schematic cross-sectional structural diagram of a fifth power device provided according to an embodiment of the present application;

[0026] Figure 9 is a flow chart of a method for preparing a power device according to an embodiment of the present application;

[0027] Figure 10 This is a schematic diagram of the process structure of a method for preparing a power device according to an embodiment of the present application;

[0028] Figure 11 It is a schematic diagram of the process structure of another method for preparing a power device provided in an embodiment of the present application.

[0029] The above drawings include the following reference numerals:

[0030] 20. Substrate; 30. Epitaxial layer; 31. Dielectric layer; 40. First heavily doped region; 41. Second heavily doped region; 50. Variable doping terminal structure; 501. First film layer; 502. Second film layer; 503. Third film layer; 504. Fourth film layer; 505. Fifth film layer; 506. Sixth film layer; 50n. Nth film layer; 51. P-type ring; 511. First P-type ring; 512. Second P-type ring; 51n. Nth P-type ring; 52. Third doped region; 53. Fourth doped region; 54. Heavy doped region; 61. First conductive layer; 62. Second conductive layer; 70. Gate oxide layer; 71. Trench; 80. Gate; 90. Isolation dielectric layer; 91. Contact hole. DETAILED DESCRIPTION

[0031] It should be noted that, in the absence of conflict, the embodiments and features of the embodiments in this application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0032] In order to enable those skilled in the art to better understand the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of this application.

[0033] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0034] As described in the background art, in the prior art, such as Figure 1 As shown, the terminal structure is a field-limiting ring structure. Taking an N-type device as an example, this structure includes: an epitaxial layer 30 is provided on a substrate 20; multiple P-type rings 51 are spaced apart on the side of the epitaxial layer 30 facing away from the substrate 20; a heavily doped region 54 is provided on one side of the multiple P-type rings 51 to form an active region; a dielectric layer 31 is formed on the side of the multiple P-type rings 51 facing away from the substrate 20; a first conductive layer 61 is formed on the side of the heavily doped region 54 facing away from the substrate 20; and a second conductive layer 62 is formed on the side of the substrate 20 facing away from the epitaxial layer 30. The multiple P-type rings 51 serve to contribute to the terminal structure's withstand voltage strength. However, these multiple P-type rings 51 occupy a larger chip area, resulting in a gradual abandonment of the chip due to their low efficiency, particularly in high-voltage devices.

[0035] Lateral variable doping (VLD) can achieve higher withstand voltage in a smaller terminal area and is widely adopted, such as Figure 2As shown, the terminal structure of the lateral variable doping (VLD) includes: a second conductive layer 62, a substrate 20 and an epitaxial layer 30 arranged in sequence, a heavily doped region 54 and a plurality of continuous P-type rings, a first P-type ring 511, a second P-type ring 512...an n-th P-type ring 51n, are formed on the side of the epitaxial layer 30 away from the substrate, wherein different P-type rings have different doping concentrations, and the doping concentration of each P-type ring is in the order of the first P-type ring 511>the second P-type ring 512>...>the n-th P-type ring The sequential arrangement of the rings 51n, namely, the junction depth and doping concentration of the first P-type ring 511, the second P-type ring 512, and the nth P-type ring 51n, decreases from the active region to the terminal edge. A dielectric layer 31 is formed on the side of the first P-type ring 511, the second P-type ring 512, and the nth P-type ring 51n facing away from the substrate 20. A first conductive layer 61 is formed on the side of the heavily doped region 54 facing away from the substrate 20, and a second conductive layer 62 is formed on the side of the substrate 20 facing away from the epitaxial layer 30. Although a terminal structure using laterally varied lateral doping (VLD) can achieve a high withstand voltage in a small area, the VLD structure relies on implantation doping, which is a complex process. Furthermore, some rings have deep junction depths, which makes the process difficult to achieve. This is particularly true in silicon carbide devices, where implantation doping depth is limited and impurity activation rates are significantly affected by the process, making it difficult to achieve design goals.

[0036] Junction termination (JTE) can also achieve higher withstand voltage in a smaller terminal area and is widely adopted, such as Figure 3 As shown, the terminal structure of the JTE includes: a second conductive layer 62, a substrate 20 and an epitaxial layer 30 arranged in sequence, a heavily doped region 54, a third doped region 52 and a fourth doped region 53 are formed on the side of the epitaxial layer 30 facing away from the substrate 20, the doping concentration of the third doped region 52 is greater than the doping concentration of the fourth doped region 53, and a dielectric layer 31 is formed on the side of the third doped region 52 and the fourth doped region 53 facing away from the substrate, a first conductive layer 61 is formed on the heavily doped region 54 facing away from the substrate 20, and a second conductive layer 62 is formed on the side of the substrate 20 facing away from the epitaxial layer 30. Among them, the shallowly doped parts of the third doped region 52 and the fourth doped region 53 are highly sensitive to impurity concentrations, making it difficult to control the process, and the surface electric field is high, so they cannot be well applied. In particular, in silicon carbide power devices, since the impurity activation rate is greatly affected by the process, it is difficult to achieve the final design doping target. In order to solve the above technical problems, the present application provides a power device and a preparation method thereof.

[0037] According to one aspect of the present application, a power device is provided, such as Figures 4 to 8As shown, it includes: a substrate 20, the substrate 20 includes a first surface; an epitaxial layer 30, the epitaxial layer 30 is arranged on the first surface; an active area, the active area is arranged on the side of the epitaxial layer 30 away from the substrate 20; a variable doping terminal structure 50, the variable doping terminal structure 50 is arranged on the side of the epitaxial layer 30 away from the substrate 20, the variable doping terminal structure 50 includes a plurality of film layers stacked in a first direction A, the first direction A is perpendicular to the substrate 20 and points to a direction away from the substrate 20, the plurality of film layers have different doping concentrations, the lengths of the plurality of film layers in the second direction B decrease along the first direction A, the plurality of film layers have a slope structure at one end of the second direction B, and the second direction B is perpendicular to the first direction A and points from the active area to the slope structure.

[0038] Specifically, the terminal structure of this power device comprises multiple film layers formed using epitaxial growth and etching processes. During the epitaxial growth process, the impurity doping concentration is relatively easy to control, and the activation rate is relatively constant, making it easy to achieve the target doping profile. This approach is not only applicable to silicon-based power devices, but also circumvents the difficulties of implantation doping in silicon carbide power devices, improving the efficiency of their terminal structures. The various layers in the variable doping terminal structure of this power device have different doping concentrations. Through an etching process, the various film layers with different doping concentrations in the variable doping terminal structure form a corresponding relationship with the sloped structure, achieving a surface variable doping structure similar to a laterally variable doping (VLD) structure, where the junction depth and doping concentration gradually decrease from the active area to the edge of the terminal structure, achieving the same high withstand voltage level as VLD.

[0039] In some specific embodiments, the slope structure is a step structure.

[0040] Specifically, if Figure 4 As shown, the multilayer film layers in the variable doping terminal structure 50 form a one-to-one correspondence with each step in the step structure, and each step in the step structure has a different doping concentration, so that the step structure realizes the same surface variable doping structure as the lateral variable doping structure, that is, the junction depth and doping concentration gradually decrease from the active area to the edge of the terminal structure, achieving the same higher voltage resistance level as VLD.

[0041] In other specific embodiments, Figure 5 As shown, the side of the variable-doped terminal structure 50 facing away from the active area has a second surface, and the second surface is a plane. The multilayer film layer in the variable-doped terminal structure 50 has multiple first side surfaces at one end close to the slope structure, and the multiple first side surfaces are located in the second surface.

[0042] Specifically, if Figure 5As shown, the multiple first side surfaces have different doping concentrations, and the second surface of the terminal structure 50 with variable doping composed of the multiple first side surfaces forms a variable doping structure, thereby enabling the slope structure to achieve the same surface variable doping structure as the lateral variable doping structure, that is, the junction depth and doping concentration gradually decrease from the active area to the edge of the terminal structure, thereby achieving the same higher voltage resistance level as VLD.

[0043] In some further specific embodiments, Figure 6 As shown, the side of the variable doping terminal structure 50 facing away from the active area has a third surface, and the third surface is recessed in the first direction A. Specifically, similar to the planar second surface, the concave third surface formed by the multiple first side surfaces of the multiple film layers in the variable doping terminal structure 50 also forms a variable doping structure, thereby enabling the slope structure to achieve the same surface variable doping structure as the lateral variable doping structure, that is, the junction depth and doping concentration gradually decrease from the active area to the edge of the terminal structure, achieving the same high withstand voltage level as VLD.

[0044] In some specific embodiments, Figure 7 As shown, the side of the variable doping terminal structure 50 facing away from the active area has a fourth surface, which is convex in the first direction A. Specifically, similar to the planar second surface, the concave third surface formed by the multiple first side surfaces of the multiple film layers in the variable doping terminal structure 50 also forms a variable doping structure. This enables the slope structure to achieve the same surface variable doping structure as the lateral variable doping structure, that is, the junction depth and doping concentration gradually decrease from the active area to the edge of the terminal structure, achieving the same high withstand voltage level as VLD.

[0045] In some optional embodiments, the film layer in the multilayer film layers that contacts the epitaxial layer is the first film layer 501, the doping concentration of the first film layer 501 is the first doping concentration, and the doping concentrations of the remaining film layers are all greater than the first doping concentration and increase along the first direction A.

[0046] In the above optional embodiment, the variable doping terminal structure has multiple film layers, such as Figures 4 to 8As shown, exemplarily, the variable doping terminal structure includes the above-mentioned first film layer 501, and the second film layer 502, the third film layer 503, the fourth film layer 504...the nth film layer 50n stacked in sequence on the surface of the first film layer 501, wherein n is any integer greater than 4. The above-mentioned multi-layer film layers have the following doping concentration relationship: the first doping concentration is the lowest, the first doping concentration < the doping concentration of the second film layer 502 < the doping concentration of the third film layer 503 < the doping concentration of the fourth film layer 504 <...< the doping concentration of the nth film layer 50n. The specific doping concentration of each layer can be simulated based on the actual device voltage resistance requirements. The greater the device breakdown voltage, the more film layers are required. The minimum thickness of each layer is determined by the accuracy of the epitaxial process. It should be noted that, Figure 4 The middle film layer is only an example, and the multi-layer film layer may also be less than or equal to 4 film layers, which is not specifically limited in this application.

[0047] In some optional embodiments, such as Figures 4 to 8 As shown, the doping concentration of the above-mentioned epitaxial layer 30 is the second doping concentration, the doping concentration of the above-mentioned substrate 20 is the third doping concentration, and the above-mentioned second doping concentration is less than the above-mentioned third doping concentration; the doping type of the above-mentioned substrate is the same as the doping type of the above-mentioned epitaxial layer; the doping type of the above-mentioned variable doping terminal structure is different from the doping type of the above-mentioned epitaxial layer.

[0048] Specifically, the epitaxial layer 30 and the substrate 20 have the same doping type. Taking an N-type device as an example, the substrate 20 is an N-type doped substrate, the epitaxial layer 30 is an N-type doped epitaxial layer, and the variable doping terminal structure is P-type doping. Among them, the ion doping concentration of the substrate 20 is higher than the ion doping concentration of the epitaxial layer 30. The doping concentration and thickness of the epitaxial layer can be designed according to the size of the breakdown voltage.

[0049] In some specific embodiments, the variable doping termination structure is disposed on a side of the epitaxial layer facing away from the substrate and in contact with the active region.

[0050] In an optional embodiment, the above-mentioned variable doping terminal structure 50 is applied to a trench gate MOSFET device, such as Figures 4 to 7 As shown, the device also includes an active area, which is located on the side of the epitaxial layer 30 away from the slope structure of the variable-doped terminal structure 50. The above-mentioned active area includes: a gate 80, which is arranged on the side of the above-mentioned variable-doped terminal structure 50 away from the above-mentioned slope structure, and the length of the above-mentioned gate 80 in the first direction A is greater than or equal to the length of the above-mentioned variable-doped terminal structure 50; and a gate oxide layer 70, which is coated on the surface of the above-mentioned gate 80.

[0051] Specifically, the gate material may include metal, polysilicon material or metal silicide, wherein the metal material includes but is not limited to aluminum, copper, tantalum and tungsten or alloy materials. Polysilicon materials include polysilicon and doped polysilicon materials, which are not specifically limited in this application. Metal silicide uses a metal material with a relatively high melting point, such as tungsten, titanium, cobalt or nickel, to dope polysilicon to form metal silicide, which has good conductive properties and high temperature resistance. The gate oxide layer 70 material includes silicon oxide, silicon nitride, aluminum oxide, etc., which are not specifically limited in this application.

[0052] In some optional embodiments, the active region further includes: a first heavily doped region 40, such as Figures 4 to 7 As shown, the first heavily doped region 40 is arranged on the side of the gate oxide layer 70 away from the variable doping terminal structure 50 in the second direction B, and away from the side of the substrate 20 in the first direction A, and the length of the first heavily doped region 40 in the first direction A is less than the length of the variable doping terminal structure 50, so that a portion of the multilayer film layer of the variable doping terminal structure 50 remains between the first heavily doped region 40 and the epitaxial layer 30. Because the first heavily doped region 40 and the retained multilayer film layer have different doping structures, that is, the first heavily doped region 40 and the retained multilayer film layer constitute the source in the MOSFET device, the doping region of the active region and the variable doping terminal structure 50 can be completed synchronously.

[0053] In another optional embodiment, the above-mentioned variable doping terminal structure 50 is applied to a diode device, such as Figure 8 As shown, the diode device includes: a second heavily doped region 41, the second heavily doped region 41 is located in the epitaxial layer 30, and the second heavily doped region 41 is located on the side of the variable doping terminal structure 50 away from the slope structure, the second heavily doped region 41 has the same doping type as the variable doping terminal structure 50, and a different doping type from the epitaxial layer 30, then the second heavily doped region 41 and the epitaxial layer 30 located between the second heavily doped region 41 and the substrate 20 form a PN junction, forming a diode device.

[0054] Alternatively, as Figure 8As shown, in the first direction A, the depth of the second heavily doped region 41 is deeper or shallower than the thickness of the variable doped terminal structure 50. When the depth of the second heavily doped region 41 is deeper than the thickness of the variable doped terminal structure 50, the second heavily doped region 41 and the epitaxial layer 30 form a PN junction; when the depth of the second heavily doped region 41 is shallower than the depth of the variable doped terminal structure 50, a portion of the multilayer film layer of the variable doped terminal structure 50 remains between the second heavily doped region 41 and the epitaxial layer 30. At this time, the second heavily doped region 41 and the remaining multilayer film layer together form a P region (or N region), and form a PN junction with the N region (or P region) of the epitaxial layer 30. Therefore, in the diode device, the P region (or N region) can be formed by secondary injection, or it can be completed simultaneously with the variable doped terminal structure 50. In addition, Figure 8 The positional relationship of other structures shown in Figure 4 The positional relationship of the structures shown in is the same and will not be repeated here.

[0055] In other optional embodiments, such as Figures 4 to 8 As shown, the power device further includes a first conductive layer 61, which is disposed on a surface of the active region facing away from the substrate 20; and a second conductive layer 62, which is disposed on a surface of the substrate 20 opposite to the first surface. The first conductive layer 61 serves as a source conductive layer, and the second conductive layer 62 serves as a drain conductive layer.

[0056] Specifically, if Figures 4 to 7 As shown, in the MOSFET device, the first conductive layer 61 forms an ohmic contact with the first heavily doped region 40, thereby reducing the on-resistance; Figure 8 As shown, in the diode device, the first conductive layer 61 contacts the second heavily doped region 41 to form an ohmic contact, which also reduces the on-resistance.

[0057] According to another aspect of the present application, a method for preparing a power device is provided, such as Figure 9 As shown, the following steps are included:

[0058] Step S1: providing a substrate, wherein the substrate includes a first surface;

[0059] Step S2: forming an epitaxial layer on the first surface;

[0060] Step S3: forming a variable doping terminal structure on a side of the epitaxial layer away from the substrate, wherein the variable doping terminal structure includes a plurality of film layers stacked in a first direction, the first direction being perpendicular to the substrate and pointing away from the substrate, the plurality of film layers having different doping concentrations, the length of the plurality of film layers in a second direction decreasing along the first direction, and the plurality of film layers having a slope structure at one end of the second direction, the second direction being perpendicular to the first direction;

[0061] Step S4: forming an active region on a side of the epitaxial layer away from the substrate, wherein the active region is formed on a side of the variable-doping terminal structure away from the slope structure.

[0062] By adopting the above-mentioned preparation method of the embodiment of the present application, a terminal structure with variable doping is formed through epitaxial and etching processes, and the film layers with different doping concentrations in the variable doping terminal structure form a corresponding relationship with the slope structure, thereby realizing a surface variable doping structure identical to a lateral variable doping (VLD) structure, that is, the junction depth and doping concentration gradually decrease from the active area to the edge of the terminal structure, thereby achieving the same high withstand voltage level as VLD; and, the above-mentioned terminal structure with multiple film layers and variable doping can be prepared by epitaxial growth and etching processes. In the epitaxial growth process, the doping concentration of impurities is relatively easy to control, and the activation rate is relatively fixed, making it easy to achieve the target doping distribution. It is not only applicable to silicon-based power devices, but also can reduce the process difficulty of ion implantation in silicon carbide power devices, thereby improving the protection capability of its terminal structure for the device.

[0063] The following describes in more detail exemplary embodiments of the method for preparing a power device according to the present application, with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in a variety of different forms and should be construed as being limited to the embodiments described herein. It should be understood that these embodiments are provided to make the disclosure of this application thorough and complete, and to fully convey the concepts of these exemplary embodiments to those skilled in the art.

[0064] First, proceed to step S1: Figure 10 (a) and Figure 11 As shown in (a), a substrate 20 is provided, and the substrate 20 includes a first surface.

[0065] Specifically, the substrate material includes but is not limited to semiconductor materials such as silicon, silicon carbide and gallium nitride, and this application does not make specific limitations.

[0066] After the step of providing the substrate 20, step S2 is performed: Figure 10 (a) and Figure 11 As shown in (a), an epitaxial layer 30 is formed on the first surface of the substrate 20 .

[0067] Specifically, the epitaxial layer material includes but is not limited to semiconductor materials such as silicon, silicon carbide and gallium nitride, which are not specifically limited in this application. The doping type of the epitaxial layer is the same as the doping type of the substrate, and the ion doping concentration of the epitaxial layer is less than the doping concentration of the substrate.

[0068] After the step of forming the epitaxial layer 30, step S3 is performed: Figure 10 (b) and Figure 11 As shown in FIG. 5( b ), a terminal structure 50 with variable doping is formed on the side of the epitaxial layer 30 facing away from the substrate 20 .

[0069] Specifically, an epitaxial growth process or a deposition process is used to form a stacked multilayer film layer on the surface of the above-mentioned epitaxial layer 30 facing away from the substrate 20, and the multilayer film layer includes but is not limited to a first film layer 501, a second film layer 502, a third film layer 503; a fourth film layer 504, a fifth film layer 505 and a sixth film layer 506, and the first film layer 501, the second film layer 502, the third film layer 503; the fourth film layer 504, the fifth film layer 505 and the sixth film layer 506 have different doping concentrations; an etching process is used to form a slope structure at one end of the multilayer epitaxial layer to form a variable doping terminal structure 50, wherein the doping type of the variable doping terminal structure 50 is different from the doping type of the epitaxial layer 30 and the substrate 20, and the doping concentration of the first film layer 501 is less than the doping concentration of the second film layer 502, less than the doping concentration of the third film layer 503, less than the doping concentration of the fourth film layer 504, less than the doping concentration of the fifth film layer 505, and less than the doping concentration of the sixth film layer 506.

[0070] In some optional embodiments, the epitaxial layers of the variable doping terminal structure 50 achieve different doping concentrations in each film layer by controlling the reaction gas flow in the epitaxial growth process or the deposition process, and the slope structure exposes the inner surface of the differently doped epitaxial layers, achieving a surface structure similar to that of lateral variable doping, that is, the junction depth and doping concentration gradually decrease from the active area to the terminal edge, and also has the same high voltage resistance and high terminal efficiency effects as lateral variable doping and junction termination.

[0071] Specifically, the epitaxial growth process is to grow a new crystalline layer on the substrate. The crystal orientation value of the new crystalline layer depends on the crystal orientation of the substrate, that is, the new crystalline layer is an epitaxial layer extending outward from the substrate. The impurity concentration in the epitaxial layer formed by the epitaxial growth process can be conveniently adjusted by controlling the impurity content in the reaction gas flow, without being affected by the impurity type and doping level in the substrate. During the process of forming the film layer by the epitaxial growth process, the reaction gas flow can be controlled to achieve different doping concentrations in each film layer, thereby forming a variable doping film layer structure. After the epitaxial growth is completed, an etching process is used to expose the inner surface of the differently doped epitaxial layer, simplifying the process and facilitating implementation.

[0072] After the step of forming the variable doping terminal structure 50, step S4 is performed: Figure 10 (c) ~ Figure 10 (h) and Figure 11 (c) ~ Figure 11 As shown in (e), an active region is formed on the surface of the epitaxial layer 30 and on the side of the re-doped terminal structure 50 away from the slope structure.

[0073] Specifically, the variable doping terminal structure 50 of the present application is applicable to but not limited to trench gate MOSFET power devices and diode power devices, wherein the P-type body region or N-type body region of the source region in the trench gate MOSFET can be completed synchronously with the epitaxial layer of the variable doping terminal structure, and in the diode structure, the P-well or N-well of the PN junction can also be completed synchronously with the epitaxial layer of the variable doping terminal structure, and secondary P-type or N-type injection doping can also be performed on the basis of epitaxy according to the withstand voltage and forward conduction performance.

[0074] In an optional embodiment, the variable doping terminal structure 50 is used in a trench gate MOSFET power device, and the steps of forming the active region are as follows: Figure 10 (c) ~ Figure 10 (h) includes: first, as Figure 10 As shown in (c), a doping process is used to form a first heavily doped region 40 on the side of the variable doping terminal structure 50 away from the slope structure, wherein in the first direction A, the depth of the first heavily doped region 40 is less than the thickness of the variable doping terminal structure 50, so that a portion of the variable doping terminal structure 50 is left between the first heavily doped region 40 and the epitaxial layer 30, and in the second direction B, the length of the first heavily doped region 40 is less than the film layer (i.e., the film layer) that is the largest distance from the substrate in the variable doping terminal structure 50. Figure 10 (c) the length of the sixth film layer 506); then, as Figure 10 As shown in (d), a trench 71 is formed at one end of the first heavily doped region 40 that contacts the variable doped terminal structure 50 by etching; then, as shown in FIG. Figure 10 As shown in (e), a gate oxide layer 70 is formed inside the trench by an oxidation process; then, as shown in Figure 10 As shown in (f), a gate material is filled on the surface of the gate oxide layer 70 by a deposition process and the gate material outside the trench is removed by an etching process to form a gate 80; then, as shown in Figure 10 As shown in (g), an isolation dielectric layer 90 is formed on the surface of the variable doping terminal structure 50, the first heavily doped region 40 and the gate 80 by a deposition process; then, as shown in FIG. Figure 10 As shown in (h), a contact hole 91 penetrating to the first heavily doped region 40 is formed in the isolation dielectric layer 90 by an etching process; then, as shown in Figure 10As shown in (i), a deposition process is used to deposit a conductive material in the contact hole and above the active area to form a second conductive layer 62, and a first conductive layer 61 is formed on the other surface of the substrate 20 opposite to the first surface to obtain a trench gate MOSFET power device, wherein the conductive material may include an alloy material composed of any one or more of silver, copper, aluminum, gold, titanium, platinum and palladium metals, which is not specifically limited in the embodiments of the present application.

[0075] Specifically, the gate 80 material includes metal, polysilicon material or metal silicide, wherein the metal material includes but is not limited to aluminum, copper, tantalum and tungsten or alloy materials. The polysilicon material includes polysilicon and doped polysilicon material, which is not specifically limited in this application. Metal silicide uses a metal material with a relatively high melting point, such as tungsten, titanium, cobalt or nickel, to dope polysilicon to form metal silicide, which has good conductive properties and high temperature resistance. The gate oxide layer 70 material includes silicon oxide, silicon nitride, aluminum oxide, etc., which is not specifically limited in this application.

[0076] The doping type of the first heavily doped region 40 is different from the doping type of the variable-doped terminal structure 50 .

[0077] In an optional embodiment, the variable doping terminal structure 50 is used in a diode power device, and the steps of forming the active region or PN junction are as follows: Figure 11 (c) ~ Figure 11 (e) includes: first, as Figure 11 As shown in (c), a doping process is used to form a second heavily doped region 41 on the side of the variable doping terminal structure 50 away from the slope structure, wherein in the second direction B, the length of the second heavily doped region 41 is less than the length of the film layer farthest from the substrate in the variable doping terminal structure 50 (i.e., the sixth film layer 506); then, as shown in FIG. Figure 11 As shown in (d), an isolation dielectric layer 90 is formed on the surface of the second heavily doped region 41 and the variable doped terminal structure 50 by a deposition process; then, as shown in Figure 11 As shown in (e), a contact hole 91 penetrating to the second heavily doped region 41 is formed in the isolation dielectric layer 90 by an etching process; then, as shown in Figure 11 As shown in (f), a second conductive layer 62 is formed on the surface of the second heavily doped region 41 by a deposition process, and a first conductive layer 61 is formed on the other surface of the substrate 20 opposite to the first surface, thereby obtaining a diode power device.

[0078] Specifically, the doping type of the second heavily doped region 41 is the same as the doping type of the variable-doped terminal structure 50 .

[0079] The power device formed by the power device manufacturing method of the present application will be described below in conjunction with embodiments.

[0080] Example 1

[0081] The method for preparing a trench gate MOSFET power device provided in this embodiment includes the following steps: Figure 10 As shown:

[0082] Providing a phosphorus-doped N-type silicon carbide substrate 20;

[0083] An N-type silicon carbide epitaxial layer 30 is formed on the N-type silicon carbide substrate 20 by using an epitaxial growth process. Figure 10 As shown in (a), the doping concentration of the N-type silicon carbide substrate 20 is greater than the doping concentration of the N-type silicon carbide epitaxial layer 30;

[0084] An epitaxial growth process is used to sequentially grow a boron-doped P-type silicon carbide variable-doped terminal structure 50 on the surface of the N-type silicon carbide epitaxial layer 30 away from the N-type silicon carbide substrate 20. The P-type silicon carbide variable-doped terminal structure 50 includes a first film layer 501, a second film layer 502, a third film layer 503, a fourth film layer 504, a fifth film layer 505, and a sixth film layer 506. An etching process is used to form a step structure at the same end of the first film layer 501, the second film layer 502, the third film layer 503, the fourth film layer 504, the fifth film layer 505, and the sixth film layer 506, as shown in FIG. Figure 10 (b)

[0085] An N-type first heavily doped region 40 is formed on the side of the P-type silicon carbide variable-doped terminal structure 50 away from the step structure by using an implantation doping process and a high-temperature ion activation process. Figure 10 (c)

[0086] A trench 71 is formed at one end of the N-type first heavily doped region 40 that contacts the P-type silicon carbide doped terminal structure 50 by etching. Figure 10 (d) shown;

[0087] The sidewalls of the trench and the bottom of the trench 71 are oxidized by an oxidation process to form a gate oxide layer 70, such as Figure 10 (e) as shown;

[0088] A deposition process is used to fill the trench with polysilicon material to form a gate 80, and an etching process is used to remove the polysilicon on the surface of the N-type first heavily doped region 40 and the P-type silicon carbide doped terminal structure 50. Figure 10 (f) shown;

[0089] Silicon oxide is deposited on the surfaces of the N-type first heavily doped region 40, the gate 80 and the P-type silicon carbide doped terminal structure 50 by a deposition process to form an isolation dielectric layer 90. Figure 10 (g) as shown;

[0090] The isolation dielectric layer 90 on the N-type first heavily doped region 40 is removed by etching to form a contact hole 91 penetrating the N-type first heavily doped region 40. Figure 10 (h)

[0091] A first conductive layer 61 is formed on the surface of the N-type first heavily doped region 40 and the gate 80 by a deposition process, and a second conductive layer 62 is formed on the side of the N-type silicon carbide substrate 20 away from the N-type silicon carbide epitaxial layer 30. Figure 10 (i) shown.

[0092] Example 2

[0093] The method for preparing a diode power device provided in this embodiment includes the following steps: Figure 11 As shown:

[0094] Providing a phosphorus-doped N-type silicon carbide substrate 20;

[0095] An N-type silicon carbide epitaxial layer 30 is formed on the N-type silicon carbide substrate 20 by using an epitaxial growth process. Figure 11 As shown in (a), the doping concentration of the N-type silicon carbide substrate 20 is greater than the doping concentration of the N-type silicon carbide epitaxial layer 30;

[0096] An epitaxial growth process is used to sequentially grow a boron-doped P-type silicon carbide variable-doped terminal structure 50 on the surface of the N-type silicon carbide epitaxial layer 30 away from the N-type silicon carbide substrate 20. The P-type silicon carbide variable-doped terminal structure 50 includes a first film layer 501, a second film layer 502, a third film layer 503, a fourth film layer 504, a fifth film layer 505, and a sixth film layer 506. An etching process is used to form a step structure at the same end of the first film layer 501, the second film layer 502, the third film layer 503, the fourth film layer 504, the fifth film layer 505, and the sixth film layer 506, as shown in FIG. Figure 11 (b)

[0097] The implantation doping process and the high temperature ion activation process are used to form a P-type second heavily doped region 41 on the side of the P-type silicon carbide variable doped terminal structure 50 away from the step structure. Figure 11 (c)

[0098] Silicon oxide is deposited on the surface of the P-type second heavily doped region 41 and the P-type silicon carbide doped terminal structure 50 by a deposition process to form an isolation dielectric layer 90. Figure 11 (d) shown;

[0099] The isolation dielectric layer 90 on the P-type second heavily doped region 41 is removed by etching to form a contact hole 91 penetrating to the P-type second heavily doped region 41. Figure 11 (e) as shown;

[0100] A first conductive layer 61 is formed on the surface of the P-type second heavily doped region 41 and the portion of the isolation dielectric layer 90 adjacent to the P-type second heavily doped region 41 by a deposition process, and a second conductive layer 62 is formed on the side of the N-type silicon carbide substrate 20 away from the N-type silicon carbide epitaxial layer 30, as shown in FIG. Figure 11 (f) shown.

[0101] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.

[0102] The above are merely embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.

Claims

1. A power device, characterized in that: include: a substrate comprising a first surface; an epitaxial layer disposed on the first surface; an active region, the active region being arranged on a side of the epitaxial layer facing away from the substrate; A variable doping terminal structure, wherein the variable doping terminal structure is arranged on the side of the epitaxial layer away from the substrate, the variable doping terminal structure includes a plurality of film layers stacked in a first direction, the first direction is perpendicular to the substrate and points in a direction away from the substrate, the plurality of film layers have different doping concentrations, the lengths of the plurality of film layers in the second direction decrease along the first direction, and the plurality of film layers have a slope structure at one end in the second direction, and the second direction is perpendicular to the first direction and points from the active area to the slope structure. The slope structure is a step structure, and the multilayer film layers in the variable doping terminal structure form a one-to-one correspondence with each step in the step structure. Each step in the step structure has a different doping concentration, so that the step structure realizes the same surface variable doping structure as the lateral variable doping structure, and the doping concentration of the step structure gradually decreases from the active area to the edge of the terminal structure.

2. The power device according to claim 1, wherein: The film layer in contact with the epitaxial layer among the multiple film layers is the first film layer, the doping concentration of the first film layer is the first doping concentration, and the doping concentrations of the remaining film layers are all greater than the first doping concentration and increase along the first direction.

3. The power device according to claim 1, wherein: The doping concentration of the epitaxial layer is a second doping concentration, the doping concentration of the substrate is a third doping concentration, and the second doping concentration is less than the third doping concentration; the doping type of the substrate is the same as the doping type of the epitaxial layer; the doping type of the variable doping terminal structure is different from the doping type of the epitaxial layer.

4. The power device according to any one of claims 1 to 3, characterized in that: The active area includes at least one trench gate structure, and the trench gate structure includes: a gate, the gate being arranged on a side of the variable-doped terminal structure away from the slope structure, and a depth of the gate in the first direction being greater than or equal to a depth of the variable-doped terminal structure; A gate oxide layer is located at least on a bottom surface of the gate and two side surfaces of the gate that are opposite to each other in the first direction.

5. The power device according to claim 4, characterized in that: The active area further includes: A first heavily doped region, wherein the first heavily doped region is arranged on a side of the gate away from the variable-doped terminal structure in the second direction and away from the side of the substrate in the first direction, wherein the depth of the first heavily doped region in the first direction is less than the depth of the variable-doped terminal structure, and the doping type of the first heavily doped region is different from the doping type of the variable-doped terminal structure.

6. The power device according to any one of claims 1 to 3, characterized in that: The active region includes: A second heavily doped region, wherein the second heavily doped region is located in the epitaxial layer, and the second heavily doped region is located on a side of the variable-doped terminal structure away from the slope structure, and the doping type of the second heavily doped region is the same as the doping type of the variable-doped terminal structure.

7. A method for preparing a power device, characterized in that: Used for preparing the power device according to any one of claims 1 to 6, the preparation method comprising: providing a substrate comprising a first surface; forming an epitaxial layer on the first surface; A variable doping terminal structure is formed on a side of the epitaxial layer away from the substrate, wherein the variable doping terminal structure includes a plurality of film layers stacked in a first direction, the first direction being perpendicular to the substrate and pointing away from the substrate, the multilayer film layers having different doping concentrations, the length of the multilayer film layers in a second direction decreasing along the first direction, the multilayer film layers having a slope structure at one end of the second direction, the second direction being perpendicular to the first direction, the slope structure being a step structure, the multilayer film layers in the variable doping terminal structure forming a one-to-one correspondence with each step in the step structure, each step in the step structure having a different doping concentration, thereby enabling the step structure to achieve the same surface variable doping structure as the lateral variable doping structure, and the doping concentration of the step structure gradually decreasing from the active area to the edge of the terminal structure; An active region is formed on a side of the epitaxial layer away from the substrate, and the active region is formed on a side of the variable-doping terminal structure away from the slope structure.

8. The method for preparing a power device according to claim 7, wherein: The steps of forming the variable doping terminal structure include: forming a stacked multilayer epitaxial layer on a surface of the epitaxial layer facing away from the substrate using an epitaxial growth process, wherein the multilayer epitaxial layer has different doping concentrations; The slope structure is formed at one end of the multi-layer epitaxial layer away from the active region in the second direction by an etching method to form a terminal structure with variable doping.

9. The method for preparing a power device according to claim 7, wherein: The steps of forming the active area include: A first heavily doped region is formed on a side of the variable-doped terminal structure facing away from the slope structure using a doping process, wherein a depth of the first heavily doped region in the first direction is less than a depth of the variable-doped terminal structure, and a length of the first heavily doped region in the second direction is less than a length of a layer of the multilayer film layer that faces away from the substrate and has the greatest vertical distance from the substrate; and a doping type of the first heavily doped region is different from a doping type of the variable-doped terminal structure; forming a trench at one end of the first heavily doped region in contact with the variable-doped terminal structure by an etching process, and forming a gate oxide layer inside the trench; The trench is filled on the surface of the gate oxide layer by a deposition process to form a gate.

10. The method for preparing a power device according to claim 7, wherein: The steps of forming the active area include: A second heavily doped region is formed by doping on a side of the variable-doped terminal structure away from the slope structure, and the doping type of the second heavily doped region is the same as the doping type of the variable-doped terminal structure.

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