Free radical oxidation method of nanostructure

By using plasma equipment to generate free radicals in semiconductor processes and performing normal temperature oxidation, the damage to temperature-sensitive materials by high-temperature oxidation and inaccurate control of oxide layers are solved, and the oxidation effect of nanoscale precision is achieved, which is suitable for nanostructure treatment in CMOS processes.

CN120111947APending Publication Date: 2025-06-06BEIJING INST OF TECH
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Patent Information

Application Number
CN202510267312.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-07
Publication Date
2025-06-06

AI Technical Summary

Technical Problem

The prior art requires high temperatures in semiconductor processes, making it difficult to protect temperature-sensitive materials, and the control of the thickness of the oxide layer is not accurate enough to meet the requirements of nanoscale scales.

Method used

Using equipment with the function of generating plasma, plasma is generated by injecting gases such as oxygen and applying power, and the nanostructures are oxidized at room temperature using free radicals in the plasma to achieve nano-precision oxidation.

Benefits of technology

Oxidation is carried out under non-high temperature conditions to protect temperature-sensitive materials from damage and achieve nano-level precision oxidation control, suitable for nanostructure treatment in CMOS processes.

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Abstract

The invention relates to the field of micro-nano processing, and provides a free radical oxidation method of a nano structure, which comprises the following steps of: firstly, cleaning the surface of a wafer; preparing a nano structure for a metal oxide semiconductor field effect transistor on the surface of the cleaned wafer; then putting the wafer with the prepared nano structure into related equipment with a plasma generation function; and finally, setting equipment operation parameters, selecting gas for oxidation, determining the temperature of a lower polar plate, setting oxidation time, applying power to generate plasmas, and carrying out nanoscale precision oxidation treatment on the wafer and the nanostructure thereof by using free radicals in the plasmas. According to the method, nanoscale precision oxidation can be realized under a non-high-temperature condition, the size of a nanostructure is accurately controlled, a temperature sensitive material is protected, the used equipment is compatible with a CMOS (Complementary Metal-Oxide-Semiconductor Transistor), and the operation is simple.
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Description

Technical Field

[0001] The invention relates to the field of micro-nano processing, and in particular to a free radical oxidation method for a nanostructure. Background Art

[0002] Oxidation is a crucial step in semiconductor technology. Oxidation can be used to obtain high-quality gate oxide layers, reduce structural size, etc. Oxidation is usually performed by thermal oxidation, that is, oxygen (or water vapor) is introduced into an oxidation furnace at a high temperature of 700-1200°C.

[0003] Plasma is considered to be the fourth state of matter, including unionized gas molecules or atoms, free radicals, electrons, ions and other components. Plasma is widely used in semiconductor processes, such as plasma enhanced chemical vapor deposition (PECVD) for growing materials. Because of the assistance of plasma, PECVD can grow materials at low temperatures ranging from 100-400°C. Traditional chemical vapor deposition (CVD) usually grows materials at high temperatures of 900-2000°C.

[0004] Here, we draw on the differences between PECVD and CVD mentioned above and apply the characteristics of plasma to the oxidation process. In a device with the function of generating plasma, oxygen and other gases are introduced and power is applied to generate plasma. Plasma contains a large number of oxygen free radicals, which are used to oxidize materials such as silicon, and the reaction can proceed at room temperature.

[0005] In addition, plasma-related equipment such as PECVD and inductively coupled plasma-reactive ion etching (ICP-RIE) usually contain a lower plate that can control the temperature, so low-temperature oxidation in the range of <-100°C to 500°C can be achieved. By changing the lower plate temperature, gas flow, plasma density, and utilizing the self-limiting reaction characteristics of free radical oxidation, precise oxidation in the range of 0.1nm to tens of nm can be achieved.

[0006] Compared with traditional thermal oxidation, free radical oxidation does not need to be carried out at high temperature, and the thickness of the oxide layer can be controlled more accurately. First, some fields, such as the preparation of flexible electronic devices, use temperature-sensitive materials, such as organic materials, which cannot withstand high temperatures. The characteristic of free radical oxidation that does not require high temperatures can ensure that the materials are not damaged. Secondly, as today's CMOS process is developing towards smaller technology nodes such as 3nm, precise control of free radical oxidation is more advantageous. As the core device of the CMOS process, metal oxide semiconductor field effect transistors (MOSFETs) can currently use nanostructures such as horizontal nanowires, horizontal nanosheets, vertical nanowires, and vertical nanosheets as channels, and their size is very small. Free radical oxidation can achieve precise nanoscale oxidation of related nanostructures in MOSFET devices. Summary of the invention

[0007] In view of the above background, the present invention proposes a free radical oxidation method of a nanostructure, which uses relevant equipment with a plasma generation function, has simple steps and is compatible with existing CMOS processes.

[0008] The present invention proposes the following free radical oxidation method of nanostructures, the main steps of which are:

[0009] (1.1) Cleaning the wafer surface;

[0010] (1.2) preparing a nanostructure for a metal oxide semiconductor field effect transistor on the surface of the cleaned wafer; the nanostructure comprising one or more of a vertical nanocolumn, a vertical nanosheet, a horizontal nanosheet, and a horizontal nanowire;

[0011] (1.3) placing the wafer with the prepared nanostructure into a related device capable of generating plasma; the plasma-related device is selected from one or more of a plasma etching device (e.g., a reactive ion etching device, a capacitively coupled plasma etching device, an inductively coupled plasma etching device), a plasma cleaning device, and a plasma deposition device (e.g., a plasma enhanced chemical vapor deposition device);

[0012] (1.4) Setting the operating parameters of the equipment, selecting the gas used for oxidation, selecting the lower plate temperature, setting the oxidation time, applying power to generate plasma, and using the free radicals in the plasma to perform nano-precision oxidation treatment on the wafer and the nanostructure on its surface.

[0013] The following are additional explanations for the above method:

[0014] Wafer cleaning can be done by many methods, including plasma cleaning. In plasma-related equipment, after the selected gas is introduced and power is applied, the entire etching chamber will generate plasma, which contains a large number of electrons, ions, and free radicals. Free radicals are uncharged and can freely diffuse to the wafer surface, causing oxidation and other reactions.

[0015] The following requirements are further proposed for the above method:

[0016] The material of the wafer is selected from any one of silicon, germanium, compound semiconductor, epitaxial layer, quartz, glass, aluminum nitride ceramic, sapphire, and mica; the gas used for oxidation is selected from O 2 , O 3 , CO 2 ,CO,N 2 O,NO,SO 2 , C 4 F 8 , C2 F 6 , C 3 F 8 , C 5 F 8 , C 3 F 6 , C 4 F 6 、Ar、He、N 2 One or more of the following; the temperature range of the lower plate is -250°C to 600°C.

[0017] The beneficial effects of the present invention are:

[0018] 1) The method of the present invention can be used for oxidation under non-high temperature conditions, which is beneficial for protecting temperature-sensitive materials used in the manufacturing process from being damaged;

[0019] 2) The method of the present invention can achieve oxidation with nanometer-level precision and accurately control the size of the nanostructure;

[0020] 3) The device used in the method of the present invention is CMOS compatible and easy to operate. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A schematic diagram of a free radical oxidation process of a nanostructure of the present invention;

[0022] Figure 2 The cross-sectional scanning electron microscope pictures of the vertical nanocolumn structure before and after free radical oxidation in the embodiment of the present invention, A is the picture before oxidation, and B is the picture after 4 oxidations; DETAILED DESCRIPTION

[0023] The present invention is described below in conjunction with specific embodiments.

[0024] refer to Figure 1 Process, a schematic diagram of a free radical oxidation process of a nanostructure, the preparation method comprises the following preparation steps:

[0025] 1) Place a 2-12 inch silicon wafer into a plasma cleaning machine and use Ar plasma for cleaning for 3-10 minutes;

[0026] 2) using processes such as photolithography, etching, and deposition to prepare a vertical nanocolumn structure for MOSFET on the surface of the cleaned wafer;

[0027] 3) placing the wafer with the prepared vertical nanocolumn structure into a reactive ion etching device, and placing a Faraday cage on the wafer to shield the bombardment of ions;

[0028] 4) Set the operating parameters of the equipment and select O 2The gas is used for oxidation, the temperature of the lower plate is controlled by water cooling at 15°C, 20-2000W power is applied to generate plasma, and the pressure is in the range of 5-1000mtorr. The oxidation time is 1s-60min. After oxidation, the wafer is taken out and soaked in HF aqueous solution to remove the oxide layer. The above free radical oxidation process is repeated many times until the size of the nanostructure is reduced to the ideal size.

[0029] Figure 2 The scanning electron microscope cross-sectional images of the vertical silicon nanocolumn structure before oxidation A and after four oxidations B in the above embodiment. After four oxidations, the diameter is reduced by 61.4nm, and the average diameter is reduced by 15.35nm each time, that is, the thickness of the oxide layer on one side of the nanocolumn is about 7.7nm. The thickness of the oxide layer can be controlled by adjusting the lower plate temperature, oxidation time and other conditions. The vertical silicon nanocolumn oxidized in this embodiment can be used in a vertical gate-all-around field effect transistor (VGAA MOSFET) device as a channel. This embodiment demonstrates the application of a free radical oxidation method of a nanostructure proposed by the present invention in a VGAA MOSFET device, which can accurately control the diameter of the nanocolumn.

[0030] The above-mentioned embodiments only express certain implementation methods of the present invention, and the description is relatively specific, but it cannot be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be based on the attached claims.

Claims

1. A method for free radical oxidation of nanostructures, characterized in that: The method comprises the following steps: (1.1) Cleaning the wafer surface; (1.2) preparing a nanostructure for a metal oxide semiconductor field effect transistor on the surface of the cleaned wafer; the nanostructure comprising one or more of a vertical nanocolumn, a vertical nanosheet, a horizontal nanosheet, and a horizontal nanowire; (1.3) placing the wafer with the prepared nanostructure into a related device capable of generating plasma; the plasma-related device is selected from one or more of a plasma etching device (e.g., a reactive ion etching device, a capacitively coupled plasma etching device, an inductively coupled plasma etching device), a plasma cleaning device, and a plasma deposition device (e.g., a plasma enhanced chemical vapor deposition device); (1.4) Setting the operating parameters of the equipment, selecting the gas used for oxidation, selecting the lower plate temperature, setting the oxidation time, applying power to generate plasma, and using the free radicals in the plasma to perform nano-precision oxidation treatment on the wafer and the nanostructure on its surface.

2. A method for free radical oxidation of a nanostructure as claimed in claim 1, characterized in that: The material of the wafer is selected from any one of silicon, germanium, compound semiconductor, epitaxial layer, quartz, glass, aluminum nitride ceramic, sapphire, and mica; the gas used for oxidation is selected from one or more of O2, O3, CO2, CO, N2O, NO, SO2, C4F8, C2F6, C3F8, C5F8, C3F6, C4F6, Ar, He, and N2; the temperature range of the lower plate is -250°C to 600°C.