Wafer carrying table

Abstract

The wafer mounting table 10 includes a ceramic plate 20, a cooling plate 30, a space layer 34, and a space layer forming portion 36. The upper surface of the ceramic plate (20) is provided with a wafer carrying part (22), and the ceramic plate (20) is internally provided with electrodes (24, 26). The cooling plate (30) is joined to the lower surface of the ceramic plate (20) and has a refrigerant flow path (32). The space layer (34) is provided between the upper surface of the cooling plate (30) and the refrigerant flow path (32), and covers the entire refrigerant flow path (32) in plan view. The space layer forming portion 36 is a portion of the cooling plate 30 surrounding the space layer 34. The space layer-forming section (36) has a seam, and the seam is formed by metal bonding without sandwiching a sealing member.

Description

Technical Field The present invention relates to a wafer placing table. Background Art In the past, there is a known wafer carrier, which includes: a ceramic plate having a wafer carrier portion on the upper surface and an electrode built therein; and a cooling plate, which is arranged on the lower surface side of the ceramic plate and has a coolant flow path. Regarding this type of wafer carrier, Patent Document 1 records that a space layer (heat transfer layer) is provided between the ceramic plate and the cooling plate. The space layer provides a heat transfer space for accommodating a heat transfer fluid between the ceramic plate and the cooling plate. The space layer is surrounded by an annular outer seal. Prior art literature Patent Literature Patent Document 1: Japanese Patent Application Publication No. 2021-180308 Summary of the invention However, in Patent Document 1, the space layer is surrounded by the outer seal, and therefore, if used for a long time, the outer seal may deteriorate and the heat transfer fluid may leak. The present invention has been made to solve the above-mentioned problems, and a main object of the present invention is to prevent leakage of a fluid from a space layer.

[0001] The wafer loading platform of the present invention comprises: A ceramic plate having a wafer placement portion on an upper surface and having electrodes built therein; a cooling plate, the cooling plate being joined to the lower surface of the ceramic plate and having a coolant flow path; a space layer disposed between an upper surface of the cooling plate and the refrigerant flow path; and a space layer forming portion, the space layer forming portion surrounding the space layer in the cooling plate, The space layer forming portion has a seam, The joint is formed by metal joining without a sealing member interposed therebetween. In the wafer stage, the space layer forming part surrounding the space layer in the cooling plate has a joint, but the joint is formed by metal bonding without a sealing member, so that even if the wafer stage is used for a long time, it is possible to prevent the fluid from leaking from the joint of the space layer forming part. It should be noted that in this specification, up and down, left and right, front and back, etc. are sometimes used to describe the present invention, but up and down, left and right, front and back are only relative positional relationships. Therefore, when the orientation of the wafer carrier is changed, up and down may become left and right, or left and right may become up and down, and such a situation is also included in the technical scope of the present invention. In addition, "fluid" can be gas or liquid.

[0002] In the wafer carrier (the wafer carrier described in [1]), the space layer can cover the entire coolant flow path when viewed from above. Therefore, it is easier to adjust the cooling efficiency of the coolant flow path by the space layer than in a case where the space layer covers a portion of the coolant flow path when viewed from above.

[0003] In the wafer stage (the wafer stage described in [1] or [2]), a plurality of columnar components connecting the top surface and the bottom surface of the space layer forming portion may be provided on the space layer. Thus, compared with a case where the columnar components are not provided, the thermal resistance of the space layer in the vertical direction becomes smaller, and the heat of the wafer can be efficiently released to the coolant flow path.

[0004] In the above-mentioned wafer carrier (the wafer carrier described in [3] above), another hollow portion different from the space layer may be provided directly above or below the columnar component in the cooling plate. Since the columnar component connects the top surface and the bottom surface of the space layer, the portion of the wafer corresponding to the portion directly above the columnar component may be overcooled. However, here, another hollow portion different from the space layer is provided directly above or below the columnar component in the cooling plate. Therefore, the heat insulation effect of the hollow portion can be used to prevent the portion of the wafer corresponding to the portion directly above the columnar component from being overcooled.

[0005] In the above-mentioned wafer carrier (the wafer carrier described in [1] or [2] above), in the space layer, a plurality of protrusions having a height shorter than the thickness of the space layer can be provided on at least one of the top surface and the bottom surface of the space layer forming portion. Accordingly, compared with a case where the protrusion is not present, the thermal resistance of the space layer in the vertical direction becomes smaller, and the heat of the wafer can be efficiently escaped to the coolant flow path. On the other hand, the protrusion does not connect the top surface and the bottom surface of the space layer forming portion, and therefore, the thermal insulation effect of the space layer when the space layer is in a vacuum atmosphere (including a reduced pressure atmosphere, the same below) is fully obtained.

[0006] The wafer stage (the wafer stage described in any one of [1] to [5]) may include a fluid switching mechanism connected to the space layer and capable of switching the supply and discharge of fluid to the space layer. Accordingly, by switching the supply of fluid to the space layer and the discharge of fluid from the space layer, the thermal resistance of the space layer can be reduced or increased. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 It is a longitudinal cross-sectional view of the wafer stage 10 . Figure 2 yes Figure 1 An enlarged view of part A of FIG. Figure 3 yes Figure 1 B-B cross-section diagram. Figure 4 It is a manufacturing process diagram of the cooling plate 30 . Figure 5 It is an explanatory diagram showing an example of use of the wafer stage 10 when generating strong plasma. Figure 6 It is an explanatory diagram showing an example of use of the wafer placement table 10 when weak plasma is generated. Figure 7 This is an explanatory diagram of a case where a columnar member 36e is provided in the above-mentioned embodiment. Figure 8 This is an explanatory diagram of a case where the columnar member 36e and the cavity 35 are provided in the above-mentioned embodiment. Fig. 9 This is an explanatory diagram of a case where the convex portion 36f is provided in the above-mentioned embodiment. Fig.10 1 is a graph showing the relationship between the time in the process of processing the wafer W and the temperature of the wafer W. DETAILED DESCRIPTION Next, preferred embodiments of the present invention will be described with reference to the accompanying drawings. Figure 1 is a longitudinal cross-sectional view of the wafer stage 10 (a cross-sectional view when the wafer stage 10 is cut along a plane including the central axis of the wafer stage 10). Figure 2 yes Figure 1 An enlarged view of part A of Figure 3 yes Figure 1 B-B cross-section diagram. The wafer stage 10 is a member used to perform CVD, etching, etc. on the wafer W using plasma. The wafer stage 10 includes a ceramic plate 20 , a cooling plate 30 , and a bonding layer 40 . The ceramic plate 20 is formed of a ceramic material represented by aluminum oxide, aluminum nitride, etc., and has a circular wafer loading portion 22 on the upper surface. A wafer W is loaded on the wafer loading portion 22. Although not shown in the figure, a sealing belt is formed along the outer edge of the upper surface of the ceramic plate 20 on the wafer loading portion 22, and a plurality of flat circular small protrusions are formed on the entire surface of the inner side of the sealing belt. The sealing belt and the circular small protrusions are of the same height, and the height thereof is, for example, several μm to several tens of μm. An electrostatic electrode 24 and a heater electrode 26 are implanted in the ceramic plate 20. The electrostatic electrode 24 is a planar mesh electrode implanted in an area of ​​the ceramic plate 20 that corresponds to the upper surface in general, and can apply a DC voltage. When a DC voltage is applied to the electrostatic electrode 24, the chip W is adsorbed and fixed to the chip carrier 22 (specifically, the upper surface of the sealing tape and the upper surface of the circular small protrusion) by electrostatic adsorption force; when the application of the DC voltage is released, the adsorption and fixation of the chip W on the chip carrier 22 is released. The heater electrode 26 is a resistive heating element formed in a stroke from one end to the other end in an area of ​​the ceramic plate 20 that corresponds to the upper surface in general. The heater electrode 26 can supply power from a heater power supply not shown in the figure. The cooling plate 30 is a circular plate member formed of a metal such as aluminum or an aluminum alloy. The cooling plate 30 has a cooling medium flow path 32 inside for circulating cooling medium. The cooling medium flow path 32 is formed in a straight line from one end (inlet) to the other end (outlet) in an area corresponding to the substantially entire upper surface of the ceramic plate 20. In this embodiment, the cooling medium flow path 32 is formed as follows: Figure 3 The refrigerant is shown as being formed in a vortex shape when viewed from above. The refrigerant is supplied to one end (inlet) of the refrigerant flow path 32 from a refrigerant circulation device (not shown), and after passing through the refrigerant flow path 32, it is discharged from the other end (outlet) of the refrigerant flow path 32 and returned to the refrigerant circulation device. The refrigerant circulation device can adjust the refrigerant to a desired temperature. The refrigerant is preferably a liquid, and preferably an electrically insulating liquid. Examples of electrically insulating liquids include fluorine-based inactive liquids and the like. The bonding layer 40 bonds the lower surface of the ceramic plate 20 and the upper surface of the cooling plate 30. In the present embodiment, the bonding layer 40 is a resin bonding layer. As the resin bonding layer, for example, a component obtained by sandwiching an adhesive sheet coated with an organic adhesive on both sides between the lower surface of the ceramic plate 20 and the upper surface of the cooling plate 30 and curing the adhesive sheet can be cited. The cooling plate 30 has a space layer 34. The space layer 34 is arranged between the upper surface of the cooling plate 30 and the refrigerant flow path 32. The space layer 34 is arranged to cover the entire refrigerant flow path 32 in a plan view. The portion of the cooling plate 30 that surrounds the space layer 34 is called a space layer forming portion 36. The space layer forming portion 36 is composed of a bottom surface 36a, a top surface 36b and a side wall 36c. The bottom surface 36a and the top surface 36b are circular surfaces when viewed from above, and the side wall 36c is the side surface of a cylinder. The thickness of the space layer 34 (the distance between the bottom surface 36a and the top surface 36b) is preferably not less than 0.1 mm and not more than 1 mm, and more preferably not less than 0.1 mm and not more than 0.2 mm. A gas supply passage 38 and a gas exhaust passage 39 are arranged in the cooling plate 30 in a manner that passes from the lower surface of the cooling plate 30 to the bottom surface 36a of the space layer forming portion 36. The gas supply passage 38 is a passage for supplying gas to the space layer 34, and the gas exhaust passage 39 is a passage for exhausting the gas in the space layer 34. In the present embodiment, one gas supply passage 38 and one gas exhaust passage 39 are provided. The gas supply passage 38 and the gas exhaust passage 39 are connected to the fluid switching mechanism 60. like Figure 2 As shown, the space layer forming portion 36 has a joint 36d. The joint 36d is the boundary between the top surface 36b and the upper surface of the side wall 36c. The joint 36d is formed by metal bonding without a sealing component such as an O-ring. As metal bonding, for example, welding, brazing, diffusion bonding, TCB (Thermal compression bonding), etc. can be cited. TCB refers to a well-known method of sandwiching a metal bonding material between two components to be bonded, and pressurizing and bonding the two components in a state where the metal bonding material is heated to a temperature below the solidus temperature of the metal bonding material. The fluid switching mechanism 60 supplies gas (for example, a heat-conducting gas such as He gas) to the space layer 34 via the gas supply passage 38, or discharges the gas in the space layer 34 via the gas discharge passage 39. The fluid switching mechanism 60 can seal the gas in the space layer 34 by closing the gas supply passage 38 and the gas discharge passage 39 after supplying the gas from the gas supply passage 38 to the space layer 34. In addition, the fluid switching mechanism 60 can also make the space layer 34 a vacuum atmosphere by discharging the gas from the gas discharge passage 39 in a state where the gas supply passage 38 is closed. In addition, the fluid switching mechanism 60 can also make the gas circulate in the space layer 34 by continuously supplying the gas from the gas supply passage 38 to the space layer 34 and continuously discharging the gas from the gas discharge passage 39. Next, use Figure 4, an example of manufacturing the cooling plate 30 in the wafer placement table 10 is described. First, a first cooling plate layer 301 in the form of a metal circular plate is prepared, a coolant flow channel 321 is formed on the upper surface of the first cooling plate layer 301, and two through holes 381 and 391 ( Figure 4 (A)). At the same time, a second cooling plate layer 302 in the form of a metal circular plate is prepared, a coolant flow channel 322 is formed on the lower surface of the second cooling plate layer 302, and two through holes 382 and 392 are formed that penetrate the second cooling plate layer 302 in the thickness direction ( Figure 4 (A)). Next, the first cooling plate layer 301 and the second cooling plate layer 302 are stacked in such a manner that the upper surface thereof and the lower surface thereof are in contact with each other, and the stacked body is heated at a predetermined temperature below the melting point of the master materials of the two while applying pressure from the upper and lower directions, so as to diffusely bond the first cooling plate layer 301 and the second cooling plate layer 302 ( Figure 4 (B)). Accordingly, at the contact surface between the first cooling plate layer 301 and the second cooling plate layer 302, the metals are bonded at the atomic level to obtain the cooling plate lower layer 30L ( Figure 4 (C)) In the cooling plate lower layer 30L, the coolant flow path 32 is formed by two coolant flow grooves 321 and 322, the gas supply path 38 is formed by two through holes 381 and 382, ​​and the gas exhaust path 39 is formed by two through holes 391 and 392. Next, a cooling plate upper layer 30U in the form of a metal circular plate is prepared, and a circular groove 341 ( Figure 4 (D)). Then, the upper surface of the cooling plate lower layer 30L and the lower surface of the cooling plate upper layer 30U are stacked in such a manner that the two are in contact with each other, and the obtained stacked body is heated at a predetermined temperature below the melting point of the master materials of both while applying pressure from the top and bottom directions, so that the cooling plate lower layer 30L and the cooling plate upper layer 30U are diffusely bonded. Accordingly, at the contact surface between the cooling plate lower layer 30L and the cooling plate upper layer 30U, the metals are bonded at the atomic level, and the cooling plate 30( Figure 4 (E)) In the cooling plate 30, the space layer 34 is formed by the groove 341 and the upper surface of the cooling plate lower layer 30L. In addition, the joint 36d is formed by metal bonding. The lower surface of the ceramic plate 20 produced separately is bonded to the upper surface of the cooling plate 30 obtained above via an adhesive sheet, thereby obtaining the wafer placement table 10 . Next, an example of using the wafer stage 10 is described. The wafer stage 10 is fixed inside a chamber (not shown) for semiconductor processing. A wafer W is placed on the wafer placement portion 22. In this state, a DC voltage is applied to the electrostatic electrode 24 so that the wafer W is adsorbed on the wafer placement portion 22. At the same time, a coolant is circulated in the coolant flow path 32. In addition, power is supplied to the heater electrode 26 so that the heater electrode 26 generates heat to heat the wafer W. Then, the interior of the chamber is set to a predetermined vacuum atmosphere, and while supplying process gas from a nozzle disposed at the top of the chamber, an RF voltage is applied to the cooling plate 30. Thus, plasma is generated between the wafer W and the nozzle. Then, using this plasma, CVD film formation or etching is performed on the wafer W. Depending on the situation, an appropriate switch is made between sealing a heat-conductive gas in the space layer 34 to reduce thermal resistance and setting the space layer 34 to a vacuum atmosphere to increase thermal resistance. For example, Figure 5 As shown, when the plasma generated above the chip W is a strong plasma, the fluid switching mechanism 60 is adjusted so that the heat-conducting gas is sealed in the space layer 34. Accordingly, the thermal resistance between the upper surface of the cooling plate 30 and the coolant flow path 32 is reduced. At this time, the chip W obtains a relatively large amount of heat input from the strong plasma. Therefore, it is necessary to cool the chip W by circulating the coolant in the coolant flow path 32 so that the temperature of the chip W reaches a specified temperature. Since the thermal resistance between the upper surface of the cooling plate 30 and the coolant flow path 32 is reduced, the chip W can be cooled smoothly. It should be noted that the responsiveness of the coolant to the temperature adjustment is not good. Therefore, when the chip W is lower than the specified temperature, the heater electrode 26 is fine-tuned to make the chip W reach the specified temperature. On the other hand, Figure 6 As shown, when the plasma generated above the chip W is a weak plasma, the fluid switching mechanism 60 is adjusted to make the space layer 34 a vacuum atmosphere. Accordingly, the thermal resistance between the upper surface of the cooling plate 30 and the refrigerant flow path 32 increases. At this time, the chip W receives relatively little heat input from the weak plasma. Therefore, it is necessary to cool the chip W by circulating the refrigerant in the refrigerant flow path 32 so that the temperature of the chip W reaches a specified temperature. Since the refrigerant is not responsive to the temperature regulation, the chip W may be too cold. Here, since the thermal resistance between the upper surface of the cooling plate 30 and the refrigerant flow path 32 increases, the temperature of the chip W will not be excessively reduced by the refrigerant. In this case, the heater electrode 26 is also fine-tuned to make the chip W reach the specified temperature, but the heat generated by the heater electrode 26 is less than that in the case where the space layer 34 is not provided. In the wafer stage 10 described above, the space layer forming portion 36 surrounding the space layer 34 in the cooling plate 30 has a joint 36d, but the joint 36d is formed by metal bonding without a sealing member. Therefore, even if the wafer stage 10 is used for a long time, it is possible to prevent gas from leaking from the joint 36d of the space layer forming portion 36. In addition, the space layer 34 covers the entire coolant flow path 32 in a plan view. Therefore, the cooling efficiency of the coolant flow path 32 can be easily adjusted by the space layer 34 compared to a case where the space layer 34 covers a portion of the coolant flow path 32 in a plan view. Furthermore, by using the fluid switching mechanism 60 to switch between supply of gas to the space layer 34 and exhaust of gas from the space layer 34 , the thermal resistance of the space layer 34 can be reduced or increased. Furthermore, when the plasma generated above the wafer W is a strong plasma, the space layer 34 is filled with a heat-conductive gas, thereby improving the efficiency of the coolant cooling the wafer W. On the other hand, when the plasma generated above the wafer W is a weak plasma, since the space layer 34 is made into a vacuum atmosphere, the cooling of the wafer W by the coolant is suppressed, and the wafer W can be adjusted to a predetermined temperature with less heat generated by the heater electrode 26. Therefore, wasteful power consumption can be suppressed. It should be noted that the present invention is not limited to the above-described embodiment and can be implemented in various forms as long as they fall within the technical scope of the present invention. In the above implementation mode, if Figure 7 As shown, a plurality of columnar members 36 e that connect the top surface 36 b and the bottom surface 36 a of the spacer layer forming portion 36 may be provided in the spacer layer 34 . Figure 7 (A) is a longitudinal cross-sectional view of the wafer stage. Figure 7 (B) Yes Figure 7 (A) C-C cross-section view. Figure 7 In the embodiment, the same symbols are used for the same components as those in the above-mentioned embodiment. Accordingly, compared with the above-mentioned embodiment (the case without the columnar component 36e), the thermal resistance in the vertical direction of the space layer 34 becomes smaller, and the heat of the chip W can be efficiently escaped to the coolant flow path 32. This is because: the thermal conductivity of the columnar component 36e is higher than the thermal conductivity of the heat-conducting gas. In this case, the area ratio occupied by all the columnar components 36e in the space layer 34 when viewed from above is preferably less than 50%. This is because: if the area ratio exceeds 50%, it may not be possible to fully obtain the thermal insulation effect (the effect of increasing thermal resistance) when the space layer 34 is a vacuum atmosphere. In the above-mentioned embodiment, when the columnar member 36e is provided, Figure 8As shown, another cavity portion 35 different from the space layer 34 may be provided directly below the columnar component 36 e in the cooling plate 30 . Figure 8 (A) is a longitudinal cross-sectional view of the wafer stage. Figure 8 (B) Yes Figure 8 (A) D-D cross-section diagram. Figure 8 , the same reference numerals are used for the same components as those in the above-mentioned embodiment, but the fluid switching mechanism 60 is omitted. The columnar member 36e connects the top surface 36b and the bottom surface 36a of the space layer forming portion 36, so the portion of the wafer W corresponding to the portion directly above the columnar member 36e may be overcooled. However, here, another cavity portion 35 (a circular cavity in a top view) different from the space layer 34 is provided directly below the columnar member 36e in the cooling plate 30, so that the portion of the wafer W corresponding to the portion directly above the columnar member 36e can be prevented from being overcooled by utilizing the heat insulation effect of the cavity portion 35. Figure 8 The partially enlarged view of (A) schematically shows the heat flow with arrows, and the heat flow is blocked by the cavity 35. It should be noted that the cavity 35 may be provided just above the columnar member 36e in the cooling plate 30 instead of just below the columnar member 36e. In the above implementation mode, if Fig. 9 As shown, in the space layer 34 , a plurality of protrusions 36 f having a height lower than the height (thickness) of the space layer 34 may be provided on the bottom surface 36 a of the space layer forming portion 36 . Fig. 9 (A) is a longitudinal cross-sectional view of the wafer stage. Fig. 9 (B) Yes Fig. 9 (A) E-E cross-section diagram. Fig. 9 , the same reference numerals are used for the same components as those in the above-mentioned embodiment. Accordingly, compared with the above-mentioned embodiment (the case without the convex portion 36f), the thermal resistance in the vertical direction of the space layer 34 becomes smaller, and the heat of the wafer W can be efficiently escaped to the coolant flow path 32. On the other hand, the convex portion 36f does not connect the top surface 36b and the bottom surface 36a of the space layer forming portion 36, so the heat insulation effect of the space layer 34 when the space layer 34 is in a vacuum atmosphere is also fully obtained. It should be noted that the convex portion 36f can be provided on the top surface 36b instead of being provided on the bottom surface 36a. In the above-mentioned embodiment, an example is given of switching between sealing the space layer 36 with a heat-conducting gas or making it a vacuum atmosphere according to the strength of the plasma, but the present invention is not particularly limited to this. For example, in the process of processing the wafer W, the temperature of the wafer W is repeatedly raised and lowered, and the space layer 36 can be made into a vacuum atmosphere at the timing of the temperature increase. Fig.10It is a graph showing the relationship between the time in the process of processing the chip W and the temperature of the chip W. In this case, the space layer 36 is set to a vacuum atmosphere at the time of starting the process, and the vacuum atmosphere of the space layer 36 is maintained until the temperature of the chip W rises to T1. When the temperature of the chip W reaches T1, a heat-conducting gas is supplied to and sealed in the space layer 36. Then, after the temperature of the chip W is maintained at T1 for a specified time, it is dropped to T2 (<T1), and then, while the temperature T2 is maintained for a specified time, the state in which the heat-conducting gas is sealed in the space layer 36 is maintained. Thereafter, the space layer 36 is set to a vacuum atmosphere, and the vacuum atmosphere of the space layer 36 is maintained until the temperature of the chip W rises from T2 to T1. Fig.10 In the thick line portion (temperature rise interval) in the line graph of , the space layer 36 is set to a vacuum atmosphere. Accordingly, when the temperature of the chip W is raised, the heat is not easily taken away by the coolant flow path 32, so the temperature of the chip W can be raised quickly. In the above-mentioned embodiment, gas can be supplied to the space layer 34 , but liquid may be supplied instead of gas. As the liquid, for example, the same liquid as the refrigerant flowing through the refrigerant flow path 32 may be used. In the above-mentioned embodiment, the thermal resistance of the space layer 36 in the up-down direction when the heat-conducting gas is sealed in the space layer 36 can be made higher than the thermal resistance of the bonding layer 40 in the up-down direction. Accordingly, even in the case where the heat-conducting gas is to be sealed in the space layer 36 to promote the heat conduction between the upper surface of the cooling plate 30 and the refrigerant flow path 32, the excessive heat conduction can be suppressed. In particular, when a metal bonding layer or a high thermal conductivity adhesive layer is used as the bonding layer 40, it is sometimes preferable to apply this structure. Alternatively, the thermal resistance of the space layer 36 in the up-down direction when the heat-conducting gas is to be sealed in the space layer 36 can be made lower than the thermal resistance of the bonding layer 40 in the up-down direction. Accordingly, in the case where the heat-conducting gas is to be sealed in the space layer 36 to promote the heat conduction between the upper surface of the cooling plate 30 and the refrigerant flow path 32, the heat conduction can be further promoted. In the above embodiment, one gas supply passage 38 and one gas exhaust passage 39 are provided on the cooling plate 30, but the present invention is not particularly limited thereto. For example, a plurality of gas supply passages 38 may be provided along a circle concentric with the cooling plate 30. This makes it easier to uniformly supply gas to the space layer 34. In the above-described embodiment, when it is desired to efficiently cool the wafer W, a heat transfer gas can be made to flow through the space layer 36. Thus, the space layer 36 can be used as a kind of cooling medium flow path. In the above-mentioned embodiment, a circular plate component formed of metal is exemplified as the cooling plate 30, but it is not particularly limited to this. For example, the cooling plate 30 may be a circular plate component formed of a composite material of metal and ceramic. Examples of composite materials of metal and ceramic include metal matrix composite materials (MMC) and ceramic matrix composite materials (CMC). Specific examples of the composite materials include: materials containing Si, SiC and Ti, materials obtained by impregnating SiC porous bodies with Al and / or Si, Al 2 O 3 Composite materials with TiC, etc. In the above-mentioned embodiment, the coolant flow path 32 is formed in a spiral shape in a plan view, but the present invention is not particularly limited thereto. For example, the coolant flow path 32 may be formed in a sawtooth shape in a plan view. In the above-mentioned embodiment, the electrostatic electrode and the heater electrode are exemplified as the electrodes built into the ceramic plate 20, but the present invention is not particularly limited thereto. For example, in addition to these electrodes, an RF electrode may be built into the ceramic plate 20. In the above-mentioned embodiment, the wafer stage 10 may be provided with lift pin holes for inserting lift pins for lifting the wafer W from the wafer placement portion 22 , and may be provided with gas holes for supplying back side gas to the back side of the wafer W. In the above embodiment, the heater electrode 26 is provided in the region corresponding to substantially the entire upper surface of the ceramic plate 20. However, the region corresponding to substantially the entire upper surface of the ceramic plate 20 may be divided into a plurality of sections, and a heater electrode may be provided in each section. Industrial Applicability The present invention can be used in, for example, an apparatus for performing plasma processing on a wafer. Explanation of symbols 10 wafer placing table, 20 ceramic plate, 22 wafer placing part, 24 electrostatic electrode, 26 heater electrode, 30 cooling plate, 30L cooling plate lower layer, 30U cooling plate upper layer, 32 refrigerant flow path, 34 space layer, 35 cavity part, 36 space layer forming part, 36a bottom surface, 36b top surface, 36c side wall, 36d joint, 36e columnar part, 36f convex part, 38 gas supply path, 39 gas exhaust path, 40 bonding layer, 60 fluid switching mechanism, 301 cooling plate first layer, 302 cooling plate second layer, 321, 322 refrigerant flow path groove, 341 concave groove, 381, 382, ​​391, 392 through holes, W wafer.

Claims

1. A wafer loading platform, in, have: A ceramic plate having a wafer placement portion on an upper surface and having electrodes built therein; a cooling plate, the cooling plate being joined to the lower surface of the ceramic plate and having a coolant flow path; a space layer disposed between an upper surface of the cooling plate and the refrigerant flow path; and a space layer forming portion, the space layer forming portion surrounding the space layer in the cooling plate, The space layer forming portion has a seam, The joint is formed by metal joining without a sealing member interposed therebetween.

2. The wafer stage according to claim 1, in, The space layer covers the entire refrigerant flow path in a plan view.

3. The wafer stage according to claim 1 or 2, in, The space layer is provided with a plurality of columnar members connecting the top surface and the bottom surface of the space layer forming portion.

4. The wafer stage according to claim 3, in, Another hollow portion different from the space layer is provided directly above or directly below the columnar member in the cooling plate.

5. The wafer stage according to claim 1 or 2, in, In the space layer, a plurality of protrusions having a height shorter than a thickness of the space layer are provided on at least one of a top surface and a bottom surface of the space layer forming portion.

6. The wafer stage according to claim 1 or 2, in, The wafer stage includes a fluid switching mechanism connected to the space layer and capable of switching supply and discharge of a fluid with respect to the space layer.

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