A failure detection method, electronic device, and medium for a grid-connected inverter

Abstract

The present invention discloses a failure detection method, an electronic device, and a medium for a grid-connected inverter, including: obtaining the zero-crossing phase of the power grid through a phase-locked loop and calculating the turn-on time of a first flyback MOS transistor; controlling the first flyback MOS transistor to turn on according to the turn-on time so that the primary coil of the transformer stores energy; when the first flyback MOS transistor is turned off, the rectified output voltage of the secondary coil of the transformer charges a target capacitor through a folding bridge; when the voltage across the target capacitor is greater than a protection voltage threshold within one switching period, the relay is not stuck; otherwise, the relay is stuck; and / or, the first flyback MOS transistor is turned on to store energy in the primary coil of the transformer, the current is output through a current transformer and the flyback current is monitored in real time; when the first flyback MOS transistor is turned off, the rectified output voltage of the secondary coil of the transformer charges a target capacitor through a folding bridge; when the flyback current is less than a protection current threshold within one switching period, the relay is not stuck; otherwise, the relay is stuck.

Description

Technical Field

[0001] The present invention belongs to the technical field of circuit detection, and particularly relates to a failure detection method, an electronic device, and a medium for a grid-connected inverter. Background Art

[0002] For safety reasons, a relay must be used for electrical isolation between the output end and the grid end of a photovoltaic grid-connected inverter. For a single-phase photovoltaic grid-connected inverter, relays must be installed between the grid live wire L and the neutral wire N and the inverter output. When the inverter is not working, the relay must be reliably disconnected to ensure that there is no electrical connection between the inverter and the grid. If a relay adhesion failure occurs, it will pose a great safety hazard.

[0003] To avoid such safety accidents, before the inverter starts to operate, the relay must be detected for adhesion failure to ensure that the relay is in a normal working state. If the relay drive signals on the live wire L and the neutral wire N are independent, it is very easy to detect the relay adhesion failure. As long as the relays on the live wire L and the neutral wire N are respectively in the suction and disconnection states, and then the inverter terminal voltage and the grid terminal voltage are detected to be equal, it can be detected whether the relay has adhesion failure. However, usually, to reduce the design cost of the inverter, a group of relays on the live wire L and the neutral wire N use the same drive signal, which brings trouble to the relay detection. If the relays on the live wire L and the neutral wire N simultaneously have adhesion failure, it is easy to detect by comparing the inverter terminal voltage and the grid terminal voltage; but if only the relay on the live wire L or the neutral wire N has adhesion failure, this method of comparing the inverter terminal voltage and the grid terminal voltage cannot effectively detect whether the relay really fails. Summary of the Invention

[0004] In view of this, the embodiments of the present invention provide a failure detection method, an electronic device, and a medium for a grid-connected inverter.

[0005] In a first aspect, the embodiments of the present invention provide a failure detection method for a grid-connected inverter, and the method includes:

[0006] Obtain the phase of the grid zero crossing through a phase-locked loop, and calculate the turn-on time of the first flyback Mos tube;

[0007] Set a protection voltage threshold, control the first flyback Mos tube to turn on according to the turn-on time of the first flyback Mos tube, so that the primary coil of the transformer stores energy; when the first flyback Mos tube is disconnected, the secondary coil of the transformer rectifies and outputs a voltage, and charges the target capacitor through a folding bridge; when the voltage across the target capacitor is greater than the protection voltage threshold within a switching period, the relay is not adhered; when the voltage across the target capacitor is less than the protection voltage threshold, the relay is adhered;

[0008] and / or

[0009] Set the protection current threshold, control the turn-on of the first flyback MOS transistor according to the turn-on time of the first flyback MOS transistor, store energy in the primary coil of the transformer, output current through the current transformer and monitor the flyback current in real time; when the first flyback MOS transistor is turned off, the secondary coil of the transformer rectifies and outputs a voltage, and charges the target capacitor through the folding bridge; when the flyback current is less than the protection current threshold within a switching cycle, the relay is not adhered; when the flyback current is greater than the protection current threshold within a switching cycle, the relay is adhered.

[0010] In a second aspect, an embodiment of the present invention provides an electronic device, including a memory and a processor, the memory is coupled to the processor; wherein, the memory is used to store program data, and the processor is used to execute the program data to implement the above-mentioned failure detection method for the grid-connected inverter.

[0011] In a third aspect, an embodiment of the present invention provides a computer-readable storage medium, on which a computer program is stored, and when the program is executed by a processor, the above-mentioned failure detection method for the grid-connected inverter is implemented.

[0012] Compared with the prior art, the beneficial effects of the present invention are:

[0013] The present invention provides a failure detection method for a grid-connected inverter, synchronizes the grid phase through a phase-locked loop, calculates the turn-on time Ton of the flyback MOS transistor, and judges the state of the relay based on overvoltage (HB_OCP) or overcurrent (I_OCP) protection signals. The method of the present invention does not require an additional detection circuit, is applicable to the scenario of shared drive signals, can accurately identify the adhesion failure of a single relay, and has the advantages of low cost and simple control. Description of the Drawings

[0014] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0015] Figure 1 Schematic diagram of the flyback circuit and folding bridge structure provided by the embodiment of the present invention;

[0016] Figure 2 Drive waveform timing diagram provided by the embodiment of the present invention;

[0017] Figure 3 Relay failure protection logic block diagram provided by the embodiment of the present invention;

[0018] Figure 4 Voltage waveform diagram of capacitor C2 when the relay in the embodiment of the present invention is stuck

[0019] Figure 5 Schematic diagram of an electronic device provided by an embodiment of the present invention Specific embodiments

[0020] Here, exemplary embodiments will be described in detail, and examples thereof are shown in the drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present invention as detailed in the appended claims.

[0021] The terms used in the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The singular forms "a", "the", and "said" used in the present invention and the appended claims are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0022] It should be understood that although the terms first, second, third, etc. may be used in the present invention to describe various information, such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the present invention, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "when" or "while" or "in response to determining".

[0023] The present invention will be described in detail below with reference to the drawings. Without conflict, the features in the following embodiments and implementation manners can be combined with each other.

[0024] As Figure 1 shown, an embodiment of the present invention provides a failure detection circuit for a grid-connected inverter. The failure detection circuit includes:

[0025] When the first flyback Mos tube Q1 is turned on, the primary coil of the transformer TRAN1 stores energy; when the first flyback Mos tube Q1 is turned off, according to the principle of electromagnetic induction, a quasi-sinusoidal bun-shaped wave is rectified and output through the secondary coil of the transformer TRAN1, the first diode D1, and the first capacitor C1; the bun-shaped wave is flipped by the folding bridge to output a sine wave to charge the target capacitor; the target capacitor is the second capacitor C2, and a relay K1 is connected in parallel across both ends of the second capacitor C2;

[0026] One end of the first diode D1 is connected to the fourth diode D4, and the other end of the fourth diode is respectively connected to the fifth diode D5 and the first resistor R1. The other end of the first resistor R1 is respectively connected to the second resistor R2 and the third resistor R3. The other end of the fifth diode D5 is connected to the other end of the third resistor R3. The other end of the second resistor R2 is connected to the base of the amplifier Q4. The collector of the amplifier Q4 inputs a +12V level, and the emitter of the amplifier Q4 outputs an HV- level. The +12V level flips the voltage at T1 from a low level to a high level through the inverter U2. The output end of the inverter U2 is respectively connected to the seventh resistor R7 and the eighth resistor R8. The other end of the seventh resistor R7 is connected to the first port of the optocoupler U3. The fourth port of the optocoupler U3 is connected to the +3.3V level. The third port of the optocoupler U3 is respectively connected to the ninth resistor R9 and the tenth resistor R10. The other end of the ninth resistor R9 is grounded, and the other end of the tenth resistor R10 outputs a folded-bridge overvoltage protection level HB_OCP. The second port of the optocoupler U3 is connected to the fifth resistor R5 and the drain of the fifth flyback Mos tube Q5. The other end of the fifth resistor R5 and one end of the fourth resistor are connected to the gate of the fifth flyback Mos tube Q5. The other end of the fourth resistor receives the HB_Change signal output by an external DSP chip (not shown in the figure). The source of the fifth flyback Mos tube Q5 outputs a voltage HV+ through the sixth resistor R6;

[0027] Among them, the third flyback Mos tube Q3 and the first thyristor D2 connected in series therewith in the folded bridge serve as the first bridge arm, and the second flyback Mos tube Q2 and the second thyristor D3 connected in series therewith serve as the second bridge arm; when in the positive half-axis of the sine wave, the first bridge arm is turned on and the second bridge arm is turned off; when in the negative half-axis of the sine wave, the second bridge arm is turned on and the first bridge arm is turned off;

[0028] The current transformer TRAN2 outputs a flyback current IP through the eighth diode D8 and the resistor R21 and accesses the negative input terminal of the comparator U1. The protection current threshold I_Ref accesses the positive input terminal of the comparator U1 through the resistor R22. The output terminal of the comparator U1 shunts and outputs a flyback overcurrent I_OCP through the resistor R23 and the resistor R24.

[0029] Furthermore, based on the above failure detection circuit, the present invention provides a failure detection method for a grid-connected inverter, and the method includes the following steps:

[0030] Step S1, obtaining the phase of the power grid zero crossing through a phase-locked loop and calculating the turn-on time of the first flyback Mos tube.

[0031] Specifically, in this example, at the position where the captured zero-crossing phase angle is about 5°, the turn-on time of the first flyback Mos tube is calculated, and the expression is as follows:

[0032]

[0033] In the formula, is the maximum duty cycle, is the switching frequency;

[0034] Among them, the maximum duty cycle has the following expression:

[0035]

[0036] In the formula, is the reflected voltage, is the minimum input voltage.

[0037] Among them, the calculation process of the reflected voltage includes:

[0038]

[0039] In the formula, Vout is the output voltage, is the diode voltage drop, is the primary turns ratio, is the secondary turns ratio;

[0040] Among them, the expression of the output voltage Vout is as follows:

[0041]

[0042]

[0043] In the formula, Vin is the input voltage, N is the primary-secondary turns ratio, and Toff is the turn-off time.

[0044] Step S2, determine whether the relay is stuck based on the overvoltage (HB_OCP) or overcurrent (I_OCP) protection signal.

[0045] Specifically, the process of determining whether the relay is stuck based on the overvoltage (HB_OCP) protection includes:

[0046] Step S201A, set the protection voltage threshold Vref.

[0047] Furthermore, the protection voltage threshold Vref is set according to the breakdown voltage Vbr of the transient suppression diode.

[0048] At the same time, step S201A also includes: controlling the flyback output voltage Vout according to the set protection voltage threshold Vref and the turn-on time Ton of the first flyback Mos tube.

[0049] Step S202A: Control the first flyback MOS transistor Q1 to turn on according to its turn-on time, so that the primary coil of the transformer TRAN1 stores energy; when the first flyback MOS transistor Q1 turns off, according to the principle of electromagnetic induction, the secondary coil of the transformer TRAN1 outputs a voltage HV+ after being rectified by the first diode D1, and charges the target capacitor C2 through the folded bridge.

[0050] Among them, the third flyback MOS transistor Q3 and the first thyristor D2 in series therewith in the folded bridge serve as the first bridge arm, and the second flyback MOS transistor Q2 and the second thyristor D3 in series therewith serve as the second bridge arm; when in the positive half-axis of the sine wave, the first bridge arm is turned on and the second bridge arm is turned off; when in the negative half-axis of the sine wave, the second bridge arm is turned on and the first bridge arm is turned off.

[0051] Step S203A: Measure the voltage Va across the target capacitor C2 to judge the state of the relay K1: within one switching period, when the voltage Va across the target capacitor is greater than the protection voltage threshold Vref, since there is no energy release circuit for the target capacitor C2, the HV overvoltage protection will be triggered, so the relay K1 is not adhered; when the voltage Va across the target capacitor is less than the protection voltage threshold Vref, since the energy of the target capacitor C2 is released to the power grid through the relay K1, the overvoltage protection will not be triggered, so the relay K1 is adhered.

[0052] It should be noted that when the voltage HV+ output by the rectification of the secondary coil of the transformer TRAN1 exceeds the breakdown voltage of the fourth diode D4. The voltage at T4 is the clamping voltage corresponding to the fifth diode D5, the voltage at T3 is the divided voltage of the third resistor R3 and the first resistor R1, after T5 is limited by the second resistor R2, T5 drives the amplifier Q4 to conduct. After being limited by resistor voltage division, driving the amplifier Q4 to conduct pulls down the +12V level to HV-, and the inverter U2 flips the voltage at T1 from low level to high level and conducts the folded bridge overvoltage protection level HB_OCP to high level (the initial state is low level) through the optocoupler U3, so as to feedback to the DSP chip to trigger overvoltage protection, and the DSP chip controls the fifth flyback MOS transistor Q5 to conduct to discharge the C2 capacitor.

[0053] Specifically, the process of judging whether the relay is adhered based on overcurrent (I_OCP) protection includes:

[0054] Step S201B: Set the protection voltage threshold Vref; set the protection current threshold I_Ref, and set the protection current threshold I_Ref at the positive input terminal of the comparator U1.

[0055] Furthermore, the step S201B further includes: controlling the flyback output voltage Vout according to the set protection voltage threshold Vref and the turn-on time Ton of the first flyback MOS transistor.

[0056] Step S202B: Control the turn-on of the first flyback MOS transistor Q1 according to its turn-on time, so that the primary coil of the transformer TRAN1 stores energy, and the flyback current IP is output to the negative input terminal of the comparator U1 through the transformer TRAN2; when the first flyback MOS transistor Q1 turns off, according to the principle of electromagnetic induction, the secondary coil of the transformer TRAN1 outputs a voltage HV+ after being rectified by the first diode D1, and charges the target capacitor C2 through the folding bridge.

[0057] Among them, the third flyback MOS transistor Q3 and the first thyristor D2 connected in series therewith in the folding bridge serve as the first bridge arm, and the second flyback MOS transistor Q2 and the second thyristor D3 connected in series therewith serve as the second bridge arm; when in the positive half-axis of the sine wave, the first bridge arm is turned on and the second bridge arm is turned off; when in the negative half-axis of the sine wave, the second bridge arm is turned on and the first bridge arm is turned off.

[0058] Step S202B: Measure the flyback current IP to judge the state of the relay K1: when within one switching period, the flyback current IP is less than the protection current threshold I_Ref, since there is only charging of the target capacitor C2 in the loop and no short circuit occurs, the relay K1 is not stuck; when within one switching period, the flyback current IP is greater than the protection current threshold I_Ref, due to a large current caused by a short circuit in the loop, the relay K1 is stuck.

[0059] Figure 2 The driving waveform timing diagram is shown. AC is the grid waveform, G_Q1 is the flyback driving waveform, and G_Q3 and G_Q2 are the folding bridge driving waveforms. The driving waveform G_Q3 corresponding to the first bridge arm turns on after the zero-crossing point in the positive half-cycle and turns off before the zero-crossing point in the negative half-cycle. The driving waveform G_Q2 corresponding to the second bridge arm turns on after the zero-crossing point in the negative half-cycle and turns off before the zero-crossing point in the positive half-cycle. G_Q1 is the driving at a certain preset switching frequency. When G_Q3 and G_Q2 are conducting in both the positive and negative half-cycles, it is used to drive the first flyback MOS transistor Q1. T2 is the driving waveform of the fifth flyback MOS transistor Q5, which is triggered when the Va voltage G_Q1 stops. The turn-on time Ton of G_Q1 is calculated by the formula recorded in Step S1.

[0060] Vref is the set protection voltage threshold, Va is the voltage across the target capacitor C2, and HB_OCP is the protection feedback waveform (normally low level and high level after protection). When the voltage Va across the target capacitor C2 slowly rises to reach the set protection voltage threshold Vref, the voltage protection circuit is triggered and the protection feedback signal HB_OCP flips.

[0061] IP is the voltage signal corresponding to the flyback current, and is compared with the voltage signal corresponding to the protection current threshold I_Ref at the positive input terminal of the comparator. When the protection current threshold I_Ref is exceeded, the overcurrent protection comparator U1 is triggered to output a low level, and the original 3.3V I_OCP is pulled low.

[0062] The rise time of the voltage Va across the target capacitor C2 is deduced by the following formula:

[0063] Calculate the turn-on time Ton of the first flyback Mos transistor Q1, and the expression is as follows:

[0064]

[0065] In the formula, is the maximum duty cycle, is the switching frequency.

[0066] The primary peak current Ipeak is calculated from the input voltage Vin, the primary inductance Lp, and the turn-on time Ton, and the expression is as follows:

[0067]

[0068] The secondary peak current Isp is calculated according to the transformer turns ratio N and the primary peak current Ipeak, and the expression is as follows:

[0069]

[0070] The output current Io is calculated according to the flyback Mos turn-off time Doff and the secondary current Isp, and the expression is as follows:

[0071]

[0072] R is calculated according to the threshold voltage Vref and the current Io, and then the charging time t = RC is calculated.

[0073] Figure 3 The relay failure protection logic block diagram is shown; at this time, the relay has no closing step. When the flyback current exceeds the preset current value, the overcurrent protection circuit will be triggered. At the same time, the DSP will detect the overcurrent protection signal and stop the folded bridge drive and the flyback drive.

[0074] The flyback boost output is sent to the folded bridge, flipped by the folded bridge and then connected to the grid through a relay. There will be an overvoltage protection circuit between the folded bridge and the relay to determine whether the relay is stuck through the overvoltage protection circuit. When the overvoltage protection circuit is triggered, it means that the energy of the folded bridge has not been released to the grid through the relay, thus triggering the overvoltage circuit protection. While the overvoltage circuit is protecting, it will give a protection feedback signal to the DSP, and the DSP will stop driving the Mos of the flyback and the folded bridge. If the overvoltage protection circuit is not triggered, it means that the energy of the folded bridge is released through the grid, so the relay is in a stuck state.

[0075] Figure 4 The voltage waveform diagram of capacitor C2 when the relay is stuck is shown. When the relay is stuck, Vc is Figure 1 the voltage waveform across capacitor C2, and its waveform is the grid voltage waveform.

[0076] In summary, the present invention provides a method for detecting the failure of a grid-connected inverter. By synchronizing the grid phase through a phase-locked loop, calculating the turn-on time Ton of the flyback Mos tube, and judging the relay state through the overvoltage (HB_OCP) or overcurrent (I_OCP) protection signal fed back by the hardware circuit that triggers the secondary overvoltage protection. The method of the present invention does not require an additional detection circuit, is applicable to the scenario of shared drive signals, can accurately identify the adhesion failure of a single relay, and has the advantages of low cost and simple control.

[0077] Correspondingly, the present application also provides an electronic device, including: one or more processors; a memory for storing one or more programs; when the one or more programs are executed by the one or more processors, the one or more processors implement the method for detecting the failure of the grid-connected inverter as described above. As Figure 5 shown, it is a hardware structure diagram of any device with data processing capabilities where the method for detecting the failure of the grid-connected inverter provided by the embodiment of the present invention is located. Except for Figure 5 the processors, memory, and network interfaces shown, any device with data processing capabilities where the device in the embodiment is located usually includes other hardware according to the actual functions of the device with data processing capabilities, which will not be elaborated here.

[0078] Correspondingly, the present application also provides a computer-readable storage medium, on which computer instructions are stored. When the instructions are executed by a processor, the failure detection method of the grid-connected inverter as described above is implemented. The computer-readable storage medium may be an internal storage unit of any device with data processing capabilities described in any of the foregoing embodiments, such as a hard disk or a memory. The computer-readable storage medium may also be an external storage device, such as a plug-in hard disk, a Smart Media Card (SMC), an SD card, a Flash Card, etc. equipped on the device. Further, the computer-readable storage medium may also include both an internal storage unit of any device with data processing capabilities and an external storage device. The computer-readable storage medium is used to store the computer program and other programs and data required by any device with data processing capabilities, and may also be used to temporarily store data that has been output or is to be output.

[0079] Those skilled in the art will readily conceive of other embodiments of the present application after considering the specification and practicing the content disclosed herein. The present application is intended to cover any variations, uses, or adaptations of the present application, which follow the general principles of the present application and include known common knowledge or conventional technical means in the technical field not disclosed in the present application. The specification and the embodiments are only regarded as exemplary.

[0080] It should be understood that the present application is not limited to the exact structure described above and shown in the drawings, and various modifications and changes can be made without departing from its scope.

Claims

1. A failure detection method for a grid-connected inverter, characterized in that The method includes: Obtaining the zero-crossing phase of the power grid through a phase-locked loop and calculating the turn-on time of the first flyback MOS transistor; Setting a protection voltage threshold, controlling the turn-on of the first flyback MOS transistor according to the turn-on time of the first flyback MOS transistor to store energy in the primary coil of the transformer; when the first flyback MOS transistor is turned off, the secondary coil of the transformer rectifies and outputs a voltage, which charges the target capacitor through a folding bridge; when the voltage across the target capacitor is greater than the protection voltage threshold within one switching period, the relay is not stuck; when the voltage across the target capacitor is less than the protection voltage threshold, the relay is stuck; And / or Setting a protection current threshold, controlling the turn-on of the first flyback MOS transistor according to the turn-on time of the first flyback MOS transistor to store energy in the primary coil of the transformer, outputting a current through a current transformer and monitoring the flyback current in real time; when the first flyback MOS transistor is turned off, the secondary coil of the transformer rectifies and outputs a voltage, which charges the target capacitor through a folding bridge; when the flyback current is less than the protection current threshold within one switching period, the relay is not stuck; when the flyback current is greater than the protection current threshold within one switching period, the relay is stuck; Wherein, the method is implemented based on a failure detection circuit, and the failure detection circuit includes: When the first flyback MOS transistor Q1 is turned on, energy is stored in the primary coil of the transformer TRAN1; when the first flyback MOS transistor Q1 is turned off, according to the principle of electromagnetic induction, a quasi-sinusoidal bun-shaped wave is rectified and output through the secondary coil of the transformer TRAN1, the first diode D1, and the first capacitor C1; the bun-shaped wave is flipped through a folding bridge to output a sine wave to charge the target capacitor; the target capacitor is the second capacitor C2, and a relay K1 is connected in parallel across both ends of the second capacitor C2; One end of the first diode D1 is connected to the fourth diode D4, the other end of the fourth diode is respectively connected to the fifth diode D5 and the first resistor R1, the other end of the first resistor R1 is respectively connected to the second resistor R2 and the third resistor R3, the other end of the fifth diode D5 is connected to the other end of the third resistor R3, the other end of the second resistor R2 is connected to the base of the amplifier Q4, the collector of the amplifier Q4 inputs a +12V level, the emitter of the amplifier Q4 outputs an HV- level, the +12V level flips the voltage at T1 from a low level to a high level through an inverter U2, the output end of the inverter U2 is respectively connected to the seventh resistor R7 and the eighth resistor R8, the other end of the seventh resistor R7 is connected to the first port of the optocoupler U3, the 4th port of the optocoupler U3 is connected to the +3.3V level, the 3rd port of the optocoupler U3 is respectively connected to the ninth resistor R9 and the tenth resistor R10, the ninth resistor R9 is grounded, the tenth resistor R10 outputs a folding bridge overvoltage protection level HB_OCP, the second port of the optocoupler U3 is connected to the fifth resistor R5 and the drain of the fifth flyback MOS transistor Q5, the other end of the fifth resistor R5 and one end of the fourth resistor are connected to the gate of the fifth flyback MOS transistor Q5, the other end of the fourth resistor receives an HB_Change signal output by the DSP chip, and the source of the fifth flyback MOS transistor Q5 outputs a voltage HV+ through the sixth resistor R6; The current transformer TRAN2 outputs the flyback current IP through the eighth diode D8 and the resistor R21 and accesses the negative input terminal of the comparator U1. The protection current threshold I_Ref accesses the positive input terminal of the comparator U1 through the resistor R22. The output terminal of the comparator U1 outputs the flyback overcurrent I_OCP through the shunt of the resistor R23 and the resistor R24.

2. The failure detection method of the grid-connected inverter according to claim 1, characterized in that The process of calculating the turn-on time includes: The turn-on time is the ratio of the maximum duty cycle to the switching frequency; Among them, the maximum duty cycle is the ratio of the reflected voltage to the sum of the reflected voltage and the minimum input voltage.

3. The failure detection method of the grid-connected inverter according to claim 2, characterized in that, The calculation process of the reflected voltage includes: The reflected voltage is the product of the sum of the output voltage and the diode voltage drop and the ratio of the primary turns to the secondary turns; Among them, the output voltage is the ratio of the product of the input voltage, the primary-secondary turn ratio, and the turn-on time to the turn-off time; The turn-off time is the ratio of the difference between 1 and the maximum duty cycle to the switching frequency.

4. The failure detection method of the grid-connected inverter according to claim 1, characterized in that The protection voltage threshold is set according to the breakdown voltage of the transient suppression diode.

5. The failure detection method of the grid-connected inverter according to claim 1, characterized in that, The process of the folded bridge outputting a sine wave to charge the target capacitor includes: The third flyback Mos transistor Q3 in the folded bridge and the first thyristor D2 connected in series therewith serve as the first bridge arm, and the second flyback Mos transistor Q2 and the second thyristor D3 connected in series therewith serve as the second bridge arm; When it is in the positive half-axis of the sine wave, the first bridge arm is turned on and the second bridge arm is turned off; when it is in the negative half-axis of the sine wave, the second bridge arm is turned on and the first bridge arm is turned off.

6. The failure detection method of the grid-connected inverter according to claim 1, characterized in that The method further includes: The process of detecting the folded bridge overvoltage protection level further includes: When the voltage HV+ output by the rectification of the secondary coil of the transformer TRAN1 exceeds the breakdown voltage of the fourth diode D4, after voltage division and current limiting by the resistor, it drives the amplifier Q4 to conduct and pulls down the +12V level to HV-. The inverter U2 flips the voltage at T1 from low level to high level and conducts the folded bridge overvoltage protection level HB_OCP to high level through the optocoupler U3, thereby feeding back to the DSP chip to trigger overvoltage protection, and the DSP chip controls the fifth flyback Mos transistor Q5 to conduct to discharge the C2 capacitor.

7. The failure detection method of the grid-connected inverter according to claim 1, wherein The process of detecting the flyback current protection further includes: Set the protection current threshold I_Ref at the positive input terminal of the comparator U1; The first flyback Mos transistor Q1 is turned on to store energy in the primary coil of the transformer, and the flyback current IP is output through the current transformer to the negative input terminal of the comparator U1; By comparing the flyback current IP with the protection current threshold I_Ref, when the flyback current IP is greater than the protection current threshold I_Ref, overcurrent protection is triggered.

8. An electronic device, comprising a memory and a processor, characterized in that, The memory is coupled to the processor; wherein, the memory is used to store program data, and the processor is used to execute the program data to implement the failure detection method of the grid-connected inverter according to any one of claims 1-7 above.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the failure detection method of the grid-connected inverter according to any one of claims 1-7.

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