Stacked package structure and preparation method thereof

Abstract

The present invention provides a stacked packaging structure and a preparation method thereof, which relate to the field of chip packaging technology. The stacked packaging structure includes a first substrate, a first chip, a second substrate and a plastic layer. The first chip is attached to the first substrate; the second substrate is spaced apart and arranged on a side of the first chip away from the first substrate, and a bonding solder ball is arranged on a side of the second substrate close to the first substrate; the plastic layer is arranged between the first substrate and the second substrate; the first substrate is provided with a first groove, and the second substrate is provided with a second groove. Compared with the prior art, the present invention can, on the one hand, improve the bonding force between the plastic layer and the first and second substrates by additionally designing the first and second grooves, slow down the warping of the first and second substrates during the reflow process, and reduce the phenomenon of solder ball bridging or cold soldering. On the other hand, it can improve the fluidity of the plastic compound, so that the plastic compound can be filled to the center of the first and second substrates, resulting in a better filling effect.

Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, and in particular to a stacked packaging structure and a preparation method thereof. Background Art

[0002] With the rapid development of the semiconductor industry, electronic products are becoming increasingly miniaturized and denser. Communications products are required to meet high-bandwidth performance, and POP (Package on Package) stacking structures are widely used in the semiconductor industry. The POP stacking structure packages memory chips and processor chips together, achieving high-bandwidth performance and miniaturization. Its packaged products are small, offer superior performance, and achieve high signal transmission frequencies. These products are primarily used in miniaturized and thin communications terminal products.

[0003] Traditional POP stacking structures use different materials for different packages, resulting in varying CTE coefficients. This can easily lead to product warping during reflow soldering, which can cause solder ball bridging and / or cold solder joints (intermediate and substrate bottom solder balls). Stacking structures using an adapter plate require solder balls to be formed on the adapter plate and then soldered to the substrate surface pads. However, substrate warping can easily lead to solder ball bridging, compromising electrical connection performance. Furthermore, conventional plastic encapsulation compounds have limited fluidity, resulting in poor filling and prone to void formation, impacting product performance. Summary of the Invention

[0004] The present invention aims to provide a stacked package structure and its preparation method, which can reduce warping during the preparation process, improve welding quality, reduce bridging or cold solder joints, and ensure the product's electrical connection performance. It can also improve the plastic encapsulation filling effect and ensure product performance.

[0005] In one aspect, an embodiment of the present invention provides a package-on-package structure, comprising:

[0006] a first substrate;

[0007] a first chip, wherein the first chip is attached to the first substrate;

[0008] a second substrate, the second substrate being spaced apart from the first chip on a side away from the first substrate, and having bonding solder balls disposed on a side of the second substrate close to the first substrate, the bonding solder balls being connected to the first substrate;

[0009] a plastic encapsulation layer, the plastic encapsulation layer being disposed between the first substrate and the second substrate and covering the first chip and the bonding solder balls;

[0010] In which, the bonding solder balls are arranged on at least two sides of the first chip, a first groove is provided on the side of the first substrate close to the second substrate, and a second groove is provided on the side of the second substrate close to the first substrate. The first groove and the second groove are both located on the side of the bonding solder balls away from the first chip, and the plastic encapsulation layer fills the first groove and the second groove.

[0011] In an optional embodiment, the first substrate includes a combined circuit layer and a first solder resist layer, the first solder resist layer is arranged on one side of the combined circuit layer, and a connecting solder ball is provided on the other side of the combined circuit layer. The first chip is mounted on the first solder resist layer and electrically connected to the combined circuit layer. The first groove is arranged on the first solder resist layer and penetrates the first solder resist layer so that the plastic encapsulation layer is in contact with the combined circuit layer.

[0012] In an optional embodiment, the second substrate includes an insulating layer, a second solder resist layer and a third solder resist layer, the second solder resist layer is arranged on a side of the insulating layer close to the first substrate, the third solder resist layer is arranged on a side of the insulating layer away from the first substrate, and the second groove is arranged on the second solder resist layer and at least passes through the second solder resist layer.

[0013] In an optional embodiment, the second groove corresponds to the first groove respectively, and the second groove penetrates the second solder resist layer and the insulating layer so that the plastic layer contacts the third solder resist layer.

[0014] In an optional embodiment, the first groove and the second groove are staggered.

[0015] In an optional embodiment, a first extension groove is further provided on the first solder resist layer, and a second extension groove is provided on the second solder resist layer, and the first extension groove and the second extension groove are provided correspondingly.

[0016] In an optional embodiment, a third groove is provided on the third solder resist layer, and the third groove is provided corresponding to the second extension groove.

[0017] In an optional embodiment, a support window is further provided on the first solder resist layer, a support pad is provided in the support window, a heat dissipation column is provided on the support pad, the heat dissipation column extends in a direction away from the combined circuit layer and passes through the second solder resist layer, the insulating layer and the third solder resist layer in sequence.

[0018] In an optional embodiment, a first clearance opening is provided on the second solder resist layer, a second clearance opening corresponding to and connected with the first clearance opening is provided on the insulating layer, a third clearance opening corresponding to and connected with the second clearance opening and a fourth clearance opening corresponding to and connected with the third clearance opening are provided on the third solder resist layer, the inner diameters of the first clearance opening, the second clearance opening, the third clearance opening and the fourth clearance opening are all larger than the outer diameter of the heat dissipation column, and the heat dissipation column is clearance-matched with the inner wall of the first clearance opening, the inner wall of the second clearance opening, the inner wall of the third clearance opening and the inner wall of the fourth clearance opening.

[0019] In an optional embodiment, the inner diameter D1 of the first clearance opening is larger than the inner diameter D2 of the second clearance opening, and the inner diameter D4 of the fourth clearance opening is larger than the inner diameter D3 of the third clearance opening.

[0020] In an optional embodiment, one end of the heat dissipation column away from the supporting pad is flush with a surface of a side of the third solder resist layer away from the second solder resist layer.

[0021] In an optional embodiment, the second groove corresponds to the first groove respectively, the second groove penetrates the second solder resist layer so that the plastic layer contacts the insulating layer, and a third groove is provided on the third solder resist layer, and the third groove is provided corresponding to the second groove.

[0022] In an optional embodiment, there are multiple first grooves, and a through hole is further provided on the third solder resist layer. The through hole passes through the third solder resist layer, the insulating layer and the second solder resist layer in sequence, and corresponds to one of the first grooves. The plastic encapsulation layer fills and extends to the through hole.

[0023] In an optional embodiment, a first solder pad is provided on the side of the combined circuit layer away from the connecting solder ball, and the first solder pad is embedded in the first solder resist layer and partially exposed from the first solder resist layer; a second solder pad is also provided on the surface of the side where the second groove is provided, and the combining solder ball is provided on the second solder pad and is connected to the first solder pad accordingly.

[0024] In an optional embodiment, the bonding solder ball includes an inner copper ball and an outer tin layer, wherein the outer tin layer is coated on the outside of the inner copper ball and is connected to the first soldering pad and the second soldering pad respectively.

[0025] In an optional embodiment, the stacked package structure further includes a second chip, and the second chip is mounted on a side of the second substrate away from the first substrate.

[0026] In a second aspect, an embodiment of the present invention further provides a method for preparing a stacked package structure, for preparing the aforementioned stacked package structure, the method comprising:

[0027] providing a first substrate and a second substrate;

[0028] placing a first chip on the first substrate;

[0029] The second substrate is attached to the first substrate, wherein the second substrate is spaced apart from the first chip on a side away from the first substrate, and bonding solder balls are provided on a side of the second substrate close to the first substrate, and the bonding solder balls are connected to the first substrate;

[0030] Forming a plastic sealing layer between the first substrate and the second substrate, wherein the plastic sealing layer covers the first chip and the bonding solder balls;

[0031] In which, the bonding solder balls are arranged on at least two sides of the first chip, a first groove is provided on the side of the first substrate close to the second substrate, and a second groove is provided on the side of the second substrate close to the first substrate. The first groove and the second groove are both located on the side of the bonding solder balls away from the first chip, and the plastic encapsulation layer fills the first groove and the second groove.

[0032] In a third aspect, an embodiment of the present invention provides a method for preparing a package-on-package structure, comprising:

[0033] forming a first groove on one side surface of the first substrate;

[0034] forming a second groove and a bonding solder ball on one side surface of the second substrate, wherein the second groove is located outside the bonding solder ball;

[0035] attaching a first chip to a surface of the first substrate on which the first groove is provided;

[0036] The second substrate is attached to the first substrate on a side where the second groove is provided, wherein the second substrate is spaced apart from the first chip on a side away from the first substrate, the bonding solder balls are connected to the first substrate and are provided on at least two sides of the first chip, and the first groove is located outside the bonding solder balls;

[0037] Plastic sealing is performed between the first substrate and the second substrate to form a plastic sealing layer, wherein the plastic sealing layer covers the first chip and the bonding solder balls;

[0038] cutting the second substrate, the plastic layer and the first substrate along the second groove;

[0039] A second chip is mounted on a side of the second substrate away from the first substrate.

[0040] In a fourth aspect, an embodiment of the present invention provides a package-on-package structure, which is manufactured using the aforementioned manufacturing method. The package-on-package structure includes:

[0041] a first substrate;

[0042] a first chip mounted on a side surface of the first substrate;

[0043] a second substrate, wherein bonding solder balls are provided on one side surface of the second substrate, and the second substrate is attached to the first substrate and spaced apart from the first chip on a side away from the first substrate, the bonding solder balls being connected to the first substrate and provided on at least two sides of the first chip;

[0044] A plastic encapsulation layer, the plastic encapsulation layer is formed between the first substrate and the second substrate and covers the first chip and the bonding solder balls;

[0045] The second chip is arranged on a side of the second substrate away from the first substrate.

[0046] The beneficial effects of the embodiments of the present invention are:

[0047] The stacked packaging structure and preparation method provided by the embodiment of the present invention are characterized in that a first chip is attached to a first substrate, and a second substrate is spaced apart and arranged on a side of the first chip away from the first substrate, and the second substrate is connected to the first substrate by bonding solder balls, and a plastic encapsulation layer is formed between the first substrate and the second substrate. The bonding solder balls are arranged on at least two sides of the first chip, and the first and second substrates are provided with first and second grooves on the opposite surfaces, respectively. The first and second grooves are both located on the side of the bonding solder balls away from the first chip, and the plastic encapsulation layer can be filled into the first and second grooves. Compared with the prior art, the embodiment of the present invention can improve the bonding force between the plastic encapsulation layer and the first and second substrates by additionally designing the first and second grooves, and the plastic encapsulation layer is filled into the first and second grooves. On the one hand, it can slow down the warping of the first and second substrates during the reflow process, ensure the welding effect, reduce the phenomenon of solder ball bridging or cold soldering, and ensure the electrical connection performance of the product. On the other hand, by designing the first and second grooves, the fluidity of the plastic encapsulation material can be improved through capillary phenomenon, so that the plastic encapsulation material can be filled into the middle area of ​​the first and second substrates, resulting in better filling effect, reducing voids, and ensuring product performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0049] Figure 1 A schematic diagram of a package-on-package structure provided by a first embodiment of the present invention;

[0050] Figure 2 for Figure 1 A partial enlarged schematic diagram of point II in the middle;

[0051] Figures 3 to 5 A process flow chart of a method for preparing a package-on-package structure according to a first embodiment of the present invention;

[0052] Figure 6 A schematic diagram of a package-on-package structure provided by a second embodiment of the present invention;

[0053] Figure 7 A top view of a package-on-package structure provided in accordance with a second embodiment of the present invention;

[0054] Figure 8 A schematic diagram of a package-on-package structure provided by a third embodiment of the present invention;

[0055] Figure 9 A schematic diagram of a package-on-package structure provided by a fourth embodiment of the present invention;

[0056] Figure 10a A schematic diagram of a package-on-package structure provided in accordance with a fifth embodiment of the present invention;

[0057] Figure 10b A flowchart of a manufacturing process of a package-on-package structure according to a fifth embodiment of the present invention;

[0058] Figure 11 A schematic diagram of a package-on-package structure provided by a sixth embodiment of the present invention;

[0059] Figure 12 for Figure 11 A partial enlarged schematic diagram of middle XII;

[0060] Figure 13 A schematic diagram of a package-on-package structure provided by a seventh embodiment of the present invention;

[0061] Figure 14 Schematic diagram of the process of step S6 in the eighth embodiment of the present invention;

[0062] Figure 15A schematic diagram of a package-on-package structure according to an eighth embodiment of the present invention.

[0063] Icon: 100-stacked package structure; 110-first substrate; 111-first groove; 112-combined circuit layer; 113-first solder resist layer; 114-connecting solder ball; 115-first pad; 116-first extension groove; 117-support pad; 120-first chip; 130-second substrate; 131-second groove; 132-second solder resist layer; 133-insulating layer; 134-third solder resist layer; 135-second pad; 136-third groove; 137-second extension groove; 138-through hole; 140-plastic sealing layer; 150-bonding solder ball; 151-inner copper ball; 152-outer tin layer; 160-heat dissipation column; 161-first clearance opening; 162-second clearance opening; 163-third clearance opening; 164-fourth clearance opening; 170-second chip; 200-protective film. DETAILED DESCRIPTION

[0064] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0065] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort shall fall within the scope of protection of the present invention.

[0066] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0067] In the description of the present invention, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the accompanying drawings, or is the orientation or position relationship in which the product of the invention is usually placed when in use. It is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be understood as a limitation on the present invention.

[0068] In addition, the terms "first", "second", etc., if used, are merely used to distinguish and describe, and should not be understood as indicating or implying relative importance.

[0069] As disclosed in the background, existing POP packages utilize different materials, resulting in varying CTEs. This can easily lead to product warping during reflow soldering, which can cause solder bridging or cold soldering between solder balls (intermediate and bottom solder balls). Furthermore, existing POP packages require a laser process to create holes in the plastic package, which can easily burn the solder pads on the substrate, causing solder failure in the memory chip.

[0070] Furthermore, existing POP packages typically utilize an adapter plate for soldering, requiring solder balls to be formed on the adapter plate and then soldered to the pads on the substrate surface. However, due to substrate warping, this can easily lead to bridging between solder balls, compromising electrical connectivity. Furthermore, conventional plastic encapsulation is used in the intermediate region between the upper and lower layers. Due to the small gap in this region, air cannot escape during the encapsulation process, resulting in insufficient filling, voids, and a popcorn phenomenon, impacting product performance.

[0071] In order to solve the above problems, embodiments of the present invention provide a novel stacked package structure and a preparation method thereof. It should be noted that, in the absence of conflict, the features in the embodiments of the present invention may be combined with each other.

[0072] First embodiment

[0073] See also Figure 1 and Figure 2 The present invention provides a stacked package structure 100 that can mitigate warping during the manufacturing process, improve soldering quality, reduce bridging or cold soldering, and ensure the product's electrical connection performance. It can also improve the plastic encapsulation filling effect and ensure product performance.

[0074] The stacked package structure 100 provided by the embodiment of the present invention includes a first substrate 110, a first chip 120, a second substrate 130 and a plastic encapsulation layer 140. The first chip 120 is attached to the first substrate 110; the second substrate 130 is spaced apart and arranged on a side of the first chip 120 away from the first substrate 110, and a bonding solder ball 150 is arranged on a side of the second substrate 130 close to the first substrate 110, and the bonding solder ball 150 is connected to the first substrate 110; the plastic encapsulation layer 140 is arranged on the first substrate 110 and the second substrate 110. 30, and wrapped around the first chip 120 and the bonding solder ball 150; wherein the bonding solder ball 150 is arranged on at least two sides of the first chip 120, a first groove 111 is provided on a side of the first substrate 110 close to the second substrate 130, and a second groove 131 is provided on a side of the second substrate 130 close to the first substrate 110, the first groove 111 and the second groove 131 are both located on a side of the bonding solder ball 150 away from the first chip 120, and the plastic encapsulation layer 140 is filled into the first groove 111 and the second groove 131.

[0075] During the actual manufacturing process, the additionally designed first groove 111 and second groove 131, with the plastic encapsulation layer 140 filling the first groove 111 and second groove 131, can, on the one hand, enhance the bonding strength between the plastic encapsulation layer 140 and the first substrate 110 and second substrate 130, mitigate the warping of the first substrate 110 and second substrate 130 during the reflow process, thereby ensuring the soldering effect, reducing the phenomenon of solder ball bridging or cold soldering, and ensuring the electrical connection performance of the product. Furthermore, the design of the first groove 111 and second groove 131 can enhance the fluidity of the plastic encapsulation compound through capillary action, allowing the plastic encapsulation compound to fill the center of the first substrate 110 and second substrate 130, resulting in a better filling effect, reducing voids, and ensuring product performance.

[0076] It is worth noting that the first chip 120 is flip-chip mounted on the first substrate 110, and a filler layer is formed at the bottom of the first chip 120 using a dispensing process, effectively protecting the solder joint structure. A spacer structure is provided between the first chip 120 and the second substrate 130 to facilitate the flow of the molding compound. Furthermore, the first groove 111 and the second groove 131 can be rectangular or circular grooves, and the specific configurations of the first groove 111 and the second groove 131 are not specifically limited herein.

[0077] In this embodiment, the first substrate 110 includes a circuit layer 112 and a first solder resist layer 113. The first solder resist layer 113 is disposed on one side of the circuit layer 112, and connecting solder balls 114 are disposed on the other side of the circuit layer 112. The first chip 120 is mounted on the first solder resist layer 113 and electrically connected to the circuit layer 112. A first groove 111 is disposed on and through the first solder resist layer 113 to ensure contact between the plastic encapsulation layer 140 and the circuit layer 112. Specifically, the first substrate 110 can be a coreless substrate or a cored substrate, such as an epoxy glass fiber board or an Ajinomoto laminate film. Alternatively, the first substrate 110 can be an organic substrate made of an organic material, such as a polyimide substrate. The circuit layer 112 can be a combination of multiple dielectric layers and circuit layers. The dielectric layer can be made of polyimide, and its structure can refer to existing circuit substrate structures. The first solder resist layer 113 is a green paint layer, and the thickness of the first solder resist layer 113 is between 5 and 30 μm. The connecting solder balls 114 may be formed by a ball planting process and electrically connected to the combined circuit layer 112 .

[0078] Furthermore, a first solder pad 115 is provided on a side of the combined circuit layer 112 away from the connecting solder ball 114. The first solder pad 115 is embedded in the first solder resist layer 113 and partially exposed outside the first solder resist layer 113. A second solder pad 135 is also provided on a side of the second substrate 130 where the second groove 131 is provided. A bonding solder ball 150 is provided on the second solder pad 135 and connected to the first solder pad 115. A first window is provided on the first solder resist layer 113. The first window can just expose the middle area of ​​the first solder pad 115. The bonding solder ball 150 can correspond to the first window, thereby extending into the first window and electrically contacting the first solder pad 115.

[0079] In this embodiment, the bonding solder ball 150 includes an inner copper ball 151 and an outer tin layer 152. The outer tin layer 152 is coated on the outer surface of the inner copper ball 151 and is connected to the first solder pad 115 and the second solder pad 135 respectively. Specifically, the outer tin layer 152 can completely coat the outer surface of the inner copper ball 151. Its preparation process can refer to the existing double-layer solder ball structure. The provision of the inner copper ball 151 can improve support, reduce solder flow, and thus reduce bridging during soldering. Preferably, the diameter of the inner copper ball 151 is 180μm, and the outer diameter of the outer tin layer 152 is 220μm.

[0080] In this embodiment, the second substrate 130 includes an insulating layer 133, a second solder resist layer 132, and a third solder resist layer 134. The second solder resist layer 132 is disposed on a side of the insulating layer 133 that is close to the first substrate 110, and the third solder resist layer 134 is disposed on a side of the insulating layer 133 that is away from the first substrate 110. The second groove 131 is disposed on the second solder resist layer 132 and at least penetrates the second solder resist layer 132. Specifically, a circuit layer is further disposed in the insulating layer 133, a second solder pad 135 is disposed in the second solder resist layer 132, and a third solder pad is disposed in the third solder resist layer 134. The second solder pad 135 and the third solder pad are connected via the circuit layer. Preferably, a second window is provided in the second solder resist layer 132, the second window being capable of correspondingly exposing the second solder pad 135, and a third window is provided in the third solder resist layer 134, the third window being capable of correspondingly exposing the third solder pad. Furthermore, the bonding solder ball 150 can be accommodated in the second window and formed on the second solder pad 135.

[0081] It should be noted that the second substrate 130 can also be a coreless substrate or a cored substrate, such as an epoxy glass fiber board or an Ajinomoto laminate film. Preferably, the second substrate 130 is a coreless substrate. Here, the second solder resist layer 132 and the third solder resist layer 134 are both green paint layers. The first solder pad 115 and the second solder pad 135 both adopt an embedded structure, not protruding from the solder resist layer, which is different from the conventional raised pad structure. This embedded structure can ensure the soldering strength between the bonding pad and the first solder pad 115 and the second solder pad 135.

[0082] In this embodiment, the second groove 131 corresponds to the first groove 111, and the second groove 131 penetrates the second solder resist layer 132 and the insulating layer 133, so that the plastic layer 140 contacts the third solder resist layer 134. Specifically, there are multiple first grooves 111 and second grooves 131, and the first grooves 111 and the second grooves 131 correspond one to one. The second groove 131 penetrates the third solder resist layer 134, which can further increase the depth of the second groove 131 and further improve the bonding strength between the plastic layer 140 and the second substrate 130. In addition, the increased depth of the second groove 131 can also further improve the fluidity of the plastic compound during plastic sealing, avoiding the situation where the plastic seal body is insufficiently filled.

[0083] An embodiment of the present invention further provides a method for preparing a package-on-package structure 100, which is used to prepare the aforementioned package-on-package structure 100. The method comprises the following steps:

[0084] S1: providing a first substrate 110 and a second substrate 130 .

[0085] See also Figure 3Specifically, the first substrate 110 and the second substrate 130 can be composed of materials such as epoxy glass fiber board, Ajinomoto laminated film, and the first substrate 110 and the second substrate 130 can both be coreless substrates or cored substrates. Preferably, the second substrate 130 is a coreless substrate, and a coreless substrate is used to reduce the stacking thickness.

[0086] The first substrate 110 can complete the preparation of the combined wiring layer and the first solder resist layer 113 in advance. After the second substrate 130 completes the preparation of the insulating layer 133, the second solder resist layer 132 and the third solder resist layer 134, a ball planting process can be used to plant balls on one side of the second substrate 130 to form bonding solder balls 150.

[0087] It should be noted that the first groove 111 and the second groove 131 are already prepared when the first substrate 110 and the second substrate 130 are prepared.

[0088] S2: placing the first chip 120 on the first substrate 110 .

[0089] See also Figure 4 Specifically, the first chip 120 can be flip-chip mounted on the first substrate 110, and the solder joints of the flip-chip can be underfilled using a dispensing process to form a filler layer and then baked. The first chip 120 is mounted on the chip mounting area of ​​the first substrate 110, and the first groove 111 is located around the chip mounting area.

[0090] S3: attaching the second substrate 130 to the first substrate 110 .

[0091] See also Figure 5 Specifically, the side of the second substrate 130 provided with the bonding solder balls 150 is mounted on the first substrate 110, and the bonding solder balls 150 are connected to the first substrate 110. Furthermore, the second substrate 130 is spaced apart on the side of the first chip 120 away from the first substrate 110, and the bonding solder balls 150 are provided on the side of the second substrate 130 close to the first substrate 110. The bonding solder balls 150 are arranged around the first chip 120, and the first grooves 111 and the second grooves 131 correspond to each other and are both located on the side of the bonding solder balls 150 away from the first chip 120.

[0092] S4: forming a molding layer 140 by molding between the first substrate 110 and the second substrate 130 .

[0093] See also Figure 6 Specifically, the molding layer 140 covers the first chip 120 and the bonding solder balls 150 , and the molding layer 140 fills the first groove 111 and the second groove 131 .

[0094] After the plastic packaging is completed, a ball planting process can be used to form connecting solder balls 114 on the first substrate 110 again, and a cutting process can be used to form individual products.

[0095] In summary, the stacked package structure 100 and its preparation method provided by the embodiment of the present invention include a first chip 120 attached to a first substrate 110, a second substrate 130 spaced apart on a side of the first chip 120 away from the first substrate 110, and the second substrate 130 connected to the first substrate 110 via bonding solder balls 150. A plastic encapsulation layer 140 is formed between the first substrate 110 and the second substrate 130. The bonding solder balls 150 are disposed on at least two sides of the first chip 120, and the first and second substrates 110 and 130 have first and second grooves 111 and 131 respectively disposed on opposing surfaces. The first and second grooves 111 and 131 are both located on the side of the bonding solder balls 150 away from the first chip 120. The plastic encapsulation layer 140 can fill the first and second grooves 111 and 131. Compared to the prior art, the embodiments of the present invention, by additionally designing first and second grooves 111, 131, and filling the first and second grooves 111, 131 with a plastic encapsulation layer 140, can, on the one hand, enhance the bonding strength between the plastic encapsulation layer 140 and the first and second substrates 110, 130, and mitigate the warping of the first and second substrates 110, 130 during the reflow process, thereby ensuring soldering effectiveness, reducing solder bridging or cold soldering, and guaranteeing the product's electrical connection performance. Furthermore, by designing the first and second grooves 111, 131, the fluidity of the plastic encapsulation compound can be enhanced through capillary action, allowing the plastic encapsulation compound to fill the center of the first and second substrates 110, 130, resulting in a better filling effect, reduced voids, and guaranteed product performance.

[0096] Second embodiment

[0097] See also Figure 6 and Figure 7 An embodiment of the present invention provides a stacked package structure 100, whose basic structure, principle and technical effects are the same as those of the first embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding contents in the first embodiment.

[0098] In this embodiment, the second groove 131 corresponds to the first groove 111, and the second groove 131 penetrates the second solder resist layer 132 to allow the plastic layer 140 to contact the insulating layer 133. The third solder resist layer 134 is provided with a third groove 136, which is provided corresponding to the second groove 131. Specifically, the width of the third groove 136 is the same as that of the second groove 131, and the third groove 136 is provided in a corresponding position. In this case, the insulating layer 133 plays a structural support role for the second substrate 130.

[0099] Furthermore, in some specific usage scenarios, cutting is required after the product is finished, and the third groove 136 can be used as the cutting path for cutting, which can greatly reduce the cutting thickness, reduce cutting wear, and reduce the problem of hidden cracks in welding caused by cutting stress.

[0100] Specifically, when preparing the stacked package structure 100 , after plastic packaging, cutting can be performed along one of the third grooves 136 to obtain a single product.

[0101] It should be noted that the third groove 136 is a long strip structure and can be used as a subsequent cutting path to facilitate cutting. In addition, there can be multiple third grooves 136 and second grooves 131. During actual cutting, one of the third grooves 136 can be selected as a cutting path.

[0102] The package-on-package structure 100 provided in this embodiment forms third grooves 136 by slotting the third solder resist layer 134. Third grooves 136 are used as cutting paths. Third grooves 136 penetrate the third solder resist layer 134 and extend to the insulating layer 133. This reduces the actual cutting thickness, avoids the need for separate cutting path design in traditional processes, and improves the utilization rate of the second substrate 130. Furthermore, the third grooves 136 correspond to the second grooves 131, significantly reducing the cutting thickness, cutting wear, and cutting stress, thereby alleviating the problem of hidden solder cracks caused by deformation of the bonding solder balls 150.

[0103] Third embodiment

[0104] See also Figure 8 An embodiment of the present invention provides a stacked package structure 100, whose basic structure, principle and technical effects are the same as those of the first embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding contents in the first embodiment.

[0105] In this embodiment, a first groove 111 is provided on the side of the first substrate 110 close to the second substrate 130, and a second groove 131 is provided on the side of the second substrate 130 close to the first substrate 110. The second groove 131 penetrates the second solder resist layer 132 and the insulating layer 133, so that the plastic layer 140 contacts the third solder resist layer 134. The first groove 111 and the second groove 131 are staggered.

[0106] Furthermore, there are multiple first grooves 111 and multiple second grooves 131, and the multiple first grooves 111 and the multiple second grooves 131 are staggered. Preferably, there are three first grooves 111 and three second grooves 131 on one side (e.g., the left side) of the solder ball 150. The three first grooves 111 and the three second grooves 131 are relatively staggered, forming two T-shaped distribution structures. For example, the upper second groove 131 and the two staggered first grooves 111 below form a first T-shaped structure, and the remaining two second grooves 131 above and the staggered first grooves 111 below form a second inverted T-shaped structure. By forming a T-shaped structure, the first grooves 111 and the second grooves 131 can be precisely staggered and evenly arranged.

[0107] It is worth noting that, in this embodiment, the first groove 111 and the second groove 131 are both long groove structures.

[0108] It should be noted that the staggered distribution of first and second grooves 111, 131 not only further enhances bonding strength, allowing the plastic encapsulation layer 140 to extend and fill the first and second grooves 111, 131, but also offsets the warping stress of the first and second substrates 110, 130. Furthermore, the T-shaped distribution structure creates multiple mold flow channels, improving fluidity in the center region and preventing the popcorn phenomenon caused by insufficient plastic filling.

[0109] Fourth embodiment

[0110] See also Figure 9 This embodiment provides a stacked packaging structure 100, whose basic structure, principle and technical effects are the same as those of the first embodiment or the third embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding contents in the first embodiment or the third embodiment.

[0111] In this embodiment, there are multiple first grooves 111 and multiple second grooves 131, and the multiple first grooves 111 and the multiple second grooves 131 are staggered. A first extension groove 116 is also provided on the first solder resist layer 113, and a second extension groove 137 is provided on the second solder resist layer 132. The first extension groove 116 and the second extension groove 137 are provided in correspondence. Specifically, the first extension groove 116 is spaced apart from the first groove 111, and the opening width can be the same. The first extension groove 116 can be formed together with the first groove 111. The second extension groove 137 is spaced apart from the second groove 131, and the opening width can be the same. The second extension groove 137 penetrates the second solder resist layer 132, and the plastic encapsulation layer 140 fills the first extension groove 116 and the second extension groove 137.

[0112] It should be noted that the staggered distribution of first and second grooves 111, 131 here also enhances bonding strength, allowing the plastic encapsulation layer 140 to extend and fill the first and second grooves 111, 131. Furthermore, it offsets the warping stress of the first and second substrates 110, 130. Furthermore, the T-shaped distribution structure creates multiple mold flow channels, improving fluidity in the center region and preventing the popcorn phenomenon caused by insufficient plastic filling.

[0113] Furthermore, a third groove 136 is provided on the third solder resist layer 134, and the third groove 136 is provided corresponding to the second extension groove 137. Specifically, the second extension groove 137 does not penetrate the insulating layer 133, and the depth of the third groove 136 is less than or equal to the thickness of the third solder resist layer 134. Preferably, the depth of the third groove 136 is less than the thickness of the third solder resist layer 134. Therefore, the insulating layer 133 can be used as a support structure in the area corresponding to the second extension groove 137.

[0114] It should be noted that the third groove 136 can serve as a cutting path, significantly reducing the actual cutting depth, avoiding the need for separate cutting path design in traditional processes, and improving the utilization rate of the second substrate 130. Furthermore, the third groove 136 corresponds to the second extension groove 137, significantly reducing the cutting thickness, reducing cutting wear, and lowering cutting stress, thereby alleviating the problem of hidden cracks in the solder joint caused by deformation of the solder balls 150.

[0115] Fifth embodiment

[0116] See also Figure 10a This embodiment provides a stacked package structure 100, whose basic structure, principle and technical effects are the same as those of the first embodiment or the second embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding contents in the first embodiment or the second embodiment.

[0117] In this embodiment, the second groove 131 corresponds to the first groove 111 and penetrates the second solder resist layer 132 to ensure contact between the plastic layer 140 and the insulating layer 133. A third groove 136 is provided on the third solder resist layer 134, corresponding to the second groove 131. By forming the third groove 136 by slotting the third solder resist layer 134 and using the third groove 136 as a cutting path, the actual cutting thickness is reduced, avoiding the need for separately designed cutting paths in traditional processes and improving the utilization rate of the second substrate 130. Furthermore, the third groove 136 corresponds to the second groove 131, significantly reducing the cutting thickness, reducing cutting wear, and reducing cutting stress, thereby alleviating the problem of hidden cracks in the solder joints caused by deformation of the solder balls 150.

[0118] Furthermore, there are multiple first grooves 111, and a through hole 138 is also provided on the third solder resist layer 134. The through hole 138 sequentially penetrates the third solder resist layer 134, the insulating layer 133, and the second solder resist layer 132, and corresponds to one of the first grooves 111. The plastic encapsulation layer 140 is filled and extends to the through hole 138. Specifically, the through hole 138 can connect the area between the first substrate 110 and the second substrate 130 with the external space. During the plastic encapsulation, on the one hand, the air in the area between the first substrate 110 and the second substrate 130 will be discharged along the through hole 138, avoiding the formation of filling voids and further avoiding the popcorn phenomenon caused by insufficient filling of the plastic encapsulation material. On the other hand, the plastic encapsulation material extends to the through hole 138, which can further enhance the bonding strength between the second substrate 130 and the plastic encapsulation layer 140.

[0119] See also Figure 10b When actually manufacturing the package-on-package structure 100, after the second substrate 130 is mounted, a liquid molding compound can be printed on top of the second substrate 130 to fill the molding body. Specifically, a protective film 200 is first applied to the surface of the second substrate 130, exposing the through-holes 138. Then, the molding compound is filled in through the through-holes 138 using a printing molding process. After the molding is complete, the protective film 200 can be removed.

[0120] Sixth embodiment

[0121] See also Figure 11 and Figure 12 This embodiment provides a stacked package structure 100, whose basic structure, principle and technical effects are the same as those of the first embodiment or the fourth embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding contents in the first embodiment or the fourth embodiment.

[0122] The stacked package structure 100 provided in an embodiment of the present invention further includes a support window on the first solder resist layer 113. A support pad 117 is provided within the support window. A heat dissipation column 160 is provided on the support pad 117. The heat dissipation column 160 extends in a direction away from the combined wiring layer 112 and sequentially passes through the second solder resist layer 132, the insulating layer 133, and the third solder resist layer 134. Specifically, the heat dissipation column 160 may be a copper column. There is no electrical connection between the support pad 117 and the combined wiring layer. The heat dissipation column 160 extends out of the second substrate 130. On the one hand, it can provide structural support and enhance the structural stability of the overall package structure. On the other hand, the heat dissipation column 160 can serve as a heat dissipation structure during the post-molding curing process or subsequent processes, reducing the impact of the thermal process on the intermediate plastic encapsulation layer 140.

[0123] In this embodiment, there are multiple first grooves 111 and multiple second grooves 131, and the multiple first grooves 111 and the multiple second grooves 131 are staggered. The first solder resist layer 113 is further provided with a first extension groove 116, and the second solder resist layer 132 is provided with a second extension groove 137, and the first extension groove 116 and the second extension groove 137 are provided in correspondence. The third solder resist layer 134 is provided with a third groove 136, and the third groove 136 is provided in correspondence with the second extension groove 137.

[0124] In this embodiment, a first clearance opening 161 is provided on the second solder resist layer 132, a second clearance opening 162 corresponding to and connected with the first clearance opening 161 is provided on the insulating layer 133, and a third clearance opening 163 corresponding to and connected with the second clearance opening 162 and a fourth clearance opening 164 corresponding to and connected with the third clearance opening 163 are provided on the third solder resist layer 134. The inner diameters of the first clearance opening 161, the second clearance opening 162, the third clearance opening 163 and the fourth clearance opening 164 are all larger than the outer diameter of the heat dissipation column 160, and the heat dissipation column 160 is clearance-matched with the inner wall of the first clearance opening 161, the inner wall of the second clearance opening 162, the inner wall of the third clearance opening 163 and the inner wall of the fourth clearance opening 164.

[0125] It should be noted that the first clearance opening 161, the second clearance opening 162, the third clearance opening 163, and the fourth clearance opening 164 all cooperate with the peripheral wall gap of the heat dissipation column 160. Therefore, during the molding process, the gap can be used as an exhaust hole, thereby allowing the air in the middle layer to be discharged during the flow of the molding compound, on the one hand, improving the flow performance of the molding compound, and on the other hand, avoiding the void phenomenon. Specifically, the molding process here is a pressure injection molding process. During the pressure injection molding process, the exhaust gap around the heat dissipation column 160 is used to exhaust air, and the heat dissipation column 160 is used to achieve drainage, drawing the heat of the mold flow over, playing a chimney-like role to achieve exhaust and heat dissipation.

[0126] It is worth noting that the heat dissipation column 160 can be rectangular, and the extension direction of the heat dissipation column 160 is the same as the extension direction of the third groove 136. The rectangular block design can, on the one hand, expand the extension range, thereby expanding the heat dissipation area and improving the heat dissipation capacity. On the other hand, it can also increase the gap range around the heat dissipation column 160, allowing the air in the middle layer to be discharged quickly, thereby improving the exhaust capacity.

[0127] It should also be noted that since there is a clearance fit structure between the heat dissipation column 160 and the second substrate 130, the heat dissipation column 160 can be used as a positioning structure when mounting the second substrate 130 to ensure the precise positioning of the second substrate 130, avoid the offset of the solder ball 150 when mounting the second substrate 130, and improve the mounting and welding accuracy.

[0128] In this embodiment, the inner diameter D1 of the first clearance opening 161 is larger than the inner diameter D2 of the second clearance opening 162, and the inner diameter D4 of the fourth clearance opening 164 is larger than the inner diameter D3 of the third clearance opening 163. Specifically, the first clearance opening 161, the second clearance opening 162, the third clearance opening 163, and the fourth clearance opening 164 are arranged sequentially from bottom to top, and the overall structure is small in the middle and large at both ends, which can ensure the smooth installation of the heat dissipation column 160.

[0129] Furthermore, one end of the heat dissipation column 160 away from the support pad 117 is flush with a surface of the third solder resist layer 134 away from the second solder resist layer 132 .

[0130] In summary, the stacked package structure 100 provided in this embodiment, through the design of heat dissipation posts 160 and the recessed openings, can, on the one hand, improve heat dissipation and reduce the impact of the thermal process on the intermediate layer. On the other hand, during plastic encapsulation, air in the intermediate layer is expelled through the gaps around heat dissipation posts 160, preventing bubbles or voids. Furthermore, the design of heat dissipation posts 160 also ensures the mounting accuracy of the second substrate 130.

[0131] Seventh embodiment

[0132] See also Figure 13 An embodiment of the present invention provides a stacked package structure 100, whose basic structure, principle and technical effects are the same as those of the first embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding contents in the first embodiment.

[0133] In this embodiment, the stacked package structure 100 includes a first substrate 110, a first chip 120, a second substrate 130, a plastic encapsulation layer 140, and a second chip 170. The first chip 120 is attached to the first substrate 110; the second substrate 130 is spaced apart and arranged on a side of the first chip 120 away from the first substrate 110, and a bonding solder ball 150 is arranged on a side of the second substrate 130 close to the first substrate 110, and the bonding solder ball 150 is connected to the first substrate 110; the plastic encapsulation layer 140 is arranged between the first substrate 110 and the second substrate 130. The first substrate 110 is provided between the substrate 130 and the bonding balls 150, and covers the first chip 120 and the bonding balls 150; wherein the bonding balls 150 are provided on at least two sides of the first chip 120, a first groove 111 is provided on the side of the first substrate 110 close to the second substrate 130, and a second groove 131 is provided on the side of the second substrate 130 close to the first substrate 110. The first groove 111 and the second groove 131 are both located on the side of the bonding balls 150 away from the first chip 120, and the plastic encapsulation layer 140 fills the first groove 111 and the second groove 131. The second chip 170 is attached to the side of the second substrate 130 away from the first substrate 110, wherein the second chip 170 can be a module chip or a memory chip, etc.

[0134] Eighth embodiment

[0135] An embodiment of the present invention provides a method for preparing a stacked package structure 100 , the basic steps and principles and the technical effects produced are the same as those of the first embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding contents of the first embodiment.

[0136] The preparation method provided in this embodiment includes:

[0137] S1 : forming a first groove 111 on one side surface of the first substrate 110 .

[0138] See also Figure 3 Specifically, first, a first substrate 110 is prepared, and a first groove 111 is formed around a chip mounting area of ​​the first substrate 110 .

[0139] S2 : forming a second groove 131 and a bonding solder ball 150 on one side surface of the second substrate 130 .

[0140] Please continue to see Figure 3 Specifically, a second substrate 130 is prepared, a second groove 131 can be formed on one side surface of the second substrate 130 , and a bonding solder ball 150 is formed by a ball planting process, wherein the second groove 131 is located outside the bonding solder ball 150 .

[0141] It should be noted that the first substrate 110 and the second substrate 130 may also adopt the relevant structures as in the second embodiment, the third embodiment, the fourth embodiment, the fifth embodiment or the sixth embodiment, which can also implement the present preparation method.

[0142] S3 : attaching the first chip 120 to the surface of the first substrate 110 where the first groove 111 is provided.

[0143] See also Figure 4 Specifically, the first chip 120 is flip-mounted on the die-attachment area of ​​the first substrate 110. The solder joints of the flip-mounted chip are then underfilled using a dispensing process to form a filler layer, which is then baked. The first chip 120 is attached to the die-attachment area of ​​the first substrate 110, and the first groove 111 is located around the die-attachment area.

[0144] S4 : placing the side of the second substrate 130 provided with the second groove 131 on the first substrate 110 .

[0145] See also Figure 5, wherein the second substrate 130 is spaced apart on a side of the first chip 120 away from the first substrate 110, the bonding solder balls 150 are connected to the first substrate 110 and are provided on at least two sides of the first chip 120, and the first grooves 111 are located outside the bonding solder balls 150. Specifically, the side of the second substrate 130 provided with the bonding solder balls 150 is mounted on the first substrate 110, and the bonding solder balls 150 are connected to the first substrate 110. Furthermore, the second substrate 130 is spaced apart on a side of the first chip 120 away from the first substrate 110, and the bonding solder balls 150 are provided on a side of the second substrate 130 close to the first substrate 110. The bonding solder balls 150 are arranged around the first chip 120, and the first grooves 111 and the second grooves 131 correspond to each other and are both located on the side of the bonding solder balls 150 away from the first chip 120.

[0146] S5: forming a molding layer 140 by molding between the first substrate 110 and the second substrate 130 .

[0147] Please continue to see Figure 5 , wherein the plastic encapsulation layer 140 covers the first chip 120 and the bonding solder balls 150 , and the plastic encapsulation layer 140 fills the first groove 111 and the second groove 131 .

[0148] S6 : cutting the second substrate 130 , the plastic layer 140 and the first substrate 110 along the second groove 131 .

[0149] See also Figure 14 Specifically, by cutting through the cutting path overlapping with the second groove 131 , the second substrate 130 , the plastic encapsulation layer 140 and the first substrate 110 can be cut in sequence to obtain a single product.

[0150] See also Figure 15 The embodiment of the present invention further provides a stacked packaging structure 100, which is prepared by the aforementioned preparation method, and the basic structure and principle and the technical effects produced are the same as those of the first embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding content in the first embodiment.

[0151] The stacked packaging structure 100 provided by an embodiment of the present invention includes a first substrate 110, a first chip 120, a second substrate 130 and a plastic encapsulation layer 140. The first chip 120 is mounted on a side surface of the first substrate 110; a bonding solder ball 150 is provided on one side surface of the second substrate 130, and the second substrate 130 is mounted on the first substrate 110 and is spaced apart on a side of the first chip 120 away from the first substrate 110. The bonding solder balls 150 are connected to the first substrate 110 and are arranged on at least two sides of the first chip 120; the plastic encapsulation layer 140 is filled and formed between the first substrate 110 and the second substrate 130, and covers the first chip 120 and the bonding solder balls 150.

[0152] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A stacked package structure, characterized in that: include: a first substrate; a first chip, wherein the first chip is attached to the first substrate; a second substrate, the second substrate being spaced apart from the first chip on a side away from the first substrate, and having bonding solder balls disposed on a side of the second substrate close to the first substrate, the bonding solder balls being connected to the first substrate; a plastic encapsulation layer, the plastic encapsulation layer being disposed between the first substrate and the second substrate and covering the first chip and the bonding solder balls; The bonding solder balls are arranged on at least two sides of the first chip, a first groove is provided on a side of the first substrate close to the second substrate, and a second groove is provided on a side of the second substrate close to the first substrate, the first groove and the second groove are both located on a side of the bonding solder balls away from the first chip, and the plastic encapsulation layer fills the first groove and the second groove; The first substrate includes a combined circuit layer and a first solder resist layer, the first solder resist layer is arranged on one side of the combined circuit layer, and the first groove is arranged on the first solder resist layer and penetrates the first solder resist layer so that the plastic layer contacts the combined circuit layer; the second substrate includes an insulating layer, a second solder resist layer and a third solder resist layer, the second solder resist layer is arranged on a side of the insulating layer close to the first substrate, the third solder resist layer is arranged on a side of the insulating layer away from the first substrate, and the second groove is arranged on the second solder resist layer and penetrates at least the second solder resist layer; There are multiple first grooves, and the third solder resist layer is further provided with a through hole, which sequentially penetrates the third solder resist layer, the insulating layer and the second solder resist layer and corresponds to one of the first grooves. The plastic sealing layer fills and extends to the through hole.

2. The package-on-package structure according to claim 1, wherein: A connecting solder ball is provided on the other side of the combined circuit layer. The first chip is mounted on the first solder resist layer and is electrically connected to the combined circuit layer.

3. The package-on-package structure according to claim 2, wherein: The second grooves correspond to the first grooves respectively, and the second grooves penetrate the second solder resist layer and the insulating layer so that the plastic layer contacts the third solder resist layer.

4. The package-on-package structure according to claim 3, wherein: The first groove and the second groove are staggered.

5. The package-on-package structure according to claim 4, wherein: The first solder resist layer is further provided with a first extension groove, and the second solder resist layer is provided with a second extension groove, and the first extension groove and the second extension groove are provided correspondingly.

6. The package-on-package structure according to claim 5, wherein: A third groove is provided on the third solder resist layer, and the third groove is provided corresponding to the second extension groove.

7. The package-on-package structure according to claim 2, wherein: A support window is also provided on the first solder resist layer, a support pad is provided in the support window, a heat dissipation column is provided on the support pad, the heat dissipation column extends in a direction away from the combined circuit layer and passes through the second solder resist layer, the insulating layer and the third solder resist layer in sequence.

8. The package-on-package structure according to claim 7, wherein: A first clearance opening is provided on the second solder resist layer, a second clearance opening corresponding to and connected with the first clearance opening is provided on the insulating layer, a third clearance opening corresponding to and connected with the second clearance opening and a fourth clearance opening corresponding to and connected with the third clearance opening are provided on the third solder resist layer, the inner diameters of the first clearance opening, the second clearance opening, the third clearance opening and the fourth clearance opening are all larger than the outer diameter of the heat dissipation column, and the heat dissipation column is clearance-matched with the inner wall of the first clearance opening, the inner wall of the second clearance opening, the inner wall of the third clearance opening and the inner wall of the fourth clearance opening.

9. The package-on-package structure according to claim 8, wherein: The inner diameter D1 of the first clearance opening is larger than the inner diameter D2 of the second clearance opening, and the inner diameter D4 of the fourth clearance opening is larger than the inner diameter D3 of the third clearance opening.

10. The package-on-package structure according to claim 7, wherein: One end of the heat dissipation column away from the supporting pad is flush with a surface of the third solder resist layer away from the second solder resist layer.

11. The package-on-package structure according to claim 2, wherein: The second groove corresponds to the first groove respectively, and the second groove penetrates the second solder resist layer so that the plastic layer contacts the insulating layer. A third groove is provided on the third solder resist layer, and the third groove is provided corresponding to the second groove.

12. The package-on-package structure according to claim 2, wherein: A first solder pad is provided on the side of the combined circuit layer away from the connecting solder ball, and the first solder pad is embedded in the first solder resist layer and partially exposed from the first solder resist layer; a second solder pad is also provided on the surface of the side where the second groove is provided, and the combining solder ball is provided on the second solder pad and is connected to the first solder pad accordingly.

13. The package-on-package structure according to claim 12, wherein: The bonding solder ball includes an inner copper ball and an outer tin layer. The outer tin layer is coated on the outer side of the inner copper ball and is connected to the first soldering pad and the second soldering pad respectively.

14. The package-on-package structure according to claim 1, wherein: The stacked package structure further includes a second chip, which is mounted on a side of the second substrate away from the first substrate.

15. A method for preparing a package-on-package structure, for preparing the package-on-package structure according to claim 1, characterized in that: The preparation method comprises: providing a first substrate and a second substrate; placing a first chip on the first substrate; The second substrate is attached to the first substrate, wherein the second substrate is spaced apart from the first chip on a side away from the first substrate, and bonding solder balls are provided on a side of the second substrate close to the first substrate, and the bonding solder balls are connected to the first substrate; Plastic sealing is performed between the first substrate and the second substrate to form a plastic sealing layer, wherein the plastic sealing layer covers the first chip and the bonding solder balls; In which, the bonding solder balls are arranged on at least two sides of the first chip, a first groove is provided on the side of the first substrate close to the second substrate, and a second groove is provided on the side of the second substrate close to the first substrate. The first groove and the second groove are both located on the side of the bonding solder balls away from the first chip, and the plastic encapsulation layer fills the first groove and the second groove.

16. A method for preparing a stacked package structure, characterized in that: include: forming a first groove on one side surface of the first substrate; forming a second groove and a bonding solder ball on one side surface of the second substrate, wherein the second groove is located outside the bonding solder ball; attaching a first chip to a surface of the first substrate on which the first groove is provided; The second substrate is provided with a side of the second groove on the first substrate, wherein the second substrate is spaced apart and arranged on a side of the first chip away from the first substrate, the bonding solder balls are connected to the first substrate and are arranged on at least two sides of the first chip, and the first groove is located on the outside of the bonding solder balls, the first substrate comprises a combined circuit layer and a first solder resist layer, the first solder resist layer is arranged on one side of the combined circuit layer, the first groove is arranged on the first solder resist layer and passes through the first solder resist layer; the second substrate comprises an insulating layer, a second solder resist layer and a third solder resist layer, the second solder resist layer is arranged on a side of the insulating layer close to the first substrate, the third solder resist layer is arranged on a side of the insulating layer away from the first substrate, the second groove is arranged on the second solder resist layer and passes through at least the second solder resist layer; there are multiple first grooves, and the third solder resist layer is further provided with a through hole, the through hole passes through the third solder resist layer, the insulating layer and the second solder resist layer in sequence, and corresponds to one of the first grooves; Forming a plastic encapsulation layer between the first substrate and the second substrate, wherein the plastic encapsulation layer covers the first chip and the bonding solder balls and contacts the combined circuit layer, and the plastic encapsulation layer fills and extends to the through hole; The second substrate, the plastic layer and the first substrate are cut along the second groove.

17. A stacked package structure, prepared by the preparation method according to claim 16, characterized in that: The package-on-package structure comprises: a first substrate, a first chip mounted on a side surface of the first substrate; a second substrate, wherein bonding solder balls are provided on one side surface of the second substrate, and the second substrate is attached to the first substrate and spaced apart from the first chip on a side away from the first substrate, the bonding solder balls being connected to the first substrate and provided on at least two sides of the first chip; A plastic encapsulation layer is formed between the first substrate and the second substrate and covers the first chip and the bonding solder balls.

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