A method for improving thermal fatigue resistance of solder joints of BGA packages interconnected by lead-free solder

Abstract

The application relates to a method for improving the thermal fatigue resistance of a lead-free solder interconnection BGA package joint, and relates to the field of electronic packaging welding. The surface of a PCB substrate is processed by superfast laser to have a well-shaped micro-nano structure, the well-shaped micro-nano structure is a grid-shaped straight-line groove microstructure formed by a plurality of transverse parallel lines and a plurality of longitudinal parallel lines, the adjacent interval between the plurality of transverse parallel lines and the plurality of longitudinal parallel lines is 80-120 mu m, the groove width is 10-20 mu m, the groove depth is about 30-50 um, the groove parameters are adjusted by adjusting the superfast laser processing parameters, and a large number of micro-particles are covered on the inside and around the groove; the solder ball is planted on a bare chip through a heating plate, and the chip and the processed PCB substrate are welded and packaged through a hot air welding machine. The specific surface area and structural richness of the surface are improved, and the problems of poor thermal fatigue resistance and poor durability of the existing BGA package joint can be solved.

Description

Technical Field

[0001] This invention relates to the field of soldering for electronic packaging, and in particular to a method for preparing BGA packages to improve their thermal fatigue resistance. Background Technology

[0002] Electronic packaging technology is one of the core technologies of the semiconductor and integrated circuit industries, and it has developed rapidly in recent years. BGA (Ball Grid Array) packaging is a form of surface-mount IC packaging, which greatly increases packaging density and reduces package size. However, due to the miniaturization of electronic devices, the density of electronic packaging is gradually increasing, and the size of integrated circuit packages is gradually decreasing. This causes solder joints to be subjected to the combined effects of heat, electricity, and force during service, resulting in a series of reliability issues. Frequent startups during electronic device use subject the electronic package to thermal fatigue due to temperature changes, severely affecting its lifespan. Fluctuations in device temperature caused by changes in internal heat dissipation and ambient temperature lead to inelastic deformation in the solder, causing CTE (Coefficient of Thermal Expansion) mismatch between solder layers. This repeated thermal fatigue state causes internal cracks to initiate and propagate, ultimately leading to solder joint failure. For BGA package structures, the combined effects of heat and force during service cause plastic deformation of the solder joints. When solder joints are under prolonged thermal fatigue, their mechanical properties, microstructure, and crystal orientation undergo significant changes.

[0003] In view of this, we propose a method to improve the thermal fatigue resistance of solder joints in lead-free solder interconnect BGA packages. Summary of the Invention

[0004] The purpose of this invention is to provide a method to improve the thermal fatigue resistance of lead-free solder interconnect BGA package solder joints. By using an ultrafast laser to process densely arranged grid-shaped microstructures on the surface of the solder pads, the specific surface area and structural richness of the surface are increased. This method can be used to solve the problems of poor reliability, poor thermal fatigue resistance, and poor durability of existing BGA package solder joints.

[0005] To achieve the above objectives, the present invention provides a densely arranged grid-like micro-surface, which is prepared by an ultrafast laser processing technology.

[0006] A method for improving the thermal fatigue resistance of solder joints in lead-free solder interconnect BGA packages is characterized by the following steps: The substrate surface is fabricated with a grid-like micro / nano structure using an ultrafast laser. This grid-like micro / nano structure consists of a network of parallel horizontal and vertical trenches forming a grid. The spacing between adjacent parallel horizontal and vertical trenches is 80-120 μm, the trench width is 10-20 μm, and the trench depth is approximately 30-50 μm. The trench parameters are adjusted by regulating the ultrafast laser processing parameters. The trenches are covered with a large number of microparticles. Solder balls are bonded to the chip leads; heating melts and bonds the solder balls to the chip leads, thus performing BGA packaging of the substrate and the chip.

[0007] Preferably, the substrate is a PCB substrate.

[0008] Preferably, the chip is made of the same chip material used in power devices.

[0009] Preferably, the substrate is arranged parallel to the chip, and the surface of the substrate opposite to the chip is a plane.

[0010] The above method specifically includes the following steps:

[0011] First, place the PCB substrate into a container filled with pickling solution, and then place the container into an ultrasonic cleaner for cleaning; then remove the PCB substrate and let it air dry.

[0012] Then, use sandpaper to polish the PCB substrate to ensure that the oxide layer of the Cu pads on the PCB substrate is completely removed and the connection surface is level. After polishing, polish the surface.

[0013] Then, the laser control system was activated, and the parameters of the ultrafast laser processing equipment were adjusted in preparation for the fabrication of the grid-like micro / nano structure.

[0014] The pre-treated PCB substrate is then placed within the irradiation range of the laser beam, and the displacement stage is adjusted to ensure that the welding material is within the irradiation area of ​​the laser. Next, the ultrafast laser processing equipment is controlled to process the PCB substrate surface according to the target pattern, and the laser processing time and power parameters are adjusted to prepare a grid-like micro-nano structure.

[0015] Finally, the solder balls are placed onto the bare chip using a heating plate, and the chip is then welded to the processed PCB substrate using a hot air soldering machine for packaging and use in experimental research.

[0016] The pickling solution used is 30% HNO3; the PCB substrate thickness is 2.0mm, and the Cu pads on the PCB substrate are plated with nickel and then gold to prevent oxidation; the solder balls are SAC305 solder balls with a diameter of 300μm; the chip is a CTBGA228 chip manufactured by Amkor, containing 228 solder joints; the BGA package size is 20mm×20mm×2mm, the BGA has a hollow structure, with three rows of solder joints on each side, and 22 solder joints on the outermost side, with a solder joint diameter of 300μm and a center-to-center distance of 500μm;

[0017] This invention provides a method for improving the thermal fatigue resistance of lead-free solder interconnect BGA package solder joints. The advantage lies in the use of ultrafast laser processing to create densely arranged grid-like microstructures, thereby increasing the specific surface area and structural richness of the surface. This method can be used to solve problems such as poor reliability, poor thermal fatigue resistance, and poor durability of existing BGA package solder joints. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this patent. For those skilled in the art, other drawings can be obtained from the following drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the chip and substrate packaging.

[0020] Wherein, 1: substrate, 2: pin, 3: chip, 4: solder ball

[0021] Figure 2 A schematic diagram of the scanning path process for processing the surface of a BGA substrate using an ultrafast laser.

[0022] Figure 3 This is a surface morphology image of a BGA substrate after processing with an ultrafast laser.

[0023] Figure 4 This is a cross-sectional microstructure of a lead-free solder joint fabricated on a BGA substrate after ultrafast laser processing.

[0024] Figure 5 The images show the cross-sectional microstructure of samples with initial cracks after thermal shock testing; (a) Example 1, (b) Comparative Example 1, (c) Comparative Example 2, and (d) Comparative Example 3.

[0025] Table 1 compares the time it takes for initial cracks to form in each connection structure. Detailed Implementation

[0026] It should be noted that, unless otherwise specified, the embodiments and features described in this invention can be combined with each other. The described embodiments are only a part of the embodiments of this invention, and not all of them. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention. The invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0027] This invention provides a substrate for BGA packaging with a microstructured surface fabricated by ultrafast laser to improve the thermal fatigue reliability of solder joints. Further, the substrate is a PCB substrate.

[0028] Furthermore, the chip is made of the same chip material used in power devices.

[0029] Furthermore, the substrate is arranged parallel to the chip, and the surfaces of the substrate facing the chip are planar.

[0030] The present invention will be further described below with reference to the embodiments, but the present invention is not limited to the following embodiments.

[0031] Example 1: The following describes the implementation method of the patent in detail.

[0032] 1. Chip and substrate preparation: Remove burrs from the surface or edges of the chips and substrates to be packaged to ensure smooth subsequent processes. Then, immerse them in alcohol for ultrasonic cleaning, and dry them after cleaning to remove contaminants at the connection points.

[0033] 2. Chip Ball Placement: Based on the chip pin size, select 0.3mm diameter lead-free solder balls with a composition of Sn 96.5% / Ag 3% / Cu 0.5%. Apply BGA-specific solder paste to the chip pin area, then place the solder balls at the corresponding pins. After completion, use tweezers to place them on the preheating stage. Preheat at 300℃ for one minute, then start the hot air gun with the following parameters: preheating zone 250℃ for 60 seconds, heating zone 350℃ for 60 seconds, reflow zone 450℃ for 120 seconds, and cooling zone for 60 seconds. Set the airflow speed to 2 for each zone. After cooling, observe the ball placement quality. If defects are found, rework and repair the balls for future use.

[0034] 3. Substrate Preparation: The substrate is placed on an ultrafast laser processing stage, leveled and focused using a laser rangefinder, and then positioned at the processing location. The laser parameters are adjusted as follows: laser power 6W, scanning speed 300mm / s, groove spacing 100µm, laser repetition frequency 400kHz, pulse width 12ps, 5 scans, as per... Figure 1 The pattern shown is processed. Then it is cleaned with anhydrous ethanol and set aside for later use.

[0035] 4. Chip Packaging: Apply flux evenly to the chip solder balls obtained in step 2, then place the chip with the solder balls facing down and the substrate processing surface from step 3 facing up, aligning the solder balls with the pin positions; then place it on a preheating stage, preheat at 300℃ for two minutes, then turn on the hot air gun and adjust the air speed to 4, keeping other parameters the same as in step 2; after cooling, observe whether the soldering positions are consistent and whether the soldering is firm.

[0036] 5. Thermal shock test: After observing the morphological characteristics, the sample is placed in the thermal shock test equipment. The temperature range is set to -40 to 125℃. The test is repeated for 15 minutes at -40℃ and 125℃ respectively. After every 100 cycles, the sample is taken out to observe the weld quality, compare the crack initiation and propagation, and evaluate the thermal fatigue reliability of the weld.

[0037] Comparative Example 1: The following details the implementation method of the patent.

[0038] Except for not performing ultrafast laser processing and directly attaching balls to the pretreated substrate for welding, the rest is basically the same as in Example 1.

[0039] The connection structure underwent thermal shock testing, and the results are shown below. Figure 5 .

[0040] Comparative Example 2: The following details the implementation methods of the patent.

[0041] Except for the ultrafast laser processing parameters in step 3, the rest is basically the same as in Example 1.

[0042] The parameters of the ultrafast laser processing equipment in this comparative example are: laser power 6W, scanning speed 300mm / s, groove spacing 120um, laser repetition frequency 400KHz, pulse width 12ps, 5 scans, as follows. Figure 1 The shown graphic was processed; thermal shock tests were performed on the connection structure, and the results are shown in [the table below]. Figure 5 .

[0043] Comparative Example 3: The following details the implementation methods of the patent.

[0044] Except for the ultrafast laser processing parameters in step 3, the rest is basically the same as in Example 1.

[0045] The parameters of the ultrafast laser processing equipment in this comparative example are: laser power 6W, scanning speed 300mm / s, groove spacing 100um, laser repetition frequency 400KHz, pulse width 12ps, 10 scans, as follows... Figure 1 The graphic shown is processed;

[0046] The connection structure underwent thermal shock testing, and the results are shown below. Figure 5 .

[0047] Table 1

[0048]

[0049] The implementation steps of the present invention have been described in detail above with reference to the accompanying drawings. This embodiment is implemented under the premise of the technical solution of the present invention, and provides detailed implementation methods and specific operation processes. However, the protection scope of the present invention is not limited to the following embodiments. Those skilled in the art can modify and refine it without changing the spirit and content of the present invention.

Claims

1. A method for improving thermal fatigue resistance of solder joints of a BGA package interconnected by a lead-free solder, comprising: The substrate surface is a micro-nano structure surface processed by ultrafast laser, the micro-nano structure is a grid-shaped straight groove microstructure formed by a plurality of transverse parallel and longitudinal parallel transverse and longitudinal intersections, the adjacent spacing between the plurality of transverse parallel grooves and the plurality of longitudinal parallel grooves is 80-120 μm, the groove width is 10-20 μm, the groove depth is 30-50 um, the groove parameters are adjusted by adjusting the ultrafast laser processing parameters, and a large number of micro-particles are covered inside and around the groove; solder balls are adhered to the chip pins, heating makes the solder balls and the chip pins melt and adhere together, and the substrate and the chip are BGA packaged.

2. The method according to claim 1, characterized in that The substrate is a PCB substrate.

3. The method of claim 1, wherein, The material of the chip is a chip material used by a power device.

4. The method of claim 1, wherein, The substrate and the chip are arranged in parallel, and the opposite surfaces of the substrate and the chip are flat surfaces.

5. The method of claim 2, wherein, Specifically comprising the following steps: First, put the PCB substrate into a container containing pickling solution, and clean it in an ultrasonic cleaner; then take out the PCB substrate and dry it; Then use sandpaper to polish the PCB substrate to ensure that the oxidation layer of the Cu pad of the PCB substrate is completely removed and the connection surface is level, and polish after polishing; Then start the laser control system, adjust the parameters of the ultrafast laser processing equipment, and prepare to prepare the micro-nano structure; Then place the pretreated PCB substrate in the irradiation range of the laser beam, adjust the displacement table to ensure that the soldering material is in the irradiation area of the laser; then control the ultrafast laser processing equipment to adjust the time and power parameters of laser processing according to the target pattern, and process and prepare the micro-nano structure on the surface of the PCB substrate; Finally, the solder balls are planted on the bare chip through the heating plate, and the chip and the processed PCB substrate are soldered and packaged through the hot air soldering machine, and are used and experimentally studied.

6. The method of claim 5, wherein, The pickling solution uses 30% HNO3; the thickness of the PCB substrate is 2.0 mm, the Cu pad surface of the PCB substrate is plated with nickel and immersed in gold to prevent oxidation; the solder ball uses SAC305 solder ball with a diameter of 300 μm; the chip uses CTBGA228 type chip produced by Amkor Company, which contains 228 solder points; the size of the BGA packaged device is 20 mm x 20 mm x 2 mm, the BGA is a hollow structure, each side has three rows of solder points, the outermost side has 22 solder points, the solder point diameter is 300 μm, and the solder point center distance is 500 μm.

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