Flyback circuit and control method thereof, power conversion circuit and electronic equipment

Abstract

The invention relates to a flyback circuit, a control method thereof, a power conversion circuit and electronic equipment. The flyback circuit comprises a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, a first bypass unit and a second bypass unit; when the first switch unit and the second switch unit are in a conducting state, the first switch unit is connected with the first parasitic inductor and one end of the primary side, and the second switch unit is connected with the second parasitic inductor and the other end of the primary side; the first bypass unit bypasses the first switching unit and the third switching unit and the second bypass unit bypasses the second switching unit and the fourth switching unit in a case where the first switching unit and the second switching unit are in an off state. The reliability is improved.

Description

Technical Field

[0001] This application relates to the field of electronic technologies, and particularly to a flyback circuit, a control method thereof, a power conversion circuit, and an electronic device. Background Art

[0002] In a typical dual-switch flyback circuit, two ends of the primary side of a flyback transformer are respectively connected to the positive and negative poles of a power supply through a switching transistor Q1 and a switching transistor Q2. When the switching transistors Q1 and Q2 are simultaneously turned on, the power supply and the primary side of the flyback transformer are connected through the switching transistors Q1 and Q2 to charge the primary side of the flyback transformer T1. An anti-connected diode D1 is provided between the common terminal of the primary side of the flyback transformer and the switching transistor Q1 and the negative pole of the power supply, and an anti-connected diode D2 is provided between the common terminal of the primary side of the flyback transformer and the switching transistor Q2 and the positive pole of the power supply. At the moment when the switching transistors Q1 and Q2 are simultaneously turned off, the diodes D1 and D2 are turned on, and the parasitic inductance causes the body diodes in the switching transistors Q1 and Q2 to be reversely turned on and generate heat, which consumes the switching transistors Q1 and Q2 and affects the reliability of the dual-switch flyback circuit. Summary of the Invention

[0003] Based on this, it is necessary to provide a flyback circuit, a control method thereof, a power conversion circuit, and an electronic device to improve the reliability of the flyback circuit.

[0004] A flyback circuit includes: a first switching unit, a second switching unit, a third switching unit, a fourth switching unit, a first bypass unit, and a second bypass unit;

[0005] A first end of the first switching unit is respectively connected to the positive pole of the power supply and the first bypass unit. A second end of the first switching unit is respectively connected to one end of the primary side of the flyback transformer and a first end of the third switching unit. There is a first parasitic inductance between the first end of the first switching unit and the positive pole. A second end of the third switching unit is respectively connected to the negative pole of the power supply and the first bypass unit. A first end of the second switching unit is respectively connected to a second end of the fourth switching unit and the other end of the primary side. A second end of the second switching unit is respectively connected to the negative pole of the power supply and the second bypass unit. There is a second parasitic inductance between the second end of the second switching unit and the negative pole. A first end of the fourth switching unit is respectively connected to the positive pole and the second bypass unit;

[0006] Wherein, when the first switching unit and the second switching unit are in the conducting state, the first switching unit is connected to the first parasitic inductor and one end of the primary side, and the second switching unit is connected to the second parasitic inductor and the other end of the primary side, so that the power supply charges the primary side; when the first switching unit and the second switching unit are in the off state, the first bypass unit bypasses the first switching unit and the third switching unit, and the second bypass unit bypasses the second switching unit and the fourth switching unit.

[0007] In one embodiment, when the first switching unit is in the off state, the first bypass voltage across the first bypass unit is less than a first preset voltage.

[0008] Wherein, the first preset voltage is the sum of the first conduction voltage for the first switching unit to conduct reversely and the third conduction voltage of the third switching unit.

[0009] In one embodiment, the first bypass unit includes:

[0010] A first capacitor, with the first end of the first capacitor being the first target end;

[0011] A first resistor, with one end of the first resistor connected to the second end of the first capacitor and the other end of the first resistor being the second target end;

[0012] Wherein, the first target end and the second target end are respectively connected to the first end of the first switching unit and the negative electrode.

[0013] In one embodiment, the first bypass unit includes:

[0014] A second capacitor, with both ends of the second capacitor respectively connected to the first end of the first switching unit and the negative electrode.

[0015] In one embodiment, when the first switching unit is in the off state, the second bypass voltage across the second bypass unit is less than a second preset voltage.

[0016] Wherein, the second preset voltage is the sum of the second conduction voltage for the second switching unit to conduct reversely and the fourth conduction voltage of the fourth switching unit.

[0017] In one embodiment, the length of the connection line between the first common end and the second end of the first switching unit is less than the length of the connection line between the first common end and one end of the primary side; the first common end represents the connection point among the second end of the first switching unit, the first end of the third switching unit, and one end of the primary side.

[0018] and / or the length of the connection line between the second common terminal and the first end of the second switching unit is less than the length of the connection line between the second common terminal and the other end of the primary side; the second common terminal represents the connection point between the first end of the second switching unit, the second end of the fourth switching unit, and the other end of the primary side.

[0019] In one embodiment, the third switching unit includes:

[0020] A first diode, the cathode of the first diode is the first end of the third switching unit, and the anode of the first diode serves as the second end of the third switching unit.

[0021] In one embodiment, the fourth switching unit includes:

[0022] A second diode, the cathode of the second diode serves as the first end of the fourth switching unit, and the anode of the second diode serves as the second end of the fourth switching unit.

[0023] In one embodiment, the flyback circuit further includes:

[0024] A controller, connected to the control ends of the first switching unit and the second switching unit respectively, for controlling the conduction and cutoff of the first switching unit and the second switching unit.

[0025] A power conversion circuit includes:

[0026] The flyback circuit as described above;

[0027] A flyback transformer, the primary side of the flyback transformer is connected to the flyback circuit.

[0028] An electronic device includes the flyback circuit as described above.

[0029] A control method for a flyback circuit, the flyback circuit comprising a first switching unit, a second switching unit, a third switching unit, a fourth switching unit, a first bypass unit and a second bypass unit; a first end of the first switching unit is respectively connected to a positive electrode of a power supply and the first bypass unit, a second end of the first switching unit is respectively connected to one end of a primary side of a flyback transformer and a first end of the third switching unit, and there is a first parasitic inductance between the first end of the first switching unit and the positive electrode; a second end of the third switching unit is respectively connected to a negative electrode of the power supply and the first bypass unit; a first end of the second switching unit is respectively connected to a second end of the fourth switching unit and the other end of the primary side, a second end of the second switching unit is respectively connected to the negative electrode of the power supply and the second bypass unit, and there is a second parasitic inductance between the second end of the second switching unit and the negative electrode; a first end of the fourth switching unit is respectively connected to the positive electrode and the second bypass unit; the control method includes:

[0030] Control the first switching unit and the second switching unit to be in a conducting state, so that the first parasitic inductance is connected to one end of the primary side, and the other end of the primary side is connected to the second parasitic inductance, so that the power supply charges the primary side of the flyback transformer;

[0031] Control the first switching unit and the second switching unit to be in a non-conducting state, so that the first bypass unit bypasses the first switching unit and the third switching unit, and the second bypass unit bypasses the second switching unit and the fourth switching unit.

[0032] In the above flyback circuit, when the first switching unit and the second switching unit are in a non-conducting state, the first bypass unit and the second bypass unit respectively bypass the first switching unit and the second switching unit, avoiding reverse conduction and heating of the first switching unit and the second switching unit, reducing damage to the first switching unit and the second switching unit in the flyback circuit caused by the first parasitic inductance and the second parasitic inductance generated on the connection wires, ensuring normal operation of the first switching unit and the second switching unit, improving the efficiency of the flyback circuit, optimizing the electromagnetic compatibility of the flyback circuit, and increasing the reliability of the flyback circuit.

[0033] In the above power conversion circuit, when the first switch unit and the second switch unit of the flyback circuit are in the off state, the first bypass unit and the second bypass unit bypass the first switch unit and the second switch unit respectively, avoiding the reverse conduction and heating of the first switch unit and the second switch unit, reducing the damage to the first switch unit and the second switch unit in the flyback circuit caused by the first parasitic inductance and the second parasitic inductance generated on the connection wires, ensuring the normal operation of the first switch unit and the second switch unit, improving the efficiency of the flyback circuit, optimizing the electromagnetic compatibility of the flyback circuit, and increasing the reliability of the power conversion circuit.

[0034] In the control method of the above flyback circuit, the first switch unit and the second switch unit are controlled to be in the off state, so that the first bypass unit and the second bypass unit bypass the first switch unit and the second switch unit respectively, avoiding the reverse conduction and heating of the first switch unit and the second switch unit, reducing the damage to the first switch unit and the second switch unit in the flyback circuit caused by the first parasitic inductance and the second parasitic inductance generated on the connection wires, ensuring the normal operation of the first switch unit and the second switch unit, improving the efficiency of the flyback circuit, optimizing the electromagnetic compatibility of the flyback circuit, and increasing the reliability of the flyback circuit. Description of the Drawings

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application or in the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0036] Figure 1 It is a schematic structural diagram of a flyback circuit in some embodiments;

[0037] Figure 2 It is a circuit schematic diagram of a typical dual-switch flyback circuit;

[0038] Figure 3 It is a circuit schematic diagram of a flyback circuit in some embodiments;

[0039] Figure 4 It is a circuit schematic diagram of a flyback circuit in still other embodiments;

[0040] Figure 5 It is a circuit schematic diagram of a flyback circuit in yet other embodiments;

[0041] Figure 6 It is a flow schematic diagram of the control method of a flyback circuit in some embodiments.

[0042] Description of the Reference Numerals:

[0043] Power supply 10; first switching unit 102; second switching unit 104; third switching unit 106; fourth switching unit 108; first bypass unit 110; second bypass unit 112; first parasitic inductor 114; second parasitic inductor 116; controller 118; flyback transformer 20. Detailed implementation

[0044] For ease of understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. Embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided so that the disclosure of the present application is more thorough and comprehensive.

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used herein in the description of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application.

[0046] It can be understood that the terms "first", "second", etc. used in the present application can be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from another element. For example, without departing from the scope of the present application, the first switching unit can be referred to as the second switching unit, and similarly, the second switching unit can be referred to as the first switching unit. Both the first switching unit and the second switching unit are resistors, but they are not the same switching unit.

[0047] It can be understood that "connection" in the following embodiments should be understood as "electrical connection", "communication connection", etc. if there is an electrical signal or data transfer between the connected circuits, modules, units, etc.

[0048] It can be understood that "at least one" means one or more, and "a plurality" means two or more. "At least a part of an element" means part or all of the element.

[0049] As used herein, the singular forms "a", "an" and "the" may also include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprises / include" or "has" etc. specify the presence of the stated features, wholes, steps, operations, components, parts or combinations thereof, but do not preclude the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the related listed items.

[0050] Figure 1Schematic structural diagram of a flyback circuit in some embodiments. Refer to Figure 1 In this embodiment, a flyback circuit is provided, including: a first switching unit 102, a second switching unit 104, a third switching unit 106, a fourth switching unit 108, a first bypass unit 110, and a second bypass unit 112.

[0051] A first end of the first switching unit 102 is respectively connected to the positive electrode of the power supply 10 and the first bypass unit 110. A second end of the first switching unit 102 is respectively connected to one end of the primary side of the flyback transformer 20 and a first end of the third switching unit 106. When the first switching unit 102 is in the conducting state, it connects the positive electrode of the power supply 10 and one end of the primary side of the flyback transformer 20. A second end of the third switching unit 106 is respectively connected to the negative electrode of the power supply 10 and the first bypass unit 110. A first end of the second switching unit 104 is respectively connected to a second end of the fourth switching unit 108 and the other end of the primary side of the flyback transformer 20. A second end of the second switching unit 104 is respectively connected to the negative electrode of the power supply 10 and the second bypass unit 112. A first end of the fourth switching unit 108 is respectively connected to the positive electrode of the power supply 10 and the second bypass unit 112.

[0052] The first switching unit 102 and the second switching unit 104 are simultaneously switched to the conducting state or simultaneously switched to the off state, that is, the on-off states of the first switching unit 102 and the second switching unit 104 are the same. The third switching unit 106 and the fourth switching unit 108 are simultaneously switched to the conducting state or simultaneously switched to the off state, that is, the on-off states of the third switching unit 106 and the fourth switching unit 108 are the same. And the on-off states of the first switching unit 102 and the third switching unit 106 are opposite, where the on-off state includes the conducting state and the off state.

[0053] It can be understood that there is a certain difference in the time required for different switching units to be switched from the conducting state to the off state or from the off state to the conducting state. This difference can be ignored in practical applications. That is, when control signals for switching to the target state (either the conducting state or the off state) are simultaneously sent to the first switching unit 102 and the second switching unit 104, the moments when the first switching unit 102 and the second switching unit 104 are switched to the target state are the same. When a control signal for switching to the conducting state is sent to the first switching unit 102 and a control signal for switching to the off state is sent to the third switching unit 106 at the same time, the moments when the first switching unit 102 is in the conducting state and the third switching unit 106 is in the off state are the same.

[0054] It can be understood that when the first bypass unit 110 and the second bypass unit 112 are ignored, for the first switching unit 102 and the second switching unit 104, when the first switching unit 102 and the second switching unit 104 are in the conducting state, the third switching unit 106 and the fourth switching unit 108 are in the off state. The first switching unit 102 and the second switching unit 104 conduct forward, the first end and the second end of the first switching unit 102 are connected, and the first end and the second end of the second switching unit 104 are connected. The first switching unit 102 connects the positive pole of the power supply 10 and one end of the primary side of the flyback transformer 20, and the second switching unit 104 connects the negative pole of the power supply 10 and the other end of the primary side of the flyback transformer 20, so that the power supply 10 charges the primary side of the flyback transformer 20.

[0055] A first parasitic inductance 114 is generated between the first end of the first switching unit 102 and the positive pole of the power supply 10, and a second parasitic inductance 116 is generated between the second end of the second switching unit 104 and the negative pole of the power supply 10. Among them, the first parasitic inductance 114 is the equivalent inductance on the line between the first end of the first switching unit 102 and the positive pole of the power supply 10, and is a dummy element. The second parasitic inductance 116 is the equivalent inductance on the line between the second end of the second switching unit 104 and the negative pole of the power supply 10, and is also a dummy element.

[0056] Similarly, when the first bypass unit 110 and the second bypass unit 112 are ignored, when the first switching unit 102 and the second switching unit 104 are in the off state, the positive pole of the power supply 10 and one end of the primary side of the flyback transformer 20, and the negative pole of the power supply 10 and the other end of the primary side of the flyback transformer 20 are disconnected. The first switching unit 102 and the second switching unit 104 are disconnected forward and conduct backward. The current directions corresponding to backward conduction and forward conduction are opposite. When the first switching unit 102 and the second switching unit 104 conduct backward, heat will be generated, and there is a problem that the first switching unit 102 and the second switching unit 104 may be damaged due to excessive heat, affecting the reliability of the flyback circuit.

[0057] Figure 2 For the circuit schematic diagram of a typical dual-switch flyback circuit, see Figure 2, when the switching transistors Q1 and Q2 are in the conducting state, the switching transistors Q1 and Q2 conduct forwardly, the diodes D1 and D2 are turned off, the switching transistor Q1 connects the positive electrode of the power supply and one end of the primary side of the flyback transformer T1, and the switching transistor Q2 connects the negative electrode of the power supply and the other end of the primary side of the flyback transformer T1, so that the power supply charges the primary side of the flyback transformer T1. A parasitic inductance L1 is generated between the switching transistor Q1 and the positive electrode of the power supply, and a parasitic inductance L2 is generated between the switching transistor Q2 and the negative electrode of the power supply; wherein, the parasitic inductance L1 is the equivalent inductance on the connection line between the switching transistor Q1 and the positive electrode of the power supply and is a dummy element, and the parasitic inductance L2 is the equivalent inductance on the connection line between the switching transistor Q2 and the negative electrode of the power supply and is also a dummy element.

[0058] When the switching transistors Q1 and Q2 are in the off state, the switching transistors Q1 and the switching transistor Q2 are disconnected forwardly and conduct reversely. The current directions corresponding to the reverse conduction and the forward conduction are opposite. When the switching transistors Q1 and Q2 conduct reversely, heat will be generated, and there is a problem that the switching transistors Q1 and Q2 may be damaged due to excessive heat, affecting the reliability of the flyback circuit.

[0059] In the present application, when the first switching unit 102 and the second switching unit 104 are in the off state, the first bypass unit 110 bypasses the first switching unit 102 and the third switching unit 106, and the first parasitic inductance 114 is connected to the negative electrode of the power supply 10 through the first bypass unit 110, avoiding the first switching unit 102 from generating heat due to reverse conduction. And the second bypass unit 112 bypasses the second switching unit 104 and the fourth switching unit 108, and the second parasitic inductance 116 is connected to the positive electrode of the power supply 10 through the second bypass unit 112, avoiding the second switching unit 104 from generating heat due to reverse conduction. Compared with Figure 2 the corresponding dual-switch flyback circuit, it avoids the problem that the switching transistors Q1 and Q2 conduct reversely to generate heat, damage the switching transistors Q1 and Q2, and affect the reliability of the flyback circuit. In the above flyback circuit, when the first switching unit 102 and the second switching unit 104 are in the off state, the first bypass unit 110 and the second bypass unit 112 bypass the first switching unit 102 and the second switching unit 104 respectively, avoiding the first switching unit 102 and the second switching unit 104 from generating heat due to reverse conduction, reducing the damage of the first parasitic inductance 114 and the second parasitic inductance 116 generated on the connection line to the first switching unit 102 and the second switching unit 104 in the flyback circuit, ensuring the normal operation of the first switching unit 102 and the second switching unit 104, improving the efficiency of the flyback circuit, optimizing the electromagnetic compatibility of the flyback circuit, and increasing the reliability of the flyback circuit.

[0060] Further, ignoring the bypasses of the first bypass unit 110 and the second bypass unit 112, when the first switching unit 102 and the second switching unit 104 are in the off state and the voltage between the first end and the second end of the first switching unit 102 is the first conduction voltage, the first switching unit 102 conducts in the reverse direction; wherein, the first conduction voltage represents the voltage between the first end and the second end of the first switching unit 102 when conducting in the reverse direction. When the first switching unit 102 and the second switching unit 104 are in the off state and the voltage between the first end and the second end of the second switching unit 104 is the second conduction voltage, the second switching unit 104 conducts in the reverse direction; wherein, the second conduction voltage represents the voltage between the first end and the second end of the second switching unit 104 when conducting in the reverse direction.

[0061] Figure 3 is a circuit schematic diagram of a flyback circuit in some embodiments. Refer to Figure 3 , in some embodiments, the first switching unit 102 includes an NMOS transistor Q01. The drain terminal of the NMOS transistor Q01 is the first end of the first switching unit 102, and the source terminal of the NMOS transistor Q01 is the second end of the first switching unit 102.

[0062] For the first switching unit 102 itself, when the first switching unit 102 is in the on state, the NMOS transistor Q01 conducts in the forward direction, and the current direction is from the drain terminal to the source terminal. When the first switching unit 102 is in the off state and the source-drain voltage of the NMOS transistor Q01 is equal to the conduction voltage of the body diode in the NMOS transistor Q01, the body diode in the NMOS transistor Q01 conducts, and the NMOS transistor Q01 conducts in the reverse direction, generating heat. It can be understood that the first conduction voltage is the source-drain voltage when the NMOS transistor Q01 conducts in the reverse direction.

[0063] In this application, when the first switching unit 102 is in the on state, the first bypass unit 110 does not affect the connection of the first switching unit 102 to the positive pole of the power supply 10 and one end of the primary side of the flyback transformer 20. When the first switching unit 102 is in the off state, the first bypass unit 110 bypasses the first switching unit 102, turning off the body diode in the NMOS transistor Q01 and preventing it from conducting in the reverse direction. The first parasitic inductor 114 is connected to the negative pole of the power supply 10 through the first bypass unit 110, avoiding the risk that the instantaneous parasitic current generated by the first parasitic inductor 114 is too large when the first switching unit 102 is in the off state, which may damage the body diode in the NMOS transistor Q01 or cause the NMOS transistor Q01 to explode, thereby improving the reliability of the flyback circuit.

[0064] Refer to Figure 3, in some embodiments, the second switching unit 104 includes an NMOS transistor Q02. The drain terminal of the NMOS transistor Q02 is the first end of the second switching unit 104, and the source terminal of the NMOS transistor Q02 is the second end of the second switching unit 104.

[0065] For the second switching unit 104 itself, when the second switching unit 104 is in the on state, the NMOS transistor Q02 conducts forward, and the current direction is from the drain terminal to the source terminal. When the second switching unit 104 is in the off state and the source-drain voltage of the NMOS transistor Q02 is equal to the conduction voltage of the body diode in the NMOS transistor Q02, the body diode in the NMOS transistor Q02 conducts, and the NMOS transistor Q02 conducts reversely, generating heat. It can be understood that the second conduction voltage is the source-drain voltage when the NMOS transistor Q02 conducts reversely.

[0066] In this application, when the second switching unit 104 is in the on state, the second bypass unit 112 does not affect the connection between the second switching unit 104, the negative electrode of the power supply 10, and the other end of the primary side of the flyback transformer 20. When the second switching unit 104 is in the off state, the second bypass unit 112 bypasses the second switching unit 104, turning off the body diode in the NMOS transistor Q02 without reverse conduction. The second parasitic inductor 116 is connected to the positive electrode of the power supply 10 through the second bypass unit 112, avoiding the risk that the instantaneous parasitic current generated by the second parasitic inductor 116 is too large when the second switching unit 104 is in the off state, causing damage to the body diode in the NMOS transistor Q02 or the risk of the NMOS transistor Q02 exploding, thereby improving the reliability of the flyback circuit.

[0067] Furthermore, the NMOS transistor Q01 and / or the NMOS transistor Q02 include power devices prepared from third-generation semiconductors such as gallium nitride. It can be understood that other components with short-circuited on states and internally reverse-conducted off states can also be selected for the first switching unit 102 and the second switching unit 104.

[0068] See Figure 3 , in one of the embodiments, the third switching unit 104 includes: a first diode D02. The cathode of the first diode D02 is the first end of the third switching unit 104, and the anode of the first diode D02 serves as the second end of the third switching unit 104. It can be understood that when the first diode D02 is in the on state, the voltage between the anode and the cathode of the first diode D02 is the third conduction voltage.

[0069] See Figure 3, in one embodiment, the fourth switching unit 108 includes: a second diode D01; the cathode of the second diode D01 serves as the first end of the fourth switching unit 108, and the anode of the second diode D01 serves as the second end of the fourth switching unit 108. It can be understood that when the second diode D01 is in the conducting state, the voltage between the anode and the cathode of the second diode D01 is the fourth conduction voltage.

[0070] In one embodiment, when the first switching unit 102 is in the off state, the first bypass voltage across the first bypass unit 110 is less than a first preset voltage; wherein, the first preset voltage is the sum of the first conduction voltage at which the first switching unit 102 conducts in the reverse direction and the third conduction voltage of the third switching unit 106. When the first switching unit 102 is in the off state, the first parasitic inductor 114 induces a parasitic current. This setting makes the overall blocking of the parasitic current by the reversely conducting first switching unit 102 and the conducting third switching unit 106 greater than the blocking of the parasitic current by the first bypass unit 110. The first bypass unit 110 bypasses the first switching unit 102 and the third switching unit 106, preventing the first switching unit 102 from conducting in the reverse direction and generating heat, reducing the loss of the first switching unit 102, and improving the EMC effect of the circuit.

[0071] In one embodiment, when the first switching unit 102 is in the off state and the second switching unit 104 is also in the off state, the second bypass voltage across the second bypass unit 112 is less than a second preset voltage; wherein, the second preset voltage is the sum of the second conduction voltage at which the second switching unit 104 conducts in the reverse direction and the fourth conduction voltage of the fourth switching unit 108. When the second switching unit 104 is in the off state, the second parasitic inductor 116 induces a parasitic current. This setting makes the overall blocking of the parasitic current by the reversely conducting second switching unit 104 and the conducting fourth switching unit 108 greater than the blocking of the parasitic current by the second bypass unit 112. The second bypass unit 112 bypasses the second switching unit 104 and the fourth switching unit 108, preventing the second switching unit 104 from conducting in the reverse direction and generating heat, reducing the loss of the second switching unit 104, and improving the EMC effect of the circuit.

[0072] Figure 4 For the circuit schematic diagram of the flyback circuit in some other embodiments, see Figure 4, in one embodiment, the first bypass unit 110 includes: a first capacitor C01 and a first resistor R01; a first end of the first capacitor C01 is a first target end; one end of the first resistor R01 is connected to a second end of the first capacitor C01, and the other end of the first resistor R01 is a second target end; wherein, the first target end and the second target end are respectively connected to a first end of the first switch unit 102 and a negative electrode of the power supply 10. That is, the first end of the first capacitor C01 is connected to the negative electrode of the power supply 10, and the other end of the first resistor R01 is connected to the first end of the first switch unit 102, or the first end of the first capacitor C01 is connected to the first end of the first switch unit 102, and the other end of the first resistor R01 is connected to the negative electrode of the power supply 10.

[0073] Figure 5 For the circuit schematic diagram of the flyback circuit in some other embodiments, see Figure 5 , in one embodiment, the first bypass unit 110 includes: a second capacitor C11; both ends of the second capacitor C11 are respectively connected to a first end of the first switch unit 102 and a negative electrode of the power supply 102. This setting enables the first bypass unit 110 to bypass the first switch unit 102 and the third switch unit 106 without loss, and the first parasitic inductor 114 and the second capacitor C11 generate a lossless bypass similar to a resonant cavity.

[0074] See Figure 5 , in one embodiment, the second bypass unit 112 has the same structure as the first bypass unit 110, which simplifies the design difficulty of the flyback circuit. As an example, the first bypass unit 112 includes a second capacitor C11, and the second bypass unit 114 includes a third capacitor C21. It can be understood that the structures of the second bypass unit 112 and the first bypass unit 110 may also be different, and the present application does not limit this.

[0075] It can be understood that the first internal parasitic inductance generated inside the NMOS transistor Q01 from the node where the second capacitor C11 is connected to the first end of the first switch unit 102 is recovered in the shortest path manner, and the loop path is as shown in Figure 5 the dotted line in, suppressing the negative peak current inside the NMOS transistor Q01 to the minimum value, and further improving the heating and EMC problems of the NMOS transistor Q01.

[0076] Similarly, the second internal parasitic inductance generated inside the NMOS transistor Q02 from the node where the third capacitor C21 is connected to the second end of the second switch unit 104 is recovered in the shortest path manner, and the loop path is as shown in Figure 5 the dotted line in, suppressing the negative peak current inside the NMOS transistor Q02 to the minimum value, and further improving the heating and EMC problems of the NMOS transistor Q02.

[0077] SeeFigure 5 In one embodiment, the length of the connection line between the first common end 1 and the second end of the first switching unit 102 is less than the length of the connection line between the first common end 1 and one end of the primary side of the flyback transformer 20; the first common end 1 represents the connection point among the second end of the first switching unit 102, the first end of the third switching unit 106, and one end of the primary side of the flyback transformer 20. This setting can reduce the influence of the first sub-parasitic inductance between the first common end 1 and one end of the primary side of the flyback transformer 20 on the heat generated by the first switching unit 102, that is, reduce the influence of the first sub-parasitic inductance on the heat generated by the body diode in the NMOS transistor Q01 when it conducts in the reverse direction. Further, the first common end 1 coincides with the second end of the first switching unit 102. At this time, there is no first sub-parasitic inductance between the first common end 1 and the second end of the first switching unit 102, and the heat generated by the parasitic inductance is minimized.

[0078] See Figure 5 In one embodiment, the length of the connection line between the second common end 2 and the first end of the second switching unit 104 is less than the length of the connection line between the second common end 2 and the other end of the primary side of the flyback transformer 20; the second common end 2 represents the connection point among the first end of the second switching unit 104, the second end of the fourth switching unit 108, and the other end of the primary side of the flyback transformer 20. This setting can reduce the influence of the second sub-parasitic inductance between the second common end 2 and the other end of the primary side of the flyback transformer 20 on the heat generated by the second switching unit 104, that is, reduce the influence of the second sub-parasitic inductance on the heat generated by the body diode in the NMOS transistor Q02 when it conducts in the reverse direction. Further, the second common end 2 coincides with the first end of the second switching unit 104. At this time, there is no second sub-parasitic inductance between the second common end 2 and the first end of the second switching unit 104, and the heat generated by the parasitic inductance is minimized.

[0079] See Figure 5 In one embodiment, the flyback transformer 20 includes a flyback sub-transformer T01. One end of the primary side of the flyback sub-transformer T01 serves as one end of the primary side of the flyback transformer 20, and the other end of the primary side of the flyback sub-transformer T01 serves as the other end of the primary side of the flyback transformer 20.

[0080] See Figure 5 In some embodiments, the primary side of the flyback sub-transformer T01 includes a primary coil, and the two ends of the primary coil are respectively one end of the primary side of the flyback sub-transformer T01 and the other end of the primary side of the flyback sub-transformer T01.

[0081] In another embodiment, the primary side of the flyback transformer T01 includes a primary coil and an auxiliary winding. One end of the auxiliary winding is connected to one end of the primary coil, and the other end of the auxiliary winding is connected to other components. Wherein, one end of the primary coil serves as one end of the primary side of the flyback transformer T01, and the other end of the primary coil serves as the other end of the primary side of the flyback transformer T01.

[0082] In one embodiment, the flyback transformer 20 includes a plurality of cascaded flyback transformers. The primary sides of the plurality of flyback transformers are connected in series in sequence to form the primary side of the flyback transformer 20. One end of the primary side of any flyback transformer serves as one end of the primary side of the flyback transformer 20, and the other end of the primary side of the last flyback transformer serves as the other end of the primary side of the flyback transformer 20.

[0083] See Figure 5 , in one embodiment, the flyback circuit further includes: a controller 118; the controller 118 is respectively connected to the control ends of the first switching unit 102 and the second switching unit 104, and is used to control the conduction and cutoff of the first switching unit 102 and the second switching unit 104.

[0084] See Figure 5 , this application further provides a power conversion circuit, including: the flyback circuit and the flyback transformer 20 as described above; the primary side of the flyback transformer 20 is connected to the flyback circuit. Parts that are the same as or corresponding to the embodiments in the above flyback circuit will not be described in detail below.

[0085] In the above power conversion circuit, when the first switching unit 102 and the second switching unit 104 in the flyback circuit are in the off state, the first bypass unit 110 and the second bypass unit 112 bypass the first switching unit 102 and the second switching unit 104 respectively, avoiding the reverse conduction and heating of the first switching unit 102 and the second switching unit 104, reducing the damage of the first parasitic inductance 114 and the second parasitic inductance 116 generated on the connection line to the first switching unit 102 and the second switching unit 104 in the flyback circuit, ensuring the normal operation of the first switching unit 102 and the second switching unit 104, improving the efficiency of the flyback circuit, optimizing the electromagnetic compatibility of the flyback circuit, and increasing the reliability of the power conversion circuit.

[0086] See Figure 5, in one embodiment, the power conversion circuit further includes: a diode D32, a capacitor C32, and a resistor R32; the anode of the diode D32 is connected to one end of the secondary side of the flyback transformer 20, the cathode of the diode D32 is connected to one end of the capacitor C32, and the other end of the capacitor C32 is connected to the other end of the secondary side of the flyback transformer 20; the resistor R32 is connected in parallel across the capacitor C32, and the directions of the currents in the secondary side and the primary side of the flyback transformer 20 are opposite.

[0087] The present application also provides an electronic device, including the flyback circuit or the power conversion circuit as described above.

[0088] Based on the same inventive concept, the present application also provides a control method for the flyback circuit as described above. Figure 6 For the schematic flow chart of the control method for the flyback circuit in some embodiments, see Figure 2 and Figure 6 , in this embodiment, a control method for a flyback circuit is provided. The flyback circuit includes a first switch unit 102, a second switch unit 104, a third switch unit 106, a fourth switch unit 108, a first bypass unit 110, and a second bypass unit 112; the first end of the first switch unit 102 is respectively connected to the positive electrode of the power supply 10 and the first bypass unit 110, the second end of the first switch unit 102 is respectively connected to one end of the primary side of the flyback transformer 20 and the first end of the third switch unit 106, and there is a first parasitic inductance 114 between the first end of the first switch unit 102 and the positive electrode of the flyback transformer 20; the second end of the third switch unit 106 is respectively connected to the negative electrode of the power supply 10 and the first bypass unit 110; the first end of the second switch unit 104 is respectively connected to the second end of the fourth switch unit 108 and the other end of the primary side of the flyback transformer 20, the second end of the second switch unit 104 is respectively connected to the negative electrode of the power supply 10 and the second bypass unit 112, and there is a second parasitic inductance 116 between the second end of the second switch unit 104 and the negative electrode of the power supply 10; the first end of the fourth switch unit 108 is respectively connected to the positive electrode of the power supply 10 and the second bypass unit 112.

[0089] Specifically, the control method for the flyback circuit includes:

[0090] S102, controlling the first switch unit and the second switch unit to be in the conducting state, so that the power supply charges the primary side of the flyback transformer.

[0091] Specifically, control the first switching unit 102 and the second switching unit 104 to be in the conducting state. The positive pole of the power supply 10 is connected to one end of the primary side of the flyback transformer 20 through the conducting first switching unit 102. An equivalent first parasitic inductor 114 is generated on the connection line between the positive pole of the power supply 10 and the first end of the first switching unit 102, that is, the first parasitic inductor 114 is connected to one end of the primary side of the flyback transformer 20. The other end of the primary side of the flyback transformer 20 is connected to the negative pole of the power supply 10 through the conducting second switching unit 104. An equivalent second parasitic inductor 116 is generated on the connection line between the negative pole of the power supply 10 and the second end of the second switching unit 104, that is, the second parasitic inductor 116 is connected to the other end of the primary side of the flyback transformer 20.

[0092] S104, control the first switching unit and the second switching unit to be in the off state, so that the first bypass unit bypasses the first switching unit and the third switching unit, and the second bypass unit bypasses the second switching unit and the fourth switching unit.

[0093] Specifically, control the first switching unit 102 and the second switching unit 104 to be in the off state, so that the first bypass unit 110 bypasses the first switching unit 102 and the third switching unit 106, and the second bypass unit 112 bypasses the second switching unit 104 and the fourth switching unit 108, to avoid heat generation caused by the reverse conduction of the first switching unit 102 and the second switching unit 104.

[0094] In the control method of the above flyback circuit, control the first switching unit 102 and the second switching unit 104 to be in the off state, so that the first bypass unit 110 and the second bypass unit 112 bypass the first switching unit 102 and the second switching unit 104 respectively, to avoid heat generation caused by the reverse conduction of the first switching unit 102 and the second switching unit 104, reduce the damage to the first switching unit 102 and the second switching unit 104 in the flyback circuit caused by the first parasitic inductor 114 and the second parasitic inductor 116 generated on the connection line, ensure the normal operation of the first switching unit 102 and the second switching unit 104, improve the efficiency of the flyback circuit, optimize the electromagnetic compatibility of the flyback circuit, and increase the reliability of the flyback circuit.

[0095] In the description of this specification, the descriptions with reference to terms such as "some embodiments", "other embodiments", etc. mean that the specific features, structures, materials or features described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0096] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0097] The above-described embodiments only express several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several deformations and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A flyback circuit, characterized in that: include: A first switch unit, a second switch unit, a third switch unit, a fourth switch unit, a first bypass unit, and a second bypass unit; The first end of the first switch unit is respectively connected to the positive electrode of the power supply and the first bypass unit, the second end of the first switch unit is respectively connected to one end of the primary side of the flyback transformer and the first end of the third switch unit, and there is a first parasitic inductance between the first end of the first switch unit and the positive electrode; the second end of the third switch unit is respectively connected to the negative electrode of the power supply and the first bypass unit; the first end of the second switch unit is respectively connected to the second end of the fourth switch unit and the other end of the primary side, the second end of the second switch unit is respectively connected to the negative electrode of the power supply and the second bypass unit, and there is a second parasitic inductance between the second end of the second switch unit and the negative electrode; the first end of the fourth switch unit is respectively connected to the positive electrode and the second bypass unit; Among them, when the first switch unit and the second switch unit are in the on state, the first switch unit connects the first parasitic inductance and one end of the primary side, and the second switch unit connects the second parasitic inductance and the other end of the primary side, so that the power supply charges the primary side; when the first switch unit and the second switch unit are in the off state, the first bypass unit bypasses the first switch unit and the third switch unit, and the second bypass unit bypasses the second switch unit and the fourth switch unit.

2. The flyback circuit according to claim 1, characterized in that: When the first switch unit is in an off state, a first bypass voltage across the first bypass unit is less than a first preset voltage; The first preset voltage is the sum of a first conduction voltage of the first switch unit when it is reversely conducted and a third conduction voltage of the third switch unit.

3. The flyback circuit according to claim 2, characterized in that: The first bypass unit comprises: a first capacitor, wherein a first end of the first capacitor is a first target end; a first resistor, one end of the first resistor is connected to the second end of the first capacitor, and the other end of the first resistor is a second target end; The first target terminal and the second target terminal are connected to the first terminal and the negative electrode of the first switch unit respectively.

4. The flyback circuit according to claim 2, characterized in that: The first bypass unit comprises: A second capacitor, wherein two ends of the second capacitor are respectively connected to the first end and the negative electrode of the first switch unit.

5. The flyback circuit according to claim 1, characterized in that: When the first switch unit is in an off state, a second bypass voltage across the second bypass unit is less than a second preset voltage; The second preset voltage is the sum of the second conduction voltage of the second switch unit when it is reversely conducted and the fourth conduction voltage of the fourth switch unit.

6. The flyback circuit according to claim 1, characterized in that: The length of the line between the first common terminal and the second end of the first switch unit is less than the length of the line between the first common terminal and one end of the primary side; the first common terminal represents the connection point between the second end of the first switch unit, the first end of the third switch unit and one end of the primary side; And / or the length of the line between the second common terminal and the first end of the second switch unit is less than the length of the line between the second common terminal and the other end of the primary side; the second common terminal represents the connection point between the first end of the second switch unit, the second end of the fourth switch unit and the other end of the primary side.

7. The flyback circuit according to claim 1, characterized in that: The third switch unit comprises: A first diode, wherein a cathode of the first diode is a first end of the third switch unit, and an anode of the first diode is a second end of the third switch unit.

8. The flyback circuit according to claim 1, characterized in that: The fourth switch unit comprises: A second diode, wherein a cathode of the second diode serves as a first end of the fourth switch unit, and an anode of the second diode serves as a second end of the fourth switch unit.

9. The flyback circuit according to claim 1, characterized in that: Also includes: The controller is connected to the control end of the first switch unit and the control end of the second switch unit respectively, and is used to control the on and off of the first switch unit and the second switch unit.

10. A power conversion circuit, characterized in that: include: The flyback circuit according to any one of claims 1 to 9; as well as A flyback transformer, wherein the primary side of the flyback transformer is connected to the flyback circuit.

11. An electronic device, characterized in that: The invention comprises a flyback circuit as claimed in any one of claims 1 to 9.

12. A control method for a flyback circuit, characterized in that: The flyback circuit includes a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, a first bypass unit, and a second bypass unit; the first end of the first switch unit is respectively connected to the positive electrode of the power supply and the first bypass unit, the second end of the first switch unit is respectively connected to one end of the primary side of the flyback transformer and the first end of the third switch unit, and there is a first parasitic inductance between the first end of the first switch unit and the positive electrode; the second end of the third switch unit is respectively connected to the negative electrode of the power supply and the first bypass unit; the first end of the second switch unit is respectively connected to the second end of the fourth switch unit and the other end of the primary side, the second end of the second switch unit is respectively connected to the negative electrode of the power supply and the second bypass unit, and there is a second parasitic inductance between the second end of the second switch unit and the negative electrode; the first end of the fourth switch unit is respectively connected to the positive electrode and the second bypass unit; the control method includes: Controlling the first switch unit and the second switch unit to be in a conducting state, so that the first parasitic inductance is connected to one end of the primary side, and the other end of the primary side is connected to the second parasitic inductance, so that the power supply charges the primary side of the flyback transformer; and The first switch unit and the second switch unit are controlled to be in an off state, so that the first bypass unit bypasses the first switch unit and the third switch unit, and the second bypass unit bypasses the second switch unit and the fourth switch unit.

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