High-speed modulation and negative voltage protection circuit for gallium nitride power amplifier

Abstract

The invention discloses a gallium nitride power amplifier high-speed modulation and negative voltage protection circuit which comprises a drain voltage control circuit and a grid voltage control circuit, and an enabling pin of a modulation chip of the drain voltage control circuit is connected with an input pin of the grid voltage control circuit. According to the invention, the existing potassium nitride pulse power amplifier is more stable in performance and higher in reliability, and meanwhile, the power amplifier can work in different pulse width states, so that the application scene is expanded, and the application range is wider.

Description

Technical Field

[0001] The present invention relates to the technical field of high-speed pulse gallium nitride power amplifier drain modulation, and particularly relates to a gallium nitride power amplifier high-speed modulation and negative voltage protection circuit. Background Art

[0002] In the application of gallium nitride power amplifier modules, a drain modulation circuit is usually used. In the drain modulation circuit, timing issues (negative voltage protection) also need to be considered. Traditional solutions require a dedicated timing circuit. An ordinary timing circuit cannot provide complete protection for the power amplifier tube. When negative voltage and positive voltage enter the power amplifier simultaneously, it will cause the power amplifier tube to fail.

[0003] In view of the above problems, the present invention provides a gallium nitride power amplifier high-speed modulation and negative voltage protection circuit with stable performance for potassium gallium nitride pulse power amplifiers. Summary of the Invention

[0004] The purpose of the present invention is to provide a gallium nitride power amplifier high-speed modulation and negative voltage protection circuit with stable performance for potassium gallium nitride pulse power amplifiers.

[0005] The present invention provides a gallium nitride power amplifier high-speed modulation and negative voltage protection circuit, including a drain voltage control circuit and a gate voltage control circuit. The enable pin of the modulation chip of the drain voltage control circuit is connected to the input pin of the gate voltage control circuit.

[0006] Further, the drain voltage control circuit includes a modulation chip, a P-channel MOS transistor V1, a P-channel MOS transistor V2, and a bootstrap capacitor. The P-channel MOS transistor V1 and the P-channel MOS transistor V2 are connected in parallel and are respectively connected to the OUT pin of the modulation chip. The bootstrap capacitor is connected in series between the VDD pin and the VL pin of the modulation chip.

[0007] Further, the gate voltage control circuit includes a gate power supply chip, a filter capacitor C47, and a filter capacitor C65. The filter capacitor C47 and the filter capacitor C65 are connected in parallel to the gate power supply chip.

[0008] The present invention has the following advantages: The present invention makes the existing potassium gallium nitride pulse power amplifier have more stable performance and higher reliability. At the same time, it can make the power amplifier work in different pulse width states, expanding the usage scenarios and having a wider range of applications. Brief Description of the Drawings

[0009] Figure 1 It is the circuit schematic diagram of the present invention. Detailed Description of the Invention

[0010] The present invention provides a gallium nitride power amplifier high-speed modulation and negative voltage protection circuit, including a drain voltage control circuit and a gate voltage control circuit. The enable pin of the modulation chip of the drain voltage control circuit is connected to the input pin of the gate voltage control circuit.

[0011] In this embodiment, the drain voltage control circuit includes a modulation chip, a P-channel MOS transistor V1, a P-channel MOS transistor V2, and a bootstrap capacitor. The P-channel MOS transistor V1 and the P-channel MOS transistor V2 are connected in parallel and are respectively connected to the OUT pin of the modulation chip, and the bootstrap capacitor is connected in series between the VDD pin and the VL pin of the modulation chip.

[0012] In this embodiment, the gate voltage control circuit includes a gate power supply chip, a filter capacitor C47, and a filter capacitor C65. The filter capacitor C47 and the filter capacitor C65 are connected in parallel to the gate power supply chip.

[0013] In this embodiment, as Figure 1 shown, VD is the power amplifier drain power supply, VG is the gate power supply, TTL is the control pulse level, and the EN enable pin of the modulation chip needs to be connected to a negative voltage to work. Therefore, in the power amplifier circuit, if the positive voltage is powered on first and the negative voltage is not applied, the modulation chip is in an inoperative state, and the positive voltage cannot reach the power amplifier transistor first. Only after the negative voltage is connected can the modulation chip work, and only after the TTL gives the pulse level can the drain voltage be provided for the power amplifier, thus effectively protecting the power amplifier transistor from being burned out. Therefore, there is no timing problem and no time difference in the middle, achieving high-speed modulation. At the same time, the bottom of the MOS transistor uses a ceramic sheet for heat dissipation, enabling the MOS transistor to dissipate heat well, so that it can withstand a larger working current and ensure that the power amplifier works at different pulse widths.

[0014] Although the specific implementation manners of the present invention have been described in detail in conjunction with the accompanying drawings, it should not be construed as a limitation on the protection scope of this patent. Within the scope described in the claims, various modifications and deformations that can be made by those skilled in the art without creative efforts still fall within the protection scope of this patent.

Claims

1. A GaN power amplifier high-speed modulation and negative voltage protection circuit, comprising a drain voltage control circuit and a gate voltage control circuit, characterized in that: The enable pin of the modulation chip of the drain voltage control circuit is connected to the input pin of the gate voltage control circuit.

2. A gallium nitride power amplifier high-speed modulation and negative voltage protection circuit as claimed in claim 1, characterized in that: The drain voltage control circuit includes a modulation chip, a P-channel MOS tube V1, a P-channel MOS tube V2 and a bootstrap capacitor. The P-channel MOS tube V1 and the P-channel MOS tube V2 are connected in parallel and respectively connected to the OUT pin of the modulation chip, and the bootstrap capacitor is connected in series to the VDD pin and the VL pin of the modulation chip.

3. A gallium nitride power amplifier high-speed modulation and negative voltage protection circuit as claimed in claim 1, characterized in that: The gate voltage control circuit includes a gate power supply chip, a filter capacitor C47 and a filter capacitor C65, and the filter capacitor C47 and the filter capacitor C65 are connected in parallel to the gate power supply chip.

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