A radio frequency power amplifier circuit realized based on a low-voltage CMOS process

Abstract

The application provides a radio frequency power amplifier circuit based on a low-voltage CMOS process, which can make the low-voltage CMOS device not be limited to the application of a high-power radio frequency power amplifier, can avoid the risk of breakdown, and is low in cost; the radio frequency power amplifier circuit comprises a signal amplification output module and a breakdown prevention module; the signal amplification output module is connected with a signal input end RFIN and a signal output end RFOUT, is used for power amplifying a radio frequency signal input by the signal input end RFIN, and is used for outputting through the signal output end RFOUT; the signal amplification output module comprises MOS tubes M1 and M2, and forms a common source and common gate structure through the MOS tubes M1 and M2; the signal input end RFIN is connected with a gate of the MOS tube M2, and the signal output end RFOUT is connected with a drain end of the MOS tube M1; the breakdown prevention module is connected with a level input end IN and the signal amplification output module, is used for preventing the signal amplification output module from breakdown according to a level signal of the level input end IN.

Description

Technical Field

[0001] This invention relates to the field of radio frequency power amplifier technology, specifically to a radio frequency power amplifier circuit implemented based on low-voltage CMOS technology. Background Technology

[0002] Radio frequency (RF) power amplifiers (PAs) are widely used in wireless communication, such as mobile phones, Wi-Fi, and IoT. Their main function is to amplify and transmit RF signals. To enable wireless signals to travel further, the output power of RF power amplifiers can reach the watt (W) level. For example, a PA with an output power of 1W will have an RF voltage swing of 10V under a 5V power supply bias and a 50Ω load. This high voltage swing requires the device to withstand the voltage, especially CMOS devices, which are prone to breakdown failure, leading to reliability issues and affecting the high-power output of the RF power amplifier. Generally, the shorter the gate length of a CMOS device, the higher its cutoff frequency Ft, but the lower its breakdown voltage. Devices with higher breakdown voltages often have lower cutoff frequencies, limiting their application in high-frequency applications. Therefore, there is a difficult-to-reconcile contradiction between cutoff frequency and breakdown voltage, which limits the application of low-voltage CMOS devices in high-power RF power amplifiers. Existing technologies often use power combining to achieve high power output. The bias voltage is first supplied as a low-voltage power supply through a buck module. However, power combining requires a transformer, which increases the chip area significantly. At the same time, it places high demands on the design of the transformer, which also increases the cost. Furthermore, it is difficult to obtain high-Q inductors or transformers for the high-loss substrates of CMOS processes. In addition, the power consumption of the added buck module also affects the efficiency of the overall system to some extent. Summary of the Invention

[0003] To address the aforementioned problems, this invention provides a radio frequency power amplifier circuit based on low-voltage CMOS technology, which allows low-voltage CMOS devices to no longer be limited to the application of high-power radio frequency power amplifiers, avoids the risk of breakdown, and is low in cost.

[0004] This invention adopts the following technical solution: a radio frequency power amplifier circuit based on low-voltage CMOS technology, comprising a signal amplification output module and a breakdown protection module; wherein,

[0005] The signal amplification and output module is connected to both the signal input terminal RFIN and the signal output terminal RFOUT. It is used to amplify the radio frequency signal input at the signal input terminal RFIN and output it through the signal output terminal RFOUT.

[0006] The signal amplification and output module includes MOS transistors M1 and M2, which form a common source and common gate structure; the signal input terminal RFIN is connected to the gate of the MOS transistor M2, and the signal output terminal RFOUT is connected to the drain of the MOS transistor M1.

[0007] The breakdown protection module is connected to both the level input terminal IN and the signal amplification output module, and is used to protect the signal amplification output module from breakdown based on the level signal of the level input terminal IN.

[0008] When the level input terminal IN is a low level signal, the MOS transistor M2 is turned off, and the gate voltage of the MOS transistor M1 is divided and output.

[0009] When the level input terminal IN is a high level signal, the bias voltage generated by the breakdown protection module is output to the gate terminal of the MOS transistor M1.

[0010] Furthermore, the signal amplification output module also includes coupling capacitors CB1 and CB2, an output capacitor C1, and a choke inductor L1; the drain of the MOSFET M1 is connected to one end of the output capacitor C1 and one end of the choke inductor L1, the other end of the choke inductor L1 is connected to the power supply VDD, and the other end of the output capacitor C1 is connected to the signal output terminal RFOUT; the gate of the MOSFET M1 is grounded after being connected to the coupling capacitor CB2, the source of the MOSFET M1 is connected to the drain of the MOSFET M2, the source of the MOSFET M2 is grounded, the gate of the MOSFET M2 is connected to one end of the coupling capacitor CB1, and the other end of the coupling capacitor CB1 is connected to the signal input terminal RFIN;

[0011] Furthermore, both MOS transistors M1 and M2 are 3.3V CMOS devices; the channel width of MOS transistors M1 and M2 is 8mm to 10mm.

[0012] Furthermore, the breakdown protection module includes inverters INV1 and INV2, MOSFETs M3, M4, and M5, resistors RB1 to RB3, voltage divider resistors RBF1 and RBF2, and current sources IB1 and IB2. The input terminal of inverter INV1 is connected to the level input terminal IN. The output terminal of inverter INV1 is connected to the input terminal of inverter INV2 and the gate of MOSFET M4. The source of MOSFET M4 is grounded. The output terminal of inverter INV2 is connected to the drain of MOSFET M4, the gate of MOSFET M3, one end of resistor RB1, one end of current source IB1, the gate of MOSFET M5, and the drain of MOSFET M5. The other end of resistor RB1 is connected to the MOSFET M4. The gate of 2 is connected, the sources of MOSFETs M3 and M5 are both grounded, the drain of MOSFET M5 is connected to one end of current source IB1, the drain of MOSFET M3 is connected to one end of resistor RB3, the other end of resistor RB3 is connected to one end of resistor RB2 and one end of current source IB2, the other ends of current sources IB1 and IB2 are connected to the power supply VDD, the other end of resistor RB2 is connected to one end of voltage divider resistors RBF1 and RBF2 and the gate of MOSFET M1, the other end of voltage divider resistor RBF2 is grounded, and the other end of voltage divider resistor RBF1 is connected to one end of choke inductor L1, one end of output capacitor C1 and the drain of MOSFET M1.

[0013] The beneficial effect of this invention is that, based on the level signal of the level input terminal IN, the signal amplification output module can be protected against breakdown by the breakdown protection module. In turn, the signal amplification output module can amplify the radio frequency signal input at the signal input terminal RFIN and reliably output it through the signal output terminal RFOUT. This enables low-voltage CMOS devices to be directly used in high-voltage, high-power radio frequency power amplifiers, with the characteristics of low leakage current and low cost, and has good economic value. Attached Figure Description

[0014] Figure 1 This is a structural block diagram of the present invention;

[0015] Figure 2 This is the circuit schematic diagram of the present invention;

[0016] Figure 3 This is a graph showing the drain-source current variation of the MOS transistor M1 in this invention. Detailed Implementation

[0017] like Figure 1 , Figure 2 As shown, an RF power amplifier circuit based on low-voltage CMOS technology according to the present invention includes a signal amplification output module 1 and a breakdown protection module 2; wherein,

[0018] The signal amplification and output module 1 is connected to both the signal input terminal RFIN and the signal output terminal RFOUT. It is used to amplify the radio frequency signal input at the signal input terminal RFIN and output it through the signal output terminal RFOUT.

[0019] The signal amplification and output module 1 includes MOSFETs M1 and M2, which are connected to form a common source and common gate structure, i.e., connected to the 5V power supply in the form of a common source and common gate; the signal input terminal RFIN is connected to the gate of MOSFET M2, and the signal output terminal RFOUT is connected to the drain terminal of MOSFET M1.

[0020] The breakdown protection module 2 is connected to both the level input terminal IN and the signal amplification output module, and is used to protect the signal amplification output module 1 from breakdown based on the level signal of the level input terminal IN.

[0021] When the level input terminal IN is a low level signal, MOSFET M2 is turned off, and the gate voltage of MOSFET M1 is divided and output.

[0022] When the level input terminal IN is a high level signal, the bias voltage generated by the anti-breakdown module 2 is output to the gate terminal of the MOSFET M1.

[0023] The signal amplification and output module 1 also includes coupling capacitors CB1 and CB2, output capacitor C1, and choke inductor L1. The radio frequency signal input at the signal input terminal RFIN is coupled into the gate of MOSFET M2 through coupling capacitor CB1. The drain of MOSFET M1 is connected to one end of output capacitor C1 and one end of choke inductor L1. The other end of choke inductor L1 is connected to power supply VDD (5V), and the other end of output capacitor C1 is connected to signal output terminal RFOUT. The gate of MOSFET M1 is grounded after being connected to coupling capacitor CB2. The source of MOSFET M1 is connected to the drain of MOSFET M2. The source of MOSFET M2 is grounded. The gate of MOSFET M2 is connected to one end of coupling capacitor CB1, and the other end of coupling capacitor CB1 is connected to signal input terminal RFIN. Both MOSFETs M1 and M2 are 3.3V CMOS devices. The channel width of MOSFETs M1 and M2 is 10mm.

[0024] The breakdown protection module 2 includes inverters INV1 and INV2, MOSFETs M3, M4, and M5, resistors RB1 to RB3, voltage divider resistors RBF1 and RBF2, and current sources IB1 and IB2. The input terminal of inverter INV1 is connected to the level input terminal IN. The output terminal of inverter INV1 is connected to the input terminal of inverter INV2 and the gate of MOSFET M4. The source of MOSFET M4 is grounded. The output terminal of inverter INV2 is connected to the drain of MOSFET M4, the gate of MOSFET M3, one end of resistor RB1, one end of current source IB1, the gate of MOSFET M5, and the drain of MOSFET M5. The other end of resistor RB1 is connected to the MOSFET... The gate of transistor M2 is connected, the sources of MOSFETs M3 and M5 are both grounded, the drain of MOSFET M5 is connected to one end of current source IB1, the drain of MOSFET M3 is connected to one end of resistor RB3, the other end of resistor RB3 is connected to one end of resistor RB2 and one end of current source IB2, the other ends of current sources IB1 and IB2 are connected to power supply VDD, the other end of resistor RB2 is connected to one end of voltage divider resistors RBF1 and RBF2 and the gate of MOSFET M1, the other end of voltage divider resistor RBF2 is grounded, and the other end of voltage divider resistor RBF1 is connected to one end of choke inductor L1, one end of output capacitor C1 and the drain of MOSFET M1.

[0025] This invention achieves high-power output of a high-frequency power amplifier without adding existing step-down modules and power combining transformers. Specifically, the working principle of this invention is as follows: when the RF power amplifier is in the off state, i.e., when the level input terminal IN is a low level signal, the current sources IB1 and IB2 are turned off, and there is no output current. At this time, the gate of MOSFET M3 is low, and MOSFET M3 is off; at the same time, MOSFET M4 is turned on, and the pull-down voltage VG is low, thus the gate of MOSFET M2 is low, and MOSFET M2 is off. However, in order to withstand the 5V power supply VDD, if the gate of MOSFET M1 is also pulled low, the voltage difference between the gate and drain of MOSFET M1 will be 5V, which will inevitably affect the operating time of MOSFET M1 and cause circuit failure. Therefore, a certain voltage is formed by the voltage divider resistors RBF1 and RBF2 before being applied to the gate of MOSFET M1, thereby reducing the voltage difference between the gate and drain of MOSFET M1 and between the drain and source, thus ensuring that MOSFET M1 is used within the normal operating range without damage. With this configuration, in the off state, except for the branch formed by voltage divider resistors RBF1 and RBF2 which has leakage current, the other branches have almost no leakage current. The voltage divider resistors RBF1 and RBF2 can be designed with a very large resistance value, tens of MΩ, thereby reducing leakage current.

[0026] When the RF power amplifier is in power amplification mode, i.e., when the input terminal IN is a high-level signal, current sources IB1 and IB2 provide bias current, MOSFET M4 is off, and MOSFET M3 is on. At this time, the pull-down voltage VG is determined by current source IB1 and MOSFET M5. By adjusting the value of current source IB1, the quiescent operating point can be adjusted. Because the voltage divider resistor RBF2 has a very large resistance, almost all the current from current source IB2 flows through resistor RB3, forming a certain bias voltage to MOSFET M1, thereby establishing the normal operating point voltage. Assume that this operating point voltage is set to 4V. When there is an RF signal input at the signal input terminal RFIN, resistors RB1 and RB2 and voltage divider resistors RBF1 and RBF2 can be considered as high impedance for the RF signal. The RF signal will not be fed through these resistors. The coupling capacitor CB2 stabilizes the gate voltage of MOSFET M1.

[0027] This invention adjusts the size of the coupling capacitor CB2 and the output matching to ensure that the drain current and voltage waveforms of MOSFETs M1 and M2 do not overlap as much as possible, and that MOSFETs M1 and M2 share the output voltage swing as evenly as possible, thereby enabling high-voltage and high-power applications.

[0028] The overlapping of drain current and voltage waveforms in a MOS device can affect the device's body current (i.e., I_body), thus altering the device's state and impacting reliability. The variation of the MOS device's body current with the drain-source voltage difference VDS under different drain-source currents Ids is as follows: Figure 3 As shown. When the body current I_body of a MOS device changes drastically with the drain-source voltage difference VDS, the reliability of the MOS device will be affected. In the design, if the drain-source current Ids and the drain-source voltage VDS of the MOS device do not overlap during the power amplification process, that is, if there is no situation where both the drain-source current Ids and the drain-source voltage difference VDS are high, then the MOS device can better withstand high voltage and low current.

[0029] Figure 3 The vertical axis represents the body current (I_body) of MOSFET M1, and the horizontal axis represents the drain-source voltage difference (VDS) of MOSFET M1. Figure 3As can be seen from the curve, if the drain-source current Ids flowing through MOSFET M1 is large, such as tens of mA, then the body current I_body of MOSFET M1 will change significantly with the increase of the drain-source voltage difference VDS, thus limiting the use of MOSFET M1 under high VDS conditions. However, when the drain-source current Ids flowing through MOSFET M1 is small, such as on the order of uA, then MOSFET M1 can withstand higher VDS voltages. As can be seen from the figure, this 3.3V CMOS device can support up to 11V without large leakage current.

[0030] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0031] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A radio frequency power amplifier circuit based on low-voltage CMOS technology, characterized in that: Includes a signal amplification output module and a breakdown protection module; among which, The signal amplification and output module is connected to both the signal input terminal RFIN and the signal output terminal RFOUT. It is used to amplify the radio frequency signal input at the signal input terminal RFIN and output it through the signal output terminal RFOUT. The signal amplification and output module includes MOS transistors M1 and M2, which form a common source and common gate structure; the signal input terminal RFIN is connected to the gate of the MOS transistor M2, and the signal output terminal RFOUT is connected to the drain of the MOS transistor M1. The breakdown protection module is connected to both the level input terminal IN and the signal amplification output module, and is used to protect the signal amplification output module from breakdown based on the level signal of the level input terminal IN. When the level input terminal IN is a low level signal, the MOS transistor M2 is turned off, and the gate voltage of the MOS transistor M1 is divided and output. When the level input terminal IN is a high level signal, the bias voltage generated by the breakdown protection module is output to the gate terminal of the MOS transistor M1; The signal amplification and output module further includes coupling capacitors CB1 and CB2, output capacitor C1, and choke inductor L1; the drain of MOSFET M1 is connected to one end of output capacitor C1 and one end of choke inductor L1, the other end of choke inductor L1 is connected to power supply VDD, and the other end of output capacitor C1 is connected to the signal output terminal RFOUT; the gate of MOSFET M1 is grounded after being connected to coupling capacitor CB2, the source of MOSFET M1 is connected to the drain of MOSFET M2, the source of MOSFET M2 is grounded, the gate of MOSFET M2 is connected to one end of coupling capacitor CB1, and the other end of coupling capacitor CB1 is connected to the signal input terminal RFIN; The breakdown protection module includes inverters INV1 and INV2, MOSFETs M3, M4, and M5, resistors RB1-RB3, voltage divider resistors RBF1 and RBF2, and current sources IB1 and IB2. The input terminal of inverter INV1 is connected to the level input terminal IN. The output terminal of inverter INV1 is connected to the input terminal of inverter INV2 and the gate of MOSFET M4. The source of MOSFET M4 is grounded. The output terminal of inverter INV2 is connected to the drain of MOSFET M4, the gate of MOSFET M3, one end of resistor RB1, one end of current source IB1, the gate of MOSFET M5, and the drain of MOSFET M5. The other end of resistor RB1 is connected to the gate of MOSFET M2. The sources of MOSFETs M3 and M5 are both grounded. The drain of MOSFET M5 is connected to one end of the current source IB1. The drain of MOSFET M3 is connected to one end of the resistor RB3. The other end of the resistor RB3 is connected to one end of the resistor RB2 and one end of the current source IB2. The other ends of the current sources IB1 and IB2 are connected to the power supply VDD. The other end of the resistor RB2 is connected to one end of the voltage divider resistors RBF1 and RBF2 and the gate of MOSFET M1. The other end of the voltage divider resistor RBF2 is grounded. The other end of the voltage divider resistor RBF1 is connected to one end of the choke inductor L1, one end of the output capacitor C1, and the drain of MOSFET M1.

2. The RF power amplifier circuit based on low-voltage CMOS technology according to claim 1, characterized in that: Both MOS transistors M1 and M2 are 3.3V CMOS devices; the channel width of MOS transistors M1 and M2 is 8mm~10mm.

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