Electronic device and updating method for electronic device
By quickly transmitting update codes in electronic devices using processors and display channels, and converting and updating memory data by timing controllers, the problem of long update time in the prior art is solved, and fast and efficient code data updates are achieved.
Patent Information
- Application Number
- CN202510284230.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-11
- Publication Date
- 2025-06-13
AI Technical Summary
When the existing electronic devices update the code data of the timing controller, they need to disassemble the device, resulting in a very long update time.
By introducing a processor, display unit, memory circuit and timing controller into the electronic device, the update code is quickly transmitted using the display channel. The timing controller converts the code display data back to the update code and is used to update the code data of the memory circuit.
The update time of the timing controller code data is greatly shortened, avoiding the necessity of disassemblying the device, and improving the update efficiency.
Smart Images
Figure CN120144155A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an electronic device and an update method for an electronic device. Background Art
[0002] An electronic device may have a display unit and a timing controller. The timing controller operates based on code data stored in a memory to control the display unit. When the code data is updated, an operator has to disassemble the electronic device to update the code data or replace the memory. Therefore, the current update operation time is very long.
[0003] It can be seen that how to shorten the update time of the code data of the timing controller is one of the research focuses of those skilled in the art. Summary of the Invention
[0004] The present invention provides an electronic device and an update method for an electronic device, which can shorten the update time of the code data of the timing controller.
[0005] In an embodiment of the present invention, the electronic device includes a processor, a display unit, a memory circuit, and a timing controller. When an update command is obtained, the processor converts the update code into code display data. The memory circuit stores the code data. The timing controller operates based on the code data. The timing controller is coupled to the processor, the memory circuit, and the display unit. When an update command is obtained, the timing controller transmits the code display data through a display channel provided with the processor and generates a timing corresponding to the code display data. The display unit displays an image corresponding to the code display data in a first specific display area by using the timing of the code display data. The timing controller obtains the code display data corresponding to the first specific display area according to the update command, converts the code display data back into the update code, and updates the code data of the memory circuit by using the update code.
[0006] In an embodiment of the present invention, the update method is used for an electronic device. The electronic device includes a processor, a display unit, a memory circuit, and a timing controller. The memory circuit stores the code data. The timing controller operates based on the code data. The update method includes: when an update command is obtained, the processor converts the update code into code display data; the code display data is provided to the timing controller through a display channel; the timing controller obtains the code display data corresponding to a first specific display area of the display unit according to the update command; the timing controller converts the code display data back into the update code; and the timing controller updates the code data of the memory circuit by using the update code.
[0007] Based on the above, the updated code is converted into code display data. The timing controller acquires the code display data corresponding to the first specific display area of the display unit, and converts the code display data back into the updated code. It should be noted that the display channel has a relatively fast transmission speed. In this way, the update time length of the code data in the memory circuit can be significantly shortened. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 FIG. is a schematic diagram of an electronic device according to an embodiment of the present invention;
[0009] Figure 2 FIG. is a flowchart of an operation method according to an embodiment of the present invention;
[0010] Figure 3 FIG. is a schematic diagram of an electronic device according to an embodiment of the present invention;
[0011] Figure 4 FIG. is a schematic diagram of a specific display area according to an embodiment of the present invention;
[0012] Figure 5 FIG. is a schematic diagram of an electronic device according to an embodiment of the present invention;
[0013] Figure 6 FIG. is a schematic diagram of a specific display area according to an embodiment of the present invention.
[0014] REFERENCE NUMERAL DESCRIPTION OF THE DRAWINGS
[0015] 100, 200, 300: Electronic device
[0016] 110, 210, 310: Processor
[0017] 120: Display unit
[0018] 130: Memory circuit
[0019] 140, 240, 340: Timing controller
[0020] 241, 341: Acquisition circuit
[0021] 242, 342: Register
[0022] A0: Display area
[0023] A1, A2: Specific display area
[0024] CHC: Communication channel
[0025] CHD: Display channel
[0026] CMD: Update command
[0027] D1, D2: Directions
[0028] DS: Code Data
[0029] IMG_CMD: Command Display Data
[0030] IMG_UPDC: Code Display Data
[0031] ITF: Interface
[0032] L1, L2, W1, W2, X1, X2, Y1, Y2: Parameters
[0033] PL: Display Panel
[0034] S100: Operation Method
[0035] S110~S150: Steps
[0036] UPDC: Update Code Detailed Implementation Manner
[0037] Some embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. For the component symbols cited in the following description, when the same component symbols appear in different drawings, they will be regarded as the same or similar components. These embodiments are only a part of the present invention and do not disclose all the implementable ways of the present invention. More precisely, these embodiments are only examples within the scope of the claims of the present invention.
[0038] Please refer to Figure 1 , Figure 1 which is a schematic diagram of an electronic device shown according to an embodiment of the present invention. In this embodiment, the electronic device 100 includes a processor 110, a display unit 120, a memory circuit 130, and a timing controller 140. When the processor 110 obtains an update command CMD, the processor 110 converts the update code UPDC into code display data IMG_UPDC. The memory circuit 130 stores the code data DS. The timing controller 140 is coupled to the processor 110, the display unit 120, and the memory circuit 130. The timing controller 140 operates based on the code data DS stored in the memory circuit 130. A display channel CHD is provided between the timing controller 140 and the processor 110 to transmit the code display data IMG_UPDC. The timing controller 140 generates a timing corresponding to the code display data IMG_UPDC. The display unit 120 uses the timing of the code display data IMG_UPDC to display an image corresponding to the code display data IMG_UPDC in a specific display area A1.
[0039] In this embodiment, the timing controller 140 obtains the code display data IMG_UPDC corresponding to a specific display area A1 according to the update command CMD. The timing controller 140 converts the code display data IMG_UPDC back to the update code UPDC, and uses the update code UPDC to update the code data DS of the memory circuit 130.
[0040] It is worth mentioning here that the update code UPDC is converted into the code display data IMG_UPDC and provided to the timing controller 140. The timing controller 140 obtains the code display data IMG_UPDC corresponding to the specific display area A1 of the display unit 120, and converts the code display data IMG_UPDC back to the update code UPDC. The display channel CHD has a relatively fast transmission speed. Therefore, the time length required for the timing controller 140 to receive the update code UPDC can be significantly shortened. In this way, the update time length of the code data DS of the memory circuit 130 can also be significantly shortened.
[0041] In this embodiment, the timing controller 140 receives the code display data IMG_UPDC based on the receiving manner of the display data. The timing controller 140 can receive the code display data IMG_UPDC from the processor 110 via the display channel CHD of the interface ITF. Therefore, the timing controller 140 can complete receiving the code display data IMG_UPDC within a single frame period. Therefore, without disassembling the electronic device 100, the update of the code data DS can be quickly and easily completed from the receipt of the update command CMD to the completion.
[0042] For example, the update code UPDC can be a signal conforming to the bin file format (however, the present invention is not limited thereto). The processor 110 converts the update code UPDC into the code display data IMG_UPDC conforming to the figure file format. The figure file format can be the bmp file format (however, the present invention is not limited thereto). The processor 110 may include a first signal format converter (not shown). The first signal format converter converts the update code UPDC conforming to the bin file format into the code display data IMG_UPDC conforming to the bmp file format.
[0043] The timing controller 140 learns the position of the specific display area A1 according to the update command CMD, so as to obtain the code display data IMG_UPDC corresponding to the position of the specific display area A1 in the display data. The timing controller 140 may include a second signal format converter (not shown). The second signal format converter converts the code display data IMG_UPDC conforming to the bmp file format into the update code UPDC conforming to the bin file format.
[0044] In this embodiment, the update command CMD is generated by the processor 110. After obtaining the update command CMD, the timing controller 140 obtains the received code display data IMG_UPDC according to the update command CMD.
[0045] In this embodiment, the electronic device 100 may be a personal computer or a laptop. The display unit 120, the memory circuit 130, and the timing controller 140 may be integrated in the display panel PL. The processor 110 may be integrated in the host. In some embodiments, the electronic device 100 may be a portable device with a display function. The processor 110, the display unit 120, the memory circuit 130, and the timing controller 140 are on the same substrate.
[0046] In this embodiment, the processor 110 is, for example, a Graphics Processing Unit (GPU), a Central Processing Unit (CPU), or other programmable general-purpose or special-purpose microprocessors, Digital Signal Processors (DSPs), programmable controllers, Application Specific Integrated Circuits (ASICs), Programmable Logic Devices (PLDs), or other similar devices, or a combination of these devices.
[0047] In this embodiment, the display unit 120 may be a device that provides a display function, such as a liquid crystal display (LCD), a light-emitting diode (LED) display, or an organic light-emitting diode (OLED).
[0048] In this embodiment, the memory circuit 130 may be any type of data storage medium well known to those skilled in the art. For example, the memory circuit 130 may be an Electrically-Erasable Programmable Read-Only Memory (EEPROM) or a flash memory.
[0049] In this embodiment, the timing controller 140 may be implemented by any type of display controller well known to those skilled in the art.
[0050] In this embodiment, during the conversion operation in which the processor 110 converts the update code UPDC into code display data IMG_UPDC, the processor 110 can perform a cyclic redundancy check (CRC) operation on the update code UPDC. In some embodiments, the processor 110 can generate an error detection code based on the above CRC operation. In some embodiments, the processor 110 can convert the error detection code into error detection display data. When the processor 110 determines that the error detection display data is converted back to the error detection code incorrectly, it indicates that an error has occurred in the update code UPDC. The processor 110 can re-execute the update command CMD in the next frame period.
[0051] Please refer to Figure 1 and Figure 2 , Figure 2 is a flowchart of an operation method shown according to an embodiment of the present invention. In this embodiment, the operation method S100 is applicable to the electronic device 100. The operation method S100 includes steps S110 to S150. In step S110, when the update command CMD is obtained, the processor 110 converts the update code UPDC into code display data IMG_UPDC. In step S120, the processor 110 provides the code display data IMG_UPDC to the timing controller 140 via the display channel CHD. In step S130, the timing controller 140 obtains the code display data IMG_UPDC corresponding to the specific display area A1 according to the update command CMD. In step S140, the timing controller 140 converts the code display data IMG_UPDC back into the update code UPDC. The implementation details of steps S110 to S130 have been clearly described in the Figure 1 embodiment, so they will not be repeated here. Next, in step S150, the timing controller 140 uses the update code UPDC to update the code data DS of the memory circuit 130.
[0052] Please refer to Figure 3 , Figure 3 is a schematic diagram of an electronic device shown according to an embodiment of the present invention. In this embodiment, the electronic device 200 includes a processor 210, a display unit 120, a memory circuit 130, and a timing controller 240. The processor 210 generates an update code UPDC. The processor 210 converts the update code UPDC into code display data IMG_UPDC. In this embodiment, the processor 210 is connected to the timing controller 240 via the interface ITF. The interface ITF includes a display channel CHD and a communication channel CHC. The processor 210 provides the code display data IMG_UPDC to the timing controller 240 via the display channel CHD and provides the update command CMD to the timing controller 240 via the communication channel CHC.
[0053] In this embodiment, the timing controller 240 includes an acquisition circuit 241 and a register 242. The acquisition circuit 241 receives an update command CMD. The acquisition circuit 241 learns the position of a specific display area A1 according to the update command CMD, and acquires code display data IMG_UPDC corresponding to the position of the specific display area A1. In other words, the acquisition circuit 241 can acquire the code display data IMG_UPDC from a single frame display data that the timing controller 240 has already received according to the update command CMD.
[0054] The timing controller 240 converts the code display data IMG_UPDC acquired by the acquisition circuit 241 back into an update code UPDC, and stores the update code UPDC in the register 242. The timing controller 240 uses the update code UPDC stored in the register 242 to update the code data DS of the memory circuit 130.
[0055] In this embodiment, when the update of the code data DS is completed, the timing controller 240 can inform the processor 210 via the communication channel CHC that the update of the code data DS has been completed. Therefore, the processor 210 can learn the update result of the code data DS.
[0056] It should be noted that if the timing controller 240 receives the update code UPDC via the communication channel CHC. The timing controller 240 must spend a relatively long time receiving the update code UPDC. Based on the operation of receiving the update code UPDC via the communication channel CHC, the update time length will take about dozens of seconds, or even several minutes.
[0057] In this embodiment, the processor 210 converts the update code UPDC into code display data IMG_UPDC. The code display data IMG_UPDC is provided to the timing controller 240 via the display channel CHD. Therefore, the code display data IMG_UPDC can be transmitted within a single frame period. Therefore, the update of the code data DS can be completed within several seconds from the reception of the update command CMD, and can even be completed within 4 seconds.
[0058] For example, the interface ITF can be an eDP (Embedded Display Port) or DP (Display Port) interface. Therefore, the display channel CHD can be a MainLink channel. The communication channel CHC can be an Auxiliary (Aux) channel. For example, the interface ITF can be an LVDS interface. Therefore, the display channel CHD can be an LVDS channel. The communication channel CHC can be an I2C channel.
[0059] In this embodiment, the electronic device 200 is applicable to Figure 2The operation method S100 is shown.
[0060] Please refer to Figure 3 as well as Figure 4 , Figure 4 is a schematic diagram of a specific display area shown in accordance with an embodiment of the present invention. In this embodiment, the acquisition circuit 241 obtains the position of the specific display area A1 according to the update command CMD. Further, the update command CMD represents the parameters X1, Y1, L1, and W1 of the specific display area A1 in the display area A0. The display area A0 has edges E1 and E2. Edge E2 is adjacent to edge E1. Edge E1 extends along direction D2. Edge E2 extends along direction D1. Parameter X1 represents the spacing between edge E1 of the display area A0 and the specific display area A1 in direction D1. Parameter Y1 represents the spacing between edge E2 of the display area A0 and the specific display area A1 in direction D2. Parameter L1 represents the length of the specific display area A1 in direction D1. Parameter W1 represents the length of the specific display area A1 in direction D2. Based on the parameters X1, Y1, L1, and W1, the acquisition circuit 241 can obtain the position (or range) of the specific display area A1. Therefore, the acquisition circuit 241 can acquire the code display data IMG_UPDC corresponding to the position of the specific display area A1 according to the parameters X1 , Y1 , L1 , and W1 .
[0061] Please refer to Figure 5 , Figure 5 is a schematic diagram of an electronic device according to an embodiment of the present invention. In this embodiment, the electronic device 300 includes a processor 310, a display unit 120, a memory circuit 130 and a timing controller 340. The processor 310 generates an update code UPDC. The processor 310 converts the update code UPDC into code display data IMG_UPDC, and converts the update command CMD into command display data IMG_CMD. In this embodiment, the processor 310 is connected to the timing controller 340 via an interface ITF. The interface ITF includes a display channel CHD. The processor 310 provides the code display data IMG_UPDC and the command display data IMG_CMD to the timing controller 340 via the display channel CHD.
[0062] In this embodiment, the timing controller 340 generates a timing corresponding to the code display data IMG_UPDC and a timing corresponding to the command display data IMG_CMD. The display unit 120 uses the timing of the code display data IMG_UPDC to display an image corresponding to the code display data IMG_UPDC in the specific display area A1. The display unit 120 uses the timing of the command display data IMG_CMD to display an image corresponding to the code display data IMG_CMD in the specific display area A2.
[0063] In this embodiment, the timing controller 340 includes an acquisition circuit 341 and a register 342. The acquisition circuit 341 acquires command display data IMG_CMD corresponding to the position of a specific display area A2. For example, at least a part of the command display data IMG_CMD has a command identifier that can be recognized by the acquisition circuit 341. The acquisition circuit 341 identifies the data corresponding to the position of the specific display area A2. Once the data corresponding to the specific display area A2 includes a command identifier, the acquisition circuit 341 acquires the command display data IMG_CMD corresponding to the position of the specific display area A2.
[0064] In this embodiment, the timing controller 340 receives the command display data IMG_CMD acquired by the acquisition circuit 341. The timing controller 340 converts the command display data IMG_CMD back into an update command CMD. The timing controller 340 stores the update command CMD in the register 342. Next, the acquisition circuit 341 learns the position of the specific display area A1 according to the update command CMD, and acquires code display data IMG_UPDC corresponding to the position of the specific display area A1.
[0065] The timing controller 340 converts the code display data IMG_UPDC acquired by the acquisition circuit 341 back into an update code UPDC, and stores the update code UPDC in the register 342. The timing controller 340 uses the update code UPDC stored in the register 342 to update the code data DS of the memory circuit 130.
[0066] In this embodiment, when the update of the code data DS is completed, the timing controller 340 can control the display unit 120 to display a notification screen indicating that the update of the code data DS has been completed. Therefore, the user can learn the update result of the code data DS. For example, when the update of the code data DS is completed, the display unit 120 is controlled to display the notification screen in an on-screen display (OSD) manner.
[0067] In this embodiment, the display channel CHD can be a MainLink channel or an LVDS channel.
[0068] In this embodiment, the electronic device 300 is applicable to Figure 2 the operation method S100 shown.
[0069] Please refer to Figure 5 and Figure 6 , Figure 6It is a schematic diagram of a specific display area shown according to an embodiment of the present invention. In this embodiment, the acquisition circuit 341 can know the position of the specific display area A2 according to the parameters X2, Y2, L2, and W2 of the specific display area A2 in the display area A0. The parameter X2 represents the distance between the edge E1 of the display area A0 and the specific display area A2 in the direction D1. The parameter Y2 represents the distance between the edge E2 of the display area A0 and the specific display area A2 in the direction D2. The parameter L2 represents the length of the specific display area A2 in the direction D2. The parameter W2 represents the length of the specific display area A2 in the direction D2. Based on the parameters X2, Y2, L2, and W2, the acquisition circuit 241 can know the position (or range) of the specific display area A2. Therefore, the acquisition circuit 241 can obtain the command display data IMG_CMD corresponding to the position of the specific display area A2 according to the parameters X2, Y2, L2, and W2.
[0070] In addition, the acquisition circuit 341 also knows the position of the specific display area A1 according to the update command CMD. The update command CMD represents the parameters X1, Y1, L1, and W1 of the specific display area A1 in the display area A0. The parameter X1 represents the distance between the edge E1 of the display area A0 and the specific display area A1 in the direction D1. The parameter Y1 represents the distance between the edge E2 of the display area A0 and the specific display area A1 in the direction D2. The edge E2 is adjacent to the edge E1. The parameter L1 represents the length of the specific display area A1 in the direction D1. The parameter W1 represents the length of the specific display area A1 in the direction D2. Based on the parameters X1, Y1, L1, and W1, the acquisition circuit 241 can know the position (or range) of the specific display area A1. Therefore, the acquisition circuit 241 can obtain the code display data IMG_UPDC corresponding to the position of the specific display area A1 according to the parameters X1, Y1, L1, and W1.
[0071] In this embodiment, the specific display area A1 and the specific display area A2 do not overlap with each other.
[0072] In this embodiment, the specific display area A1 and the specific display area A2 may or may not be adjacent. The specific display area A1 and the specific display area A2 are arranged along the direction D2. The specific display area A2 is located between the specific display area A1 and the edge E2. However, the present invention is not limited to the arrangement manner of the specific display areas A1 and A2.
[0073] In summary, the updated code is converted into code display data and provided to the timing controller. The timing controller acquires the code display data corresponding to the first specific display area of the display unit, and converts the code display data back into the updated code. The display channel has a fast transmission speed. Therefore, the length of time required for the timing controller to receive the code display data can be significantly shortened. In this way, the length of time for updating the code data of the memory circuit can also be significantly shortened.
[0074] Although the present invention has been disclosed above by way of examples, it is not intended to limit the present invention. Any person skilled in the relevant art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be subject to that defined by the appended claims.
Claims
1. An electronic device, characterized in that: The electronic device comprises: a processor, when an update command is obtained, configured to convert the update code into code display data; a memory circuit configured to store code data; A timing controller, configured to operate based on the code data, coupled to the processor, the memory circuit and the display unit, wherein a display channel is provided between the timing controller and the processor to transmit code display data and generate a timing corresponding to the code display data; and The display unit is configured to display an image corresponding to the code display data in a first specific display area using the timing of the code display data, The timing controller obtains the code display data corresponding to the first specific display area according to the update command, converts the code display data back to the update code, and uses the update code to update the code data of the memory circuit.
2. The electronic device according to claim 1, characterized in that: The processor provides the update command to the timing controller via a communication channel.
3. The electronic device according to claim 1, characterized in that: The timing controller comprises: The acquisition circuit is configured to obtain the position of the first specific display area according to the update command, and acquire the code display data corresponding to the position of the first specific display area.
4. The electronic device according to claim 1, characterized in that: The timing controller comprises: register, wherein the timing controller stores the update code in the register, and uses the update code stored in the register to update the code data of the memory circuit.
5. The electronic device according to claim 2, characterized in that: When the updating of the code data is completed, the timing controller notifies the processor via the communication channel that the updating of the code data is completed.
6. The electronic device according to claim 1, characterized in that: The processor converts the update command into command display data, and provides the code display data and the command display data to the timing controller via a display channel.
7. The electronic device according to claim 6, characterized in that: The display unit displays an image corresponding to the command display data in a second specific display area.
8. The electronic device according to claim 7, characterized in that: The first specific display area and the second specific display area do not overlap with each other.
9. The electronic device according to claim 7, characterized in that: The timing controller comprises: an acquisition circuit configured to acquire the command display data corresponding to the position of the second specific display area, wherein the timing controller converts the command display data back into the update command, and The acquisition circuit learns the position of the first specific display area according to the update command, and acquires the code display data corresponding to the position of the first specific display area.
10. The electronic device according to claim 6, characterized in that: The timing controller comprises: register, wherein the timing controller stores the update code and the update command in the register, and uses the update code stored in the register to update the code data of the memory circuit.
11. The electronic device according to claim 6, characterized in that: When the updating of the code data is completed, the timing controller controls the display unit to display a notification screen indicating that the updating of the code data is completed.
12. The electronic device according to claim 1, characterized in that: In the conversion operation of the processor converting the update code into the code display data, the processor performs a cyclic redundancy check operation on the update code to generate an error detection code, and converts the error detection code into error detection display data.
13. The electronic device according to claim 12, characterized in that: When the error detection display data is converted back to the error detection code error, the processor re-executes the update command in a next frame period.
14. An updating method for an electronic device, characterized in that: The electronic device includes a processor, a display unit, a memory circuit, and a timing controller, wherein the memory circuit stores code data, wherein the timing controller operates based on the code data, wherein the updating method includes: When an update command is obtained, the processor converts the update code into code display data; providing the code display data to the timing controller via a display channel; The timing controller acquires the code display data corresponding to the first specific display area of the display unit according to the update command; The timing controller converts the code display data back into the update code; and The timing controller uses the update code to update the code data of the memory circuit.
15. The updating method according to claim 14, characterized in that: The updating method further includes: The update command is provided to the timing controller via a communication channel.
16. The updating method according to claim 15, characterized in that: The timing controller includes an acquisition circuit, wherein the step of acquiring, by the timing controller according to the update command, the code display data corresponding to the first specific display area of the display unit includes: The acquisition circuit acquires the position of the first specific display area according to the update command, and acquires the code display data corresponding to the position of the first specific display area.
17. The updating method according to claim 15, characterized in that: The updating method further comprises: generating, by the processor, the update command; and When the updating of the code data is completed, the timing controller notifies the processor via the communication channel that the updating of the code data is completed.
18. The updating method according to claim 14, characterized in that: The updating method further comprises: converting the update command into command display data; and The code display data and the command display data are provided to the timing controller via a display channel.
19. The updating method according to claim 18, characterized in that: The updating method further comprises: The command display data is displayed in a second specific display area by the display unit.
20. The updating method according to claim 19, characterized in that: The first specific display area and the second specific display area do not overlap with each other.
21. The updating method according to claim 19, characterized in that: The timing controller includes an acquisition circuit, wherein the step of acquiring, by the timing controller according to the update command, the code display data corresponding to the first specific display area of the display unit includes: The acquisition circuit acquires the command display data corresponding to the position of the second specific display area; The timing controller converts the command display data back into the update command; and The acquisition circuit acquires the position of the first specific display area according to the update command, and acquires the code display data corresponding to the position of the first specific display area.
22. The updating method according to claim 18, characterized in that: The updating method further comprises: When the updating of the code data is completed, the timing controller controls the display unit to display a notification screen indicating that the updating of the code data is completed.
23. The updating method according to claim 14, characterized in that: The updating method further comprises: In the conversion operation of converting the update code into the code display data, the processor performs a cyclic redundancy check operation on the update code to generate an error detection code, and converts the error detection code into error detection display data.
24. The updating method according to claim 23, characterized in that: The updating method further comprises: When the error detection code is erroneous, the processor re-executes the update command in the next frame period.