Equipment communication verification method and device, equipment, storage medium and program product
By building a verification platform containing multiple components, the problem of inaccurate data transmission between multiple host devices and slave devices is solved, and the accuracy verification of the data transmission process is realized, which improves the reliability of data transmission.
Patent Information
- Application Number
- CN202510630423.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-16
- Publication Date
- 2025-06-13
- Estimated Expiration
- 2045-05-16
AI Technical Summary
During the chip operation, when multiple host devices access the same slave device through the same I2C bus, data arbitration results in inaccurate data transmission, and it is impossible to effectively verify the accuracy of data transmission between multiple host devices and slave devices.
Provide a device communication verification method, by constructing a verification platform including a first proxy component, an interface component, a second proxy component and a data processing component, using the first proxy component to send communication configuration information to multiple host devices, the interface component receives and arbitrates data, the second proxy component simulates a slave device, and the data processing component verifies data accuracy.
It realizes the accuracy verification of data transmission between multiple host devices and single slave devices, ensures correct clock synchronization and data arbitration during data transmission, and improves the reliability of data transmission.
Smart Images

Figure CN120144520A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of chip verification, and particularly to a device communication verification method, apparatus, device, storage medium, and program product. Background Art
[0002] I2C (Inter-Integrated Circuit) is a multi-master bus. Multiple I2C master communication devices (Masters) and multiple slave devices (Slaves) can be connected to an I2C bus. Each slave device has a unique address, and the master device can access different devices through these addresses.
[0003] With the increasing complexity of chips, there are scenarios where multiple specific master devices need to access the same slave device through the same I2C bus to obtain important information during the operation of the chip. At this time, data arbitration occurs for the data transmitted between multiple master devices and the slave device, so that only one target master device can successfully access the slave device on the bus. To ensure the accuracy of the data transmitted to the slave device after arbitration, it is urgent to solve the problem of how to verify the accuracy of data transmission between multiple master devices and the slave device. Summary of the Invention
[0004] Based on this, it is necessary to provide a device communication verification method, apparatus, device, storage medium, and program product that can verify the accuracy of data transmission between multiple master devices and a slave device for the above technical problems.
[0005] In a first aspect, the present application provides a device communication verification method. Applied to a verification platform, the verification platform includes a first proxy component, an interface component, a second proxy component, and a data processing component. The method includes:
[0006] Using the first proxy component to send communication configuration information to multiple master devices, where the communication configuration information is used to configure first communication data required for each master device to communicate with a target slave device;
[0007] Using the interface component to receive first communication data output by each master device based on the integrated circuit bus protocol, and arbitrating and determining second communication data from the first communication data to transmit the second communication data to the second proxy component simulating the target slave device;
[0008] Using the data processing component to obtain the communication configuration information and the second communication data, and verifying whether the second communication data is target communication data to be received by the target slave device according to the communication configuration information.
[0009] In one embodiment, the first proxy component includes a first drive sub-component, a first detection sub-component, and a sequencer component; the first proxy component is used to send communication configuration information to multiple host devices, including: using the first drive sub-component, taking the preset sequence data mounted on the sequencer component as the communication configuration information, and based on a preset transmission protocol, transmitting the communication configuration information from a first communication port to the multiple host devices; using the first detection sub-component, obtaining the communication configuration information transmitted from the first communication port, and transmitting the communication configuration information to the data processing component.
[0010] In one embodiment, the interface component includes a first interface connected between the first proxy component and the multiple host devices and a second interface connected between the second proxy component and the multiple host devices; the first interface transmits data based on a preset transmission protocol, and the second interface transmits data based on the integrated circuit bus protocol; using the interface component to arbitrate and determine second communication data from each first communication data, including: using the second interface, based on the data transmission logic of the integrated circuit bus protocol, performing an AND process on the clock data and serial data in each first communication data to obtain the second communication data; the method further includes: using the first interface, based on the preset transmission protocol, transmitting the communication configuration information to the multiple host devices.
[0011] In one embodiment, the second proxy component includes a second drive sub-component and a second detection sub-component; the method further includes: using the second drive sub-component, simulating the communication behavior of the target slave device to obtain the second communication data transmitted by the interface component from a second communication port, and responding to the host device corresponding to the second communication data according to the second communication data; using the second detection sub-component, obtaining the second communication data transmitted from the second communication port, and transmitting the second communication data to the data processing component.
[0012] In one embodiment, the second communication data at least includes the first device address, the first read / write bit, and the first data bit. Responding to the host device corresponding to the second communication data according to the second communication data includes: determining whether the first device address is the device address of the pre-stored target slave device; if so, returning a response signal to the host device corresponding to the second communication data through the second communication port; transmitting the second communication data to the data processing component includes: transmitting the first device address, the first read / write bit, and the first data bit to the data processing component.
[0013] In one embodiment, using the data processing component to verify whether the second communication data is the target communication data to be received by the target slave device according to the communication configuration information includes: parsing the communication configuration information to obtain the target communication data; the target communication data at least includes the device address of the target slave device, the target read / write bit, and the target data bit; determining whether the first device address is the same as the device address of the target slave device, determining whether the first read / write bit is the same as the target read / write bit, and determining whether the first data bit is the same as the target data bit; if it is determined that the first device address is the same as the device address of the target slave device, the first read / write bit is the same as the target read / write bit, and the first data bit is the same as the target data bit, then determining that the second communication data is the target communication data.
[0014] In one embodiment, the second communication data further includes a first clock frequency for transmitting the second communication data; the method further includes: using the second detection sub-component to determine a first delay time according to the first clock frequency, and determining whether the first clock frequency meets the expected transmission condition according to the first delay time and a preset expected delay value.
[0015] In one embodiment, determining whether the first clock frequency meets the expected transmission condition according to the first delay time and the preset expected delay value includes: determining a delay difference between the first delay time and the preset expected delay value; if the delay difference is less than a preset difference threshold, determining that the first clock frequency meets the expected transmission condition; if the delay difference is not less than the preset difference threshold, determining that the first clock frequency does not meet the expected transmission condition.
[0016] In one embodiment, the verification platform further includes a verification environment configuration component; before using the first proxy component to send the communication configuration information to multiple host devices, the method further includes: using the verification environment configuration component to configure the device address of the target slave device in the second driver sub-component, and configuring the preset expected delay value in the second detection sub-component.
[0017] In one embodiment, the verification platform further includes a register model, which includes a plurality of simulated registers mapped to each control register in each host device, and the identifier of each simulated register is the name of the corresponding control register; the method further includes: determining a target simulated register to be verified from the register model; determining the identifiers of each target simulated register to obtain the names of the target control registers to be configured in each host device; determining the preset sequence data according to the names of the target control registers to be configured in each host device.
[0018] Second aspect, the present application also provides a device communication verification apparatus. Applied to a verification platform, the verification platform includes a first proxy component, an interface component, a second proxy component, and a data processing component. The apparatus includes:
[0019] A configuration module, configured to use the first proxy component to send communication configuration information to a plurality of host devices, where the communication configuration information is used to configure first communication data required for each host device to communicate with a target slave device;
[0020] A receiving module, configured to use the interface component to receive the first communication data output by each host device based on the integrated circuit bus protocol, and arbitrate and determine second communication data from each first communication data, so as to transmit the second communication data to the second proxy component that simulates the target slave device;
[0021] A verification module, configured to use the data processing component to obtain the communication configuration information and the second communication data, and verify whether the second communication data is target communication data to be received by the target slave device according to the communication configuration information.
[0022] In one embodiment, the first proxy component includes a first driver sub-component, a first detection sub-component, and a sequencer component; the configuration module is specifically configured to: use the first driver sub-component to use the preset sequence data mounted on the sequencer component as the communication configuration information, and transmit the communication configuration information from a first communication port to the plurality of host devices based on a preset transmission protocol; use the first detection sub-component to obtain the communication configuration information transmitted by the first communication port, and transmit the communication configuration information to the data processing component.
[0023] In one embodiment, the interface component includes a first interface connected between the first proxy component and the plurality of host devices and a second interface connected between the second proxy component and the plurality of host devices; the first interface transmits data based on a preset transmission protocol, and the second interface transmits data based on the integrated circuit bus protocol; the receiving module is specifically configured to: use the second interface to perform an AND process on the clock data and serial data in each first communication data based on the data transmission logic of the integrated circuit bus protocol to obtain the second communication data; the method further includes: using the first interface to transmit the communication configuration information to the plurality of host devices based on the preset transmission protocol.
[0024] In one embodiment, the second proxy component includes a second driving sub-component and a second detecting sub-component; the device further includes a response module, configured to: use the second driving sub-component to simulate the communication behavior of the target slave device, so as to obtain the second communication data transmitted by the interface component from a second communication port, and respond to the host device corresponding to the second communication data according to the second communication data; use the second detecting sub-component to obtain the second communication data transmitted by the second communication port, and transmit the second communication data to the data processing component.
[0025] In one embodiment, the second communication data at least includes the first device address, the first read / write bit, and the first data bit. The response module is specifically configured to: determine whether the first device address is the device address of the pre-stored target slave device; if so, return a response signal to the host device corresponding to the second communication data through the second communication port; transmitting the second communication data to the data processing component includes: transmitting the first device address, the first read / write bit, and the first data bit to the data processing component.
[0026] In one embodiment, the verification module is specifically configured to: perform parsing processing on the communication configuration information to obtain the target communication data; the target communication data at least includes the device address of the target slave device, the target read / write bit, and the target data bit; determine whether the first device address is consistent with the device address of the target slave device, determine whether the first read / write bit is consistent with the target read / write bit, and determine whether the first data bit is consistent with the target data bit; if it is determined that the first device address is consistent with the device address of the target slave device, the first read / write bit is consistent with the target read / write bit, and the first data bit is consistent with the target data bit, then determine that the second communication data is the target communication data.
[0027] In one embodiment, the second communication data further includes a first clock frequency for transmitting the second communication data; the device further includes a condition judgment module, configured to: use the second detecting sub-component to determine a first delay time according to the first clock frequency, and determine whether the first clock frequency meets the expected transmission condition according to the first delay time and a preset expected delay value.
[0028] In one embodiment, the condition judgment module is specifically configured to: determine a delay difference between the first delay time and the preset expected delay value; if the delay difference is less than a preset difference threshold, determine that the first clock frequency meets the expected transmission condition; if the delay difference is not less than the preset difference threshold, determine that the first clock frequency does not meet the expected transmission condition.
[0029] In one embodiment, the verification platform further includes a verification environment configuration component; before sending communication configuration information to multiple host devices by using the first proxy component, the apparatus further includes a first data module, configured to: use the verification environment configuration component to configure the device address of the target slave device in the second driver sub-component, and configure the preset delay expected value in the second detection sub-component.
[0030] In one embodiment, the verification platform further includes a register model, which includes a plurality of simulated registers mapped to each control register in each host device, and the identifier of each simulated register is the name of the corresponding control register; the apparatus further includes a second data module, configured to: determine the target simulated register to be verified from the register model; determine the identifiers of each target simulated register to obtain the names of the target control registers to be configured in each host device; and determine the preset sequence data according to the names of the target control registers to be configured in each host device.
[0031] In a third aspect, the present application further provides a computer device, including a memory and a processor, where the memory stores a computer program, and when the processor executes the computer program, the steps of the method described in any one of the first aspects are implemented.
[0032] In a fourth aspect, the present application further provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the method described in any one of the first aspects are implemented.
[0033] In a fifth aspect, the present application further provides a computer program product, which includes a computer program, and when the computer program is executed by a processor, the steps of the method described in any one of the first aspects are implemented.
[0034] The above device communication verification method, device, equipment, storage medium and program product, based on a verification platform constructed including a first proxy component, an interface component, a second proxy component and a data processing component, uses the first proxy component to send communication configuration information to multiple host devices, and the communication configuration information is used to configure the first communication data required for each host device to communicate with the target slave device; uses the interface component to receive the first communication data output by each host device based on the integrated circuit bus protocol, and arbitrates and determines the second communication data from each first communication data to transmit the second communication data to the second proxy component that simulates the target slave device; uses the data processing component to obtain the communication configuration information and the second communication data, and verifies whether the second communication data is the target communication data to be received by the target slave device according to the communication configuration information. In this way, based on the verification platform, a complex scenario of communication between multiple host devices and a single slave device is simulated. In this scenario, the data processing component is used to verify whether the arbitrated data received by the second proxy component of the simulated target slave device is the correct target communication data based on the standard communication configuration information, thereby verifying the accuracy of data transmission between multiple host devices and a single slave device. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0036] Figure 1 It is an application environment diagram of the device communication verification method in an embodiment;
[0037] Figure 2 It is a schematic flowchart of the device communication verification method in an embodiment;
[0038] Figure 3 It is a schematic structural diagram of the verification platform in an embodiment;
[0039] Figure 4 It is a schematic flowchart of sending communication configuration information in an embodiment;
[0040] Figure 5 It is a schematic connection diagram of the interface component in the verification platform in an embodiment;
[0041] Figure 6 It is a schematic flowchart of transmitting the second communication data in an embodiment;
[0042] Figure 7 It is a schematic flowchart of responding to the host device in an embodiment;
[0043] Figure 8 Schematic diagram of the process for verifying the second communication data in an embodiment;
[0044] Figure 9 Schematic diagram of the internal interface of the data processing component in an embodiment;
[0045] Figure 10 Schematic diagram of the structure of another verification platform in an embodiment;
[0046] Figure 11 Schematic diagram of the verification method process in an embodiment;
[0047] Figure 12 Block diagram of the structure of the device communication verification device in an embodiment;
[0048] Figure 13 Internal structure diagram of a computer device in an embodiment. Specific embodiments
[0049] To make the above objects, features, and advantages of the present application more apparent and understandable, the following will describe the specific embodiments of the present application in detail with reference to the accompanying drawings. It should be understood that many specific details are set forth in the following description to fully understand the present application, but the present application can be implemented in many other ways different from those described herein. Those skilled in the art can make similar improvements without departing from the connotation of the present application. Therefore, the present application is not limited by the specific embodiments disclosed below.
[0050] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which this application belongs. The terms used in the specification of this application herein are only for the purpose of describing specific embodiments and are not intended to limit this application.
[0051] It can be understood that "at least one" means one or more, and "a plurality" means two or more.
[0052] When used herein, the singular forms "a", "an", and "the" may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms "including" or "having" etc. specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the related listed items.
[0053] The I2C bus is a serial, half-duplex bus that completes data transmission through two bidirectional signal lines (the clock line SCL and the data line SDA). The I2C bus is a multi-master bus. Multiple I2C master devices (Master) and multiple slave devices (Slave) can be connected to an I2C bus. The master device can access different slave devices. When two or more master devices access the same or different slave devices, clock synchronization and data arbitration are performed, so that only one master device on the bus can obtain the control right of the bus and perform data transmission with the corresponding slave device. Due to the advantages of the I2C bus such as simple hardware structure, few pins, and efficient communication among multiple devices sharing the same bus, it has been widely used in the communication between multiple devices on a chip.
[0054] With the increase in the complexity of the chip, during the operation of the GPU (graphics processing unit) chip, specific multi-master devices need to access the same slave device through the same I2C bus to obtain information. Data arbitration often occurs when multiple master devices perform data transmission with a single slave device, so that only one master device on the bus can successfully access the slave, and other master devices lose bus control and data is lost. To ensure the effectiveness of all master devices accessing the same slave device, it is necessary to clearly know the arbitration process of multi-master device data transmission, so that the master device that loses bus control during the arbitration process can successfully access the slave device in the subsequent data transmission. Currently, it is impossible to verify the accuracy of data transmission between multiple master devices and a single slave device connected to the same I2C bus.
[0055] Aiming at the problem that the accuracy of data transmission between multiple master devices and a single slave device connected to the same I2C bus cannot be verified, the embodiment of this application proposes a verification platform for the communication between multiple master devices and a single slave device connected to the same I2C bus based on the UVM verification methodology. Based on this verification platform, complex test scenarios in which multiple master devices communicate with a single slave device simultaneously or with a time interval are simulated. Using the device communication verification method, clock synchronization and data arbitration among multiple devices are achieved, and the accuracy of data transmission between multiple master devices and a single slave device is verified.
[0056] The device communication verification method provided by the embodiment of this application can be applied to an application environment such as Figure 1 shown. Among them, the verification platform can be deployed on the computer device 101. The verification platform includes a first proxy component, an interface component, a second proxy component, and a data processing component. Multiple host devices 102 communicate with the computer device 101 as the DUT (Design Under Test), and thus communicate with the verification platform.
[0057] The computer device 101 uses the first proxy component in the verification platform to send communication configuration information to multiple host devices 102. The communication configuration information is used to configure the first communication data required for each host device 102 to communicate with the target slave device. It uses the interface component to receive the first communication data output by each host device 102 based on the integrated circuit bus protocol, and arbitrates and determines the second communication data from each first communication data, so as to transmit the second communication data to the second proxy component that simulates the target slave device. It uses the data processing component to obtain the communication configuration information and the second communication data, and verifies whether the second communication data is the target communication data to be received by the target slave device according to the communication configuration information. The computer device 101 can be, but is not limited to, various personal computers, laptop computers, smart phones, tablet computers, or servers, etc. The server can be implemented by an independent server or a server cluster composed of multiple servers. It can be understood that the verification platform includes a first proxy component, an interface component, a second proxy component, and a data processing component, all of which can be implemented by software algorithms.
[0058] In one embodiment, as Figure 2 shown, a device communication verification method is provided. Taking the computer device 101 in Figure 1 as an example for illustration, the method includes the following steps:
[0059] Step 201, use the first proxy component to send communication configuration information to multiple host devices.
[0060] Among them, the communication configuration information is used to configure the first communication data required for each host device to communicate with the target slave device. In other words, each host device sends the corresponding first communication data to communicate with the target slave device, and each first communication data depends on the communication configuration information to be generated.
[0061] Optionally, the communication configuration information is pre-deployed by the developer in the first proxy component. Exemplarily, after starting the verification platform, a test case is executed, so as to configure the communication configuration information included in the test case in the first proxy component. Optionally, the verification platform is a verification platform built based on the UVM (Universal Verification Methodology) verification framework. For the convenience of understanding, this will be used as an example for illustration below.
[0062] Exemplarily, taking the device under test including host device 1, host device 2, and host device 3 as an example, the communication configuration information is used to determine the first communication data 1 required for host device 1 to communicate with the target slave device, the first communication data 2 required for host device 2 to communicate with the target slave device, and the first communication data 3 required for host device 3 to communicate with the target slave device.
[0063] Optionally, for each communication data, it includes the data required for the host device to receive information from the target slave device, and / or includes the data required for the host device to send information to the target slave device.
[0064] In an optional implementation, the host device communicates with the target slave device to obtain device operation information such as the power consumption and temperature of the target slave device.
[0065] Optionally, the communication configuration information is transmitted between the first proxy component and each host device through a preset transmission protocol. Among them, the preset transmission protocol can be different from the I2C protocol.
[0066] Step 202: Use the interface component to receive the first communication data output by each host device based on the integrated circuit bus protocol, and arbitrate and determine the second communication data from each first communication data, so as to transmit the second communication data to the second proxy component that simulates the target slave device.
[0067] Optionally, after the communication configuration information is received by each host device, it is written into the control register of each host device. In this way, each host device can access the target slave device based on the first communication data in the control register at the corresponding time.
[0068] Optionally, each host device can communicate with the target slave device simultaneously or with a time interval based on the corresponding first communication data. For example, each host device can simultaneously send the data to be processed to the target slave device at the first moment based on the corresponding first communication data. It can be understood that the data to be processed sent by each host device is different. The first communication data can include clock data and serial data, and the serial data can include the data to be processed. Among them, the clock data is usually transmitted through the serial clock line (SCL) in the I2C bus, and the serial data is usually transmitted through the serial data line (SDA) in the I2C bus.
[0069] In order to ensure the accuracy of communication between multiple host devices and a single slave device based on I2C (Integrated Circuit Bus Protocol), an interface component is built in the verification platform. The interface component can receive the first communication data output by each host device based on the integrated circuit bus protocol, and arbitrate and determine the second communication data from each first communication data. That is, the interface component simulates the data arbitration process of the actual I2C bus based on the I2C protocol, so as to arbitrate multiple sets of first communication data to obtain a set of second communication data.
[0070] The verification platform also includes a second proxy component, and the second proxy component can simulate the target slave device to receive data. In this way, the second proxy component can replace the target slave device to obtain the second communication data.
[0071] Step 203: Use the data processing component to obtain the communication configuration information and the second communication data, and verify whether the second communication data is the target communication data to be received by the target slave device according to the communication configuration information.
[0072] In an alternative implementation, the first proxy component is connected to the data processing component. When the first proxy component sends the communication configuration information to each host device, it also sends the communication configuration information to the data processing component. In another alternative implementation, after the test case is executed, the communication configuration information is configured and stored in the data processing component.
[0073] Moreover, the second proxy component is connected to the data processing component. After obtaining the second communication data, in addition to responding to the host device based on the second communication data, the second proxy component also forwards the second communication data to the data processing component.
[0074] Based on this, the data processing component can determine the target communication data that the target slave device should accurately receive according to the communication configuration information, so as to determine whether the second communication data is the target communication data.
[0075] It can be understood that if the second communication data is the target communication data, it means that the communication between the host device and the target slave device is correct, thus verifying the effectiveness and accuracy of the communication between multiple host devices and a single slave device.
[0076] The above device communication verification method is based on a verification platform constructed including a first proxy component, an interface component, a second proxy component, and a data processing component. The first proxy component is used to send communication configuration information to multiple host devices, and the communication configuration information is used to configure the first communication data required for each host device to communicate with the target slave device; the interface component is used to receive the first communication data output by each host device based on the integrated circuit bus protocol, and arbitrate and determine the second communication data from each first communication data to transmit the second communication data to the second proxy component that simulates the target slave device; the data processing component is used to obtain the communication configuration information and the second communication data, and verify whether the second communication data is the target communication data to be received by the target slave device according to the communication configuration information. In this way, based on the verification platform, a complex scenario of communication between multiple host devices and a single slave device is simulated. In this scenario, the data processing component is used to verify whether the arbitrated data received by the second proxy component that simulates the target slave device is the correct target communication data based on the standard communication configuration information, thereby verifying the accuracy of data transmission between multiple host devices and a single slave device.
[0077] In one embodiment, the above-mentioned preset transmission protocol is the AXI (Advanced eXtensible Interface) protocol. AXI is a bus protocol mainly used for on-chip bus design with high performance, high bandwidth, and low latency. It supports unidirectional or bidirectional data streams and provides various addressing modes and flow control mechanisms to adapt to various complex design scenarios.
[0078] In other words, data is transmitted between the first agent and each host device based on the AXI protocol.
[0079] In one embodiment, as Figure 3 Exemplarily shown is a schematic structural diagram of a verification platform. The first agent component includes a first driver sub-component, a first detection sub-component, and a sequencer component; the interface component includes a first interface connected between the first agent component and multiple host devices and a second interface connected between the second agent component and multiple host devices. The second agent component includes a second driver sub-component and a second detection sub-component; the verification platform further includes a verification environment configuration component and a register model.
[0080] Optionally, for the convenience of integration, in the embodiments of the present application, the verification platform includes a verification environment component, where the first agent component, the second agent component, the register model, and the data processing component are encapsulated by using the verification environment component. Exemplarily, the verification environment component is constructed by using UVM methodologies such as uvm_component, phase mechanism, and register model. The top layer (environment) of the verification environment component inherits from uvm_env, hierarchically associates and encapsulates each component, and can be reused as a sub-environment in higher-level system-level verification.
[0081] In one embodiment, the verification platform further includes executable test cases. After the test cases are executed, they are used to build a verification scenario for the DUT in the verification platform, such as initializing the DUT through the verification platform, configuring and instantiating parameters for the verification environment configuration component, instantiating the verification environment component, randomizing the packets to be sent, and determining the packets to be sent.
[0082] The following will describe each component based on this.
[0083] In one embodiment, as Figure 4 Shown is a schematic flowchart of sending communication configuration information. Using the first agent component to send communication configuration information to multiple host devices, including:
[0084] Step 401, using the first driver sub-component, taking the preset sequence data mounted on the sequencer component as the communication configuration information, and transmitting the communication configuration information from the first communication port to multiple host devices based on the preset transmission protocol.
[0085] Step 402: Use the first detection sub-component to obtain the communication configuration information transmitted by the first communication port and transmit the communication configuration information to the data processing component.
[0086] Among them, the first proxy component includes a first driver sub-component, a first detection sub-component, and a sequencer component. The first driver sub-component is a driver, the first detection sub-component is a detector, and the sequencer component is a sequencer.
[0087] The second proxy module accesses the registers of the DUT by simulating the AXI bus protocol. Optionally, the sequencer component is connected to the first driver sub-component through the TLM (Transaction Level Modeling Port) communication port in UVM. In the test case, when the registers of the DUT need to be accessed, the preset sequence data is mounted on the sequencer, and the preset sequence data is passed to the first driver sub-component through the port, so that it obtains the communication configuration information. The first driver sub-component sends stimuli to the registers of the DUT through the first communication port between the first communication port and the DUT according to the AXI protocol.
[0088] In addition, the first detection sub-component can monitor the first communication port in real time. In this way, when the communication configuration information reaches the first communication port, the first detection sub-component can monitor and obtain the communication configuration information. And the first detection sub-component is connected to the data processing component through the first transmission port, so the communication configuration information can be transmitted to the data processing component through the first transmission port.
[0089] Exemplarily, the second proxy component inherits from uvm_agent, belongs to the uvm_component component, configures the registers of the DUT by simulating the AXI4 bus protocol, and then initializes the DUT through the register configuration, so that multiple host devices in the DUT can send the first communication data (including clock data and serial data) conforming to the I2C protocol simultaneously or at intervals.
[0090] During the instantiation of the second proxy component, the first driver sub-component, the first detection sub-component, and the sequencer component will be instantiated during the proxy construction phase. Subsequently, during the initialization phase (connect phase), the uvm_seq_item_pull_port port of the first driver sub-component will be connected to the uvm_seq_item_pull_imp port of the sequencer component to achieve communication between the first driver sub-component and the sequencer component. The first driver sub-component obtains the communication configuration information required for configuration through the sequencer component and sends data to the DUT according to the AXI protocol through the first communication interface. For example, data is sent to the DUT based on the AXI4 protocol. The first detection sub-component obtains the communication configuration information by monitoring the first communication port and sends the communication configuration information to the data processing component through the first transmission port uvm_analysis_port1.
[0091] In the embodiment of the present application, by using the first driver sub-component and the first detection sub-component, the first proxy component can be docked with different objects, enabling both the DUT and the data processing component to obtain the communication configuration information, thereby enhancing the flexibility of data transmission.
[0092] In one embodiment, as mentioned above, the interface component includes a first interface connected between the first proxy component and multiple host devices and a second interface connected between the second proxy component and multiple host devices.
[0093] Among them, the first interface transmits data based on a preset transmission protocol, and the second interface transmits data based on the integrated circuit bus protocol.
[0094] In one embodiment, using the interface component to arbitrate and determine the second communication data from each first communication data includes: using the second interface, based on the data transmission logic of the integrated circuit bus protocol, performing an AND operation on the clock data and serial data in each first communication data to obtain the second communication data.
[0095] Among them, the interface component serves as a bridge for communication between the verification platform and the DUT, including a first interface and a second interface. Based on the protocols adopted by the interfaces, it can be considered that the first interface is an AXI interface and the second interface is an I2C interface. As Figure 5 Exemplarily shows a schematic diagram of the connection of the interface component in the verification platform.
[0096] Exemplarily, the I2C interface receives the first communication data (including SCL data and SDA data) sent by each host device, and through a preset assignment operation statement, the SDA data and SCL data input by multiple host devices are ANDed, and finally a set of data is output to the first proxy component, that is, the second communication data is obtained.
[0097] Optionally, the preset assignment operation statement is an assign statement. The assign statement is used to assign the value of an expression to a signal or variable.
[0098] In one embodiment, the method further includes: transmitting the communication configuration information to a plurality of host devices based on a preset transmission protocol by using a first interface.
[0099] In other words, the first interface transmits the communication configuration information output from the first communication port to each host device based on the AXI protocol.
[0100] In the embodiment of the present application, by setting interfaces with different protocols, the route for the first proxy component in the verification platform to configure the DUT is separated from the route for the DUT to send data to the second proxy component, ensuring accurate data transmission.
[0101] In one embodiment, as Figure 6 shows a schematic flowchart of transmitting second communication data, the method further includes:
[0102] Step 601, using a second driver sub-component to simulate the communication behavior of a target slave device, so as to obtain second communication data transmitted by an interface component from a second communication port, and respond to the host device corresponding to the second communication data according to the second communication data.
[0103] Step 602, using a second detection sub-component to obtain the second communication data transmitted by the second communication port, and transmitting the second communication data to a data processing component.
[0104] The second proxy component includes a second driver sub-component and a second detection sub-component. The second driver sub-component is also a driver, and the first detection sub-component is also a detector.
[0105] In other words, the second communication data transmitted by the interface component is obtained by the second driver sub-component and the second detection sub-component via the second communication port.
[0106] Exemplarily, the second proxy component inherits from uvm_agent and belongs to the component component. Among them, compared with the first proxy component, since the second proxy component in the embodiment of the present application is an analog module of the target slave device and responds to the data sent by the host device, where the generation and sending of stimuli are implemented by configuring the registers of the DUT instead of by the second proxy component in the verification environment, the second proxy component in the embodiment of the present application does not need to instantiate a sequencer and only encapsulates a driver and a detector.
[0107] In one embodiment, as Figure 7 shows a schematic flowchart of responding to a host device. Responding to the host device corresponding to the second communication data according to the second communication data includes:
[0108] Step 701: Determine whether the first device address is the device address of a pre-stored target slave device.
[0109] Step 702: If so, return a response signal to the host device corresponding to the second communication data through the second communication port.
[0110] Among them, the host device connected to the I2C bus can access different slave devices through the device addresses of the slave devices. Therefore, the second communication data includes the first device address, which characterizes the device address of the slave device that the host device corresponding to the second communication data needs to access this time.
[0111] In addition, the second communication data further includes a first read / write bit and a first data bit, which are used for the slave device receiving the second communication data to perform read operations and / or write operations on the data.
[0112] Exemplarily, the device address of the target slave device is pre-stored in the second driver sub-component. Therefore, the second driver sub-component can determine whether the first device address is the device address of the pre-stored target slave device. In this way, if it is determined that the first device address is the device address of the pre-stored target slave device, it is determined that the second communication data is indeed the data that the host device needs to send to the target slave device. And the second proxy component simulates the target slave device, so it should receive the second communication data. Based on this, the second driver sub-component uses the second communication port to return a response signal to the host device corresponding to the second communication data, and the response signal is used to indicate that the target slave device has received the second communication data.
[0113] Optionally, the second communication data may further include a start bit, a stop bit, etc., which are not fully exemplified here.
[0114] Exemplarily, the second driver sub-component inherits from uvm_driver. According to the clock data and serial data in the second communication data transmitted through the second communication port, information such as a first start bit, a first device address, a first read / write bit, a first data bit, and a first stop bit can be obtained. Determine whether to correctly return a response signal according to the received first device address; perform a write operation or a read operation according to the first read / write bit; determine the starting position of the write operation or the read operation according to the first start bit; determine the ending position of the write operation or the read operation according to the first stop bit; and the data to be written or read is determined by the first data bit.
[0115] Exemplarily, the second driving sub-component makes different responses according to the clock data and serial data of the second communication data. If the bit in the data bit is 0, the second driving sub-component drives the SDA data line, and weak-pulls up the SDA data line and SCL data line of the host device and the slave device through the assign statement in the I2C interface, while enabling the I / O interfaces of multiple host devices and slave devices to always obtain the changes of the SCL data and SDA data on the I2C bus, realizing clock synchronization and data arbitration when multiple I2C host devices communicate with a single slave device.
[0116] In one embodiment, transmitting the second communication data to the data processing component includes: transmitting the first device address, the first read / write bit, and the first data bit to the data processing component.
[0117] Optionally, the second detection sub-component can monitor the second communication port in real time, so that when the second communication data is transmitted via the second communication port, it is acquired by the second detection component. And the second detection sub-component is connected to the data processing component through the second transmission port, so the first device address, the first read / write bit, and the first data bit can be transmitted to the data processing component through the second transmission port. The second transmission port can be a TLM communication port.
[0118] Exemplarily, the second detection sub-component inherits from uvm_monitor. By collecting the second communication data, data such as the slave device address, read / write bit, and data bit are sent to the data processing component through the second transmission port uvm_analysis_port2.
[0119] In addition, in the embodiment of the present application, the second detection component can also check the clock frequency of the clock data.
[0120] In an optional implementation manner, the method further includes: using the second detection sub-component to determine the first delay time according to the first clock frequency, and determining whether the first clock frequency meets the expected transmission condition according to the first delay time and the preset expected delay value.
[0121] Wherein, the second communication data further includes the first clock frequency for transmitting the second communication data.
[0122] The second detection sub-component is pre-configured with a clock frequency correspondence table, which includes the correspondence relationships between multiple groups of different clock frequencies and delay times. Therefore, the first delay time can be queried from the clock frequency correspondence table according to the first clock frequency. In addition, the preset expected delay value is stored in the second detection sub-component, and the preset expected delay value is an accurate delay time.
[0123] In an alternative implementation, determining whether the first clock frequency meets the expected transmission condition according to the first delay time and the preset expected delay value includes: determining the delay difference between the first delay time and the preset expected delay value; if the delay difference is less than the preset difference threshold, determining that the first clock frequency meets the expected transmission condition; if the delay difference is not less than the preset difference threshold, determining that the first clock frequency does not meet the expected transmission condition.
[0124] In other words, the first delay time can be compared with the preset expected delay value to determine whether the delay difference between the first delay time and the preset expected delay value is less than the preset difference threshold. If it is less, it means that the first delay time is basically the same as the preset expected delay value, and it is determined that the data transmission frequency between the current host device and the slave device is accurate, that is, it meets the expected transmission condition; otherwise, if it is not less, it means that the first delay time is quite different from the preset expected delay value, and it is determined that the data transmission frequency between the current host device and the slave device is inaccurate, that is, it does not meet the expected transmission condition.
[0125] In one embodiment, the method further includes using a second detection sub-component to sample second communication data from a second communication port according to the first delay time.
[0126] In one embodiment, the method further includes using a second drive sub-component to sample second communication data from a second communication port according to the first delay time.
[0127] In this way, the verification platform can support different transmission rates of the I2C bus protocol and can receive data sent by the host device at different transmission rates.
[0128] In one embodiment, as Figure 8 shows a schematic flow diagram for verifying the second communication data. Verifying whether the second communication data is the target communication data to be received by the target slave device by using a data processing component according to the communication configuration information includes:
[0129] Step 801, parsing and processing the communication configuration information to obtain the target communication data.
[0130] Among them, the target communication data at least includes the device address of the target slave device, the target read / write bit, and the target data bit.
[0131] Here, the data processing component can determine the first communication data that each host device will send to the target slave device according to the communication configuration information obtained by the first detection sub-component, and can judge the accurate expected data that the target slave device should receive under accurate arbitration. Therefore, the expected data can be used as the target communication data and finally compared with the second communication data obtained from the second detection sub-component.
[0132] Optionally, the data processing component is a pre-built reference model, which is deployed in the verification platform and can perform task processing on each first communication data in the communication configuration information to determine the target communication data that the target slave device should receive under standard conditions.
[0133] Step 802: Determine whether the first device address is the same as the device address of the target slave device, whether the first read / write bit is the same as the target read / write bit, and whether the first data bit is the same as the target data bit.
[0134] Step 803: If it is determined that the first device address is the same as the device address of the target slave device, the first read / write bit is the same as the target read / write bit, and the first data bit is the same as the target data bit, then determine that the second communication data is the target communication data.
[0135] Exemplarily, the data processing component inherits from uvm_component. As Figure 9 shows a schematic diagram of the internal interface of the data processing component. Among them, two buffer areas are instantiated inside the data processing component, namely the first buffer area uvm_tlm_analysis_fifo(A) and the second buffer area uvm_tlm_analysis_fifo(I), and two internal transmission ports are instantiated, namely the first internal port uvm_get_port(A) and the second internal port uvm_get_port(I). Among them, a group of internal communication ports are instantiated in each of the two buffer areas, namely the first communication port uvm_analysis_imp and the second communication port uvm_get_imp.
[0136] The communication configuration data obtained by the first driver sub-component from the first communication port is output to the first communication port in the first buffer area of the data processing component through the first transmission port. At this time, the communication configuration data is temporarily stored in the first buffer area. The first internal port of the data processing component is docked with the second communication port in the first buffer area. Therefore, after the communication configuration data is output from the second communication port in the first buffer area, it is obtained by the data processing component via the first internal port. Furthermore, the data processing component can perform parsing processing according to the communication configuration data to determine the target communication data.
[0137] Similarly, the second communication data obtained by the second drive sub-component from the second communication port is output to the first communication port in the second buffer area of the data processing component through the second transmission port. At this time, the second communication data is temporarily stored in the second buffer area. The second internal port of the data processing component is docked with the second communication port in the second buffer area. Therefore, the data processing component can obtain the second communication data output from the second communication port in the second buffer area through the second internal port. That is, the first device address, the first read / write bit, and the first data bit are obtained.
[0138] Furthermore, the data processing component can compare the target communication data with the second communication data to verify whether the correct data is obtained.
[0139] In one embodiment, before using the first proxy component to send communication configuration information to multiple host devices, the method further includes: using the verification environment configuration component to configure the device address of the target slave device in the second drive sub-component, and configuring the preset delay expected value in the second detection sub-component.
[0140] Among them, the verification platform further includes a verification environment configuration component, which is used to configure the second proxy component in the verification environment according to different clock frequencies of the DUT. The configuration content is the device address of the target slave device, and the delay time required for the second drive sub-component and the second detection sub-component to drive signals and sample data at different clock frequencies, that is, the preset delay expected value. It can also be used to configure the above-mentioned clock frequency correspondence table in the second detection sub-component.
[0141] Exemplarily, the verification environment configuration component (Config) inherits from uvm_object and is used to configure the I2C proxy, including information such as the slave device address and the delay required at different clock frequencies. Before initializing the verification platform, these configuration parameters are pre-configured into the second drive sub-component and the second detection sub-component through uvm_config_db. In this way, the second detection sub-component can check whether the clock data in the second communication data sent by the DUT meets the requirements based on the configured preset delay expected value.
[0142] Among them, since the preset delay expected value is pre-configured by the verification environment configuration component, it can be understood that if the transmission rate of the DUT is switched from the standard mode to the fast mode, that is, the transmission rate changes, the preset delay expected value in the verification environment configuration file can be modified only, without modifying other components of the verification platform. Based on the new transmission rate, the second communication data can be obtained and communicated with each host device. Therefore, the verification platform has good reusability.
[0143] It can be seen from this that based on test cases and various verification components, the verification platform simulates a complex test scenario where multiple master devices communicate with a single slave device simultaneously or with a time interval at different I2C transmission rates, ensuring the accuracy of data when the multiple master devices communicate with the single slave device.
[0144] In one embodiment, as mentioned above, the verification platform further includes a register model. The register model includes multiple simulated registers that have a mapping relationship with each control register in each host device, and the identifier of each simulated register is the name of the corresponding control register.
[0145] In one embodiment, the method further includes: determining a target simulated register to be verified from the register model; determining the identifiers of the target simulated registers to obtain the names of the target control registers to be configured in each host device; and determining preset sequence data according to the names of the target control registers to be configured in each host device.
[0146] Test cases are used for the instantiation of various components in the entire test environment and the initialization of the DUT, etc. When the test case is executed, the target simulated register to be verified can be determined based on the register model, and the identifier of the target simulated register can also be determined. Among them, the identifier of each target simulated register is the name of the target control register to be configured. Therefore, the name of the target control register to be configured can be obtained by determining the identifier.
[0147] In this way, when the target to be configured (i.e., the name of the target control register to be configured) is determined, the preset sequence data can be determined in combination with other configuration information and mounted on the sequencer, that is, the sequencer component of the first proxy component, so that the first proxy component determines the communication configuration information based on the preset sequence data and configures the DUT.
[0148] It can be understood that when using this verification platform to verify the communication process between several other host devices and another slave device, only need to set the names of the control registers in these host devices to be verified as the names of the simulated registers pre-stored in the register model, then the correspondence between the register model and each register in the DUT can be achieved. In this way, when replacing the DUT for verification each time, there is no need to modify the register model in the verification platform again. Only need to change the names of each register in the DUT to reuse this verification platform to verify the DUT. Therefore, the reusability of this verification platform is higher.
[0149] Exemplarily, in the verification platform, there is a test case component which contains multiple test cases (Testcase), and can be generally divided into basic test cases and functional test cases. The basic test cases inherit from uvm_test and include the instantiation of the verification environment configuration component and the instantiation of the verification environment component; the functional test cases inherit from the basic test cases and include configuring the target control register required for the register model to initialize the DUT and send data, and changing the configuration data in the verification environment configuration component according to the clock frequency required by the DUT to meet the delay time required for the second driving sub-component and the second detection sub-component to drive signals and sample at different clock frequencies.
[0150] Exemplarily, the register model inherits from uvm_reg_block and can access the control registers of the DUT through front-door access and back-door access. Front-door access can configure each register domain of the DUT separately. Essentially, it is to call the preset sequence data to be mounted on the sequencer component, and simulate the AXI bus to access the control registers of the DUT through the first driving sub-component. In an optional embodiment of the present application, the register configuration of the DUT is all through the front-door access of the register model. In addition, if back-door access to the register is adopted, the value of the register can be written or read without consuming simulation time, and the register model is used to directly send a specific address on the AXI bus to configure the entire register. Subsequently, when the register address is modified or the domain changes, only the configuration of the domain in the register model needs to be changed, without the need to modify the register configuration in the test case, which improves the reusability of the test case.
[0151] For ease of understanding, the following uses a complete embodiment to illustrate the process of the verification platform based on UVM provided by the present application and the device communication verification method for verifying the process of multi-host device and single-slave device communication through the I2C bus using this verification platform.
[0152] Please refer to Figure 10 , which shows a schematic structural diagram of a verification platform. The verification platform includes a verification environment component, an interface component, a verification environment configuration component, and a test case component (not shown in the figure).
[0153] The verification environment component is used to encapsulate multiple reusable verification components and hierarchically associate each component. Specifically, the verification environment component consists of an I2C agent (I2C slave agent), an AXI agent (AXI agent), a register model (Registermodel), and a reference model (Reference model).
[0154] The I2C agent encapsulates the Driver and Monitor together and communicates with the Device Under Test (DUT) by simulating the behavior of a slave device. The Driver obtains the SCL clock data and SDA data from the I2C interface according to the timing of the I2C bus protocol and makes corresponding responses to the host device according to the specific content of the SCL clock data and SDA data. The Monitor obtains the SCL clock data and SDA data through the I2C interface and passes the address bit (Address), read / write bit, and data bit (Data) information in the data to the reference model through the TLM ports of UVM. In addition, the Monitor also checks the frequency of the SCL clock data.
[0155] The AXI agent includes a Driver, a Monitor, and a Sequencer, and accesses the registers of the DUT by simulating the AXI bus protocol. The Sequencer is connected to the Driver through the TLM communication port in UVM. In the test case, when accessing the registers of the DUT, the Sequence is mounted on the Sequencer, and the data is passed to the Driver through the port. The Driver sends stimuli to the registers of the DUT through the AXI interface according to the AXI protocol. In addition, the Monitor obtains the data sent by the Driver by monitoring the AXI interface and sends the data to the reference model.
[0156] The register model contains multiple registers (uvm_reg) and register fields (uvm_reg_field). Through the register model, the registers of the DUT can be accessed by the name of the register instead of directly by the specific address of the register. The later change of the register address does not affect the use of the register model in the test case, which improves the reusability of the test case.
[0157] The Reference model obtains information such as the address bit, read / write bit, and data bit sent by the I2C Monitor through the TLM port, and obtains the register configuration data sent by the AXI Monitor through another TLM port. The Reference model processes the data obtained from the AXI Monitor to obtain the expected value and finally compares it with the data obtained from the I2C Monitor.
[0158] The verification environment configuration component configures the I2C agent in the verification environment according to the different clock frequencies of the DUT. The configuration content is the slave device address, and the delay times required for the Driver and Monitor to drive signals and sample at different clock frequencies.
[0159] The interface, as a bridge for data communication between the verification environment components and the DUT, includes an I2C interface and an AXI interface. The I2C interface receives the SCL data and SDA data sent by the host device, realizes clock synchronization and data arbitration through the wire-and-logic of the I2C bus, and finally outputs a set of arbitrated SCL data and SDA data to the I2C agent; the AXI interface is the signal interface between the DUT and the AXI agent, containing the signals required by the AXI protocol.
[0160] The test case component is used to simulate the verification scenario for the DUT under test, and the content includes the initialization of the DUT, the configuration and instantiation of the verification environment configuration component, the instantiation of the verification environment component, the randomization of the packets to be sent, and the sending of the packets.
[0161] To verify the communication between multiple host devices and a single slave device, multiple functional test cases are required, which are mainly divided into two cases: multiple host devices write data to the slave device and multiple host devices read data from the slave device. To describe the above verification method more clearly, the test case of multiple host devices writing to a single slave device is taken as an example for illustration below. Please refer to Figure 11 the schematic diagram of the verification method process shown:
[0162] In the simulation top-level file, start the verification environment through run_test.
[0163] After the verification environment is started, create an instance of uvm_test_top for the corresponding test case according to the UVM_TEST_NAME input by the simulation, and then automatically call the phase mechanism of UVM to create each uvm_component component, forming a UVM tree structure to complete the instantiation of the verification platform.
[0164] a) According to information such as the required SCL clock frequency and the slave device address, configure the control register address of the DUT through the register model, so that multiple I2C host devices can send SCL clock frequency data that meets the requirements, complete the initialization of the DUT, and at the same time the detector in the AXI agent passes information such as the slave device address to the reference model.
[0165] b) Configure the verification environment configuration file according to the SCL clock frequency of the DUT, and pass the configuration information to the detector and driver of the I2C agent through the config_db mechanism in UVM.
[0166] c) Configure the data bit information to be sent by multiple I2C host devices to the corresponding register addresses through the register model. The DUT sends multiple groups of SCL data streams and SDA data streams, and at the same time the detector in the AXI agent passes the I2C data bits to the reference model.
[0167] d) The I2C interface obtains multiple groups of SCL data and SDA data, performs clock synchronization and data arbitration processing, and transfers a group of processed SCL data and SDA data to the I2C agent. The driver in the I2C agent obtains information such as the start bit, slave device address, read / write bit, data bit, stop bit, etc. in the I2C protocol based on the data transmitted from the I2C interface, and returns response bit information according to whether the received slave device address is correct, and, performs a write operation or a read operation according to the read / write bit information; in addition, the detector in the I2C agent sends data such as the slave device address, read / write bit, data bit, etc. to the reference model through the TLM communication port, and checks the clock frequency of the SCL clock data.
[0168] e) The reference model processes the obtained register configuration data through a task to obtain the expected values of the slave device address, read / write bit, and data bit, and finally compares them with the data obtained from the detector of the I2C agent to verify the correctness of the data obtained by the I2C agent.
[0169] In the embodiments of the present application, the interfaces in the verification platform support the connection of multiple host devices and a single slave device, and support increasing or decreasing the number of host devices. At the same time, clock synchronization and data arbitration are implemented through the wire-and-logic of the I2C bus protocol in the interface, and the assign statement of the Verilog language is used to enable the I / O interfaces of the host device and the slave device to obtain the changes of the SCL data and SDA data on the bus, fully simulating the scenario of multiple host devices and a single slave device being mounted on the same I2C bus for communication. This verification platform supports different transmission rates of the I2C bus protocol. When the transmission rate of the DUT is switched from the standard mode to the fast mode, only the verification environment configuration file needs to be modified, without modifying other components of the verification platform, which has good reusability. Through different test cases and verification components, complex test scenarios of multiple host devices communicating with a single slave device simultaneously or with time intervals at different I2C transmission rates are simulated, ensuring the accuracy of data when multiple host devices communicate with a single slave device.
[0170] It should be understood that although the steps in the flowcharts involved in the above-described embodiments are shown in sequence according to the arrows, these steps do not necessarily need to be executed in the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-described embodiments may include multiple steps or multiple stages. These steps or stages do not necessarily need to be executed at the same moment, but can be executed at different moments. The execution order of these steps or stages does not necessarily need to be sequential, but can be executed alternately or in turn with at least a part of other steps or steps or stages in other steps.
[0171] Based on the same inventive concept, an embodiment of the present application further provides a device communication verification apparatus for implementing the device communication verification method involved above. The solution provided by this apparatus for solving problems is similar to the solution described in the above method. Therefore, the specific limitations in one or more embodiments of the device communication verification apparatus provided below can refer to the limitations on the device communication verification method in the foregoing, and will not be repeated here.
[0172] In one embodiment, as Figure 12 shown, a device communication verification apparatus is provided, which is applied to a verification platform. The verification platform includes a first proxy component, an interface component, a second proxy component, and a data processing component. The device communication verification apparatus 1200 includes: a configuration module 1201, a receiving module 1202, and a verification module 1203, where:
[0173] The configuration module 1201 is configured to use the first proxy component to send communication configuration information to multiple host devices, and the communication configuration information is used to configure first communication data required for each host device to communicate with a target slave device;
[0174] The receiving module 1202 is configured to use the interface component to receive the first communication data output by each host device based on the integrated circuit bus protocol, and arbitrate and determine second communication data from each first communication data, so as to transmit the second communication data to the second proxy component that simulates the target slave device;
[0175] The verification module 1203 is configured to use the data processing component to obtain the communication configuration information and the second communication data, and verify whether the second communication data is the target communication data to be received by the target slave device according to the communication configuration information.
[0176] In one of the embodiments, the first proxy component includes a first driver sub-component, a first detection sub-component, and a sequencer component; the configuration module 1201 is specifically configured to: use the first driver sub-component to use the preset sequence data mounted on the sequencer component as the communication configuration information, and transmit the communication configuration information from a first communication port to the multiple host devices based on a preset transmission protocol; use the first detection sub-component to obtain the communication configuration information transmitted by the first communication port, and transmit the communication configuration information to the data processing component.
[0177] In one embodiment, the interface component includes a first interface connected between the first proxy component and the multiple host devices, and a second interface connected between the second proxy component and the multiple host devices; the first interface transmits data based on a preset transmission protocol, and the second interface transmits data based on the integrated circuit bus protocol; the receiving module 1202 is specifically configured to: use the first interface to perform an AND operation on the clock data and the serial data in each first communication data based on the data transmission logic of the integrated circuit bus protocol to obtain the second communication data; the method further includes: using the second interface to transmit the communication configuration information to the multiple host devices based on the preset transmission protocol.
[0178] In one embodiment, the second proxy component includes a second driving sub-component and a second detecting sub-component; the apparatus further includes a response module, configured to: use the first driving sub-component to simulate the communication behavior of the target slave device to obtain the second communication data transmitted by the interface component from the second communication port, and respond to the host device corresponding to the second communication data according to the second communication data; use the second detecting sub-component to obtain the second communication data transmitted by the second communication port and transmit the second communication data to the data processing component.
[0179] In one embodiment, the second communication data at least includes the first device address, the first read / write bit, and the first data bit. The response module is specifically configured to: determine whether the first device address is the device address of the pre-stored target slave device; if so, return a response signal to the host device corresponding to the second communication data through the second communication port; transmitting the second communication data to the data processing component includes: transmitting the first device address, the first read / write bit, and the first data bit to the data processing component.
[0180] In one embodiment, the verification module 1203 is specifically configured to: perform parsing processing on the communication configuration information to obtain the target communication data; the target communication data at least includes the device address of the target slave device, the target read / write bit, and the target data bit; determine whether the first device address is consistent with the device address of the target slave device, determine whether the first read / write bit is consistent with the target read / write bit, and determine whether the first data bit is consistent with the target data bit; if it is determined that the first device address is consistent with the device address of the target slave device, the first read / write bit is consistent with the target read / write bit, and the first data bit is consistent with the target data bit, then determine that the second communication data is the target communication data.
[0181] In one embodiment, the second communication data further includes a first clock frequency for transmitting the second communication data; the apparatus further includes a condition judgment module, configured to: use the second detection sub-component to determine a first delay time according to the first clock frequency, and determine whether the first clock frequency meets the expected transmission condition according to the first delay time and a preset expected delay value.
[0182] In one embodiment, the condition judgment module is specifically configured to: determine a delay difference between the first delay time and the preset expected delay value; if the delay difference is less than a preset difference threshold, determine that the first clock frequency meets the expected transmission condition; if the delay difference is not less than the preset difference threshold, determine that the first clock frequency does not meet the expected transmission condition.
[0183] In one embodiment, the verification platform further includes a verification environment configuration component; before using the first proxy component to send communication configuration information to multiple host devices, the apparatus further includes a first data module, configured to: use the verification environment configuration component to configure the device address of the target slave device in the second drive sub-component, and configure the preset expected delay value in the second detection sub-component.
[0184] In one embodiment, the verification platform further includes a register model, which includes a plurality of analog registers mapped to each control register in each host device, and the identifier of each analog register is the name of the corresponding control register; the apparatus further includes a second data module, configured to: determine a target analog register to be verified from the register model; determine the identifiers of each target analog register to obtain the names of the target control registers to be configured in each host device; determine the preset sequence data according to the names of the target control registers to be configured in each host device.
[0185] Each module in the above device communication verification apparatus can be implemented in whole or in part by software, hardware, and their combination. Each of the above modules can be embedded in or independent of a processor in a computer device in the form of hardware, or stored in a memory in the computer device in the form of software, so as to facilitate the processor to call and execute the operations corresponding to the above respective modules.
[0186] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as Figure 13As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, abbreviated as I / O), and a communication interface. Among them, the processor, the memory, and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store device communication verification data. The input / output interface of the computer device is used to exchange information between the processor and external devices. The communication interface of the computer device is used to communicate with an external terminal through a network connection. The computer program, when executed by the processor, implements a device communication verification method.
[0187] Those skilled in the art can understand that Figure 13 the structure shown in is only a block diagram of some structures related to the solution of this application, and does not constitute a limitation on the computer device to which the solution of this application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine some components, or have different component arrangements.
[0188] In one embodiment, a computer device is further provided, including a memory and a processor. A computer program is stored in the memory, and when the processor executes the computer program, the steps in the above method embodiments are implemented.
[0189] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by the processor, the steps in the above method embodiments are implemented.
[0190] In one embodiment, a computer program product is provided, including a computer program. When the computer program is executed by the processor, the steps in the above method embodiments are implemented.
[0191] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, database, or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memories. Non-volatile memories can include read-only memory (ROM), magnetic tapes, floppy disks, flash memories, optical memories, high-density embedded non-volatile memories, resistive random access memories (ReRAM), magnetoresistive random access memories (MRAM), ferroelectric random access memories (FRAM), phase change memories (PCM), graphene memories, etc. Volatile memories can include random access memory (RAM) or external cache memories, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The databases involved in the embodiments provided in the present application can include at least one of relational databases and non-relational databases. Non-relational databases can include distributed databases based on blockchain, etc., without limitation. The processors involved in the embodiments provided in the present application can be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, data processing logics based on quantum computing, etc., without limitation.
[0192] The technical features of the above embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.
[0193] The above-described embodiments merely represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the patent scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.
Claims
1. A device communication verification method, characterized in that: Applied to a verification platform, the verification platform includes a first agent component, an interface component, a second agent component and a data processing component, and the method includes: Using the first proxy component to send communication configuration information to a plurality of host devices, the communication configuration information being used to configure first communication data required for each of the host devices to communicate with a target slave device; Using the interface component, receiving first communication data output by each of the host devices based on the integrated circuit bus protocol, and arbitrating and determining second communication data from each of the first communication data, so as to transmit the second communication data to the second proxy component simulating the target slave device; The communication configuration information and the second communication data are acquired by utilizing the data processing component, and whether the second communication data is the target communication data to be received by the target slave device is verified according to the communication configuration information.
2. The method according to claim 1, characterized in that The first proxy component includes a first driver subcomponent, a first detection subcomponent and a sequencer component; the method of using the first proxy component to send communication configuration information to multiple host devices includes: Using the first driver subassembly, taking the preset sequence data mounted on the sequencer assembly as the communication configuration information, and transmitting the communication configuration information from the first communication port to the plurality of host devices based on a preset transmission protocol; The communication configuration information transmitted by the first communication port is acquired by utilizing the first detection subcomponent, and the communication configuration information is transmitted to the data processing component.
3. The method according to claim 1, characterized in that The interface component includes a first interface connected between the first proxy component and the plurality of host devices and a second interface connected between the second proxy component and the plurality of host devices; The first interface transmits data based on a preset transmission protocol, and the second interface transmits data based on the integrated circuit bus protocol; Using the interface component to arbitrate and determine second communication data from each of the first communication data includes: Using the second interface, based on the data transmission logic of the integrated circuit bus protocol, the clock data and the serial data in each of the first communication data are processed to obtain the second communication data; The method further comprises: The communication configuration information is transmitted to the plurality of host devices using the first interface based on the preset transmission protocol.
4. The method according to claim 1, characterized in that: The second agent component includes a second driving subcomponent and a second detecting subcomponent; the method further includes: Using the second driver subcomponent, simulating the communication behavior of the target slave device, so as to obtain the second communication data transmitted by the interface component from the second communication port, and responding to the host device corresponding to the second communication data according to the second communication data; The second communication data transmitted by the second communication port is acquired by utilizing the second detection subcomponent, and the second communication data is transmitted to the data processing component.
5. The method according to claim 4, characterized in that The second communication data at least includes a first device address, a first read / write bit, and a first data bit, and responding to a host device corresponding to the second communication data according to the second communication data includes: Determining whether the first device address is a pre-stored device address of the target slave device; If yes, returning a response signal to the host device corresponding to the second communication data through the second communication port; The transmitting the second communication data to the data processing component comprises: The first device address, the first read / write bit, and the first data bit are transmitted to the data processing component.
6. The method according to claim 5, characterized in that Verifying, using the data processing component according to the communication configuration information, whether the second communication data is target communication data to be received by the target slave device includes: Parsing the communication configuration information to obtain the target communication data; the target communication data at least includes the device address, target read / write bit and target data bit of the target slave device; Determine whether the first device address is consistent with the device address of the target slave device, determine whether the first read-write bit is consistent with the target read-write bit, and determine whether the first data bit is consistent with the target data bit; If it is determined that the first device address is consistent with the device address of the target slave device, the first read / write bit is consistent with the target read / write bit, and the first data bit is consistent with the target data bit, then the second communication data is determined to be the target communication data.
7. The method according to claim 5, characterized in that The second communication data also includes a first clock frequency for transmitting the second communication data; and the method further includes: The second detection subcomponent is used to determine a first delay time according to the first clock frequency, and to determine whether the first clock frequency meets an expected transmission condition according to the first delay time and a preset delay expected value.
8. The method according to claim 7, characterized in that The determining, according to the first delay time and the preset delay expected value, whether the first clock frequency meets the expected transmission condition includes: Determine a delay difference between the first delay time and the preset delay expected value; If the delay difference is less than a preset difference threshold, determining that the first clock frequency meets the expected transmission condition; If the delay difference is not less than the preset difference threshold, it is determined that the first clock frequency does not meet the expected transmission condition.
9. The method according to claim 7, characterized in that: The verification platform further includes a verification environment configuration component; before using the first agent component to send communication configuration information to multiple host devices, the method further includes: The verification environment configuration component is used to configure the device address of the target slave device to the second driving sub-component, and the preset delay expected value is configured to the second detection sub-component.
10. The method according to claim 2, characterized in that The verification platform further includes a register model, wherein the register model includes a plurality of simulation registers having a mapping relationship with each control register in each of the host devices, and the identifier of each of the simulation registers is the name of the corresponding control register; the method further includes: Determining a target simulation register to be verified from the register model; Determine the identifier of each target simulation register, and obtain the name of the target control register to be configured in each host device; The preset sequence data is determined according to the name of the target control register to be configured in each of the host devices.
11. A device communication verification apparatus, characterized in that: Applied to a verification platform, the verification platform includes a first agent component, an interface component, a second agent component and a data processing component, and the device includes: A configuration module, used to send communication configuration information to a plurality of host devices using the first proxy component, wherein the communication configuration information is used to configure first communication data required for each of the host devices to communicate with a target slave device; a receiving module, configured to receive, by using the interface component, first communication data output by each of the host devices based on an integrated circuit bus protocol, and arbitrate and determine second communication data from each of the first communication data, so as to transmit the second communication data to the second proxy component simulating the target slave device; A verification module is used to use the data processing component to obtain the communication configuration information and the second communication data, and verify whether the second communication data is the target communication data to be received by the target slave device according to the communication configuration information.
12. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 10 are implemented.
13. A storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 10 are implemented.
14. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 10 are implemented.
Citation Information
Patent Citations
Reusable register performance interactive verification system based on UVM and application thereof
CN116340150A
Simulation device, simulation system, simulation method thereof, and storage medium
CN117217067A
Verification system and method based on UVM and C model, storage medium and verification platform
CN118036525A
Bus interconnection verification method and device, electronic equipment, storage medium and program
CN118586052A
Multi-channel DMAC verification system and method based on UVM
CN118964251A