Multi-channel analog-to-digital converter for multi-channel frequency division multiplexing and conversion circuit and method thereof

Abstract

The invention discloses a multi-channel analog-to-digital converter for multi-channel frequency division multiplexing and a conversion circuit and method thereof, and the frequency division multiplexing multi-channel analog-to-digital conversion circuit comprises an analog frequency conversion module which is used for receiving N paths of modulation clock signals, and generating N paths of modulation clock signals according to the modulation clock signals, n paths of input signals are modulated to preset frequencies of the input signals respectively, and N paths of modulation signals are obtained; wherein N is greater than or equal to 2, and N is a positive integer; the frequency bands where the N paths of modulation signals are located are not overlapped; the analog adder is used for combining the N paths of modulation signals to obtain one path of analog signal; the input end of the analog-digital conversion module is connected with the analog-digital conversion module; the digital logic control module is used for receiving the N paths of modulation clock signals and separating the digital signals into N paths of digital signals which are output in parallel. Multi-channel analog-to-digital conversion can be realized by adopting one analog-to-digital converter, the hardware volume, cost and power consumption can be reduced, and the analog-to-digital conversion rate and precision can be improved.

Description

Technical Field

[0001] The present invention relates to the technical field of analog and mixed-signal integrated circuits, and particularly to a multi-channel analog-to-digital converter with multi-channel frequency division multiplexing, its conversion circuit and method. Background Art

[0002] An analog-to-digital converter (ADC) can convert an analog signal into a digital signal and serves as a bridge between the external world and a digital computer. The analog-to-digital converter is also a crucial part of a high-precision sensor chip, and high-precision sensors have become essential chips in fields such as industry, healthcare, and automotive.

[0003] Currently, some sensor chips integrate multiple sensors internally. Multiple analog-to-digital converters inside the sensor chip are relied on to perform analog-to-digital conversion on the signals of each sensor, resulting in high power consumption and large volume of the sensor chip. At the same time, there is a mismatch problem between the multiple analog-to-digital converters, leading to low signal accuracy. Summary of the Invention

[0004] The present invention provides a multi-channel analog-to-digital converter with multi-channel frequency division multiplexing, its conversion circuit and method to solve the problems existing in the prior art, enabling multi-channel analog-to-digital conversion to be achieved with only one analog-to-digital converter, greatly reducing the number of required analog-to-digital converters, facilitating the reduction of hardware cost and power consumption, and being beneficial to reducing the volume of the sensor chip. At the same time, it can overcome the mismatch problem between multiple analog-to-digital converters and improve the rate and accuracy of analog-to-digital conversion.

[0005] In a first aspect, the present invention provides a multi-channel analog-to-digital conversion circuit with frequency division multiplexing, characterized by comprising:

[0006] An analog frequency conversion module for receiving N modulated clock signals and modulating the input N input signals to the preset frequencies of the respective input signals according to the respective modulated clock signals to obtain N modulated signals; where N≥2 and N is a positive integer; the frequency bands where the N modulated signals are located do not overlap;

[0007] An analog adder connected to the N output terminals of the analog frequency conversion module; the analog adder is used to combine the N modulated signals to obtain one analog signal;

[0008] An analog-to-digital conversion module connected to the analog adder; the analog-to-digital conversion module is used to convert the analog signal into a digital signal;

[0009] A digital logic control module, whose input end is connected to the analog-to-digital conversion module; the digital logic control module is used to receive N modulated clock signals and separate the digital signals into N parallel output digital signals.

[0010] Optionally, the frequency-division multiplexing multi-channel analog-to-digital conversion circuit further includes: a chopper clock circuit; the chopper clock circuit is used to generate and output N modulated clock signals; wherein, the modulated clock signals of each path are orthogonal to each other.

[0011] Optionally, the analog frequency conversion module includes a chopper switch array; the chopper switch array includes N input ends, N chopper control ends and N output ends;

[0012] Each of the input ends is used to receive the corresponding input signal, each of the chopper control ends is connected to the chopper clock circuit and is used to receive the corresponding modulated clock signal; each of the output ends is respectively and correspondingly connected to the analog adder and is used to provide the modulated signal to the analog adder.

[0013] Optionally, the analog-to-digital conversion module includes: a digital-to-analog converter, a comparator and a logic control circuit;

[0014] The logic control circuit is used to output a clock control signal to control the working timing of the analog-to-digital converter;

[0015] The input end of the digital-to-analog converter is connected to the output end of the analog adder, and the output end of the digital-to-analog converter is connected to the positive end of the comparator;

[0016] The positive end of the comparator is used to receive the voltage output by the digital-to-analog converter, and the negative end of the comparator is used to receive a reference voltage; the comparator generates and outputs a comparison digital signal according to the voltage output by the digital-to-analog converter and the reference voltage.

[0017] Optionally, the frequency-division multiplexing multi-channel analog-to-digital conversion circuit further includes: N digital filters; each of the digital filters is correspondingly connected to the output end of the digital logic control module; the digital filter is used to filter out the digital signals of adjacent channels in the digital signals.

[0018] In a second aspect, the present invention provides a frequency-division multiplexing multi-channel analog-to-digital conversion method, including:

[0019] Based on analog frequency conversion, modulate the frequencies of N input signals to the preset frequencies of the input signals to obtain N modulated signals; wherein, N≥2 and N is a positive integer; the frequency bands where the N modulated signals are located do not overlap;

[0020] Based on analog signal superposition, N paths of the modulation signals are combined to obtain one path of analog signal;

[0021] Based on analog-to-digital conversion, the analog signal is converted into a digital signal;

[0022] Based on digital logic control, the digital signal is separated into N paths of digital signals with parallel output.

[0023] Optionally, based on analog frequency conversion, the frequencies of N paths of input signals are modulated to the preset frequencies of the respective input signals, including:

[0024] Based on a chopper clock circuit, N paths of modulation clock signals are generated and output; wherein, the clock signals of each path are orthogonal to each other;

[0025] According to the N paths of modulation clock signals, based on analog frequency conversion, the frequencies of the N paths of input signals are modulated to the preset frequencies of the respective input signals.

[0026] Optionally, based on digital logic control, separating the digital signal into N paths of digital signals with parallel output includes:

[0027] Based on a chopper clock circuit, N paths of modulation clock signals are generated and output; wherein, the clock signals of each path are orthogonal to each other;

[0028] According to the N paths of modulation clock signals, based on digital logic control, the digital signal is separated into N paths of digital signals with parallel output.

[0029] Optionally, after separating the digital signal into N paths of digital signals with parallel output based on digital logic control, it further includes:

[0030] Based on digital filtering, the digital signals of adjacent channels in the digital signal are filtered out.

[0031] In a third aspect, the present invention provides a frequency-division multiplexing multi-channel analog-to-digital converter, including the multi-channel frequency-division multiplexing multi-channel analog-to-digital conversion circuit described in any one of the above.

[0032] The technical solution of the present invention, a multi-channel analog-to-digital conversion circuit by frequency division multiplexing includes an analog frequency conversion module, an analog adder, an analog-to-digital conversion module, and a digital logic control module. The analog frequency conversion module is used to receive N modulated clock signals, and according to each modulated clock signal, modulate the input N input signals to the preset frequencies of the respective input signals to obtain N modulated signals, where N≥2 and N is a positive integer, and the frequency bands where the N modulated signals are located do not overlap. The analog adder is connected to the N output terminals of the analog frequency conversion module, and the analog adder is used to combine the N modulated signals to obtain one analog signal. The analog-to-digital conversion module is connected to the analog adder, and the analog-to-digital conversion module is used to convert the analog signal into a digital signal. The input terminal of the digital logic control module is connected to the analog-to-digital conversion module, and the digital logic control module is used to receive the N modulated clock signals and separate the digital signal into N parallel output digital signals, so that multi-channel analog-to-digital conversion can be achieved by using only one analog-to-digital converter, greatly reducing the number of analog-to-digital converters required, which is beneficial to reducing the hardware cost and power consumption, and is also beneficial to reducing the volume of the sensor chip. At the same time, it can overcome the mismatch problem between multiple analog-to-digital converters and improve the speed and accuracy of analog-to-digital conversion.

[0033] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present invention, nor is it used to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0035] Figure 1 It is a schematic structural diagram of a multi-channel analog-to-digital conversion circuit by frequency division multiplexing provided by an embodiment of the present invention;

[0036] Figure 2 It is a power consumption comparison diagram of the multi-channel analog-to-digital conversion circuit provided by an embodiment of the present invention and the traditional analog-to-digital conversion circuit;

[0037] Figure 3 It is an area comparison diagram of the multi-channel analog-to-digital conversion circuit provided by an embodiment of the present invention and the traditional analog-to-digital conversion circuit;

[0038] Figure 4 It is a flowchart of a multi-channel analog-to-digital conversion method by frequency division multiplexing provided by an embodiment of the present invention;

[0039] Figure 5Flow chart of another multi-channel analog-to-digital conversion method based on frequency division multiplexing provided by an embodiment of the present invention;

[0040] Figure 6 Timing diagram of the modulation clock signal of the two-channel analog-to-digital conversion circuit provided by an embodiment of the present invention;

[0041] Figure 7 Frequency domain change diagram of the two-channel analog-to-digital conversion circuit provided by an embodiment of the present invention. Detailed implementation manners

[0042] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0043] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above drawings are used to distinguish similar objects, and do not necessarily need to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention described here can be implemented in an order other than those illustrated or described here.

[0044] This embodiment provides a multi-channel analog-to-digital conversion circuit based on frequency division multiplexing. Figure 1 Structural schematic diagram of a multi-channel analog-to-digital conversion circuit based on frequency division multiplexing provided by an embodiment of the present invention. Refer to Figure 1 As shown, the multi-channel analog-to-digital conversion circuit based on frequency division multiplexing includes an analog frequency conversion module 1, an analog adder 2, an analog-to-digital conversion module 3, and a digital logic control module 4; the analog adder 2 is connected to N output terminals of the analog frequency conversion module 1; the analog-to-digital conversion module 3 is connected to the analog adder 2; the input terminal of the digital logic control module 4 is connected to the analog-to-digital conversion module 3; the analog frequency conversion module 1 is used to receive N modulation clock signals and modulate the input N input signals to their respective preset frequencies according to the respective modulation clock signals to obtain N modulated signals; the analog adder 2 is used to combine the N modulated signals to obtain one analog signal; the analog-to-digital conversion module 3 is used to convert the analog signal into a digital signal; the digital logic control module 4 is used to receive N modulation clock signals and separate the digital signal into N digital signals output in parallel.

[0045] Among them, N is the number of signal channels of the frequency-division multiplexed multi-channel analog-to-digital conversion circuit, N≥2, and N is a positive integer. That is, the frequency-division multiplexed multi-channel analog-to-digital conversion circuit can be an analog-to-digital conversion circuit with two or more channels, and can realize the analog-to-digital conversion of two or more signals using one analog-to-digital converter. The frequency bands where the N modulated signals are located do not overlap, so that after the modulated signals are combined and superimposed by the analog adder 2, they can be demodulated according to the frequency bands where they are located, so that the digital logic control module 4 can separate the received digital signal into N digital signals corresponding one by one to the input signals, realizing the analog-to-digital conversion of multi-channel signals.

[0046] Specifically, the N input signals are respectively input to the analog frequency conversion module 1. At the same time, the analog frequency conversion module 1 modulates the N input signals to the frequencies related to the corresponding modulation clock signals, that is, the preset frequencies, according to the N received modulation clock signals, so as to obtain N modulated signals.

[0047] The analog adder 2 adds and combines the N modulated signals output by the analog frequency conversion module 1 to obtain an analog signal, and then the analog-to-digital conversion module 3 converts the combined analog signal into a digital signal. Among them, the analog-to-digital conversion module 3 is a single-channel analog-to-digital converter, and the information of the N signals is included in the output digital signal. To obtain the information of each signal, signal demodulation is still needed.

[0048] The digital signal output by the analog-to-digital conversion module 3 is input to the digital logic control module 4. Under the control of the N received modulation clock signals, the digital logic control module 4 separates the digital signal into N digital signals output in parallel, where the N digital signals are respectively the digital signals corresponding to the N input signals.

[0049] In an alternative embodiment, continue to refer to Figure 1 As shown, the frequency-division multiplexed multi-channel analog-to-digital conversion circuit further includes: N digital filters 5; each digital filter 5 is correspondingly connected to the output end of the digital logic control module 4; the digital filter 5 is used to filter out the digital signals of adjacent channels in the digital signal, so that the frequency of each signal is restored to the initial state, that is, the state when each signal is input, improving the accuracy of the signal after analog-to-digital conversion.

[0050] In this embodiment, the multi-channel analog-to-digital conversion circuit through frequency division multiplexing includes an analog frequency conversion module, an analog adder, an analog-to-digital conversion module, and a digital logic control module. The analog frequency conversion module is used to receive N modulated clock signals, and according to each modulated clock signal, modulate the input N input signals to their respective preset frequencies to obtain N modulated signals, where N≥2 and N is a positive integer, and the frequency bands where the N modulated signals are located do not overlap. The analog adder is connected to the N output terminals of the analog frequency conversion module, and the analog adder is used to combine the N modulated signals to obtain one analog signal. The analog-to-digital conversion module is connected to the analog adder, and the analog-to-digital conversion module is used to convert the analog signal into a digital signal. The input terminal of the digital logic control module is connected to the analog-to-digital conversion module, and the digital logic control module is used to receive the N modulated clock signals and separate the digital signal into N parallel output digital signals, so that multi-channel analog-to-digital conversion can be achieved with only one analog-to-digital converter, greatly reducing the number of analog-to-digital converters required, which is beneficial to reducing the hardware cost and power consumption, and is also beneficial to reducing the volume of the sensor chip. At the same time, it can overcome the mismatch problem between multiple analog-to-digital converters and improve the speed and accuracy of analog-to-digital conversion.

[0051] Optionally, continuing to refer to Figure 1 As shown, the multi-channel analog-to-digital conversion circuit through frequency division multiplexing further includes: a chopper clock circuit 6; the chopper clock circuit 6 is used to generate and output N modulated clock signals.

[0052] Among them, the modulated clock signals of each path are orthogonal to each other, so that the input signals of each path are quadrature modulated by the analog frequency conversion module, so that the frequency bands of the modulated signals output by the analog frequency conversion module do not overlap.

[0053] Optionally, continuing to refer to Figure 1 As shown, the analog frequency conversion module 1 includes a chopper switch array 11; the chopper switch array 11 includes N input terminals, N chopper control terminals, and N output terminals; each input terminal is used to receive the corresponding input signal, each chopper control terminal is connected to the chopper clock circuit 6 and is used to receive the corresponding modulated clock signal; each output terminal is respectively connected to the analog adder 2 one by one and is used to provide the modulated signal to the analog adder 2.

[0054] Among them, the chopper switch array 11 includes N chopper switches 111. The N input terminals of the chopper switch array 11 respectively receive N input signals, and each chopper control terminal respectively receives a corresponding modulation clock signal. Each chopper switch 111 performs on-off switching under the control of the corresponding modulation clock signal, so as to realize the positive and negative access of each input signal. Exemplarily, the modulation clock signal is a periodic signal with positive and negative alternation. When the input signal is positively accessed, the output modulation signal is the product of the input signal and the frequency of the modulation clock signal, so that the input signal is modulated to a preset frequency to obtain a modulation signal.

[0055] Specifically, the chopper clock circuit 6 generates and outputs N mutually orthogonal modulation clock signals CLKchop1, CLKchop2... CLKchopn. The N chopper switches 111 respectively receive the corresponding modulation clock signals and perform on-off switching under the control of the modulation clock signals. When the chopper switch 111 is turned on, the input signal of this path is modulated to the preset frequency and input into the analog adder 2. Exemplarily, the modulation clock signal CLKchop1 controls the first channel. When the modulation clock signal CLKchop1 is at a high level, the first input signal V1 is positively accessed to the analog adder 2. The first input signal V1 is modulated to the preset frequency of the first input signal V1 by the modulation clock signal CLKchop1 to obtain the first modulation signal Vchop1, where Vchop1 = V1 * CLKchop1. The modulation clock signal CLKchop2 controls the second channel. When the modulation clock signal CLKchop2 is at a high level, the second input signal V2 is positively accessed to the analog adder 2. The second input signal V2 is modulated to the preset frequency of the first input signal V2 by the modulation clock signal CLKchop2 to obtain the second modulation signal Vchop2, where Vchop2 = V2 * CLKchop2. Similarly, the third channel, the fourth channel... the Nth channel are all modulated to their preset frequencies by the corresponding modulation clock signals to obtain each modulation signal and access the analog adder 2. After the parallel modulation signals Vchop1, Vchop2... Vchopn enter the analog adder 2, the analog adder 2 combines the signals into one analog signal V0, where Vo = Vchop1 + Vchop2 +...

[0056] +Vchopn = V1 * CLKchop1 + V2 * CLKchop2 + Vn * CLKchopn.

[0057] Optionally, continue to refer to Figure 1As shown in the figure, the analog-to-digital conversion module 3 includes a digital-to-analog converter 31, a comparator 32, and a logic control circuit 33. The logic control circuit 33 is used to output a clock control signal to control the working timing of the analog-to-digital converter. The input end of the digital-to-analog converter 31 is connected to the output end of the analog adder 2, and the output end of the digital-to-analog converter 31 is connected to the positive terminal of the comparator 32. The positive terminal of the comparator 32 is used to receive the voltage output by the digital-to-analog converter 31, and the negative terminal of the comparator 32 is used to receive the reference voltage. The comparator 32 generates and outputs a comparison digital signal according to the voltage output by the digital-to-analog converter 31 and the reference voltage.

[0058] Specifically, the logic control circuit 33 outputs a clock control signal to the digital-to-analog converter 31. The digital-to-analog converter 31 changes the reference voltage supplied to the comparator 32 under the control of the clock control signal. After multiple judgments by the comparator 32, an analog-to-digital conversion is completed. The analog-to-digital conversion module 3 outputs a digital signal, that is, the digital code dout. Among them,

[0059] Dout = D * V0 = D(V1 * CLKchop1 + V2 * CLKchop2 + Vn * CLKchopn), where D is the digital code for each analog-to-digital conversion.

[0060] Subsequently, the digital code dout output by the analog-to-digital conversion module 3 is received by the digital logic control module 4. The digital logic control module 4 demodulates the digital code dout according to the N modulated clock signals output by the chopper clock circuit 6, and then filters it through the digital filter 5 and outputs N digital signals dout1, dout2, doutn in parallel. Among them, the digital signal dout1 corresponds to the input signal V1, the digital signal dout2 corresponds to the input signal V2,..., and the digital signal doutn corresponds to the input signal Vn.

[0061] Figure 2 This is the power consumption comparison diagram of the multi-channel analog-to-digital conversion circuit provided by the embodiment of the present invention and the traditional analog-to-digital conversion circuit. Refer to Figure 2 It can be seen that in the case of four channels, the power consumption of the multi-channel analog-to-digital conversion circuit provided by this embodiment is reduced by 75% compared with the power consumption of the traditional analog-to-digital conversion circuit. In the case of sixteen channels, the power consumption of the multi-channel analog-to-digital conversion circuit provided by this embodiment is reduced by 93% compared with the power consumption of the traditional analog-to-digital conversion circuit. It can be seen that the more channels the multi-channel analog-to-digital conversion circuit provided by this embodiment has, the greater the proportion of power consumption that can be saved.

[0062] Figure 3 This is the area comparison diagram of the multi-channel analog-to-digital conversion circuit provided by the embodiment of the present invention and the traditional analog-to-digital conversion circuit. Refer to Figure 3It can be seen that in the case of four channels, the area of the multi-channel analog-to-digital conversion circuit provided in this embodiment is reduced by 71% compared to the area of the traditional analog-to-digital conversion circuit. In the case of sixteen channels, the area of the multi-channel analog-to-digital conversion circuit provided in this embodiment is reduced by 90% compared to the area of the traditional analog-to-digital conversion circuit. It can be seen that the more channels the multi-channel analog-to-digital conversion circuit provided in this embodiment has, the greater the proportion of area that can be saved.

[0063] Based on the same inventive concept, this embodiment also provides a frequency-division multiplexing multi-channel analog-to-digital conversion method, which is implemented based on the frequency-division multiplexing multi-channel analog-to-digital conversion circuit provided in any of the above embodiments. Figure 4 It is a flowchart of a frequency-division multiplexing multi-channel analog-to-digital conversion method provided by an embodiment of the present invention. Refer to Figure 4 As shown, this analog-to-digital conversion method includes:

[0064] S110. Modulate the frequencies of N input signals to the preset frequencies of the respective input signals based on analog frequency conversion to obtain N modulated signals.

[0065] Wherein, N≥2 and N is a positive integer; the frequency bands where the N modulated signals are located do not overlap.

[0066] S120. Combine the N modulated signals based on analog signal superposition to obtain one analog signal.

[0067] S130. Convert the analog signal into a digital signal based on analog-to-digital conversion.

[0068] S140. Separate the digital signal into N parallel output digital signals based on digital logic control.

[0069] S150. Filter out the digital signals of adjacent channels in the digital signal based on digital filtering.

[0070] Figure 5 It is a flowchart of another frequency-division multiplexing multi-channel analog-to-digital conversion method provided by an embodiment of the present invention. Based on the above embodiment, this embodiment further adds how to generate and output N modulated clock signals based on the chopper clock circuit 6, and how to separate the digital signal into N parallel output digital signals based on digital logic control. Refer to Figure 5 As shown, this method specifically includes:

[0071] S210. Generate and output N modulated clock signals based on the chopper clock circuit; wherein, the clock signals of each path are orthogonal to each other.

[0072] S220. Modulate the frequencies of N input signals to the preset frequencies of the respective input signals based on analog frequency conversion according to the N modulated clock signals.

[0073] Wherein, N≥2 and N is a positive integer; the frequency bands of the N-channel modulation signals do not overlap.

[0074] S230. Based on analog signal superposition, combine the N-channel modulation signals to obtain an analog signal.

[0075] S240. Convert the analog signal into a digital signal based on analog-to-digital conversion.

[0076] S250. According to the N-channel modulation clock signals, separate the digital signal into N-channel digital signals with parallel output based on digital logic control

[0077] S260. Filter out the digital signals of adjacent channels in the digital signal based on digital filtering.

[0078] Specifically, the chopping clock circuit 6 generates and outputs N-channel modulation clock signals CLKchop1, CLKchop2... CLKchopn that are orthogonal to each other. The N-channel chopping switches 111 respectively receive the corresponding modulation clock signals and perform on-off switching under the control of the modulation clock signals. Thus, when the chopping switch 111 is turned on, the input signal of this path is modulated to a preset frequency and input into the analog adder 2. Exemplarily, the modulation clock signal CLKchop1 controls the first channel. When the modulation clock signal CLKchop1 is at a high level, the first input signal V1 is connected to the analog adder 2 in a positive direction. The first input signal V1 is modulated to the preset frequency of the first input signal V1 by the modulation clock signal CLKchop1 to obtain the first modulation signal Vchop1, where Vchop1 = V1 * CLKchop1. The modulation clock signal CLKchop2 controls the second channel. When the modulation clock signal CLKchop2 is at a high level, the second input signal V2 is connected to the analog adder 2 in a positive direction. The second input signal V2 is modulated to the preset frequency of the first input signal V2 by the modulation clock signal CLKchop2 to obtain the second modulation signal Vchop2, where Vchop2 = V2 * CLKchop2. Similarly, the third channel, the fourth channel... the Nth channel are all modulated to their preset frequencies by the corresponding modulation clock signals to obtain each path of modulation signals and input them into the analog adder 2. After the parallel modulation signals Vchop1, Vchop2... Vchopn enter the analog adder 2, the analog adder 2 combines the signals into an analog signal V0, where Vo = Vchop1 + Vchop2 +...

[0079] +Vchopn = V1 * CLKchop1 + V2 * CLKchop2 + Vn * CLKchopn. The logic control circuit 33 outputs a clock control signal to the digital-to-analog converter 31. The digital-to-analog converter changes the reference voltage supplied to the comparator 32 under the control of the clock control signal. After multiple judgments by the comparator 32, an analog-to-digital conversion is completed. The analog-to-digital conversion module 3 outputs a digital signal, that is, the digital code dout. Among them, Dout = D * V0 = D(V1 * CLKchop1 + V2 * CLKchop2 + Vn * CLKchopn), and D is the digital code for each analog-to-digital conversion. The digital code dout output by the analog-to-digital conversion module 3 is received by the digital logic control module 4. The digital logic control module 4 demodulates the digital code dout according to the N-channel modulation clock signals output by the chopping clock circuit 6, and then filters it through the digital filter 5 to parallel output N-channel digital signals dout1, dout2, doutn. Among them, the digital signal dout1 corresponds to the input signal V1, the digital signal dout2 corresponds to the input signal V2,..., and the digital signal doutn corresponds to the input signal Vn.

[0080] Taking the two-channel analog-to-digital conversion as an example, the frequency-division multiplexing two-channel analog-to-digital conversion circuit and the analog-to-digital conversion method provided by this embodiment will be described in detail as follows:

[0081] Figure 6 It is the timing diagram of the modulation clock signal of the two-channel analog-to-digital conversion circuit provided by the embodiment of the present invention. Figure 7 It is the frequency-domain change diagram of the two-channel analog-to-digital conversion circuit provided by the embodiment of the present invention. With reference to Figure 1 、 Figure 6 and Figure 7 shown, CLKchop1 is the modulation clock signal of the first input signal V1, and CLKchop2 is the modulation clock signal of the second input signal V2. According to the orthogonal relationship between the modulation clock signal CLKchop1 and the modulation clock signal CLKchop2, V1 and V2 are orthogonally modulated as follows:

[0082] In the first channel, when the modulation clock signal CLKchop1 is at a high level, the input signal V1 is positively connected to the analog adder 2. The first input signal V1 is modulated by the modulation clock signal CLKchop1 to the preset frequency of the first input signal V1, obtaining the first modulated signal Vchop1, where Vchop1 = V1 * CLKchop1. The modulation clock signal CLKchop2 controls the second channel. When the modulation clock signal CLKchop2 is at a high level, the second input signal V2 is positively connected to the analog adder 2. The second input signal V2 is modulated by the modulation clock signal CLKchop2 to the preset frequency of the first input signal V2, obtaining the second modulated signal Vchop2, where Vchop2 = V2 * CLKchop2.

[0083] After the two modulated signals Vchop1 and Vchop2 in parallel enter the analog adder 2 after being modulated, the analog adder 2 combines the signals into one analog signal V0, where Vo =

[0084] Vchop1 + Vchop2.

[0085] The analog-to-digital converter converts the output Vo of the analog adder 2. Under the control of the clock control signal output by the sequential logic circuit, the digital-to-analog converter 31 changes the reference voltage supplied to the comparator 32. After multiple judgments by the comparator 32, an analog-to-digital conversion is completed. The digital code output by the analog-to-digital conversion is Dout, where Dout = D(V1 * CLKchop1 + V2 * CLKchop2).

[0086] The digital code dout output by the analog-to-digital conversion module 3 is received by the digital logic control module 4. The digital logic control module 4 demodulates the digital code dout according to the two modulation clock signals output by the chopping clock circuit 6, and then filters it through the digital filter 5, and outputs two digital signals dout1 and dout2 in parallel, where the digital signal dout1 corresponds to the input signal V1, and the digital signal dout2 corresponds to the input signal V2.

[0087] Based on the same concept, this embodiment also provides a frequency-division multiplexing multi-channel analog-to-digital converter, including the multi-channel frequency-division multiplexing multi-channel analog-to-digital conversion circuit provided in any of the above embodiments. Since the frequency-division multiplexing multi-channel analog-to-digital converter provided in this embodiment includes the multi-channel frequency-division multiplexing multi-channel analog-to-digital conversion circuit provided in any embodiment of the present invention, it has the corresponding structure and beneficial effects of the analog-to-digital conversion circuit. The same parts can be seen in the above description and will not be repeated here.

[0088] The above specific embodiments do not constitute a limitation on the protection scope of the present invention. Those skilled in the art should understand that various modifications, combinations, sub - combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A frequency division multiplexing multi-channel analog-to-digital conversion circuit, characterized in that: include: An analog frequency conversion module, used for receiving N-channel modulation clock signals, and modulating the input N-channel input signals to the preset frequencies of the input signals according to the modulation clock signals, to obtain N-channel modulation signals; wherein N≥2, and N is a positive integer; and the frequency bands of the N-channel modulation signals do not overlap; An analog adder connected to the N output terminals of the analog frequency conversion module; the analog adder is used to combine the N channels of modulated signals to obtain one channel of analog signal; An analog-to-digital conversion module, connected to the analog adder; the analog-to-digital conversion module is used to convert the analog signal into a digital signal; A digital logic control module, whose input end is connected to the analog-to-digital conversion module; the digital logic control module is used to receive N-channel modulated clock signals and separate the digital signals into N-channel digital signals for parallel output.

2. The frequency division multiplexing multi-channel analog-to-digital conversion circuit according to claim 1, characterized in that: Also includes: Chopper clock circuit; The chopping clock circuit is used to generate and output N channels of the modulated clock signals; wherein the modulated clock signals are orthogonal to each other.

3. The frequency division multiplexing multi-channel analog-to-digital conversion circuit according to claim 2, characterized in that: The analog frequency conversion module includes a chopper switch array; the chopper switch array includes N input terminals, N chopper control terminals and N output terminals; Each of the input terminals is used to receive the corresponding input signal, and each of the chopping control terminals is connected to the chopping clock circuit to receive the corresponding modulated clock signal; Each of the output ends is connected to the analog adder in a one-to-one correspondence, and is used to provide the modulation signal to the analog adder.

4. The frequency division multiplexing multi-channel analog-to-digital conversion circuit according to claim 1, characterized in that: The analog-to-digital conversion module includes: a digital-to-analog converter, a comparator and a logic control circuit; The logic control circuit is used to output a clock control signal to control the working timing of the analog-to-digital converter; The input end of the digital-to-analog converter is connected to the output end of the analog adder, and the output end of the digital-to-analog converter is connected to the positive end of the comparator; The positive terminal of the comparator is used to receive the voltage output by the digital-to-analog converter, and the negative terminal of the comparator is used to receive a reference voltage; the comparator generates and outputs a comparison digital signal according to the voltage output by the digital-to-analog converter and the reference voltage.

5. The frequency division multiplexing multi-channel analog-to-digital conversion circuit according to claim 1, characterized in that: Also includes: N-channel digital filter; Each of the digital filters is connected to the output end of the digital logic control module in a one-to-one correspondence; the digital filter is used to filter out the digital signals of adjacent channels in the digital signal.

6. A frequency division multiplexing multi-channel analog-to-digital conversion method, characterized in that: include: Based on analog frequency conversion, the frequencies of N input signals are modulated to the preset frequencies of the input signals to obtain N modulated signals; wherein N ≥ 2, and N is a positive integer; and the frequency bands of the N modulated signals do not overlap; Based on analog signal superposition, the N channels of modulated signals are combined to obtain one channel of analog signal; Converting the analog signal into a digital signal based on analog-to-digital conversion; The digital signal is separated into N digital signals for parallel output based on digital logic control.

7. The frequency division multiplexing multi-channel analog-to-digital conversion method according to claim 6, characterized in that: Modulating the frequencies of N input signals to preset frequencies of the input signals based on analog frequency conversion includes: Generate and output N modulated clock signals based on a chopping clock circuit; wherein the clock signals are orthogonal to each other; According to the N modulation clock signals, based on analog frequency conversion, the frequencies of the N input signals are modulated to the preset frequencies of the input signals.

8. The frequency division multiplexing multi-channel analog-to-digital conversion method according to claim 6, characterized in that: The digital signal is separated into N digital signals for parallel output based on digital logic control, including: Generate and output N modulated clock signals based on a chopping clock circuit; wherein the clock signals are orthogonal to each other; According to the N modulated clock signals, the digital signal is separated into N digital signals output in parallel based on digital logic control.

9. The frequency division multiplexing multi-channel analog-to-digital conversion method according to claim 6, characterized in that: After separating the digital signal into N digital signals for parallel output based on digital logic control, the method further includes: The digital signals of adjacent channels in the digital signal are filtered out based on digital filtering.

10. A frequency division multiplexing multi-channel analog-to-digital converter, characterized in that: A multi-channel analog-to-digital conversion circuit comprising the multi-channel frequency division multiplexing as claimed in any one of claims 1 to 5.

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