Embedded power module and intelligent device

Abstract

The invention provides an embedded power module and intelligent equipment, and belongs to the field of embedded packaging. A first direct current path is arranged on the first circuit board layer, an alternating current path and the first direct current path or a second direct current path is arranged on the second circuit board layer, and a second direct current path and the alternating current path are arranged on the third circuit board layer. The alternating current paths located on the third circuit board layer and the alternating current paths located on the second circuit board layer are arranged in a staggered mode. The direction of the first direct-current path is opposite to that of the alternating-current path and that of the second direct-current path, the first direct-current path, the alternating-current path and the second direct-current path which are located on different layers are stacked and parallel to one another, and magnetic fields in opposite directions are generated, so that the generated magnetic fields can be mutually stacked and counteracted. After the magnetic fields in the opposite directions are mutually superposed and offset, the parasitic inductance of the embedded power module is reduced, and the problem that the parasitic inductance of a traditional power module is large is solved.

Description

Technical Field

[0001] This application belongs to the technical field of embedded packaging, and particularly relates to an embedded power module and an intelligent device. Background Art

[0002] The third-generation wide-bandgap semiconductor silicon carbide (SiC) power devices and gallium nitride (GaN) power devices have the advantage of fast switching speed. However, since the fast switching speed of power devices leads to a high rate of current change, a large parasitic inductance will generate voltage spikes and form voltage stress. If the voltage stress generated during operation exceeds the blocking voltage of the device, it will cause serious damage to the device, resulting in breakdown, and even damage to the backend application load.

[0003] In order to prevent the voltage stress from exceeding the blocking voltage of the power device during operation, it is necessary to reduce the parasitic inductance (also known as stray inductance) of the power device. Among them, printed circuit board (PCB) embedded packaging is one of the technical routes for low stray inductance power devices and has received extensive attention. However, parasitic inductance is ubiquitous in the PCB structure of traditional power modules, originating from parts such as wiring and connection lines, resulting in a large parasitic inductance. Summary of the Invention

[0004] The purpose of this application is to provide an embedded power module and an intelligent device, aiming to solve the problem of large parasitic inductance existing in traditional power modules.

[0005] This application provides an embedded power module, including: a first circuit board layer, a second circuit board layer, and a third circuit board layer stacked in sequence, wherein,

[0006] The first circuit board layer is provided with a first DC path;

[0007] The second circuit board layer is provided with an AC path and the first DC path or a second DC path;

[0008] The third circuit board layer is provided with the second DC path and the AC path, and the AC path located on the third circuit board layer and the AC path located on the second circuit board layer are arranged in an interleaved manner;

[0009] Wherein, the current direction of the first DC path is opposite to the current direction of the AC path and the current direction of the second DC path respectively; the first DC path, the AC path, and the second DC path are connected.

[0010] In one embodiment, the embedded power module further includes a chip placement layer disposed between the second circuit board layer and the third circuit board layer, and a first power chip and a second power chip are spaced apart in the chip placement layer;

[0011] The first power chip is connected to the second DC path located on the third circuit board layer and the AC path located on the second circuit board layer;

[0012] The second power chip is connected to the AC path located on the third circuit board layer and the first DC path or the second DC path located on the second circuit board layer;

[0013] The chip placement layer includes a fourth circuit board layer, a first insulating layer, and a fifth circuit board layer stacked.

[0014] In one embodiment, a first conductive recess and a second conductive recess are spaced apart in the chip placement layer;

[0015] The first power chip is disposed in the first conductive recess, and the second power chip is disposed in the second conductive recess;

[0016] The first conductive recess is connected to the second DC path located on the third circuit board layer, the first power chip is connected to the AC path located on the second circuit board layer, the second conductive recess is connected to the AC path located on the third circuit board layer, and the second power chip is connected to the first DC path or the second DC path located on the second circuit board layer.

[0017] In one embodiment, the DC current signal flows through the second DC path to the first DC path.

[0018] In one embodiment, the drain of the first power chip is connected to the second DC path, and the source of the first power chip is connected to the AC path located on the second circuit board layer;

[0019] The drain of the second power chip is connected to the AC path located on the third circuit board layer, and the source of the second power chip is connected to the first DC path or the second DC path located on the second circuit board layer.

[0020] In one embodiment, the DC current signal flows through the first DC path to the second DC path.

[0021] In one embodiment, the first DC path located on the first circuit board layer extends to the second circuit board layer through at least one first via;

[0022] The AC path located on the second circuit board layer extends to the third circuit board layer through at least one second via.

[0023] In one embodiment, the first DC path and the second DC path are arranged opposite to each other, and the first DC path and the AC path are arranged opposite to each other.

[0024] In one embodiment, the sum of the paths of the second DC path and the AC path is the same as that of the first DC path.

[0025] In one embodiment, the first circuit board layer is provided with a first drive signal path and a second drive signal path, and the first drive signal path, the second drive signal path, and the first DC path are arranged at intervals.

[0026] In one embodiment, the embedded power module further includes:

[0027] A sixth circuit board layer, stacked on the side of the third circuit board layer away from the second circuit board layer.

[0028] The present application provides an embedded power module, including: a first circuit board layer, a second circuit board layer, and a fourth circuit board layer stacked in sequence;

[0029] The first circuit board layer is provided with a first DC path;

[0030] The second circuit board layer is provided with an AC path;

[0031] The fourth circuit board layer is provided with a second DC path, located on the fourth circuit board layer;

[0032] Wherein, the second DC path located on the fourth circuit board layer and the AC path located on the second circuit board layer are arranged alternately;

[0033] The current directions of the first DC path are opposite to the current directions of the AC path and the second DC path respectively; the first DC path, the AC path, and the second DC path are connected.

[0034] In one embodiment, the AC path and the second DC path are arranged at intervals on the second circuit board layer;

[0035] The second DC path located on the fourth circuit board layer, the AC path located on the second circuit board layer, and the second DC path located on the second circuit board layer are arranged alternately.

[0036] In one embodiment, a third conductive recess and a fourth conductive recess are spaced apart within the fourth circuit board layer. A first power chip is disposed within the third conductive recess, and a second power chip is disposed within the fourth conductive recess;

[0037] The third conductive recess is connected to the second DC path located in the fourth circuit board layer. The first power chip is connected to the AC path located in the second circuit board layer. The fourth conductive recess is connected to the AC path located in the second circuit board layer. The second power chip is connected to the first DC path located in the first circuit board layer.

[0038] In one embodiment, the embedded power module further includes a first insulating layer and a fifth circuit board layer stacked on top of each other. The first insulating layer and the fifth circuit board layer are disposed on a side of the fourth circuit board layer away from the second circuit board layer;

[0039] A first insulating and heat-conducting portion and a second insulating and heat-conducting portion are spaced apart within the first insulating layer;

[0040] A first conductive portion and a second conductive portion are spaced apart within the fifth circuit board layer;

[0041] The third conductive recess, the first insulating and heat-conducting portion, and the first conductive portion are disposed opposite to each other. The fourth conductive recess, the second insulating and heat-conducting portion, and the second conductive portion are disposed opposite to each other.

[0042] This application provides an intelligent device, including at least one embedded power module as described in any one of the above embodiments.

[0043] The beneficial effects of the embodiments of the present invention compared with the prior art are as follows:

[0044] In the embedded power module provided by this application, the first DC path located in the first circuit board layer, the AC path located in the second circuit board layer and the first DC path or the second DC path, the second DC path and the AC path located in the third circuit board layer form stacked and parallel current paths. The first DC path located in the first circuit board layer and the AC path located in the second circuit board layer are current paths in opposite directions, capable of generating magnetic fields in opposite directions. The first DC path located in the first circuit board layer and the second DC path located in the third circuit board layer are current paths in opposite directions, capable of generating magnetic fields in opposite directions. The first DC path located in the first circuit board layer and the second DC path and the AC path located in the third circuit board layer are current paths in opposite directions, capable of generating magnetic fields in opposite directions. The first DC path located in the second circuit board layer and the AC path located in the third circuit board layer are current paths in opposite directions, capable of generating magnetic fields in opposite directions.

[0045] Furthermore, the first DC path, AC path, and second DC path located on different circuit board layers are connected, which can respectively provide the required current signals for each power chip in the embedded power module. The first DC path, AC path, and second DC path located on different circuit board layers are stacked and parallel to each other, and generate magnetic fields in opposite directions, so that the generated magnetic fields can be superimposed and canceled out. After the magnetic fields in opposite directions are superimposed and canceled out, the total magnetic field strength decreases, reducing the parasitic inductance (also called stray inductance) of the embedded power module, which can ensure the safe operation of the embedded power module.

[0046] Therefore, the parasitic inductance of the embedded power module provided by this application is reduced, the voltage spike during the switching instant is reduced, the switching loss of the embedded power module can be reduced, the risk of overvoltage is reduced, and the voltage platform of the whole vehicle is further improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the technical solutions in the embodiments of this application, the following will briefly introduce the drawings required for use in the embodiments or exemplary technical descriptions. Obviously, the drawings in the following description are only some embodiments of this application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0048] Figure 1 Schematic diagram of the stacked structure of the second DC path to the first DC path of the embedded power module provided by this application.

[0049] Figure 2 Schematic diagram of the stacked structure of the second DC path to the first DC path of the embedded power module provided by this application.

[0050] Figure 3 Schematic diagram of the stacked structure of the first DC path to the second DC path of the embedded power module provided by this application.

[0051] Figure 4 Schematic diagram of the overall stacked structure of the embedded power module provided by this application.

[0052] Figure 5 Schematic diagram of the structure of the power chip of the embedded power module provided by this application.

[0053] Figure 6 Schematic diagram of the structure of the power chip of the embedded power module provided by this application.

[0054] Figure 7Schematic diagrams of the first conductive recess and the second conductive recess respectively corresponding to the first power chip and the second power chip in some embodiments provided by the present application.

[0055] Figure 8 Schematic diagram of the half-bridge inverter circuit formed by the embedded power module provided by the present application.

[0056] Figure 9 Schematic diagram of the full-bridge inverter circuit formed by the embedded power module provided by the present application.

[0057] Figure 10 Cross-sectional schematic diagram of the front view of the via hole and the drive signal path of the embedded power module in some embodiments provided by the present application.

[0058] Figure 11 Top view of the first circuit board layer in some embodiments provided by the present application.

[0059] Figure 12 Schematic diagram of the stacked structure from the second DC path to the first DC path of the embedded power module in some embodiments provided by the present application.

[0060] Figure 13 Schematic diagram of the stacked structure of the conductive recess, the insulating and heat-conducting part, and the conductive part in some embodiments provided by the present application.

[0061] Figure 14 Schematic diagram of the stacked structure from the second DC path to the first DC path of the embedded power module in some embodiments provided by the present application. Detailed implementation manners

[0062] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application clearer and more understandable, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0063] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0064] It should be understood that the orientation or positional relationship indicated by terms such as "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present application.

[0065] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present application, "a plurality" means two or more, unless otherwise specifically defined.

[0066] Please refer to Figure 1 , the present application provides an embedded power module 100. The embedded power module 100 includes a first circuit board layer 10, a second circuit board layer 20, and a third circuit board layer 30. The first circuit board layer 10 is provided with a first DC path 410. The second circuit board layer 20 is provided with an AC path 420 and the first DC path 410 or a second DC path 430. As Figure 2 shown, the second circuit board layer 20 is provided with an AC path 420 and a second DC path 430. The second circuit board layer 20 and the first circuit board layer 10 are stacked.

[0067] The third circuit board layer 30 is provided with a second DC path 430 and an AC path 420. The second circuit board layer 20 is stacked between the first circuit board layer 10 and the third circuit board layer 30. The AC path 420 located on the third circuit board layer 30 and the AC path 420 located on the second circuit board layer 20 are arranged in an interleaved manner.

[0068] Among them, the current direction of the first DC path 410 is opposite to the current directions of the AC path 420 and the second DC path 430 respectively. The first DC path 410, the AC path 420, and the second DC path 430 are connected.

[0069] In this embodiment, the first circuit board layer 10, the second circuit board layer 20, and the third circuit board layer 30 can be metal layers or alloy layers, such as copper layers, silver layers, or copper alloy layers, etc. The first circuit board layer 10 and the second circuit board layer 20 are stacked with an insulating layer therebetween, which can be understood as being stacked between the first circuit board layer 10 and the second circuit board layer 20 and being insulated from each other. The third circuit board layer 30 and the second circuit board layer 20 are stacked with an insulating layer therebetween, which can be understood as being stacked between the third circuit board layer 30 and the second circuit board layer 20 and being insulated from each other.

[0070] The first circuit board layer 10 forms a first DC path 410 through a series of processing techniques (such as photolithography and etching, etc.). The first DC path 410 can be understood as the flow path of the DC signal along a direction, or can be understood as the metal line through which the DC signal flows along a direction, serving as the transmission channel for the DC signal. As Figure 1 shown, the direction can be the current flow direction towards the negative pole DC- of the power supply. As Figure 3 shown, the direction can also be the current flow direction flowing out from the positive pole DC+ of the power supply, and can be set according to the actual situation.

[0071] The second circuit board layer 20 is provided with an AC path 420 and the first DC path 410 or the second DC path 430. It can be understood that the AC path 420 located on the second circuit board layer 20 and the first DC path 410 are arranged at intervals on the same circuit board layer, and are independent paths from each other, isolated and not connected. Or, the AC path 420 located on the second circuit board layer 20 and the second DC path 430 are arranged at intervals on the same circuit board layer, and are two independent paths from each other, isolated and not connected.

[0072] The second circuit board layer 20 forms the AC path 420 and the first DC path 410 or the second DC path 430 through a series of processing techniques (such as photolithography and etching, etc.). The DC signal flowing through the first DC path 410 located on the second circuit board layer 20 and the first DC path 410 located on the first circuit board layer 10 flows in the first direction, which is the same flow direction. The AC signal flowing through the AC path 420 located on the second circuit board layer 20 and the AC path 420 located on the third circuit board layer 30 has the same flow direction. The DC signal flowing through the second DC path 430 located on the second circuit board layer 20 and the second DC path 430 located on the third circuit board layer 30 flows in the second direction, which is the same flow direction. In this application, the first direction and the second direction are the current flow directions.

[0073] The second DC path 430 located on the second circuit board layer 20 can be understood as the flowing path of the DC signal along the second direction, or as the metal line through which the DC signal flows along the second direction, serving as the transmission channel for the DC signal. The second direction can be the flowing direction of the current flowing towards the negative electrode DC- of the power supply, or the flowing direction of the current flowing out from the positive electrode DC+ of the power supply, and can be set according to the actual situation. The direction is completely opposite to the other direction, and the two directions can be set according to the actual situation. For example: the first direction is the current direction flowing towards the negative electrode DC- of the power supply, and the second direction is the current direction flowing out from the positive electrode DC+ of the power supply; or, the first direction is the current direction flowing out from the positive electrode DC+ of the power supply, and the second direction is the current direction flowing towards the negative electrode DC- of the power supply. The flowing direction of the second DC path 430 and the flowing direction of the AC path 420 are both the second direction, which is the same flowing direction and opposite to the first direction.

[0074] The AC path 420 located on the second circuit board layer 20 can be understood as the flowing path of the alternating current (AC) signal along the second direction, or as the metal line through which the AC signal flows along the second direction, serving as the transmission channel for the AC signal. The AC signal is a signal formed by alternately controlling the conduction or cutoff between multiple power chips in the embedded power module 100.

[0075] The third circuit board layer 30 is provided with the second DC path 430 and the AC path 420, which can be understood as the second DC path 430 and the AC path 420 located on the third circuit board layer 30 are arranged at intervals on the same circuit board layer, and are two independent paths from each other, isolated and not connected. The third circuit board layer 30 forms the second DC path 430 and the AC path 420 through a series of processing techniques (such as photolithography and etching, etc.).

[0076] The AC path 420 located on the third circuit board layer 30 and the AC path 420 located on the second circuit board layer 20 are arranged in a staggered manner, which can be understood as the positions of the AC path 420 located on the third circuit board layer 30 and the AC path 420 located on the second circuit board layer 20 are different. Furthermore, the AC path 420 located on the third circuit board layer 30 and the AC path 420 located on the second circuit board layer 20 are arranged in a staggered manner, which can cancel out the magnetic field generated by the corresponding first DC path 410, reducing the parasitic inductance of the embedded power module 100. Further, due to the AC path 420 located on the third circuit board layer 30 and the AC path 420 located on the second circuit board layer 20 being arranged in a staggered manner, it can make the second DC path 430 dispersed on the third circuit board layer 30 and the second DC path 430 on the second circuit board layer 20 also show a staggered arrangement, jointly canceling out the magnetic field generated by the corresponding first DC path 410, reducing the parasitic inductance of the embedded power module 100.

[0077] In the embedded power module 100 provided by the present application, the first DC path 410 located on the first circuit board layer 10, the AC path 420 located on the second circuit board layer 20 and the first DC path 410 or the second DC path 430, and the second DC path 430 located on the third circuit board layer 30 and the AC path 420 form stacked and parallel current paths. The first DC path 410 located on the first circuit board layer 10 and the AC path 420 located on the second circuit board layer 20 are current paths in opposite directions and can generate magnetic fields in opposite directions. The first DC path 410 located on the first circuit board layer 10 and the second DC path 430 located on the second circuit board layer 20 are current paths in opposite directions and can generate magnetic fields in opposite directions. The first DC path 410 located on the first circuit board layer 10 and the second DC path 430 and the AC path 420 located on the third circuit board layer 30 are current paths in opposite directions and can generate magnetic fields in opposite directions. The first DC path 410 located on the second circuit board layer 20 and the AC path 420 located on the third circuit board layer 30 are current paths in opposite directions and can generate magnetic fields in opposite directions.

[0078] Furthermore, the first DC path 410, the AC path 420 and the second DC path 430 located on different circuit board layers are connected, and can respectively provide the required current signals for each power chip in the embedded power module 100. The first DC path 410, the AC path 420 and the second DC path 430 located on different circuit board layers are stacked and parallel to each other and generate magnetic fields in opposite directions, so that the generated magnetic fields can be superimposed and cancelled out. After the magnetic fields in opposite directions are superimposed and cancelled out, the total magnetic field intensity decreases, reducing the parasitic inductance (which can also be called stray inductance) of the embedded power module 100, and ensuring the safe operation of the embedded power module 100.

[0079] Therefore, the parasitic inductance of the embedded power module 100 provided by the present application is reduced, the voltage spike at the moment of switching is reduced, the switching loss of the embedded power module 100 can be reduced, the risk of overvoltage is reduced, and the voltage platform of the whole vehicle is further improved.

[0080] Please refer to Figure 4 , in one embodiment, the embedded power module 100 further includes a chip placement layer. The chip placement layer includes a fourth circuit board layer 70, a first insulating layer 510 and a fifth circuit board layer 80 which are stacked. The chip placement layer is arranged between the second circuit board layer 20 and the third circuit board layer 30. The first power chip 610 and the second power chip 620 are spaced apart in the chip placement layer.

[0081] The first power chip 610 is connected to the second DC path 430 located in the third circuit board layer 30 and the AC path 420 located in the second circuit board layer 20. The second power chip 620 is connected to the AC path 420 located in the third circuit board layer 30 and the first DC path 410 (as Figure 1 shown) or the second DC path 430 located in the second circuit board layer 20 (as Figure 2 shown).

[0082] In this embodiment, the fourth circuit board layer 70 is insulatingly laminated between the second circuit board layer 20 and the first insulating layer 510. The fifth circuit board layer 80 is insulatingly laminated between the first insulating layer 510 and the third circuit board layer 30. The fourth circuit board layer 70, the first insulating layer 510, and the fifth circuit board layer 80 together form a chip placement layer for placing the first power chip 610 and the second power chip 620.

[0083] The material of the first insulating layer 510 can be an insulating material such as alumina, aluminum oxide, or silicon nitride. The fourth circuit board layer 70 and the fifth circuit board layer 80 can be a metal layer or an alloy layer, such as a copper layer, a silver layer, or a copper alloy layer. The first power chip 610 and the second power chip 620 are insulated from each other. The first power chip 610 and the second power chip 620 can be Insulated-Gate Bipolar Transistor (IGBT) chips, Fast Recovery Diode (FRD) chips, Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistor (SiC MOS) chips, (Gallium-Nitride Metal-Oxide-Semiconductor Field-Effect Transistor, GaN MOS) chips, Gallium Nitride High Electron Mobility Transistor (GaN HEMT) chips, etc.

[0084] The conduction between the second DC path 430 located on the third circuit board layer 30 and the connection of the AC path 420 located on the second circuit board layer 20 is achieved through the first power chip 610. The connection between the AC path 420 located on the third circuit board layer 30 and the first DC path 410 located on the second circuit board layer 20 is achieved through the second power chip 620. Alternatively, the connection between the AC path 420 located on the third circuit board layer 30 and the second DC path 430 located on the second circuit board layer 20 is achieved through the second power chip 620.

[0085] The first power chip 610 and the second power chip 620 are respectively arranged at intervals on the chip placement layer. The first power chip 610 and the second power chip 620 are dispersed at different positions on the chip placement layer. Furthermore, through the first power chip 610 and the second power chip 620, the second DC path 430, the AC path 420, and the first DC path 410 between different circuit board layers are dispersedly connected to different stacked positions of the first circuit board layer 10, the second circuit board layer 20, and the third circuit board layer 30, enabling the first direction path of the first DC path 410 to overlap with the second direction path of the AC path 420 and the second direction path of the second DC path 430 respectively, and better enabling the generated magnetic fields to be superimposed and cancelled out. After the magnetic fields in opposite directions are superimposed and cancelled out, the parasitic inductance of the embedded power module 100 is reduced, ensuring the safe operation of the embedded power module 100.

[0086] Please refer to Figure 5 and Figure 6 , in one embodiment, a first conductive recess 611 and a second conductive recess 621 are arranged at intervals within the chip placement layer. The first power chip 610 is arranged within the first conductive recess 611. The second power chip 620 is arranged within the second conductive recess 621.

[0087] The first conductive recess 611 is connected to the second DC path 430 located on the third circuit board layer 30. The first power chip 610 is connected to the AC path 420 located on the second circuit board layer 20. The second conductive recess 621 is connected to the AC path 420 located on the third circuit board layer 30. The second power chip 620 is connected to the first DC path 410 (as Figure 5 shown) or the second DC path 430 located on the second circuit board layer 20 (as Figure 6 shown).

[0088] In this embodiment, the first conductive recess 611 and the second conductive recess 621 have conductivity and can be made of metal conductive materials, such as: copper, aluminum copper alloy, etc. The structures of the first conductive recess 611 and the second conductive recess 621 are as Figure 7As shown. The first conductive recess 611 is provided with a first groove 612. The first power chip 610 is disposed within the first conductive recess 611, which can also be understood as being disposed within the first groove 612. The second conductive recess 621 is provided with a second groove 622. The second power chip 620 is disposed within the second conductive recess 621, which can also be understood as being disposed within the second groove 622. Through the first conductive recess 611, the second DC path 430 located on the third circuit board layer 30 can be connected to the first power chip 610. Through the second conductive recess 621, the AC path 420 located on the third circuit board layer 30 can be connected to the second power chip 620.

[0089] The first conductive recess 611 and the second conductive recess 621 can not only transmit the required current signals to the first power chip 610 and the second power chip 620, but also dissipate heat from the first power chip 610 and the second power chip 620. The first conductive recess 611 surrounds the first power chip 610 and can dissipate the heat generated by the first power chip 610. The second conductive recess 621 surrounds the second power chip 620 and can dissipate the heat generated by the second power chip 620.

[0090] In one embodiment, the DC current signal flows through the second DC path 430 to the first DC path 410, as Figure 1 shown in Figure 2 the figure.

[0091] In this embodiment, the current flowing out from the positive power supply terminal DC+ flows into the second DC path 430 located on the third circuit board layer 30, passes through the first power chip 610, and then flows into the AC path 420 located on the second circuit board layer 20. The AC path 420 is connected to an external AC load (such as a motor of a vehicle inverter system or other loads that require AC signals). The current after passing through the external AC load flows into the second power chip 620, and then flows into the first DC path 410 or the second DC path 430 located on the second circuit board layer 20 through the second power chip 620. The DC current flows into the first DC path 410 located on the first circuit board layer 10 through the first DC path 410 or the second DC path 430 located on the second circuit board layer 20, and then flows out to the negative power supply terminal DC- through the first DC path 410.

[0092] The DC current of the second DC path 430 located on the third circuit board layer 30 is the current flowing out from the positive power supply terminal DC+. The DC current of the first DC path 410 located on the first circuit board layer 10 is the current flowing towards the negative power supply terminal DC-. Opposite loop current paths are formed between the second DC path 430 and the AC path 420 and the first DC path 410 respectively, such that the first DC path 410 forms anti-directional stacked current paths with the AC path 420 and the second DC path 430 respectively, generating magnetic fields in opposite directions, enabling the generated magnetic fields to be superimposed and cancelled out with each other, and reducing the parasitic inductance of the embedded power module 100.

[0093] In one embodiment, the DC current signal flows through the first DC path 410 towards the second DC path 430, as Figure 3 shown. In this embodiment, the current flowing out from the positive power supply terminal DC+ flows into the first DC path 410 located on the first circuit board layer 10, and passes through the first DC path 410 or the second DC path 430 located on the second circuit board layer 20, and then flows into the second power chip 620. After passing through the second power chip 620, it flows into the AC path 420 located on the third circuit board layer 30. The AC path 420 is connected to an external AC load (such as a motor of a vehicle inverter system or other loads that require AC signals). The current after passing through the external AC load flows into the first power chip 610, and then flows out to the negative power supply terminal DC- through the second DC path 430 located on the third circuit board layer 30.

[0094] The DC current of the first DC path 410 located on the first circuit board layer 10 is the current flowing out from the positive power supply terminal DC+. The second DC path 430 located on the third circuit board layer 30 is the current flowing towards the negative power supply terminal DC-. Opposite loop current paths are formed between the first DC path 410 and the second DC path 430 and the AC path 420 respectively, such that the first DC path 410 forms anti-directional stacked current paths with the AC path 420 and the second DC path 430 respectively, generating magnetic fields in opposite directions, enabling the generated magnetic fields to be superimposed and cancelled out with each other, and reducing the parasitic inductance of the embedded power module 100.

[0095] In one embodiment, the drain of the first power chip 610 is connected to the second DC path 430. The source of the first power chip 610 is connected to the AC path 420 located on the second circuit board layer 20, as Figure 1 shown. The drain of the second power chip 620 is connected to the AC path 420 located on the third circuit board layer 30. The source of the second power chip 620 is connected to the first DC path 410 or the second DC path 430 located on the second circuit board layer 20.

[0096] In this embodiment, the first power chip 610 and the second DC path 430, AC path 420, second power chip 620, and first DC path 410 form a half-bridge inverter circuit, as Figure 8 shown. The first power chip 610 is the chip corresponding to the upper half-bridge. The second power chip 620 is the chip corresponding to the lower half-bridge. Both the first power chip 610 and the second power chip 620 are MOS transistors. The source of the first power chip 610 is connected to the drain of the second power chip 620 and is connected to the AC path 420 for connecting to an external load. By alternately turning on and off the first power chip 610 and the second power chip 620 in the half-bridge inverter circuit, the DC power supply is converted into an AC power supply. As the first power chip 610 and the second power chip 620 alternately turn on and off, an AC voltage is formed across the load connected to the AC path 420.

[0097] By connecting the first power chip 610 and the second power chip 620 to the paths of different circuit board layers respectively, opposite loop current paths are formed, and the current paths in different directions are dispersed at different positions of different circuit board layers, enabling the current paths in different directions to be stacked in opposite directions, and the generated magnetic fields can be superimposed and cancelled each other to reduce the parasitic inductance of the embedded power module 100.

[0098] In one embodiment, three embedded power modules 100 can also be used to form a three-phase full-bridge power module, as Figure 9 shown. In a motor control system, by turning on and off the power chips in the three-phase full-bridge power module, the DC power supply is converted into a three-phase AC power supply to supply power to a three-phase AC load, thereby realizing the control of the motor speed. The three-phase full-bridge power module integrates multiple power chips and their drive circuits, etc. into one module, improving the integration degree, reducing the number of external connection lines and components, and enhancing the reliability and stability.

[0099] Please refer to Figure 10 , in one embodiment, the first DC path 410 located on the first circuit board layer 10 extends to the second circuit board layer 20 through at least one first via 110.

[0100] In this embodiment, at least one first via 110 enables the connection between the first DC path 410 in the first circuit board layer 10 and other circuit board layers, distributes the current in the first DC path 410 to each component and circuit part that requires power, and forms a conveying pipeline for the first DC path 410. The first DC path 410 located in the first circuit board layer 10 extends to the second circuit board layer 20 through at least one first via 110, so that the first DC path 410 located in the second circuit board layer 20 is connected to the first DC path 410 located in the first circuit board layer 10, thereby realizing the flow transmission of DC current in the first direction. Thus, the first DC path 410 located in the second circuit board layer 20 and the first DC path 410 located in the first circuit board layer 10, being dispersed at different relative positions in different circuit board layers, can better form a reverse laminated current path with the second DC path 430 and the AC path 420 to reduce the parasitic inductance of the embedded power module 100.

[0101] In one embodiment, the AC path 420 located in the second circuit board layer 20 extends to the third circuit board layer 30 through at least one second via 210.

[0102] In this embodiment, at least one second via 210 enables the connection between the AC path 420 in the second circuit board layer 20 and other circuit board layers, distributes the current in the AC path 420 to each required component and circuit part, and forms a conveying pipeline for the AC path 420. The AC path 420 located in the second circuit board layer 20 extends to the third circuit board layer 30 through at least one second via 210, so that the AC path 420 located in the second circuit board layer 20 is connected to the AC path 420 located in the third circuit board layer 30, thereby realizing the flow transmission of AC current in the second direction. Thus, the AC path 420 located in the second circuit board layer 20 and the AC path 420 located in the third circuit board layer 30, being dispersed at different relative positions in different circuit board layers, can better form a reverse laminated current path with the first DC path 410 to reduce the parasitic inductance of the embedded power module 100.

[0103] At least one first via 110 and at least one second via 210 enable the connection of circuit paths between circuit board layers stacked in different layers, jointly complete the circuit wiring of the entire embedded power module 100, form a complete multi-layer structure, and are more conducive to the integration of multiple power chips.

[0104] In one embodiment, when the first power chip 610 and the second power chip 620 are connected to the first DC path 410, the AC path 420, and the second DC path 430, the connection is also achieved through multiple vias.

[0105] In one embodiment, the first DC path 410 is disposed opposite to the second DC path 430. And the first DC path 410 is disposed opposite to the AC path 420.

[0106] In this embodiment, the current directions of the first DC path 410 and the second DC path 430 are opposite, and the magnetic field directions generated by each are also opposite. The first DC path 410 and the second DC path 430 are disposed opposite to each other, so that the magnetic fields generated by each in the region between the first DC path 410 and the second DC path 430 are exactly opposite to each other, can be superimposed and cancelled out, effectively reducing the parasitic inductance of the embedded power module 100.

[0107] The current directions of the first DC path 410 and the AC path 420 are also opposite, and the magnetic field directions generated by each are also opposite. The first DC path 410 and the AC path 420 are disposed opposite to each other, so that the magnetic fields generated by each in the region between the first DC path 410 and the AC path 420 are exactly opposite to each other, can be superimposed and cancelled out, effectively reducing the parasitic inductance of the embedded power module 100.

[0108] In one embodiment, the sum of the paths of the second DC path 430 and the AC path 420 is the same as that of the first DC path 410.

[0109] In this embodiment, the sum of the paths of the second DC path 430 and the AC path 420 may include the sum of the lengths of the second DC path 430 and the AC path 420 and the sum of the areas of the second DC path 430 and the AC path 420. The sum of the paths of the second DC path 430 and the AC path 420 being the same as that of the first DC path 410 can be understood as that the sum of the lengths and the sum of the areas of the second DC path 430 and the AC path 420 are respectively the same as the length and the area of the first DC path 410.

[0110] Both the second DC path 430 and the AC path 420 are current transmission channels for currents flowing in the second direction, opposite to the current direction of the first DC path 410. When the sum of the paths of the second DC path 430 and the AC path 420 is the same as that of the first DC path 410, the magnetic fields generated by the circuit paths on the first circuit board layer 10, the second circuit board layer 20, and the third circuit board layer 30 can be completely superimposed and cancelled out, greatly reducing the parasitic inductance of the embedded power module 100.

[0111] Please refer to Figure 10 and Figure 11 , in one embodiment, the first circuit board layer 10 is provided with a first drive signal path 440 and a second drive signal path 450, and the first drive signal path 440, the second drive signal path 450, and the first DC path 410 are spaced apart from each other.

[0112] In this embodiment, the first circuit board layer 10 is provided with a first drive signal path 440, a second drive signal path 450, and a first DC path 410 at intervals. The area of the first DC path 410 is larger than the areas of the drive signal path 440 and the second drive signal path 450, as Figure 11 shown. In one embodiment, the area of the first DC path 410 is in the range of 85% to 95% of the area of the first circuit board layer 10. In one embodiment, the first drive signal path 440 is the path of the gate drive signal of the power chip. The second drive signal path 450 is the path of the source drive signal of the power chip.

[0113] The first circuit board layer 10 is provided with a first drive signal path 440 connected to the gate of the first power chip 610. The first circuit board layer 10 is provided with a second drive signal path 450 connected to the source of the first power chip 610, which is used to control the conduction or cutoff of the first power chip 610, so as to realize the function of the half-bridge inverter circuit of the first power chip 610 and the second power chip 620.

[0114] In one embodiment, the embedded power module 100 further includes a sixth circuit board layer 90, as Figure 6 shown. The sixth circuit board layer 90 is insulatingly laminated on the side of the third circuit board layer 30 away from the second circuit board layer 20. It can also be understood that the sixth circuit board layer 90 is insulatingly laminated on the side of the third circuit board layer 30 away from the fifth circuit board layer 80.

[0115] In this embodiment, the sixth circuit board layer 90 can be a metal layer or an alloy layer, such as a copper layer, a silver layer, or a copper alloy layer, etc. The first circuit board layer 10 and the second circuit board layer 20 are laminated and insulated from each other. In one embodiment, a second insulating layer 520 is laminated between the first circuit board layer 10 and the second circuit board layer 20. The material of the second insulating layer 520 can be an insulating material such as alumina, aluminum oxide, or silicon nitride.

[0116] The fourth circuit board layer 70 and the second circuit board layer 20 are laminated and insulated from each other. In one embodiment, a third insulating layer 530 is laminated between the fourth circuit board layer 70 and the second circuit board layer 20. The material of the third insulating layer 530 can be an insulating material such as alumina, aluminum oxide, or silicon nitride.

[0117] The fifth circuit board layer 80 is stacked with the third circuit board layer 30 and insulated from each other. In one embodiment, a fourth insulating layer 540 is stacked between the fifth circuit board layer 80 and the third circuit board layer 30. The material of the fourth insulating layer 540 can be an insulating material such as alumina, aluminum oxide, or silicon nitride. The sixth circuit board layer 90 is stacked with the third circuit board layer 30 and insulated from each other.

[0118] In one embodiment, a fifth insulating layer 550 is stacked between the sixth circuit board layer 90 and the third circuit board layer 30. The fifth insulating layer 550 can not only achieve a heat conduction function but also an insulation function. The material of the fifth insulating layer 550 can be ceramic or an epoxy resin-based composite material, etc.

[0119] The first circuit board layer 10, the second circuit board layer 20, the fourth circuit board layer 70, the fifth circuit board layer 80, the third circuit board layer 30, and the sixth circuit board layer 90 are all stacked, and insulating layers are provided between them. The first power chip 610 and the second power chip 620 are cooled through the fourth circuit board layer 70 and the fifth circuit board layer 80. When the first power chip 610 and the second power chip 620 generate heat during operation, the heat can be diffused to a larger area through the fourth circuit board layer 70 and the fifth circuit board layer 80, thereby assisting in heat dissipation.

[0120] The fifth circuit board layer 80 transfers the heat generated when the first power chip 610 and the second power chip 620 operate to the radiator through the third circuit board layer 30, the fifth insulating layer 550, and the sixth circuit board layer 90, realizing heat dissipation for the embedded power module 100. Both the fifth insulating layer 550 and the sixth circuit board layer 90 serve as links in the heat conduction path to diffuse the heat, preventing the heat from concentrating excessively near the first power chip 610 and the second power chip 620, thereby making the heat distribution more uniform and dissipating the heat, further enhancing the heat dissipation effect.

[0121] Thus, through the embedded power module 100 provided by the present application, without sacrificing the heat dissipation ability, six circuit board layers can be used to simultaneously achieve heat dissipation and reduce parasitic inductance, without the need to additionally increase the number of circuit board layers.

[0122] Please refer to Figure 12 , the present application provides an embedded power module 100. The embedded power module 100 includes a first circuit board layer 10, a second circuit board layer 20, and a fourth circuit board layer 70 that are stacked in sequence. The first circuit board layer 10 is provided with a first DC path 410. The second circuit board layer 20 is provided with an AC path 420. The fourth circuit board layer 70 is provided with a second DC path 430, which is located on the fourth circuit board layer 70.

[0123] The second DC paths 430 located on the fourth circuit board layer 70 are arranged alternately with the AC paths 420 located on the second circuit board layer 20. The current direction of the first DC path 410 is opposite to the current direction of the AC path 420 and the current direction of the second DC path 430. The first DC path 410, the AC path 420 and the second DC path 430 are connected.

[0124] In this embodiment, the first circuit board layer 10 and the second circuit board layer 20 may be described with reference to the description in the above embodiment. The first DC path 410 , the AC path 420 and the second DC path 430 may be described with reference to the description in the above embodiment.

[0125] The fourth circuit board layer 70 may be a metal layer or an alloy layer, such as a copper layer, a silver layer or a copper alloy layer. The fourth circuit board layer 70 and the second circuit board layer 20 are insulated and stacked via a third insulating layer 530. The fourth circuit board layer 70 is formed into a second DC path 430 through a series of processing techniques (such as photolithography and etching).

[0126] The second DC path 430 located on the fourth circuit board layer 70 and the AC path 420 located on the second circuit board layer 20 are arranged in an alternating manner, which can be understood as the second DC path 430 located on the fourth circuit board layer 70 and the AC path 420 located on the second circuit board layer 20 are located at different positions. Furthermore, the second DC path 430 located on the fourth circuit board layer 70 and the AC path 420 located on the second circuit board layer 20 are arranged in an alternating manner, which can offset the magnetic field generated by the first DC path 410, thereby reducing the parasitic inductance of the embedded power module 100.

[0127] In the embedded power module 100 provided in the present application, the first DC path 410 located in the first circuit board layer 10, the AC path 420 located in the second circuit board layer 20, and the second DC path 430 located in the fourth circuit board layer 70 form stacked parallel current paths. The first DC path 410 located in the first circuit board layer 10 and the AC path 420 located in the second circuit board layer 20 are current paths in opposite directions, and can generate magnetic fields in opposite directions. The first DC path 410 located in the first circuit board layer 10 and the second DC path 430 located in the fourth circuit board layer 70 are current paths in opposite directions, and can generate magnetic fields in opposite directions.

[0128] The first DC path 410, AC path 420, and second DC path 430 located on different circuit board layers are stacked and parallel to each other, and generate magnetic fields in opposite directions, so that the generated magnetic fields can be superimposed and canceled out. After the magnetic fields in opposite directions are superimposed and canceled out, the total magnetic field strength decreases, reducing the parasitic inductance (which can also be called stray inductance) of the embedded power module 100, and ensuring the safe operation of the embedded power module 100.

[0129] Therefore, the parasitic inductance of the embedded power module 100 provided by this application is reduced, so that the voltage spike during the switching instant is reduced, the switching loss of the embedded power module 100 can be reduced, the risk of overvoltage is reduced, and the voltage platform of the whole vehicle is further improved.

[0130] Please refer to Figure 12 and Figure 13 , in one embodiment, a third conductive recess 615 and a fourth conductive recess 625 are spaced apart in the fourth circuit board layer 70. A first power chip 610 is disposed in the third conductive recess 615. A second power chip 620 is disposed in the fourth conductive recess 625.

[0131] The third conductive recess 615 is connected to the second DC path 430 located in the fourth circuit board layer 70. The first power chip 610 is connected to the AC path 420 located in the second circuit board layer 20. The fourth conductive recess 625 is connected to the AC path 420 located in the second circuit board layer 20. The second power chip 620 is connected to the first DC path 410 located in the first circuit board layer 10.

[0132] In this embodiment, the third conductive recess 615 is provided with a third groove 616, as Figure 13 shown. The first power chip 610 is disposed in the third groove 616. The fourth conductive recess 625 is provided with a fourth groove 626. The second power chip 620 is disposed in the fourth groove 626. The third conductive recess 615 and the fourth conductive recess 625 have conductivity and can be made of a metal conductive material, such as copper, aluminum copper alloy, etc. Through the third conductive recess 615, the second DC path 430 located in the fourth circuit board layer 70 can be connected to the first power chip 610. Through the fourth conductive recess 625, the AC path 420 located in the second circuit board layer 20 can be connected to the second power chip 620.

[0133] Through the third conductive recess 615 and the fourth conductive recess 625, not only can the required current signal be transmitted to the first power chip 610 and the second power chip 620, but also heat dissipation for the first power chip 610 and the second power chip 620 can be achieved. The third conductive recess 615 surrounds the first power chip 610 and can dissipate the heat generated by the first power chip 610. The fourth conductive recess 625 surrounds the second power chip 620 and can dissipate the heat generated by the second power chip 620.

[0134] In one embodiment, the embedded power module 100 further includes a first insulating layer 510 and a fifth circuit board layer 80 which are stacked. The first insulating layer 510 and the fifth circuit board layer 80 are disposed on a side of the fourth circuit board layer 70 away from the second circuit board layer 20. First insulating heat-conducting portions 614 and second insulating heat-conducting portions 624 are spaced apart within the first insulating layer 510. First conductive portions 613 and second conductive portions 623 are spaced apart within the fifth circuit board layer 80.

[0135] The third conductive recess 615, the first insulating heat-conducting portion 614, and the first conductive portion 613 are disposed opposite to each other. The fourth conductive recess 625, the second insulating heat-conducting portion 624, and the second conductive portion 623 are disposed opposite to each other.

[0136] In this embodiment, the first insulating layer 510 is disposed between the fourth circuit board layer 70 and the fifth circuit board layer 80 and functions to insulate the fourth circuit board layer 70 and the fifth circuit board layer 80. First insulating heat-conducting portions 614 and second insulating heat-conducting portions 624 are spaced apart within the first insulating layer 510. The materials of the first insulating heat-conducting portions 614 and the second insulating heat-conducting portions 624 can be materials such as ceramics that can achieve both insulation and heat conduction functions. The materials of the first conductive portions 613 and the second conductive portions 623 can be metal conductive materials, such as copper, aluminum-copper alloy, etc. In one embodiment, the materials of the first conductive portions 613 and the second conductive portions 623 are the same as the materials of the third conductive recess 615 and the fourth conductive recess 625.

[0137] The third conductive recess 615 and the fourth conductive recess 625 have a conductive function and can transmit signals to the first power chip 610 and the second power chip 620. Moreover, the heat generated by the first power chip 610 and the second power chip 620 can be respectively transferred to the first insulating heat-conducting portion 614 and the second insulating heat-conducting portion 624 through the third conductive recess 615 and the fourth conductive recess 625. The first insulating heat-conducting portion 614 and the first conductive portion 613 are disposed opposite to each other, and the heat of the first insulating heat-conducting portion 614 can be transferred to the first conductive portion 613. The second insulating heat-conducting portion 624 and the second conductive portion 623 are disposed opposite to each other, and the heat of the second insulating heat-conducting portion 624 can be transferred to the second conductive portion 623, achieving the heat dissipation function.

[0138] Furthermore, the third conductive recess 615, the first insulating and heat-conducting portion 614, and the first conductive portion 613 are disposed opposite to each other to form a heat conduction path of the first power chip 610, so as to dissipate heat and prevent heat from concentrating excessively around the first power chip 610. The fourth conductive recess 625, the second insulating and heat-conducting portion 624, and the second conductive portion 623 are disposed opposite to each other to form a heat conduction path of the second power chip 620, so as to dissipate heat and prevent heat from concentrating excessively around the second power chip 620. Through the embedded power module 100 provided by the present application, heat can be dissipated, further enhancing the heat dissipation effect.

[0139] Please refer to Figure 14 , in one embodiment, an AC path 420 and a second DC path 430 are alternately arranged on the second circuit board layer 20. The second DC path 430 located on the fourth circuit board layer 70, the AC path 420 located on the second circuit board layer 20, and the second DC path 430 located on the second circuit board layer 20 are arranged in a staggered manner.

[0140] In this embodiment, the relevant description of the alternate arrangement of the AC path 420 and the second DC path 430 on the second circuit board layer 20 can refer to the relevant description in the above embodiment.

[0141] The second DC path 430 located on the fourth circuit board layer 70, the AC path 420 located on the second circuit board layer 20, and the second DC path 430 located on the second circuit board layer 20 are arranged in a staggered manner, which can jointly cancel out the magnetic field generated by the first DC path 410, reducing the parasitic inductance of the embedded power module 100.

[0142] Thus, the parasitic inductance of the embedded power module 100 provided by the present application is reduced, reducing the voltage spike during the switching instant, which can reduce the switching loss of the embedded power module 100, reduce the risk of overvoltage, and further improve the voltage platform of the entire vehicle.

[0143] The present application provides an intelligent device, including at least one embedded power module 100 in any one of the above embodiments.

[0144] In this embodiment, a plurality of embedded power modules 100 can be integrated to form a three-phase full-bridge power module. In electric vehicles and hybrid electric vehicles, the three-phase full-bridge power module can be applied to the motor control of the intelligent device inverter system. As a key component for driving the motor, it can convert the direct current provided by the battery into three-phase alternating current to provide power for the driving motor. The intelligent device can be a vehicle, a driving device, a robot, a flying car, an electric aircraft, or other devices.

[0145] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the above-mentioned division of each functional unit and module is used as an example. In actual applications, the above-mentioned functions can be allocated to different functional units and modules according to needs, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. Each functional unit and module in the embodiment can be integrated into a processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of a software functional unit. In addition, the specific names of each functional unit and module are only for the convenience of mutual distinction and do not limit the protection scope of this application. In the above embodiments, the descriptions of each embodiment have their own emphases. For the parts not detailed or recorded in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0146] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, or by a combination of computer software and electronic hardware. Whether these functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods for each specific application to implement the described functions, but such implementation should not be considered to exceed the scope of this application.

[0147] The division of modules or units is only a logical function division. In actual implementation, there can be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the coupling or direct coupling or communication connection shown or discussed with each other can be through some interfaces. The indirect coupling or communication connection of the device or unit can be in electrical, mechanical or other forms. The unit described as a separated component can be or can not be physically separated. The component shown as a unit can be or can not be a physical unit, that is, it can be located in one place or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment. In addition, each functional unit in the various embodiments of this application can be integrated into a processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

[0148] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included within the protection scope of the present application.

Claims

1. An embedded power module, characterized in that: include: A first circuit board layer (10), a second circuit board layer (20), and a third circuit board layer (30) stacked in sequence; The first circuit board layer (10) is provided with a first direct current path (410); The second circuit board layer (20) is provided with an alternating current path (420) and the first direct current path (410) or the second direct current path (430) at intervals; The third circuit board layer (30) is provided with the second DC path (430) and the AC path (420) at intervals, and the AC path (420) located on the third circuit board layer (30) and the AC path (420) located on the second circuit board layer (20) are arranged in an alternating manner; The current direction of the first DC path (410) is opposite to the current direction of the AC path (420) and the current direction of the second DC path (430); the first DC path (410), the AC path (420) and the second DC path (430) are connected.

2. The embedded power module according to claim 1, characterized in that: The embedded power module further comprises a chip placement layer, which is arranged between the second circuit board layer (20) and the third circuit board layer (30), and a first power chip (610) and a second power chip (620) are arranged in the chip placement layer at intervals; The first power chip (610) is connected to the second DC path (430) located on the third circuit board layer (30) and the AC path (420) located on the second circuit board layer (20); The second power chip (620) is connected to the AC path (420) located on the third circuit board layer (30) and the first DC path (410) located on the second circuit board layer (20) or the second DC path (430) located on the second circuit board layer (20); The chip placement layer comprises a fourth circuit board layer (70), a first insulating layer (510) and a fifth circuit board layer (80) which are stacked.

3. The embedded power module according to claim 2, characterized in that: The DC current signal flows to the first DC path (410) via the second DC path (430).

4. The embedded power module according to claim 3, characterized in that: The drain of the first power chip (610) is connected to the second DC path (430), and the source of the first power chip (610) is connected to the AC path (420) located on the second circuit board layer (20); The drain of the second power chip (620) is connected to the AC path (420) located on the third circuit board layer (30), and the source of the second power chip (620) is connected to the first DC path (410) or the second DC path (430) located on the second circuit board layer (20).

5. The embedded power module according to claim 2, characterized in that: The DC current signal flows through the first DC path (410) to the second DC path (430).

6. The embedded power module according to any one of claims 1 to 5, characterized in that: The first DC path (410) and the second DC path (430) are arranged opposite to each other, and the first DC path (410) and the AC path (420) are arranged opposite to each other.

7. The embedded power module according to any one of claims 1 to 5, characterized in that: The sum of the paths of the second DC path (430) and the AC path (420) is the same as the first DC path (410).

8. An embedded power module, characterized in that: include: A first circuit board layer (10), a second circuit board layer (20), and a fourth circuit board layer (70) stacked in sequence; The first circuit board layer (10) is provided with a first direct current path (410); The second circuit board layer (20) is provided with an AC path (420); The fourth circuit board layer (70) is provided with a second direct current path (430) located on the fourth circuit board layer (70); Wherein, the second DC path (430) located on the fourth circuit board layer (70) and the AC path (420) located on the second circuit board layer (20) are arranged alternately; The current direction of the first DC path (410) is opposite to the current direction of the AC path (420) and the current direction of the second DC path (430); the first DC path (410), the AC path (420) and the second DC path (430) are connected.

9. The embedded power module according to claim 8, characterized in that: The second circuit board layer (20) is provided with the AC path (420) and the second DC path (430) spaced apart from each other; The second DC path (430) located on the fourth circuit board layer (70), the AC path (420) located on the second circuit board layer (20), and the second DC path (430) located on the second circuit board layer (20) are arranged alternately.

10. A smart device, characterized in that: The method comprises at least one embedded power module according to any one of claims 1 to 9.

Images