Manufacturing method of silicon carbide device
By forming a multi-layer mask structure on the silicon carbide substrate and etching to form a high perpendicular trench, the problem of low carrier movement rate of silicon carbide devices is solved and the performance of the device is improved.
Patent Information
- Application Number
- CN202510230717.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-28
- Publication Date
- 2025-06-13
AI Technical Summary
There are many problems with the etching and morphology improvement of silicon carbide trench, resulting in low carrier movement rate and poor performance of silicon carbide devices.
By sequentially forming the first mask layer and the second mask layer on the silicon carbide substrate, a pattern with high perpendicularity of the sidewall is formed using the second mask layer, and the first mask layer and the silicon carbide substrate are etched according to these patterns to form a groove with high perpendicularity.
The carrier movement rate of silicon carbide devices is improved, and the performance of the device is improved, especially the verticality of the side walls of the trench is significantly improved.
Smart Images
Figure CN120152344A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of integrated circuit technologies, and particularly to a method for fabricating a silicon carbide device. Background Art
[0002] As a representative of the third-generation semiconductor materials, silicon carbide (SiC) has shown great application potential in the field of power chips. Due to its characteristics such as high frequency, high voltage, and high temperature, silicon carbide power devices play an important role in improving the efficiency and power density of power electronic systems. In order to further optimize the performance of silicon carbide power devices, a silicon carbide trench gate (Trench) structure is adopted.
[0003] However, there are still many problems in the etching and morphology improvement of silicon carbide trenches. Summary of the Invention
[0004] Based on this, it is necessary to provide a method for fabricating a silicon carbide device to address the problems in the prior art.
[0005] To achieve the above object, the present disclosure provides a method for fabricating a silicon carbide device, including:
[0006] Providing a silicon carbide substrate, and sequentially forming a first mask layer and a second mask layer on the silicon carbide substrate;
[0007] Patterning the second mask layer to form a second mask pattern;
[0008] Etching the first mask layer according to the second mask pattern to form a first mask pattern;
[0009] Removing the second mask layer;
[0010] Etching the silicon carbide substrate according to the first mask pattern to form a first trench.
[0011] Optionally, after forming the first mask layer and the second mask layer, transferring the silicon carbide substrate to a first process chamber;
[0012] Adjusting the first process chamber to a first process condition, introducing a first gas into the first process chamber, and etching the second mask layer and the first mask layer layer by layer to form the second mask pattern and the first mask pattern.
[0013] Optionally, the first process condition is: the pressure is 1 mtorr - 1 Torr, the temperature is 0°C - 60°C; the radio frequency power is 10 W - 2000 W;
[0014] The first gas includes a fluorine-containing gas.
[0015] Optionally, after forming the first trench, further including:
[0016] Etch the first mask layer, and etch the top of the first mask layer into an arched structure;
[0017] Form a gate dielectric layer, and the gate dielectric layer covers the surfaces of the first trench and the first mask layer;
[0018] Form a gate conductive layer, and the gate conductive layer covers the gate dielectric layer and fills the first trench;
[0019] Remove the first mask layer, and remove the gate dielectric layer and the gate conductive layer covering the first mask layer.
[0020] Optionally, the ratio of the radius of the arched structure to the thickness of the first mask layer is 1:10 to 1:20.
[0021] Optionally, after removing the second mask layer, transfer the silicon carbide substrate to a second process chamber;
[0022] Adjust the second process chamber to a second process condition, introduce a second gas into the second process chamber, and etch the silicon carbide substrate to form the first trench;
[0023] Adjust the second process chamber to a third process condition, introduce a third gas into the second process chamber, and etch the first mask layer to etch the top of the first mask layer into the arched structure.
[0024] Optionally, the second process condition is: the pressure is 1 mtorr - 1 Torr, the temperature is 0°C - 60°C; the radio frequency power is 50 W - 3000 W;
[0025] The second gas includes at least one of a fluorine-containing gas, a bromine-containing gas, or a chlorine-containing gas;
[0026] The third process condition is: the pressure is greater than 50 mtorr, the temperature is 30°C - 200°C; the radio frequency power is 10 W - 2500 W;
[0027] The third gas includes a fluorine-containing gas.
[0028] Optionally, after etching the silicon carbide substrate to form the first trench, it further includes:
[0029] Adjust the pressure of the second process chamber to a first pressure, and etch the sidewall of the first trench to etch the sidewall of the first trench into a vertical plane;
[0030] Adjust the pressure of the second process chamber to a second pressure, and etch the bottom surface of the first trench to etch the bottom surface of the first trench into a gentle arc surface;
[0031] The first pressure is less than 100 mTorr; the second pressure is greater than 100 mTorr.
[0032] Optionally, after removing the second mask layer, the method further includes:
[0033] Performing a correction process on the first mask pattern, and the roughness of the sidewall of the corrected first mask pattern is less than that of the sidewall of the first mask pattern before correction.
[0034] Optionally, the material of the first mask layer includes polysilicon; the material of the second mask layer includes silicon oxide.
[0035] In the method for manufacturing a silicon carbide device according to the present disclosure, by sequentially forming a first mask layer and a second mask layer on a silicon carbide substrate, using the second mask layer to form a second mask pattern with a high sidewall perpendicularity, etching the first mask layer according to the second mask pattern to form a first mask pattern with a high perpendicularity, then removing the second mask layer, controlling the etching selectivity between the first mask layer and the silicon carbide substrate through an etching process, and etching the silicon carbide substrate according to the first mask pattern to form a first trench, a first trench with a high sidewall perpendicularity is obtained, which improves the sidewall perpendicularity of the first trench, is beneficial to improving the migration rate of carriers in the silicon carbide device, and improves the performance of the silicon carbide device. Description of the Drawings
[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or in the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.
[0037] Figure 1 It is a process flow chart of the method for manufacturing a silicon carbide device provided in an embodiment;
[0038] Figure 2 It is a schematic structural diagram after sequentially forming a first mask layer and a second mask layer on a silicon carbide substrate provided in an embodiment;
[0039] Figure 3 It is a schematic structural diagram after forming a first mask pattern and a second mask pattern provided in an embodiment;
[0040] Figure 4 It is a schematic structural diagram after removing the second mask layer provided in an embodiment;
[0041] Figure 5 It is a schematic structural diagram after etching to form a first trench provided in an embodiment;
[0042] Figure 6 It is a schematic structural diagram after etching the top of the first mask layer into an arch structure in an embodiment;
[0043] Figure 7 It is a schematic structural diagram after forming a gate dielectric layer in an embodiment;
[0044] Figure 8 It is a schematic structural diagram after forming a gate conductive layer in an embodiment;
[0045] Figure 9 It is a schematic structural diagram after forming a gate structure in an embodiment.
[0046] Description of reference numerals:
[0047] 20, silicon carbide substrate; 21, first trench; 31, first mask layer; 311, first mask pattern; 32, second mask layer; 321, second mask pattern; 51, gate dielectric layer; 52, gate conductive layer; 50, gate structure. Detailed implementation manners
[0048] To facilitate the understanding of the present disclosure, the present disclosure will be described more comprehensively below with reference to the relevant drawings. Preferred embodiments of the present disclosure are given in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present disclosure more thorough and comprehensive.
[0049] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present disclosure belongs. The terms used in the specification of the present disclosure herein are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure.
[0050] In the related art, during the process of fabricating a silicon carbide trench, an oxide hard mask (OX HM) is formed on a silicon carbide substrate, and the silicon carbide substrate is etched according to the oxide hard mask to form a trench. Due to the material characteristics of the oxide hard mask, it is difficult to process the sidewalls of the oxide hard mask to achieve an ideal smoothness. During the process of etching the silicon carbide substrate according to the oxide hard mask, the rough defects on the sidewalls of the oxide hard mask may be transferred to the sidewalls of the formed silicon carbide trench, resulting in a high sidewall roughness (Striation) of the silicon carbide trench. Moreover, during the etching process, it is difficult to achieve a consistent etching selectivity between the oxide hard mask and the silicon carbide, and steps may be formed at the interface between the oxide hard mask and the silicon carbide substrate, affecting the uniformity and consistency of the etching process of the silicon carbide substrate, resulting in a low perpendicularity of the sidewalls of the silicon carbide trench. The low perpendicularity of the sidewalls of the silicon carbide trench will affect the movement of carriers in the silicon carbide device and the performance of the silicon carbide device.
[0051] In view of this, the present disclosure provides a method for fabricating a silicon carbide device. By sequentially forming a first mask layer and a second mask layer on a silicon carbide substrate, a second mask pattern with a high sidewall perpendicularity is formed using the second mask layer. The first mask layer is etched according to the second mask pattern to form a first mask pattern with a high perpendicularity. Then, the second mask layer is removed. By controlling the etching process, the etching selectivity between the first mask layer and the silicon carbide substrate is controlled. The silicon carbide substrate is etched according to the first mask pattern to form a first trench, obtaining a first trench with high sidewall perpendicularity, improving the sidewall perpendicularity of the first trench, which is beneficial to improving the movement rate of carriers in the silicon carbide device and the performance of the silicon carbide device.
[0052] According to an exemplary embodiment, the present embodiment provides a method for fabricating a silicon carbide device, as Figure 1 shown. The method for fabricating a silicon carbide device includes the following steps:
[0053] Step S101: Provide a silicon carbide substrate, and sequentially form a first mask layer and a second mask layer on the silicon carbide substrate.
[0054] Step S102: Pattern the second mask layer to form a second mask pattern.
[0055] Step S103: Etch the first mask layer according to the second mask pattern to form a first mask pattern.
[0056] Step S104: Remove the second mask layer.
[0057] Step S105: Etch the silicon carbide substrate according to the first mask pattern to form a first trench.
[0058] The following combines Figures 2 - 9Describe in detail each step of the manufacturing method of the silicon carbide device.
[0059] In step S101, as Figure 2 shown, after providing the silicon carbide substrate 20, any one of the deposition processes such as Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), Atomic Layer Deposition (ALD), Plasma Enhanced Chemical Vapor Deposition (PECVD), or sputtering can be selected to sequentially deposit and form a first mask layer 31 and a second mask layer 32 on the silicon carbide substrate 20.
[0060] As Figure 2 shown, the materials of the first mask layer 31 and the second mask layer 32 are different. Exemplarily, the hardness of the second mask layer 32 is greater than that of the first mask layer 31, and / or the etching resistance of the second mask layer 32 is greater than that of the first mask layer 31. Thus, the second mask pattern 321 with high verticality of the sidewalls can be etched and formed by using the second mask layer 32.
[0061] Exemplarily, the material of the first mask layer 31 may include single crystal silicon or polycrystalline silicon; the material of the second mask layer 32 may include at least one of silicon oxide, silicon nitride, or silicon oxycarbide.
[0062] In this embodiment, the material of the first mask layer 31 includes polycrystalline silicon; the material of the second mask layer 32 includes silicon oxide.
[0063] In step S102, a photoresist layer (not shown in the figure) is formed on the top surface of the second mask layer 32, and an exposure - development process is performed on the photoresist layer to define a photoresist pattern in the photoresist layer.
[0064] As Figure 3 shown, the second mask layer 32 is etched according to the photoresist layer, and the photoresist pattern is transferred into the second mask layer 32 to form the second mask pattern 321. Since the second mask layer 32 has high hardness and etching resistance, the sidewalls of the second mask pattern 321 formed by etching the second mask layer 32 have high verticality.
[0065] It should be noted that the "verticality of the sidewalls" mentioned in this disclosure refers to the degree that the angle between the sidewalls and the top or bottom surface of the film layer is close to 90 degrees. The "verticality of the sidewalls" is crucial for alignment and accuracy in subsequent processing steps of the device, and the "verticality of the sidewalls" affects the yield and performance of the device.
[0066] Exemplarily, the second mask layer 32 can be etched by a dry process.
[0067] In step S103, as Figure 3 shown, the first mask layer 31 exposed by the second mask pattern 321 is etched to accurately transfer the pattern of the second mask pattern 321 into the first mask layer 31, forming a first mask pattern 311, so that the sidewalls of the first mask pattern 311 have high perpendicularity.
[0068] Exemplarily, the first mask layer 31 can be etched by a dry process.
[0069] Exemplarily, the second mask layer 32 and the first mask layer 31 can be etched sequentially in the same etching process to save process time and improve production efficiency.
[0070] In step S104, as Figure 4 shown, all of the second mask layer 32 can be selectively etched and removed by a dry process or a wet process, exposing the top surface of the first mask layer 31, so as to facilitate etching the silicon carbide substrate 20 according to the first mask pattern 311 in the subsequent process.
[0071] In some embodiments, when forming the first mask layer 31 and the second mask layer 32, by controlling the thickness ratio of the first mask layer 31 and the second mask layer 32, using the thickness ratio of the first mask layer 31 and the second mask layer 32 and the etching rate difference between the first mask layer 31 and the second mask layer 32, after etching the first mask layer 31 to form the first mask pattern 311, the second mask layer 32 is etched and consumed and removed, so as to save manufacturing processes and shorten the manufacturing time.
[0072] Exemplarily, the thickness ratio of the first mask layer 31 to the second mask layer 32 is 5:1 - 20:1. For example, the thickness ratio of the first mask layer 31 to the second mask layer 32 can be 5:1, 6:1, 7:1, 8:1, 9:1, 10:1, 11:1, 12:1, 13:1, 4:1, 15:1, 16:1, 17:1, 18:1, 19:1 or 20:1.
[0073] In some embodiments, after step S104 removes the second mask layer 32, step S104-1 is further performed:
[0074] S104-1: Perform a correction process on the first mask pattern 311, and the roughness of the sidewalls of the corrected first mask pattern 311 is less than the roughness of the sidewalls of the first mask pattern 311 before correction.
[0075] In this embodiment, the sidewalls of the first mask pattern 311 can be etched by reactive ion etching, and the etching rate can be controlled by adjusting parameters (such as power and gas pressure) to correct the sidewall angle of the first mask pattern 311, and remove uneven concave and convex defects and burrs on the sidewalls of the first mask pattern 311, etc., so as to improve the perpendicularity and smoothness of the sidewalls of the first mask pattern 311.
[0076] Alternatively, in other embodiments, the sidewalls of the first mask pattern 311 can be oxidized to form an oxide layer on the sidewalls of the first mask pattern 311, and then the oxide layer can be removed by wet etching to improve the smoothness of the sidewalls of the first mask pattern 311 and reduce sidewall defects. For example, hydrogen peroxide (H 2 O 2 ) can be used to treat the sidewalls of the first mask pattern 311 to form an oxide layer, and then hydrofluoric acid (HF) can be used to clean and remove the oxide layer.
[0077] In step S105, as Figure 5 shown, the silicon carbide substrate 20 is etched using the first mask layer 31 as a mask, and the pattern of the first mask pattern 311 is transferred to the silicon carbide substrate 20 to form the first trench 21. Since the first mask layer 31 has low hardness and low etching resistance, during the process of etching the silicon carbide substrate 20, the etching rates of the first mask layer 31 and the silicon carbide substrate 20 can be adjusted to be the same by controlling the process parameters of the etching process, and no step will be formed at the interface between the first mask layer 31 and the silicon carbide substrate 20, which can ensure that the pattern of the first mask pattern 311 is accurately transferred into the silicon carbide substrate 20 to form the first trench 21 with high sidewall perpendicularity, thereby improving the sidewall perpendicularity of the first trench 21.
[0078] The manufacturing method of the silicon carbide device in this embodiment forms the first mask layer 31 and the second mask layer 32 on the silicon carbide substrate 20 in sequence, uses the second mask layer 32 to form the second mask pattern 321 with high sidewall perpendicularity, etches the first mask layer 31 according to the second mask pattern 321 to form the first mask pattern 311 with high perpendicularity, then removes the second mask pattern 321, controls the etching selectivity between the first mask layer 31 and the silicon carbide substrate 20 by controlling the etching process, etches the silicon carbide substrate 20 according to the first mask layer 31 to form the first trench 21, and obtains the first trench 21 with high sidewall perpendicularity, which improves the sidewall perpendicularity of the first trench 21 and is beneficial to improving the migration rate of carriers in the silicon carbide device and improving the performance of the silicon carbide device.
[0079] In some embodiments, after step S105 to form the first trench 21, the following steps are further performed:
[0080] Step S106: Etch the first mask layer 31 to etch the top of the first mask layer 31 into an arched structure.
[0081] In this embodiment, as Figure 6 shown, by controlling the etching parameters, the horizontal etching rate of the first mask layer 31 is made greater than the vertical etching rate, so that the horizontal etching rate of the first mask layer 31 is greater than the vertical etching rate, and the top of the first mask layer 31 is etched into an arched structure. In this way, the top of the first mask layer 31 is a smooth and gentle arc surface, which is beneficial to reducing the filling difficulty of filling the first trench 21 by the deposition process and avoiding the formation of voids in the first trench 21.
[0082] In some embodiments, by controlling the etching parameters, the ratio of the radius of the arched structure to the thickness of the first mask layer 31 is 1:10 to 1:20. For example, the ratio of the radius of the arched structure to the thickness of the first mask layer 31 can be 1:10, 1:11, 1:12, 1:13, 1:14, 1:15, 1:16, 1:17, 1:18, 1:19 or 1:20. In this way, the top surface of the arched structure is a gentle and smooth arc surface, which can further reduce the filling difficulty of the first trench 21 and avoid the formation of gaps in the first trench 21.
[0083] Step S107: Form a gate dielectric layer 51, and the gate dielectric layer 51 covers the surfaces of the first trench 21 and the first mask layer 31.
[0084] In this embodiment, as Figure 7 shown, an atomic layer deposition process or in-situ steam generation (ISSG) can be used to form the gate dielectric layer 51, and the gate dielectric layer 51 covers the surfaces of the first trench 21 and the first mask layer 31.
[0085] For example, the material of the gate dielectric layer 51 may include at least one of silicon oxide or aluminum oxide.
[0086] Step S108: Form a gate conductive layer 52, and the gate conductive layer 52 covers the gate dielectric layer 51 and fills the first trench 21.
[0087] In this embodiment, as Figure 8 shown, an atomic layer deposition process, a chemical vapor deposition process or a physical vapor deposition process can be used to deposit and form the gate conductive layer 52, and the gate conductive layer 52 covers the gate dielectric layer 51 and fills the first trench 21 and the unfilled areas between the first mask layers 31.
[0088] The material of the gate conductive layer 52 may include a conductive metal or a semiconductor material doped with conductive ions. For example, the material of the gate conductive layer 52 may include doped polysilicon.
[0089] Step S109: Remove the first mask layer 31, and remove the gate dielectric layer 51 and the gate conductive layer 52 covering the first mask layer 31.
[0090] In this embodiment, as Figure 9 shown, chemical mechanical polishing (CMP) can be used to polish the gate conductive layer 52, the gate dielectric layer 51 and the first mask layer 31 until the top surface of the second mask layer 32 is exposed, then stop polishing. All of the first mask layer 31, the gate dielectric layer 51 covering the first mask layer 31, and the gate conductive layer 52 filled between the first mask layers 31 are polished and removed. At the same time, the uneven part at the top of the gate conductive layer 52 is removed, and only the gate conductive layer 52 and the gate dielectric layer 51 located in the first trench 21 are retained, forming discrete gate structures 50 in each first trench 21. The top surface of the gate structure 50 is a plane.
[0091] In this embodiment, the first trench 21 is etched in the silicon carbide substrate 20 according to the first mask layer 31. The top surface of the first mask layer 31 is not blocked by the second mask layer 32 with high hardness and high etching resistance, which reduces the processing difficulty of the top of the first mask layer 31. The horizontal etching rate and the vertical etching rate can be adjusted by controlling the etching parameters, and the top of the first mask layer 31 is etched into an arched structure. The arched structure has a smooth and gentle surface, which can reduce the filling difficulty of the first trench 21, avoid the sharp corners from affecting the deposition process and causing premature sealing of the filling material to generate filling voids, ensure that the first trench 21 can be filled with the gate conductive layer 52, and there are no unfilled voids in the first trench 21, ensuring the integrity of the structure and performance of the gate structure formed in the first trench 21, which is beneficial to reducing the resistance of the gate structure 50, improving the conductivity of the gate structure 50, and further improving the electrical performance of the silicon carbide device.
[0092] In some embodiments, referring to Figure 2 、 Figure 3 , after forming the first mask layer 31 and the second mask layer 32, transfer the silicon carbide substrate 20 to the first process chamber; adjust the first process chamber to the first process conditions, introduce the first gas into the first process chamber, and etch the second mask layer 32 and the first mask layer 31 layer by layer to form the second mask pattern 321 and the first mask pattern 311.
[0093] In this embodiment, forming the patterned second mask layer 32 to form the second mask pattern 321, and etching the first mask layer 31 according to the second mask pattern 321 are both performed in the first process chamber. After forming a photoresist layer on the top surface of the second mask layer 32, the silicon carbide substrate 20 is transferred into the first process chamber, the first process chamber is adjusted to the first process conditions, and the second mask layer 32 and the first mask layer 31 are etched by a first gas. The etching selectivity of the first gas for the second mask layer 32 and the first mask layer 31 is 1 or close to 1, so that there is no step at the interface of the etched second mask pattern 321 and the first mask pattern 311, and the sidewalls of the second mask pattern 321 and the first mask pattern 311 both have high perpendicularity.
[0094] In some embodiments, the first process conditions are: the pressure is 1 mtorr - 1 Torr, the temperature is 0 °C - 60 °C; the RF power is 10 W - 2000 W; the first gas includes a fluorine-containing gas.
[0095] After transferring the silicon carbide substrate 20 into the first process chamber, the pressure of the first process chamber is adjusted to 1 mtorr - 1 Torr. For example, the pressure of the first process chamber can be adjusted to 1 mtorr, 100 mtorr, 200 mtorr, 300 mtorr, 500 mtorr, 700 mtorr, 900 mtorr or 1 Torr.
[0096] The temperature of the first process chamber is adjusted to 0 °C - 60 °C. For example, the temperature of the first process chamber can be adjusted to 0 °C, 10 °C, 15 °C, 20 °C, 25 °C, 30 °C, 40 °C, 50 °C, 55 °C or 60 °C.
[0097] The first gas is introduced into the first process chamber, and the first gas includes a fluorine-containing gas. For example, the first gas can include at least one of carbon tetrafluoride (CF 4 ), trifluoromethane (CHF 3 ), tetrafluorohexene (C 4 F 6 ), octafluorocyclobutane (C 4 F 8 ), or sulfur hexafluoride (SF 6 ). In this embodiment, an inert gas is used as a carrier gas. For example, argon (Ar), nitrogen (N 2 ), or helium (He) is used as the carrier gas to dilute the first gas, and a small amount of oxygen is introduced into the first gas to increase the etching rate, and then the first gas is introduced into the first reaction chamber.
[0098] Then, turn on the radio frequency source of the first process chamber, and excite the first gas with a radio frequency power of 10W - 2000W to generate fluorine plasma, etch the second mask layer 32 and the first mask layer 31, and obtain a second mask pattern 321 and a first mask pattern 311 with high verticality on the sidewalls.
[0099] Exemplarily, adjust the radio frequency power of the first process chamber to 10W, 100W, 300W, 500W, 800W, 1000W, 1200W, 1500W, 1600W, 1800W, 1900W or 2000W.
[0100] In some embodiments, referring to Figure 5 , Figure 6 , after removing the second mask layer 32, transfer the silicon carbide substrate 20 to the second process chamber. Adjust the second process chamber to the second process conditions, introduce a second gas into the second process chamber, etch the silicon carbide substrate 20 to form a first trench 21; adjust the second process chamber to the third process conditions, introduce a third gas into the second process chamber, etch the first mask layer 31, and etch the top of the first mask layer 31 into an arched structure.
[0101] In this way, the steps of etching the silicon carbide substrate 20 to form the first trench 21 and etching the top of the first mask layer 31 into an arched structure are performed in the same process chamber, which can save the etching chambers on the production line, effectively reduce the production cost, and improve the production efficiency; at the same time, this embodiment can also reduce the transfer times of the silicon carbide substrate 20, which is beneficial to reducing the transfer loss of silicon carbide devices and improving the yield of products.
[0102] In some embodiments, the second process conditions are: the pressure is 1mtorr - 1Torr, the temperature is 0°C - 60°C; the radio frequency power is 50W - 3000W; the second gas includes at least one of a fluorine-containing gas, a bromine-containing gas or a chlorine-containing gas.
[0103] The third process conditions are: the pressure is greater than 50mtorr, the temperature is 30°C - 200°C; the radio frequency power is 10W - 2500W; the third gas includes a fluorine-containing gas.
[0104] In this embodiment, after transferring the silicon carbide substrate 20 to the second process chamber, adjust the second process chamber to the second process conditions.
[0105] Adjust the pressure of the second process chamber to 1 mTorr - 1 Torr. For example, the pressure of the second process chamber can be 1 mTorr, 100 mTorr, 200 mTorr, 300 mTorr, 500 mTorr, 700 mTorr, 900 mTorr, or 1 Torr. It can be understood that a low-pressure environment helps to improve the uniformity of the plasma and the anisotropy of etching, thereby obtaining more vertical sidewalls.
[0106] Adjust the temperature of the second process chamber to 0°C - 60°C. For example, the temperature of the second process chamber can be adjusted to 0°C, 5°C, 10°C, 15°C, 20°C, 25°C, 30°C, 35°C, 40°C, 45°C, 50°C, or 60°C. In this embodiment, defining the temperature for etching the first trench 21 as 0°C - 60°C is beneficial to reducing etching side reactions and reducing damage to the first mask layer 31.
[0107] Introduce a second gas into the second process chamber. The second gas includes at least one of a fluorine-containing gas, a bromine-containing gas, or a chlorine-containing gas. For example, the second gas can include at least one of silicon tetrafluoride (SiF 4 ), silicon hexafluoride (SiF 6 ), silicon tetrachloride (SiCl 4 ), hydrogen bromide (HBr), chlorine gas (Cl 2 ), boron trichloride (BCl 3 ). In this embodiment, an inert gas is used as a carrier gas. For example, the second gas is diluted with argon gas (Ar) or helium gas (He) as the carrier gas, and a small amount of nitrogen or hydrogen is introduced into the first gas, and then the second gas is introduced into the second reaction chamber.
[0108] Turn on the RF source of the second process chamber and excite the second gas with an RF power of 50 W - 3000 W to generate highly active plasma to etch the silicon carbide substrate 20. Transfer the first mask pattern 311 to the silicon carbide substrate 20 and etch to form the first trench 21, and the sidewall of the first trench 21 has high perpendicularity.
[0109] The RF power affects the plasma density and the etching rate. In this embodiment, according to the materials of the silicon carbide substrate 20 and the first mask layer 31, reasonably select the RF power for etching the first trench 21 to be 50 W - 3000 W, which is beneficial to improving the perpendicularity of the sidewall of the first trench 21 and reducing the damage to the first mask layer 31, ensuring the accurate transfer of the first mask pattern 311, so that the formed first trench 21 has high dimensional accuracy. For example, the RF power can be adjusted to 50, 100, 300, 500 W, 800 W, 1200 W, 1500 W, 2000 W, 2400 W, 2800 W, or 3000 W.
[0110] In this embodiment, after etching the silicon carbide substrate 20 to form the first trench 21, the following steps are further included:
[0111] Adjust the pressure in the second process chamber to a first pressure to etch the sidewalls of the first trench 21, and etch the sidewalls of the first trench 21 into vertical planes. The first pressure is less than 100 mTorr.
[0112] Adjust the pressure in the second process chamber to a second pressure to etch the bottom surface of the first trench 21, and etch the bottom surface of the first trench 21 into a gentle arc surface. The second pressure is greater than 100 mTorr.
[0113] It can be understood that during the etching of the first trench 21, in order to improve the etching rate and save the etching time, the pressure in the second process chamber can be adjusted to be greater than 100 mtorr, for example, 100 mtorr - 1 Torr. After the first trench 21 is etched, the pressure in the second process chamber is adjusted to the first pressure less than 100 mTorr to improve the directionality of the plasma, so that the plasma etching acts more concentratedly on the sidewalls of the first trench 21 and improves the perpendicularity of the sidewalls of the first trench 21.
[0114] Then, the pressure in the second process chamber is adjusted to the second pressure greater than 100 mTorr. At a higher pressure, the directionality of the plasma weakens, and the plasma etching acts more evenly on the bottom surface of the first trench 21, so that the bottom surface of the first trench 21 is etched into a gentle arc surface. In this way, the stress concentration on the bottom surface of the first trench 21 can be reduced, which is beneficial to improving the device reliability. At the same time, the bottom surface of the first trench 21 is a gentle arc surface, which can reduce the filling difficulty of the first trench 21 and avoid forming gaps at the corners of the first trench 21 when filling the gate conductive layer into the first trench 21, which is beneficial to reducing the resistance of the gate structure and improving the electrical performance of the device.
[0115] In this embodiment, after the first trench 21 is etched, a vacuum pumping process is performed on the second process chamber to suck and remove the second gas in the second process chamber.
[0116] Adjust the pressure in the second process chamber to be greater than 50 mtorr. For example, the pressure in the second process chamber can be adjusted to 50 mtorr, 800 mtorr, 100 mtorr, 150 mtorr, etc.
[0117] Adjust the temperature in the second process chamber to 30°C - 200°C. For example, the temperature in the second process chamber can be adjusted to 30°C, 40°C, 50°C, 70°C, 80°C, 100°C, 120°C, 140°C, 150°C, 160°C, 180°C or 200°C.
[0118] A third gas is introduced into the second process chamber. The third gas includes a fluorine-containing gas. The third gas has a high etching selectivity for the silicon carbide substrate 20, that is, the etching rate of the third gas for the first mask layer 31 is much greater than the etching rate for the silicon carbide substrate 20, so as to avoid damaging the silicon carbide substrate 20 in the step of etching the first mask layer 31 and affecting the morphology and dimensional accuracy of the first trench 21.
[0119] Exemplarily, the third gas may include carbon tetrafluoride (CF 4 ). An inert gas such as helium, nitrogen or bromine can be used as a carrier gas, and a small amount of oxygen is introduced into the third gas, and then the third gas is introduced into the second process chamber.
[0120] The RF power of the RF source in the second process chamber is adjusted to 10 W - 2500 W. Exemplarily, the RF power can be adjusted to 10 W, 100 W, 200 W, 500 W, 800 W, 1000 W, 1200 W, 1500 W, 1800 W, 2000 W, 2200 W, 2400 W or 2500 W.
[0121] The third gas excites the third gas to generate plasma, and the plasma selectively etches the first mask layer 31, and the third gas anisotropically etches the first mask layer 31. The etching rate of the third gas for etching the first mask layer 31 in the horizontal direction is greater than the etching rate for etching the first mask layer 31 in the vertical direction, so that the removal rate of the top of the first mask layer 31 is greater, and an arched structure is formed at the top of the first mask layer 31.
[0122] During the process of etching the first mask layer 31, the ratio of the radius of the arched structure to the thickness of the first mask layer 31 can be controlled to be 1:10 - 1:20 by controlling the flow rate, RF power, pressure and etching duration of the third gas. So that the top surface of the arched structure is a gentle and smooth arc surface, which can further reduce the filling difficulty of the first trench 21 and avoid forming gaps in the first trench 21.
[0123] The manufacturing method of the silicon carbide device according to the embodiments of the present disclosure optimizes the manufacturing process. By using stacked polysilicon layers and silicon oxide layers as the first mask layer 31 and the second mask layer 32 respectively, a second mask pattern 321 with high verticality on the sidewalls is formed by using the second mask layer 32, so as to etch the first mask layer 31 to obtain a first mask pattern 311 with high verticality on the sidewalls. Then, the second mask layer 32 is removed, and the silicon carbide substrate 20 is etched according to the first mask layer 31 made of polysilicon material to form a first trench 21, which can avoid the step problem at the interface between the first mask layer 31 and the silicon carbide substrate 20, ensure the high-precision transfer of the first mask pattern 311 to the silicon carbide substrate 20, and ensure that the sidewalls of the first trench 21 have high verticality. In the present disclosure, the steps of etching the silicon carbide substrate 20 to form the first trench 21 and etching the first mask layer 31 to etch the top of the first mask pattern 311 to form an arched structure are fabricated in the same process chamber, which can save production line equipment, reduce the transfer times of the silicon carbide substrate 20, reduce production costs, save production time, and improve the product yield. In the present disclosure, the sidewalls of the fabricated first trench 21 have high verticality and high smoothness, significantly reducing the sidewall roughness, improving the carrier mobility, and thus enhancing the device performance, which helps to improve the reliability and stability of the device.
[0124] It should be understood that although Figure 1 the steps in the flowchart of Figure 1 are shown in sequence according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise clearly stated in this article, there is no strict order limit for the execution of these steps, and these steps can be executed in other orders. Moreover,
[0125] At least a part of the steps in
[0126] Among them, the silicon carbide device of this embodiment can be a Dynamic Random Access Memory (DRAM), a Static Random-Access Memory (SRAM), a flash EPROM, a Ferroelectric Random Access Memory (FeRAM), a Magnetic Random-Access Memory (MRAM), or other types of memories.
[0127] According to an exemplary embodiment, the present disclosure also provides an electronic device, including the silicon carbide device of the above embodiment or the silicon carbide device manufactured by the manufacturing method of the silicon carbide device of the above embodiment. The electronic device can be a storage device, a mobile phone, a computer, a tablet computer, a television, an artificial intelligence device, etc.
[0128] The electronic device is, for example but not limited to, consumer electronic products, home electronic products, vehicle-mounted electronic products, financial terminal products and other suitable types of electronic products. Consumer electronic products such as mobile phones, tablet computers, laptop computers, desktop monitors, all-in-one computers, etc. Home electronic products such as smart door locks, televisions, refrigerators, wearable devices, etc. Vehicle-mounted electronic products such as vehicle-mounted navigators, vehicle-mounted DVDs, etc. Financial terminal products such as ATMs, terminals for self-service business handling, etc.
[0129] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.
[0130] The above-described embodiments only represent several implementation manners of the present disclosure. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present disclosure, several modifications and improvements can still be made, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure patent shall be subject to the appended claims.
Claims
1. A method for manufacturing a silicon carbide device, characterized in that: include: Providing a silicon carbide substrate, and sequentially forming a first mask layer and a second mask layer on the silicon carbide substrate; patterning the second mask layer to form a second mask pattern; Etching the first mask layer according to the second mask pattern to form a first mask pattern; removing the second mask layer; The silicon carbide substrate is etched according to the first mask pattern to form a first trench.
2. The method for manufacturing a silicon carbide device according to claim 1, characterized in that: After forming the first mask layer and the second mask layer, transferring the silicon carbide substrate to a first process chamber; The first process chamber is adjusted to a first process condition, a first gas is introduced into the first process chamber, and the second mask layer and the first mask layer are etched layer by layer to form the second mask pattern and the first mask pattern.
3. The method for manufacturing a silicon carbide device according to claim 2, characterized in that: The first process conditions are: pressure of 1mtorr-1Torr, temperature of 0°C-60°C, RF power of 10W-2000W; The first gas includes a fluorine-containing gas.
4. The method for manufacturing a silicon carbide device according to claim 1, characterized in that: After forming the first trench, the method further includes: Etching the first mask layer to etch the top of the first mask layer into an arch structure; forming a gate dielectric layer, wherein the gate dielectric layer covers the first trench and the surface of the first mask layer; forming a gate conductive layer, wherein the gate conductive layer covers the gate dielectric layer and fills the first trench; The first mask layer is removed, and the gate dielectric layer and the gate conductive layer covering the first mask layer are removed.
5. The method for manufacturing a silicon carbide device according to claim 4, characterized in that: The ratio of the radius of the arch structure to the thickness of the first mask layer is 1:10-1:
20.
6. The method for manufacturing a silicon carbide device according to claim 4, characterized in that: After removing the second mask layer, transferring the silicon carbide substrate to a second process chamber; adjusting the second process chamber to a second process condition, introducing a second gas into the second process chamber, etching the silicon carbide substrate, and forming the first groove; The second process chamber is adjusted to a third process condition, a third gas is introduced into the second process chamber, the first mask layer is etched, and the top of the first mask layer is etched into the arch structure.
7. The method for manufacturing a silicon carbide device according to claim 6, characterized in that: The second process conditions are: pressure of 1mtorr-1Torr, temperature of 0°C-60°C, and RF power of 50W-3000W; The second gas includes at least one of a fluorine-containing gas, a bromine-containing gas, or a chlorine-containing gas; The third process conditions are: pressure greater than 50 mtorr, temperature of 30°C-200°C; RF power of 10W-2500W; The third gas includes a fluorine-containing gas.
8. The method for manufacturing a silicon carbide device according to claim 6, characterized in that: After etching the silicon carbide substrate to form the first trench, the method further includes: adjusting the pressure of the second process chamber to the first pressure, etching the sidewall of the first groove, and etching the sidewall of the first groove into a vertical plane; adjusting the pressure of the second process chamber to a second pressure, etching the bottom surface of the first groove, and etching the bottom surface of the first groove into a gentle arc surface; The first pressure is less than 100 mTorr; and the second pressure is greater than 100 mTorr.
9. The method for manufacturing a silicon carbide device according to claim 1, characterized in that: After removing the second mask layer, the method further includes: The first mask pattern is corrected, and the roughness of the sidewall of the first mask pattern after correction is less than the roughness of the sidewall of the first mask pattern before correction.
10. The method for manufacturing a silicon carbide device according to claim 1, characterized in that: The material of the first mask layer includes polysilicon; the material of the second mask layer includes silicon oxide.