Transistor backboard structure

Abstract

The invention provides a transistor backboard structure which comprises a plurality of pixel structures and a wiring layer. Each pixel structure comprises a substrate, a transistor arranged on the substrate and a first insulating layer arranged on the transistor, and a plurality of conductive through holes are formed in the first insulating layer; the wiring layer is arranged on the pixel structures, the wiring layer comprises a plurality of stretchable electrode layers and a plurality of stretchable insulating layers, and the stretchable electrode layer located on the side, away from the pixel structures, of the wiring layer is connected with contacts of the transistors of the pixel structures through conductive through holes in the first insulating layers of the pixel structures to form pixel electrodes.

Description

Technical Field

[0001] The present invention relates to a structure of a display backplane, and particularly to a structure of a transistor backplane. Background Art

[0002] With the progress of technology, various display media are widely used in various display applications, such as televisions, laptop computers, e-paper books, mobile phones, large advertising billboards, various electronic tags in stores, etc. Among them, the electrophoretic display panel (EPD) has excellent characteristics, such as being light, thin, and having low power consumption.

[0003] Recently, flexible display devices that can be folded or rolled up have been developed in cooperation with the use of flexible substrates, and can also be designed to have the advantages of flexibility and being unbreakable when dropped. They can be made to stretch or contract in a specific direction, allowing the display device to be stretched into various shapes. And how to make the e-paper present different patterns, a key module is a stretchable and three-dimensional shapeable thin-film transistor backplane, which is used to drive the electrophoretic display medium and is used as a next-generation e-paper product. However, generally speaking, a display panel includes a display medium and a thin-film transistor backplane, and the traditional thin-film transistor backplane cannot be stretched, so that when integrated with a stretchable display medium (such as an electrophoretic display panel), it still cannot have the characteristics of being stretchable and three-dimensional shapeable. On the other hand, since the relative geometry of the gate, source, and drain of the thin-film transistor backplane affects the electrical performance, how to maintain consistent electrical properties after stretching is a problem that must be improved. Summary of the Invention

[0004] The present invention is directed to a structure of a transistor backplane that can achieve the effect of stretchable deformation while ensuring the electrical properties of the transistor.

[0005] An embodiment of the present invention provides a structure of a transistor backplane, including a plurality of pixel structures and a wiring layer. Each pixel structure includes a substrate, a transistor disposed on the substrate, and a first insulating layer disposed on the transistor. A plurality of conductive vias are disposed in the first insulating layer. The wiring layer is disposed on these pixel structures. The wiring layer includes a plurality of stretchable electrode layers and a plurality of stretchable insulating layers. These stretchable electrode layers are connected to the gates and sources of the transistors of the pixel structures through these conductive vias in the first insulating layer of each pixel structure, and the stretchable electrode layer located on the side of the wiring layer away from the pixel structure is connected to the contacts of the transistors of the pixel structures through the conductive vias in the first insulating layer of the pixel structure to form pixel electrodes.

[0006] In the transistor backplane structure of an embodiment of the present invention, the transistor is disposed on a substrate and connected to a stretchable electrode layer through a conductive via, and the wiring layer includes a stretchable electrode layer and a stretchable insulating layer. Such a design can enable the substrate to protect the transistor from being damaged due to deformation. On the other hand, the area without the substrate configured in the wiring layer can have the effect of stretchable deformation. Therefore, the transistor backplane structure of the embodiment of the present invention can achieve the effect of stretchable deformation while ensuring the electrical properties of the transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a schematic cross-sectional view of an electrophoretic display panel according to an embodiment of the present invention;

[0008] Figure 2 is Figure 1 a top view schematic diagram of a pixel structure in the transistor backplane structure of

[0009] Figure 3 is a schematic cross-sectional view of a transistor backplane structure according to another embodiment of the present invention;

[0010] Figure 4A is Figure 3 a top view schematic diagram of a pixel structure in the transistor backplane structure of

[0011] Figure 4B is Figure 4A a top view schematic diagram after a stretchable electrode layer grounded is disposed on the pixel structure of

[0012] Figure 4C is Figure 4A a top view schematic diagram after a stretchable electrode layer electrically connected to a contact point is disposed on the pixel structure of

[0013] Figure 5 is a schematic cross-sectional view of an electrophoretic display panel according to still another embodiment of the present invention;

[0014] Figure 6 is a schematic cross-sectional view of an electrophoretic display panel according to yet another embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0015] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals will be used in the drawings and the description to refer to the same or like parts.

[0016] Figure 1 is a schematic cross-sectional view of an electrophoretic display panel according to an embodiment of the present invention, and Figure 2 is Figure 1 a top view schematic diagram of a pixel structure in the transistor backplane structure of Figure 1 and Figure 2, the electrophoretic display panel 100 of this embodiment includes a transistor backplane structure 200, a stretchable display medium layer 110, and a stretchable substrate 120. The transistor backplane structure 200 includes a plurality of pixel structures 300 and a wiring layer 400. These pixel structures 300 can be arranged in an array, for example, in a two-dimensional array. Each pixel structure 300 includes a substrate 310, a transistor 320 disposed on the substrate 310, and a first insulating layer 330 disposed on the transistor 320. A plurality of conductive vias 332 are provided in the first insulating layer 330. In this embodiment, the transistor 320 is, for example, a thin film transistor (TFT).

[0017] The wiring layer 400 is disposed on these pixel structures 300. The wiring layer 400 includes a plurality of stretchable electrode layers 410 and a plurality of stretchable insulating layers 420. In this embodiment, these stretchable insulating layers 420 separate these stretchable electrode layers 410, making these stretchable electrode layers 410 electrically insulated from each other. These stretchable electrode layers 410 are connected to the gates 312 and sources 314 of the transistors 320 of the pixel structures 300 through these conductive vias 332 in the first insulating layer 330 of each pixel structure 300. In this embodiment, these stretchable electrode layers 410 connect the gates 312 and sources 314 of the transistors 320 of the pixel structures 300 to a driving circuit through these conductive vias 332 in the first insulating layer 330 of each pixel structure 300 for driving. In addition, a stretchable electrode layer 412 located on the side of the wiring layer 400 away from the pixel structures 300 is connected to the contact 318 of the transistor 320 of the pixel structure 300 through a conductive via 332 in the first insulating layer 330 of the pixel structure 300 to form a pixel electrode. In this embodiment, the stretchable electrode layers 412 of the wiring layer 400 are respectively connected to the conductive vias 332 in the first insulating layer 330 through a plurality of conductive vias 402 in the wiring layer 400. Thus, the gates 312 and sources 314 are respectively electrically connected to the stretchable electrode layer 412 through the conductive vias 332 and the conductive vias 402, and then electrically connected to the driving circuit. On the other hand, the stretchable electrode layer 412 is electrically connected to the contact 318 through the adjacent conductive vias 402 and the conductive vias 332.

[0018] In this embodiment, the material of the transistor 320 includes amorphous silicon, polycrystalline silicon, oxide semiconductor material, organic semiconductor material, or a combination thereof. In addition, in this embodiment, the transistor 320 further includes a channel layer 311 (which is a semiconductor layer) and a gate insulating layer 313. The channel layer 311 is connected between the source 314 and the contact 318, and the gate 312 extends to one side of the channel layer 311, and the gate insulating layer 313 is disposed between the channel layer 311 and the gate 312 to electrically insulate the gate 312 from the channel layer 311. By applying a voltage to the gate 312, it is possible to control whether the channel layer 311 is conductive. In this embodiment, each pixel structure 300 further includes a storage capacitor 319 disposed on the substrate 310. The storage capacitor 319 is electrically connected between the contact 318 and the ground terminal 316, and the first insulating layer 330 is disposed on the storage capacitor 319. In this embodiment, one of these stretchable electrode layers 410 is connected to the ground terminal 316 of the storage capacitor 319 through one of the conductive vias 402 in the wiring layer 400 and one of these conductive vias 332 in the first insulating layer 330 of each pixel structure 300 connected thereto. In this way, the ground terminal can be electrically connected to the ground of the driving circuit. Additionally, in this embodiment, the material of the gate insulating layer 313 can be an organic insulating material or an inorganic insulating material.

[0019] The stretchable display medium layer 110 is disposed between the stretchable substrate 120 and the transistor backplane structure 200. The stretchable display medium layer 110 is, for example, an electrophoretic display medium layer, which may include capsules 112 and electrophoretic particles 114 disposed in the capsules 112. A common electrode layer 130 may be provided between the stretchable display medium layer 110 and the stretchable substrate 120. When the driving circuit applies voltages to the gate 312, the source 314, and the common electrode layer 130, a voltage difference is generated between the stretchable electrode layer 412 and the common electrode layer 130, thereby changing the distribution state of the electrophoretic particles 114 in the capsules 112 and achieving various desired display effects. Therefore, the wiring layer 400 can also be regarded as an intermediate layer. In this embodiment, the stretchable display medium layer 110, the common electrode layer 130, and the stretchable substrate 120 are all made of stretchable and deformable materials.

[0020] In this embodiment, the Young's modulus of the first insulating layer 330 is less than that of the substrate 310. In addition, in this embodiment, the Young's moduli of these stretchable electrode layers 140 and those of these stretchable insulating layers 420 are both less than that of the substrate 310. That is to say, the substrate 310 is relatively hard and less likely to be stretched or deformed, so that the transistors 320 disposed thereon can be effectively protected. On the other hand, these stretchable electrode layers 140 and these stretchable insulating layers 420 are relatively soft and easy to be stretched or deformed. Therefore, the area A1 in the wiring layer 400 where no transistors 320 are provided is a stretchable area, so that the transistor backplane structure 200 and the electrophoretic display panel 100 can achieve the effect of stretchable deformation. In this embodiment, the material of the substrate 310 is, for example, polyimide or other materials with a relatively high Young's modulus.

[0021] In the transistor backplane structure 200 of this embodiment, the transistors 320 are disposed on the substrate 310 and connected to the stretchable electrode layer 410 through conductive vias 332, and the wiring layer 400 includes the stretchable electrode layer 410 and the stretchable insulating layer 420. Such a design can enable the substrate 310 to protect the transistors 320 from being damaged due to deformation. On the other hand, the area A1 in the wiring layer 400 where no substrate 310 is disposed can have the effect of stretchable deformation. Therefore, the transistor backplane structure 200 of this embodiment can achieve the effect of stretchable deformation and at the same time ensure the electrical properties of the transistors 320. That is to say, the transistor backplane structure 200 of this embodiment is suitable for being stretched and three-dimensionally shaped, and can have applications different from the past. However, during stretching and three-dimensional shaping, the transistors 320 can be not damaged, and thus the stretchable display medium layer 110 can be stably driven.

[0022] In this embodiment, a second insulating layer 340 is provided between adjacent pixel structures 300, and there is a gap G1 between the second insulating layer 340 and the adjacent pixel structures 300. In addition, the Young's modulus of the second insulating layer 340 is less than that of the substrate 310. In this embodiment, the multiple substrates 310 of these pixel structures 300 are respectively disposed on the multiple first insulating layers 330 of these pixel structures 300, but not on the multiple second insulating layers 340 between these first insulating layers 330. When fabricating these pixel structures 300 and the second insulating layer 340, an insulating layer can be formed on a large-area substrate, and then the large-area substrate and the insulating layer are cut to form the gap G1. A part of the insulating layer and the part of the substrate below it form these pixel structures 300, and another part of the insulating layer forms the second insulating layer 340. Then, the part of the substrate below the second insulating layer 340 is removed, and then Figure 1The transistor backplane structure 200. The design of the gap G1 is such that the main deformation and stretching region A1 is determined by the wiring layer 400 to solve the problem that the substrate 310 is difficult to stretch. In this embodiment, the gate insulating layer 313 can cover the lower surfaces of the first insulating layer 330 and the second insulating layer 340, and the portion of the gate insulating layer 313 covering the first insulating layer 330 is separated from the portion of the gate insulating layer 313 covering the second insulating layer 340 by the gap G1. In another embodiment, the gate insulating layer 313 may also only exist on the lower surface of the first insulating layer 330, that is, only in the pixel structure 300, and does not exist on the lower surface of the second insulating layer 340.

[0023] Figure 3 Schematic cross-sectional view of the transistor backplane structure according to another embodiment of the present invention, Figure 4A is Figure 3 Schematic top view of a pixel structure in the transistor backplane structure of Figure 4B is Figure 4A Schematic top view of the pixel structure after disposing a stretchable electrode layer grounded thereon, and Figure 4C is Figure 4A Schematic top view of the pixel structure after disposing a stretchable electrode layer electrically connected to a contact thereon. Please refer to Figure 3 and Figures 4A to 4C , the transistor backplane structure 200a of this embodiment is similar to the Figure 1 transistor backplane structure 200, and the main differences between the two are described as follows. In the transistor backplane structure 200a of this embodiment, two of these stretchable electrode layers 410 of the wiring layer 400a (for example, the stretchable electrode layer 414 and the stretchable electrode layer 416) and the stretchable insulating layer 422 located between these two layers form a storage capacitor 419. Compared with the Figure 1 embodiment, in this embodiment, the storage capacitor 419 is moved to the wiring layer 400a, which can effectively reduce the area occupied by the substrate 310, and thus expand the area of the stretchable region A2 (that is, the region without the substrate 310 configured) (it can be clearly seen that the Figure 3 region A2 is larger than the Figure 1 region A1). In this way, the transistor backplane structure 200a of this embodiment can be more suitable for stretching and deformation.

[0024] Figure 5 Schematic cross-sectional view of an electrophoretic display panel according to still another embodiment of the present invention. Please refer to Figure 5 , the electrophoretic display panel 100b of this embodiment is similar to the Figure 1 electrophoretic display panel 100, and the main differences between the two are described as follows. In the transistor backplane structure 200b of the electrophoretic display panel 100b of this embodiment, the first insulating layer 330 and the second insulating layer 340 are connected integrally and there is no such asFigure 1 a gap G1. In addition, the gate insulating layer 313 on the lower surface of the first insulating layer 330 is also connected integrally with the gate insulating layer 313 on the lower surface of the second insulating layer 340 without a gap G1 as Figure 1 a gap G1. Although there is no gap G1 in this embodiment, the material of the substrate 310 below the second insulating layer 340 has been removed. Therefore, the remaining second insulating layer 340 and the gate insulating layer 313 are flexible and stretchable, so the region A1 can still form a stretchable region.

[0025] Figure 6 is a schematic cross-sectional view of an electrophoretic display panel according to another embodiment of the present invention. Please refer to Figure 6 , the electrophoretic display panel 100c of this embodiment is similar to Figure 5 the electrophoretic display panel 100b, and the main differences between the two are described as follows. In the transistor backplane structure 200c of the electrophoretic display panel 100c of this embodiment, the first insulating layer 330 and the second insulating layer 340 are connected integrally without a gap G1 as Figure 1 a gap G1, but the gate insulating layer 313 on the lower surface of the first insulating layer 330 is disconnected from the gate insulating layer 313 on the lower surface of the second insulating layer 340, and there is a gap G1 between them. In this way, the region A1 can still form a stretchable region.

[0026] In summary, in the transistor backplane structure of the embodiments of the present invention, the transistors are disposed on the substrate and connected to the stretchable electrode layer through conductive vias, and the wiring layer includes a stretchable electrode layer and a stretchable insulating layer. Such a design can protect the transistors by the substrate so that they will not be damaged due to deformation. On the other hand, the region without the substrate configured in the wiring layer can have the effect of stretching deformation. Therefore, the transistor backplane structure of the embodiments of the present invention can achieve the effect of stretchable deformation while ensuring the electrical properties of the transistors.

[0027] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A transistor backplane structure, characterized in that, it includes: a plurality of pixel structures, each pixel structure including a substrate, a transistor disposed on the substrate, and a first insulating layer disposed on the transistor, and a plurality of conductive vias are disposed in the first insulating layer; and a wiring layer disposed on the plurality of pixel structures, the wiring layer including a plurality of stretchable electrode layers and a plurality of stretchable insulating layers, the plurality of stretchable electrode layers are connected to the gates and sources of the transistors of the pixel structures through the plurality of conductive vias in the first insulating layer of each pixel structure, and the stretchable electrode layer located on the side of the wiring layer away from the pixel structures is connected to the contacts of the transistors of the pixel structures through the conductive vias in the first insulating layer of the pixel structures to form pixel electrodes.

2. The transistor backplane structure according to claim 1, characterized in that, the Young's modulus of the first insulating layer is less than the Young's modulus of the substrate.

3. The transistor backplane structure according to claim 1, characterized in that, the Young's modulus of the plurality of stretchable electrode layers and the Young's modulus of the plurality of stretchable insulating layers are both less than the Young's modulus of the substrate.

4. The transistor backplane structure according to claim 1, characterized in that, a second insulating layer is disposed between adjacent ones of the plurality of pixel structures, and there is a gap between the second insulating layer and the adjacent pixel structures.

5. The transistor backplane structure according to claim 4, characterized in that, the Young's modulus of the second insulating layer is less than the Young's modulus of the substrate.

6. The transistor backplane structure according to claim 4, characterized in that, the plurality of substrates of the plurality of pixel structures are respectively disposed on the plurality of first insulating layers of the plurality of pixel structures, but not on the plurality of second insulating layers between the plurality of first insulating layers.

7. The transistor backplane structure according to claim 1, characterized in that, each pixel structure further includes a storage capacitor disposed on the substrate, and the first insulating layer is disposed on the storage capacitor.

8. The transistor backplane structure according to claim 7, characterized in that, one of the plurality of stretchable electrode layers is connected to the ground end of the storage capacitor through one of the plurality of conductive vias in the first insulating layer of each pixel structure.

9. The transistor backplane structure according to claim 1, characterized in that, two of the plurality of stretchable electrode layers and the stretchable insulating layer located between the two form a storage capacitor.

10. The transistor backplane structure according to claim 1, characterized in that, the material of the transistor includes amorphous silicon, polycrystalline silicon, oxide semiconductor material, organic semiconductor material, or a combination thereof.

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