Hall sensor based on sandwich structure and preparation method thereof

By using a sandwich structure in the Hall sensor, the first P-type buried layer, a low-doped N-well and a second P-type buried layer are stacked, and the problem that traditional Hall elements are difficult to control the thickness of the Hall layer when maintaining low concentration doping is solved, and the magnetic field detection sensitivity is improved.

CN120152604APending Publication Date: 2025-06-13SUZHOU COGENDA ELECTRONICS CO LTD
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Patent Information

Application Number
CN202510340653.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-21
Publication Date
2025-06-13

AI Technical Summary

Technical Problem

While maintaining low concentration doping, traditional Hall elements are difficult to effectively control the thickness of the Hall layer, resulting in a decrease in magnetic field detection sensitivity.

Method used

Using a Hall sensor design based on the sandwich structure, by stacking the first P-type buried layer, a low-doped N well and a second P-type buried layer in the P-type substrate, the diffusion range of ions in the low-doped N well is limited by using the first P-type buried layer and the second P-type buried layer to accurately control the thickness and concentration of the N-type layer.

Benefits of technology

The Hall layer is thin and has low concentration, which enhances the magnetic field detection sensitivity of Hall sensors, and solves the problem that doping concentration and thickness are difficult to control simultaneously in traditional technology.

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Abstract

The embodiment of the invention discloses a Hall sensor based on a sandwich structure and a preparation method thereof. The Hall sensor comprises a P-type substrate; an interlayer doping structure; the interlayer doping structure comprises a first P-type buried layer, a low-doped N well and a second P-type buried layer which are sequentially stacked from the back surface to the front surface of the P-type substrate; the active layer, the shallow trench isolation layer and the four N + contact layers are all located on the side, away from the back face of the P-type substrate, of the interlayer doping structure; in the projection in the thickness direction of the P-type substrate, the first P-type buried layer, the low-doped N well, the second P-type buried layer and the active layer are of a cross-shaped structure intersecting in the first direction and the second direction, and the four N + contact layers are distributed on the two sides, away from each other in the first direction and the second direction, of the cross-shaped active layer and are spaced from the active layer. According to the Hall element provided by the embodiment of the invention, through the PNP type sandwich structure, the Hall element with thin N-type layer thickness and low concentration is provided, and the magnetic field detection sensitivity of the Hall sensor is enhanced.
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Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of sensors, and in particular, to a Hall sensor based on a sandwich structure and a preparation method thereof. Background Art

[0002] In a conventional Hall sensor, an N-well resistor (low-doped N-well) is used as a magnetic field sensing part to form a Hall disk. When a magnetic field passes perpendicularly, electrons in the N-well resistor are affected by the Lorentz force and turn. A voltage can be measured at the other two crossed ends. Dividing the voltage by the current gives the resistance, and this resistance changes with the magnitude of the magnetic field. Reducing the doping concentration and thickness of the Hall layer can increase the Hall sensitivity.

[0003] The prior art often prepares the N-well resistor by ion implantation, that is, impurity ions are accelerated in a strong electric field and then implanted into a semiconductor material. After that, annealing is also required to activate the impurities and repair lattice damage. During this process, the impurity ions will thermally diffuse. When reducing the ion implantation amount to lower the doping concentration, although the initial number of ions in the Hall layer decreases, during annealing, the ions will thermally diffuse, and it is difficult to ensure that the diffusion only occurs within the original Hall layer thickness range. It is very likely to diffuse into deeper regions, resulting in an increase in the Hall layer thickness. Summary of the Invention

[0004] The present invention provides a Hall sensor based on a sandwich structure and a preparation method thereof. By using a sandwich doping structure to prepare a low-doped N-well with a thin thickness and a low concentration, the problem that traditional Hall elements are difficult to control the Hall layer thickness while maintaining a low doping concentration is solved.

[0005] The embodiments of the present invention provide a Hall sensor based on a sandwich structure, including:

[0006] A P-type substrate;

[0007] A sandwich doping structure, located in the P-type substrate; the sandwich doping structure includes a first P-type buried layer, a low-doped N-well, and a second P-type buried layer that are sequentially stacked in the direction from the back surface to the front surface of the P-type substrate;

[0008] An active layer, a shallow trench isolation layer, and four N+ contact layers, all located on one side of the sandwich doping structure away from the back surface of the P-type substrate;

[0009] In the projection along the thickness direction of the P-type substrate, the first P-type buried layer, the low-doped N-well, the second P-type buried layer and the active layer are all in a cross-shaped structure intersecting along the first direction and the second direction, the four N+ contact layers are distributed on the two sides of the cross-shaped active layer that are away from each other along the first direction and the second direction, and there is a gap between the active layer and the shallow trench isolation layer. The second P-type buried layer has a length of L2 and W2 in the first direction and the second direction respectively, and the low-doped N-well has a length of L and W in the first direction and the second direction respectively; wherein, L2<L, W2<W; the first direction and the second direction are parallel to the surface of the P-type substrate and perpendicular to each other;

[0010] Each of the four N+ contact layers is electrically contacted with the low-doped N well through an N-type deep well (50).

[0011] Optionally, in the projection along the thickness direction of the P-type substrate, the lengths of the second P-type buried layer in the first direction and the second direction are L1 and W1 respectively; wherein, L1>L, W1>W; or, L1=L, W1=W; or, L1=L2, W1=W2.

[0012] Optionally, the doping ions of the first P-type buried layer and the second P-type buried layer are indium, and the doping ions of the low-doped N-well are antimony.

[0013] Optionally, the ion doping concentration of the low-doped N-well is less than 8e18 / cm 3 The ion doping concentration of the first P-type buried layer and the second P-type buried layer is greater than 1e17 / cm 3 .

[0014] Optionally, the thickness of the low-doped N-well ranges from 0 to 3 μm.

[0015] According to another aspect of the present invention, a method for preparing a Hall sensor based on a sandwich structure is provided, which is used to prepare the Hall sensor based on the sandwich structure as in the first aspect, and the preparation method comprises:

[0016] Providing a P-type substrate;

[0017] A sandwich doping structure is prepared in a P-type substrate; wherein the sandwich doping structure comprises a first P-type buried layer, a low-doped N-well, and a second P-type buried layer stacked in sequence from the back side of the P-type substrate toward the front side;

[0018] An active layer, a shallow trench isolation layer and four N+ contact layers are prepared on the side of the sandwich doping structure away from the back of the P-type substrate;

[0019] Among them, in the projection along the thickness direction of the P-type substrate, the first P-type buried layer, the low-doped N-well, the second P-type buried layer and the active layer all present a cross-shaped structure intersecting along the first direction and the second direction, the four N+ contact layers are distributed on both sides of the cross-shaped active layer that are away from each other along the first direction and the second direction, and there is a spacing between the active layer, the shallow trench isolation layer is located in the area except the projection of the active layer and the N+ contact layer, the lengths of the second P-type buried layer in the first direction and the second direction are L2 and W2 respectively, the lengths of the low-doped N-well in the first direction and the second direction are L and W respectively; wherein, L2<L, W2<W; the first direction and the second direction are parallel to the surface of the P-type substrate and perpendicular to each other; the four N+ contact layers are each electrically contacted with the low-doped N-well through an N-type deep well.

[0020] Optionally, preparing a sandwich doping structure in a P-type substrate includes:

[0021] A first photoresist mask is prepared on the front surface of the P-type substrate by a photolithography process, and a first P-type buried layer is prepared in the P-type substrate by an ion implantation process using the first photoresist mask;

[0022] A second photoresist mask is prepared on the front surface of the P-type substrate by a photolithography process, and a low-doped N-well is prepared in the P-type substrate by an ion implantation process using the second photoresist mask;

[0023] A third photoresist mask is prepared on the front surface of the P-type substrate by a photolithography process, and a second P-type buried layer is prepared in the P-type substrate by an ion implantation process using the third photoresist mask;

[0024] The first P-type buried layer, the low-doped N-well and the second P-type buried layer are stacked in sequence along the direction from the back side to the front side of the P-type substrate.

[0025] Optionally, preparing a sandwich doping structure in a P-type substrate includes:

[0026] By means of a photolithography process, a fourth photoresist mask is prepared on the front surface of the P-type substrate, and by means of an ion implantation process, a first P-type buried layer and a second P-type buried layer are prepared in the P-type substrate, or a first P-type buried layer and a low-doped N-well are prepared in the P-type substrate;

[0027] By means of a photolithography process, a fifth photoresist mask is prepared on the front surface of the P-type substrate, and by means of an ion implantation process, a low-doped N-well is prepared in the P-type substrate, or a second P-type buried layer is prepared in the P-type substrate;

[0028] The first P-type buried layer, the low-doped N-well and the second P-type buried layer are stacked in sequence along the direction from the back side to the front side of the P-type substrate.

[0029] Optionally, before preparing the active layer, the shallow trench isolation layer and the four N+ contact layers on the side of the sandwich doping structure away from the back side of the P-type substrate, the method further includes:

[0030] Growing an epitaxial layer on the front side of a P-type substrate;

[0031] An active layer, a shallow trench isolation layer and four N+ contact layers are prepared on the side of the sandwich doping structure away from the back of the P-type substrate, including:

[0032] An active layer, a shallow trench isolation layer and four N+ contact layers are prepared in the epitaxial layer.

[0033] Optionally, an active layer, a shallow trench isolation layer and four N+ contact layers are prepared in the epitaxial layer, including:

[0034] preparing a shallow trench isolation layer in the epitaxial layer;

[0035] An ion implantation process is used to sequentially prepare an N-type deep well, an N+ contact layer and an active layer.

[0036] The embodiment of the present invention provides a Hall sensor based on a sandwich structure and a preparation method thereof, the Hall sensor comprising: a P-type substrate; a sandwich doping structure located in the P-type substrate; the sandwich doping structure comprising a first P-type buried layer, a low-doped N-well and a second P-type buried layer stacked in sequence along the back side of the P-type substrate toward the front side; an active layer, a shallow trench isolation layer and four N+ contact layers, all located on the side of the sandwich doping structure away from the back side of the P-type substrate; in the projection along the thickness direction of the P-type substrate, the first P-type buried layer, the low-doped N-well, the second P-type buried layer and the active layer all present a cross-shaped structure intersecting along a first direction and a second direction, the four N+ contact layers are distributed on two sides of the cross-shaped active layer away from each other along the first direction and the second direction, and there is a spacing between the four N+ contact layers and the active layer, the shallow trench isolation layer is located in a region other than the projection of the active layer and the N+ contact layer, and the four N+ contact layers are each electrically contacted with the low-doped N-well through an N-type deep well. The embodiment of the present invention can limit the diffusion range of ions in the low-doped N-well through the first P-type buried layer and the second P-type buried layer, effectively control the thickness of the low-doped N-well, and make the N-type layer in the Hall element meet the requirements of thin thickness and low concentration at the same time, thereby enhancing the magnetic field detection sensitivity of the Hall sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 is a schematic structural diagram of a Hall sensor provided by an embodiment of the present invention;

[0038] Figure 2 is a longitudinal cross-sectional view of a Hall sensor provided by an embodiment of the present invention;

[0039] Figure 3 is a longitudinal cross-sectional view of another Hall sensor provided by an embodiment of the present invention;

[0040] Figures 4 - 8 These are the flowcharts of four preparation methods for four Hall sensors based on the sandwich structure provided by the embodiments of the present invention;

[0041] Figures 9 - 13 They are respectively corresponding to Figures 4 - 8 the structural flowcharts of the four preparation methods. Detailed implementation manners

[0042] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the present invention, rather than limiting the present invention. Additionally, it should be noted that for the sake of description, only parts related to the present invention rather than all structures are shown in the accompanying drawings.

[0043] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned accompanying drawings are used to distinguish similar objects, and do not necessarily need to be used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0044] Figure 1 is a schematic structural diagram of a Hall sensor based on the sandwich structure provided by the embodiments of the present invention, Figure 2 is a longitudinal sectional view of a Hall sensor based on the sandwich structure provided by the embodiments of the present invention, Figure 3 is another longitudinal sectional view of a Hall sensor based on the sandwich structure provided by the embodiments of the present invention, Figure 2 and Figure 3 the longitudinal sectional view shown corresponds to Figure 1 the position indicated by the red arrow in. Wherein, the first direction x and the second direction y are two mutually perpendicular directions on the horizontal plane, Figure 2 and Figure 3 the plane where the longitudinal sectional view shown is perpendicular to the second direction y.

[0045] As shown in Figure 1 、 Figure 2 and Figure 3 shown, in some embodiments, the Hall sensor includes:

[0046] a P-type substrate 100;

[0047] The sandwich doping structure 10 is located in a P-type substrate 100; the sandwich doping structure 10 includes a direction from the back side of the P-type substrate 100 to the front side (eg Figure 2 and Figure 3 A first P-type buried layer 11, a low-doped N-well 12, and a second P-type buried layer 13 are sequentially stacked (from bottom to top as shown);

[0048] The active layer 20, the shallow trench isolation layer 30 and the four N+ contact layers 40 are all located on the side of the sandwich doping structure 10 away from the back side of the P-type substrate 100;

[0049] In the projection along the thickness direction of the P-type substrate 100, the first P-type buried layer 11, the low-doped N-well 12, the second P-type buried layer 13 and the active layer 20 are all in a cross-shaped structure intersecting along the first direction x and the second direction y, the four N+ contact layers 40 are distributed on the two sides of the cross-shaped active layer 20 that are away from each other along the first direction x and the second direction y, and there is a gap between the active layer 20, the shallow trench isolation layer 30 is located in the area except the projection of the active layer 20 and the N+ contact layer 40, the length of the second P-type buried layer 13 in the first direction x and the second direction y are L2 and W2 respectively, the length of the low-doped N-well 12 in the first direction x and the second direction y are L and W respectively; wherein, L2<L, W2<W; the first direction x and the second direction y are parallel to the surface of the P-type substrate 100 and perpendicular to each other;

[0050] Each of the four N+ contact layers 40 is in electrical contact with the low-doped N well 12 through an N-type deep well 50 .

[0051] Among them, the P-type substrate 100 can be understood as a semiconductor substrate in which the majority of carriers are holes (positive charges); the sandwich doping structure 10 can be understood as a PNP-type sandwich region formed in the P-type substrate 100; the low-doped N-well 12 can be understood as an N-type deep well formed in the sandwich doping structure 10; the first P-type buried layer 11 and the second P-type buried layer 13 can be understood as P-type restriction layers respectively arranged below and above the low-doped N-well 12 for limiting the thickness of the low-doped N-well 12; the active layer 20 can be understood as an area in the semiconductor structure for current conduction and signal processing. In the Hall sensor, the active layer 20 is used to detect changes in the magnetic field; the shallow trench isolation layer 30 can be understood as an insulating material filling; the N+ contact layer 40 can be understood as a high-doping concentration N-type deep well 50 for forming a loop with an external circuit, and current flows into or out of the external circuit through the N+ contact layer 40.

[0052] In an embodiment of the present invention, a P-type substrate 100 provides a semiconductor platform; a first P-type buried layer 11, a low-doped N-well 12, and a second P-type buried layer 13 stacked in sequence from bottom to top form a PNP-type structure. Through the first P-type buried layer 11 and the second P-type buried layer 13, the diffusion range of ions in the low-doped N-well 12 can be limited, thereby effectively controlling the thickness of the low-doped N-well. The active layer 20, the shallow trench isolation layer 30 and the four N+ contact layers 40 are all located on the side of the sandwich doping structure 10 away from the back of the P-type substrate 100; in the projection along the thickness direction of the P-type substrate 100, the first P-type buried layer 11, the low-doped N-well 12, the second P-type buried layer 13 and the active layer 20 are all in a cross-shaped structure intersecting along the first direction x and the second direction y, and the four N+ contact layers 40 are distributed on both sides of the cross-shaped active layer 20 that are away from each other along the first direction x and the second direction y, and there is a gap between the active layer 20, and the shallow trench isolation layer 30 is located in the area except the projection of the active layer 20 and the N+ contact layer 40. The shallow trench isolation layer 30 is used to prevent current from flowing between different circuit areas, and plays a further role in electrical isolation; the four N+ contact layers 40 are each electrically contacted with the low-doped N-well 12 through an N-type deep well 50 with good conductivity. The lengths of the second P-type buried layer 13 in the first direction x and the second direction y are L2 and W2 respectively, and the lengths of the low-doped N-well 12 in the first direction x and the second direction y are L and W respectively; L2<L, W2<W are used to ensure that there is a spacing between the N+ contact layer 40 and the active layer 20. In the embodiment of the present invention, two P-type buried layers are sandwiched between the upper and lower sides of the low-doped N-well, so that the N-type layer in the Hall element can meet the requirements of thin thickness and low concentration at the same time, thereby enhancing the magnetic field detection sensitivity of the Hall sensor.

[0053] Continue to refer Figure 2 and Figure 3 In an optional embodiment, in the projection along the thickness direction of the P-type substrate 100, the lengths of the second P-type buried layer 13 in the first direction and the second direction are L1 and W1 respectively; wherein, L1>L, W1>W; or, L1=L, W1=W; or, L1=L2, W1=W2.

[0054] Specifically, the second P-type buried layer 13 is disposed below the low-doped N-well 12 to reduce the influence of free electrons in the P-type substrate 100 on the Hall disk, so the width of the second P-type buried layer 13 only needs to be greater than or equal to the width of the first P-type buried layer 11. Furthermore, the width of the second P-type buried layer 13 can be adjusted according to different preparation processes.

[0055] For example, Figure 2 A situation where L1>L>L2, W1>W>W2 is shown; Figure 3A case where L1 = L2 and W1 = W2 is shown. In this case, when preparing the first P-type buried layer 11 and the second P-type buried layer 13, a photolithography mask with the same position and size can be set, and then P-type buried layers of the same size can be prepared.

[0056] In an alternative embodiment, the doping ions of the first P-type buried layer 11 and the second P-type buried layer 13 are indium, and the doping ions of the low-doped N-well 12 are antimony.

[0057] Specifically, using heavy ions such as indium (In) and antimony (Sb) and dopants with a low diffusion coefficient can ensure distinct boundaries between layers, thereby reducing the mutual diffusion and mixing between the N-layer and the P-layer, maintaining the thickness distribution of each layer in the sandwich, and ensuring the sensing sensitivity. Further, a rapid thermal annealing process can also be employed to suppress the lateral diffusion of P / N-type impurities, thereby ensuring the electrical properties and structural integrity of each layer.

[0058] In an alternative embodiment, the ion doping concentration of the low-doped N-well 12 is less than 8e18 / cm 3 , and the ion doping concentrations of the first P-type buried layer 11 and the second P-type buried layer 13 are greater than 1e17 / cm 3 .

[0059] Specifically, the ion doping concentration of the low-doped N-well 12 being less than 8e18 / cm 3 is beneficial to increasing the sensitivity of the Hall element. The ion doping concentrations of the first P-type buried layer 11 and the second P-type buried layer 13 being greater than 1e17 / cm 3 increases the number of holes. Under the same magnetic field and current conditions, more holes will participate in deflection, thereby generating a larger Hall voltage, which helps to improve the sensitivity and measurement accuracy of the Hall element. Specifically, it can make the Hall element have better linearity within a certain range. Good linearity can simplify the signal processing process, improve the accuracy and reliability of the measurement results, and enable the Hall element to play a role in a wider range of application scenarios.

[0060] In an alternative embodiment, the thickness range of the low-doped N-well 12 is 0 - 3 μm.

[0061] Specifically, the thickness of the N-well affects its resistance value. When the thickness is within the range of 0 - 3 μm, the resistance of the low-doped N-well can be at an appropriate level, which can not only ensure good electrical properties of the PN junction formed with the P-type buried layer but also make the current distribution of the entire Hall element reasonable. A thinner N-well can make the carriers more easily affected by the magnetic field, and an obvious change in the Hall voltage can be generated under a lower magnetic field, improving the detection sensitivity to weak magnetic fields.

[0062] Based on the Hall sensor of the above embodiments, the embodiments of the present invention also provide a method for manufacturing a Hall sensor.Figures 4 - 8 is a flow chart of four methods for preparing four Hall sensors based on sandwich structures provided by embodiments of the present invention, Figures 9 - 13 They are respectively Figures 4 - 8 The structural flow chart of four preparation methods. Figures 4 - 13 , various preparation methods provided by the present invention are explained and illustrated:

[0063] refer to Figure 4 , the preparation method comprises:

[0064] S110 , providing a P-type substrate.

[0065] Specifically, Figure 1 , Figure 2 and Figure 9 As shown in a), the P-type substrate 100 is the basis for the manufacture of the entire Hall sensor, and provides physical support for the growth of subsequent layers and the integration of devices. For example, single crystal silicon can be selected as the P-type substrate material.

[0066] S120. Prepare a sandwich doping structure in a P-type substrate.

[0067] Specifically, Figure 1 , Figure 2 and Figure 9 b), by setting photoresist at corresponding positions on the P-type substrate 100, dividing the corresponding range of the sandwich doping structure, and sequentially setting doping plans of different particles, different depths and different energies, the doping of the first P-type buried layer 11, the second P-type buried layer 13 and the low-doped N-well 12 is completed. For example, indium ions are used for the first P-type buried layer 11 and the second P-type buried layer 13, and antimony ions are used for the low-doped N-well 12. Among them, by adjusting the energy of ion injection, the depth position of ion injection can be controlled; by adjusting the amount of ion injection, the concentration of ion injection can be controlled.

[0068] S130, preparing an active layer, a shallow trench isolation layer and four N+ contact layers on the side of the sandwich doping structure away from the back side of the P-type substrate.

[0069] Specifically, Figure 1 , Figure 2 and Figure 9 As shown in c), a photoresist layer with a specific pattern is formed on the P-type substrate 100 using photolithography technology, and an active layer 20, a shallow trench isolation layer 30 and four N+ contact layers 40 are sequentially prepared using etching deposition or ion implantation methods.

[0070] The active layer 20 is cross-shaped, and includes a central region and four arm regions connected to the central region. The four arm regions are respectively located on two sides of the central region that are away from each other in the first direction and the second direction.

[0071] The preparation process of the shallow trench isolation layer 30 includes: (1) forming a photoresist layer with a specific pattern on the P-type substrate 100 and the shallow trench isolation layer 30 using photolithography technology, and removing the P-type substrate 100 under the photoresist layer using etching technology (such as wet etching or dry etching); (2) filling the shallow trench isolation material in the shallow trench isolation layer 30; (3) removing the excess filling material through chemical etching and / or mechanical grinding.

[0072] The four N+ contact layers 40 are respectively located on one side of the arm area of the cross-shaped active layer 20 away from the central area; there is a gap between the N+ contact layer 40 and the corresponding arm area. The N+ contact layer 40 is connected to the low-doped N well 12 through an N-type deep well 50 with good conductivity.

[0073] Exemplarily, first, as Figure 12 shown, a trench is formed by etching, and then an insulating material is filled in the trench to achieve electrical isolation. Then, as Figure 13 shown, an N-type deep well 50 with good conductivity is formed by doping N-type ions at the position where the N+ contact layer 40 is located and connected to the low-doped N well 12. Finally, as Figure 1 shown, high-concentration N+ contact layers 40 are prepared at the four arm ends of the active layer 20 to transmit the signal generated by the Hall element to the external circuit.

[0074] In the embodiment of the present invention, first, providing a P-type substrate provides physical support for the growth of subsequent layers and the integration of devices. Then, by preparing a sandwich doping structure in the P-type substrate, a low-doped N well with a low concentration and a low thickness is obtained. Finally, an active layer, a shallow trench isolation layer, and four N+ contact layers are prepared on one side of the back of the sandwich doping structure away from the P-type substrate; the active layer provides a conduction path for current; the shallow trench isolation layer shields the free charges in the P-type substrate and blocks the charge overflow in the Hall element; the N+ contact layer forms an effective conductive channel with the low-doped N well. The embodiment of the present invention provides a Hall element with a thin and low-concentration N-type layer by preparing a PNP-type sandwich structure, enhancing the magnetic field detection sensitivity of the Hall sensor.

[0075] Refer to Figure 5, the preparation method of the Hall sensor based on the above embodiments is refined. Specifically, a sandwich doping structure is prepared in the P-type substrate, including: through a photolithography process, a first photoresist mask is prepared on the front surface of the P-type substrate, and using the first photoresist mask, through an ion implantation process, a first P-type buried layer is prepared in the P-type substrate; through a photolithography process, a second photoresist mask is prepared on the front surface of the P-type substrate, and using the second photoresist mask, through an ion implantation process, a low-doped N-well is prepared in the P-type substrate; through a photolithography process, a third photoresist mask is prepared on the front surface of the P-type substrate, and using the third photoresist mask, through an ion implantation process, a second P-type buried layer is prepared in the P-type substrate; wherein, the first P-type buried layer, the low-doped N-well and the second P-type buried layer are stacked in sequence along the direction from the back surface to the front surface of the P-type substrate.

[0076] For the content not detailed in this embodiment, please refer to the previous embodiment.

[0077] As Figure 5 shown, a schematic flow chart of another preparation method of the Hall sensor provided by the embodiment of the present invention includes the following steps:

[0078] S210. Provide a P-type substrate.

[0079] S220. Through a photolithography process, a first photoresist mask is prepared on the front surface of the P-type substrate, and using the first photoresist mask, through an ion implantation process, a first P-type buried layer is prepared in the P-type substrate.

[0080] Among them, the first P-type buried layer serves as the bottom doping region, and together with the subsequent N-well and the second P-type buried layer, it forms a PNP sandwich structure, and its position determines the lower boundary of the low-doped N-well.

[0081] Specifically, as Figure 1 , Figure 2 and Figure 10 b) shown, a photoresist is coated on the front surface of the P-type substrate 100 to prepare a second photoresist mask 61. After exposure and development, an opening area is formed, and the horizontal range of the first P-type buried layer 11 is defined through the first photoresist mask 61. Then, a P-type ion dopant, such as an indium ion dopant, is selected, and the implantation energy (ensuring that the buried layer depth is in the middle and lower layers of the substrate) and the implantation dose (ensuring that the concentration of the formed P-type region is appropriate, such as greater than 1e17 / cm 3 ) are determined according to the longitudinal depth of the first P-type buried layer 11.

[0082] S230. Through a photolithography process, a second photoresist mask is prepared on the front surface of the P-type substrate, and using the second photoresist mask, through an ion implantation process, a low-doped N-well is prepared in the P-type substrate.

[0083] Specifically, as Figure 1 , Figure 2 andFigure 10 As shown in c), similar to the first P-type buried layer 11, photoresist is coated on the front surface of the P-type substrate 100 to prepare the second photoresist mask 62. After exposure and development, an opening area is formed, and the horizontal range of the low-doped N well is defined through the second photoresist mask 62. Then, an N-type ion dopant, such as an antimony ion dopant, is selected. The implantation energy is determined based on the longitudinal depth of the first P-type buried layer 11 (ensuring that the buried layer depth is above the first P-type buried layer 11) and the implantation dose (ensuring that the concentration of the formed N-type region is appropriate, such as less than 1e17 / cm 3 )

[0084] S240. Through a lithography process, a third photoresist mask is prepared on the front surface of the P-type substrate, and by using the third photoresist mask, a second P-type buried layer is prepared in the P-type substrate through an ion implantation process.

[0085] Among them, the first P-type buried layer, the low-doped N well, and the second P-type buried layer are stacked in sequence along the direction from the back surface to the front surface of the P-type substrate.

[0086] Specifically, as Figure 1 、 Figure 2 and Figure 10 shown in d), similar to the first P-type buried layer 11, photoresist is coated on the front surface of the P-type substrate 100 to prepare the third photoresist mask 63. After exposure and development, an opening area is formed, and the horizontal range of the second P-type buried layer 13 is defined through the third photoresist mask 63. Then, a P-type ion dopant, such as an indium ion dopant, is selected. The implantation energy is determined based on the longitudinal depth of the second P-type buried layer 13 (ensuring that the buried layer depth is in the upper middle layer of the substrate) and the implantation dose (ensuring that the concentration of the formed P-type region is appropriate, such as greater than 1e17 / cm 3 )

[0087] S250. An active layer, a shallow trench isolation layer, and four N+ contact layers are prepared on one side of the sandwich doping structure facing away from the back surface of the P-type substrate.

[0088] The embodiment of the present invention provides a method for manufacturing a Hall sensor. By precisely controlling the ion implantation depth and concentration of the first P-type buried layer, the low-doped N well, and the second P-type buried layer, it is ensured to obtain the required PNP-type sandwich. The thickness of the low-doped N well in the vertical direction is ensured through the first P-type buried layer and the second P-type buried layer, and a Hall layer with a thin N-type layer thickness and a low concentration is prepared, increasing the resistance of the Hall layer, thereby enhancing the magnetic field detection sensitivity of the Hall sensor.

[0089] Refer to Figure 6, the preparation method of the Hall sensor based on the above embodiment is refined. Specifically, a sandwich doping structure is prepared in the P-type substrate, including: through a photolithography process, a fourth photoresist mask is prepared on the front surface of the P-type substrate, and using the fourth photoresist mask, through an ion implantation process, a first P-type buried layer and a second P-type buried layer are prepared in the P-type substrate, or a first P-type buried layer and a lightly doped N-well are prepared in the P-type substrate; through a photolithography process, a fifth photoresist mask is prepared on the front surface of the P-type substrate, and using the fifth photoresist mask, through an ion implantation process, a lightly doped N-well is prepared in the P-type substrate, or a second P-type buried layer is prepared in the P-type substrate; wherein, the first P-type buried layer, the lightly doped N-well and the second P-type buried layer are stacked in sequence along the direction from the back surface to the front surface of the P-type substrate.

[0090] For the content not detailed in this embodiment, please refer to the previous embodiment.

[0091] As Figure 6 shown, a schematic flow chart of another preparation method of the Hall sensor provided by the embodiment of the present invention includes the following steps:

[0092] S310. Provide a P-type substrate.

[0093] S320. Through a photolithography process, a fourth photoresist mask is prepared on the front surface of the P-type substrate, and using the fourth photoresist mask, through an ion implantation process, a first P-type buried layer and a second P-type buried layer are prepared in the P-type substrate, or a first P-type buried layer and a lightly doped N-well are prepared in the P-type substrate.

[0094] Specifically, as Figure 1 , Figure 2 and Figure 11 b) shown, when the ranges of the first P-type buried layer 11 and the second P-type buried layer 13 in the horizontal direction are the same, a fourth photoresist mask 64 is prepared on the front surface of the P-type substrate 100 by using photolithography technology, and using the fourth photoresist mask 64, the first P-type buried layer 11 and the second P-type buried layer 13 can be prepared using the same photoresist mask. There is a certain spacing between the first P-type buried layer 11 and the second P-type buried layer 13, and this spacing is the thickness of the preset lightly doped N-well 12. Similarly, when the ranges of the first P-type buried layer 11 and the lightly doped N-well 12 in the horizontal direction are the same, the first P-type buried layer 11 and the lightly doped N-well 12 can be prepared using the fourth photoresist mask 64.

[0095] S330. Through a photolithography process, a fifth photoresist mask is prepared on the front surface of the P-type substrate, and using the fifth photoresist mask, through an ion implantation process, a lightly doped N-well is prepared in the P-type substrate, or a second P-type buried layer is prepared in the P-type substrate.

[0096] Among them, the first P-type buried layer, the low-doped N well, and the second P-type buried layer are stacked in sequence along the direction from the back side to the front side of the P-type substrate.

[0097] Specifically, as Figure 1 , Figure 2 and Figure 11 shown in c), since the horizontal range of the low-doped N well 12 is inconsistent with that of the P-type buried layer, it is necessary to prepare a fifth photoresist mask 65 again, and use the fifth photoresist mask 65 to prepare the low-doped N well 12 in the P-type substrate through an ion implantation process. Due to the limitation of the first P-type buried layer and the second P-type buried layer, the diffusion range of the low-doped N well 12 in the vertical direction is controllable, thereby controlling the thickness of the low-doped N well 12.

[0098] S340. Prepare an active layer, a shallow trench isolation layer, and four N+ contact layers on one side of the interlayer doping structure facing away from the back side of the P-type substrate.

[0099] The embodiment of the present invention provides a method for manufacturing a Hall sensor. By preparing the first P-type buried layer and the second P-type buried layer with the same range in the horizontal direction, or the first P-type buried layer and the low-doped N well, after directly preparing the first P-type buried layer, adjust the energy and type of ion implantation, and directly prepare the second P-type buried layer or the low-doped N well. The process flow is improved, and the process of preparing and cleaning a mask once is reduced, thereby improving the production efficiency.

[0100] It should be noted that the above-mentioned preparation sequence in the embodiments is only a specific embodiment for the convenience of understanding of the present application. The present invention does not limit the preparation sequence of the first P-type buried layer, the low-doped N well, and the second P-type buried layer. Those skilled in the art should understand that the present invention is not limited to the specific embodiments described here, and various obvious changes, re-adjustments, combinations with each other, and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments. Without departing from the concept of the present invention, more other equivalent embodiments can be included, and the scope of the present invention is determined by the scope of the appended claims.

[0101] Similarly, as Figure 2 and Figure 3 shown, the first P-type buried layer, the low-doped N well, and the second P-type buried layer may have different size ranges. Those skilled in the art should understand that the functions of the first P-type buried layer, the low-doped N well, and the second P-type buried layer in the present application are to prepare a low-doped N well with low concentration and low thickness through the first P-type buried layer and the second P-type buried layer. Therefore, appropriately changing the size ranges of the first P-type buried layer, the low-doped N well, and the second P-type buried layer to simplify the preparation process will not depart from the protection scope of the present invention.

[0102] Reference Figure 7 Based on the preparation method of the Hall sensor in the above embodiment, optimization has been carried out. Specifically, before preparing the active layer, the shallow trench isolation layer, and the four N+ contact layers on one side of the back surface of the sandwich doping structure facing away from the P-type substrate, it further includes: growing an epitaxial layer on the front surface of the P-type substrate; preparing the active layer, the shallow trench isolation layer, and the four N+ contact layers on one side of the back surface of the sandwich doping structure facing away from the P-type substrate, including: preparing the active layer, the shallow trench isolation layer, and the four N+ contact layers in the epitaxial layer.

[0103] For the content not elaborated in this embodiment, please refer to the previous embodiment.

[0104] As Figure 7 shown, a schematic flowchart of another preparation method of the Hall sensor provided by the embodiment of the present invention includes the following steps:

[0105] S410. Provide a P-type substrate.

[0106] S420. Prepare a sandwich doping structure in the P-type substrate.

[0107] S430. Grow an epitaxial layer on the front surface of the P-type substrate.

[0108] Specifically, as Figure 1 , Figure 2 and Figure 12 c) shown, the epitaxial layer 70 can be understood as a semiconductor layer grown on the front surface of the P-type substrate 100 by a specific process method (such as chemical vapor deposition method, etc.), which has a certain crystal structure relationship with the substrate material on the substrate surface. Exemplarily, silicon oxide can be epitaxially grown using chemical vapor deposition method. The growth of the epitaxial layer 70 can provide a surface with better quality and fewer defects, providing a better foundation for the subsequent preparation of the active layer 20, the shallow trench isolation layer 30, and the N+ contact layer 40.

[0109] S440. Prepare the active layer, the shallow trench isolation layer, and the four N+ contact layers in the epitaxial layer.

[0110] Specifically, as Figure 1 , Figure 2 and Figure 12d), first, a photoresist layer 70 with a specific pattern is formed on the epitaxial layer using photolithography technology. Then, an etching deposition or ion implantation method is used to prepare a cross-shaped active layer 20 on the epitaxial layer. The active layer 20 includes a central area and four arm areas connected to the central area. The four arm areas are respectively located on two sides of the central area that are away from each other in the first direction x and the second direction y. When preparing the shallow trench isolation layer 30, a photoresist layer with a specific pattern is first formed on the epitaxial layer 70 and the shallow trench isolation layer 30 using photolithography technology. Then, an etching technology (such as wet etching or dry etching) is used to remove part of the epitaxial layer 70 and part of the P-type substrate 100 under the photoresist layer to form a shallow trench; then, a shallow trench isolation material (such as an insulating material such as silicon dioxide) is filled in the shallow trench to achieve electrical isolation; finally, excess epitaxial layer material is removed by chemical etching and / or mechanical grinding to make the surface of the shallow trench isolation layer flat. For the preparation of four N+ contact layers 40, the position of the N+ contact layer 40 is first determined on the side of the cross-shaped active layer arm area away from the central area, and a corresponding photoresist pattern is formed by photolithography technology. Then, an N-type deep well 50 with good conductivity is formed at this position by doping N-type ions to connect to the low-doped N well 12. Finally, a high-concentration N+ contact layer 40 is prepared above this area to transmit the signal generated by the Hall element to the external circuit.

[0111] The embodiment of the present invention prevents the diffusion of substrate impurities to a certain extent by preparing an epitaxial layer on the surface of a P-type substrate, and also prevents the mutual diffusion of impurities between different regions, thereby maintaining the stability of the device structure and performance.

[0112] refer to Figure 8 The preparation method of the Hall sensor based on the above embodiment is refined. Specifically, an active layer, a shallow trench isolation layer and four N+ contact layers are prepared in the epitaxial layer, including: preparing a shallow trench isolation layer in the epitaxial layer; using an ion implantation process to sequentially prepare an N-type deep well, an N+ contact layer and an active layer.

[0113] For details not yet provided in this embodiment, please refer to the previous embodiment.

[0114] like Figure 8 As shown, a schematic flow chart of another method for preparing a Hall sensor provided by an embodiment of the present invention includes the following steps:

[0115] S510 , providing a P-type substrate.

[0116] S520, preparing a sandwich doping structure in a P-type substrate.

[0117] S530 , growing an epitaxial layer on the front side of the P-type substrate.

[0118] S540, preparing a shallow trench isolation layer in the epitaxial layer.

[0119] Specifically, Figure 1 , Figure 2 and Figure 13 d), a photoresist layer with a specific pattern is first formed on the epitaxial layer 70 by photolithography technology, and then an etching technology (such as wet etching or dry etching) is used to remove part of the epitaxial layer 70 and part of the P-type substrate 100 below the photoresist layer to form a shallow groove. Then, a shallow groove isolation material (such as an insulating material such as silicon dioxide) is filled in the shallow groove to achieve electrical isolation. Finally, the excess epitaxial layer material is removed by chemical etching and / or mechanical grinding to make the surface of the shallow groove isolation layer 30 flat.

[0120] S550, using an ion implantation process to sequentially prepare an N-type deep well, an N+ contact layer and an active layer.

[0121] Specifically, Figure 1 , Figure 2 and Figure 13 As shown in Fig. 4, first, a photoresist layer with a specific pattern is formed on the epitaxial layer 70 using a photolithography technique. Then, an ion implantation method is used to prepare a cross-shaped active layer 20 on the epitaxial layer. The active layer 20 includes a central region and four arm regions connected to the central region. The four arm regions are respectively located on two sides of the central region that are mutually deviated in the first direction x and the second direction y. For the preparation of the four N+ contact layers 40, the position of the N+ contact layer 40 is first determined on the side of the arm region of the cross-shaped active layer 20 that is away from the central region, and a corresponding photoresist pattern is formed by a photolithography technique. Then, an N-type deep well 50 with good conductivity is formed at this position by doping N-type ions and connected to the low-doped N well 12. Finally, a high-concentration N+ contact layer 40 is prepared above this region so that the signal generated by the Hall element can be transmitted to the external circuit.

[0122] The embodiment of the present invention prepares a shallow trench isolation layer in the epitaxial layer to ensure electrical isolation between functional areas, thereby greatly improving the anti-interference ability of the Hall sensor. The ion implantation process is used to sequentially prepare the N-type deep well, N+ contact layer and active layer, and the stability of the connection between the N+ contact layer and the external circuit is enhanced, the contact resistance is reduced, and it is ensured that the signal generated by the Hall element can be efficiently and stably transmitted to the external circuit. This improves the overall detection accuracy, sensitivity and long-term reliability of the Hall sensor, so that it can stably perform excellent performance in various complex application scenarios and meet the stringent requirements for high-precision magnetic field detection in different fields.

[0123] Note that the above is only the preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, re-adjustments, combinations with each other and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments only. Without departing from the concept of the present invention, more other equivalent embodiments can be included, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A Hall sensor based on a sandwich structure, characterized in that: include: P-type substrate; A sandwich doping structure is located in the P-type substrate; The sandwich doping structure comprises a first P-type buried layer, a low-doped N-well and a second P-type buried layer stacked in sequence from the back side of the P-type substrate toward the front side; The active layer, the shallow trench isolation layer and the four N+ contact layers are all located on the side of the sandwich doping structure away from the back side of the P-type substrate; In the projection along the thickness direction of the P-type substrate, the first P-type buried layer, the low-doped N-well, the second P-type buried layer and the active layer all present a cross-shaped structure intersecting along the first direction and the second direction, the four N+ contact layers are distributed on the two sides of the cross-shaped active layer that are away from each other along the first direction and the second direction, and there is a spacing between the active layer, the shallow trench isolation layer is located in the area except the projection of the active layer and the N+ contact layer, the lengths of the second P-type buried layer in the first direction and the second direction are L2 and W2 respectively, and the lengths of the low-doped N-well in the first direction and the second direction are L and W respectively; wherein, L2<L, W2<W; the first direction and the second direction are parallel to the surface of the P-type substrate and perpendicular to each other; Each of the four N+ contact layers is electrically contacted with the low-doped N well through an N-type deep well (50).

2. The Hall sensor according to claim 1, characterized in that: In the projection along the thickness direction of the P-type substrate, the lengths of the second P-type buried layer in the first direction and the second direction are L1 and W1 respectively; wherein, L1>L, W1>W; or, L1=L, W1=W; or, L1=L2, W1=W2.

3. The Hall sensor according to claim 1, characterized in that: The doping ions of the first P-type buried layer and the second P-type buried layer are indium, and the doping ions of the low-doped N-well are antimony.

4. The Hall sensor according to claim 1, characterized in that: The ion doping concentration of the low-doped N-well is less than 8e18 / cm 3 The ion doping concentration of the first P-type buried layer and the second P-type buried layer is greater than 1e17 / cm 3 .

5. The Hall sensor according to claim 1, characterized in that: The thickness of the low-doped N-well is in the range of 0 to 3 μm.

6. A method for preparing a Hall sensor based on a sandwich structure, characterized in that: For preparing a Hall sensor based on a sandwich structure as claimed in any one of claims 1 to 5, the method comprises: Providing a P-type substrate; Preparing a sandwich doping structure in the P-type substrate; wherein the sandwich doping structure comprises a first P-type buried layer, a low-doped N-well, and a second P-type buried layer stacked in sequence from the back side of the P-type substrate toward the front side; An active layer, a shallow trench isolation layer and four N+ contact layers are prepared on a side of the sandwich doping structure away from the back side of the P-type substrate; Among them, in the projection along the thickness direction of the P-type substrate, the first P-type buried layer, the low-doped N-well, the second P-type buried layer and the active layer all present a cross-shaped structure intersecting along the first direction and the second direction, the four N+ contact layers are distributed on both sides of the cross-shaped active layer that are away from each other along the first direction and the second direction, and there is a spacing between the active layer, the shallow trench isolation layer is located in the area except the projection of the active layer and the N+ contact layer, the lengths of the second P-type buried layer in the first direction and the second direction are L2 and W2 respectively, and the lengths of the low-doped N-well in the first direction and the second direction are L and W respectively; wherein, L2<L, W2<W; the first direction and the second direction are parallel to the surface of the P-type substrate and perpendicular to each other; the four N+ contact layers are each electrically contacted with the low-doped N-well through an N-type deep well.

7. The method for preparing a Hall sensor according to claim 6, characterized in that: Preparing a sandwich doping structure in the P-type substrate, comprising: Preparing a first photoresist mask on the front surface of the P-type substrate by a photolithography process, and preparing the first P-type buried layer in the P-type substrate by an ion implantation process using the first photoresist mask; By means of a photolithography process, a second photoresist mask is prepared on the front surface of the P-type substrate, and by means of the second photoresist mask, the low-doped N-well is prepared in the P-type substrate by means of an ion implantation process; By means of a photolithography process, a third photoresist mask is prepared on the front surface of the P-type substrate, and by means of an ion implantation process, the second P-type buried layer is prepared in the P-type substrate using the third photoresist mask; The first P-type buried layer, the low-doped N-well and the second P-type buried layer are stacked in sequence along the direction from the back side to the front side of the P-type substrate.

8. The method for preparing a Hall sensor according to claim 6, characterized in that: Preparing a sandwich doping structure in the P-type substrate, comprising: By means of a photolithography process, a fourth photoresist mask is prepared on the front surface of the P-type substrate, and by means of an ion implantation process, the first P-type buried layer and the second P-type buried layer are prepared in the P-type substrate, or the first P-type buried layer and the low-doped N-well are prepared in the P-type substrate; By means of a photolithography process, a fifth photoresist mask is prepared on the front surface of the P-type substrate, and by means of an ion implantation process, the low-doped N-well is prepared in the P-type substrate, or the second P-type buried layer is prepared in the P-type substrate; The first P-type buried layer, the low-doped N-well and the second P-type buried layer are stacked in sequence along the direction from the back side to the front side of the P-type substrate.

9. The method for preparing a Hall sensor according to claim 6, characterized in that: Before preparing an active layer, a shallow trench isolation layer and four N+ contact layers on the side of the sandwich doping structure away from the back side of the P-type substrate, the method further includes: growing an epitaxial layer on the front side of the P-type substrate; An active layer, a shallow trench isolation layer and four N+ contact layers are prepared on the side of the sandwich doping structure away from the back side of the P-type substrate, including: An active layer, a shallow trench isolation layer and four N+ contact layers are prepared in the epitaxial layer.

10. The method for preparing a Hall sensor according to claim 9, characterized in that: An active layer, a shallow trench isolation layer and four N+ contact layers are prepared in the epitaxial layer, including: preparing the shallow trench isolation layer in the epitaxial layer; The N-type deep well, the N+ contact layer and the active layer are prepared in sequence by using an ion implantation process.