A voltage change monitoring system

Abstract

The present application relates to the field of voltage monitoring, and particularly to a voltage change monitoring system. The system includes: N series-connected delay units and their corresponding D flip-flops, a processor, and a memory storing a computer program. When the computer program is executed by the processor, different delay sampling values are output by the multiple series-connected delay units under different voltages, and thus reference positions corresponding to different voltages are obtained. According to the comparison of the reference positions, the monitoring result of the voltage change is determined, realizing the indirect monitoring of the voltage, improving the flexibility of voltage monitoring, and effectively improving the accuracy of voltage monitoring by configuring the number M of target edges corresponding to the reference positions.

Description

Technical Field

[0001] The present invention relates to the field of voltage monitoring, and particularly to a voltage change monitoring system. Background Art

[0002] Chips have strict requirements for the operating voltage. If the voltage is too high, components such as transistors inside the chip may be broken down and damaged; if the voltage is too low, the chip may not be able to start properly or errors may occur during operation, such as data processing errors or incomplete instruction execution. By monitoring the chip voltage, voltage anomalies can be detected in a timely manner to ensure that the chip operates within an appropriate voltage range.

[0003] Moreover, effective power consumption management can be achieved by monitoring the chip voltage. For example, when the chip load is light, the voltage supply is reduced to reduce power consumption; when the chip load increases, the voltage is appropriately increased to ensure performance. In this way, power consumption can be minimized without affecting the chip performance.

[0004] In addition, the performance of the chip, such as the operating speed, processing ability, etc., is closely related to the voltage. During the chip design and debugging process, the impact of voltage on performance can be studied by monitoring the voltage. For example, by fine-tuning the operating voltage of the chip, the voltage point that can optimize the performance while ensuring the stable operation of the chip can be found. This is of great significance for the design and optimization of high-performance chips, such as chips used for graphics processing and artificial intelligence computing.

[0005] However, in the prior art, it is difficult to meet the requirements for high-precision chip voltage monitoring in scenarios with high-precision requirements for chip voltage monitoring. Therefore, how to improve the precision of chip voltage change monitoring has become an urgent problem to be solved. Summary of the Invention

[0006] For the above technical problems, the technical solution adopted by the present invention is as follows:

[0007] A voltage change monitoring system, the system includes: N serially connected delay units {a1, a2,..., a n ,..., a N}, a processor, and a memory storing a computer program, where a n is the nth delay unit, and a n corresponds to a D flip-flop b n . When the computer program is executed by the processor, the following steps are implemented:

[0008] S101, taking the first preset time point t1 as the target time point;

[0009] S102. At the target time point, use the initial clock signal CLK as the input signal c1 of a1, and output the output signal d1 after delaying the processing of c1 by a1;

[0010] S103. Use d i-1 as the input signal c i of a i , and output the output signal d i after delaying the processing of c i by a i , where i is an integer in the range of [2, N];

[0011] S104. For the nth delay unit a n , use the d n output by a n as the input of the D terminal of the D flip-flop b n , use the initial clock signal CLK as the input of the clock terminal of the D flip-flop b n , and output the nth delayed sampling value e n by the D flip-flop b n ;

[0012] S105. Determine a number of edge positions according to e1, e₂, …, e n , …, e N ;

[0013] S106. Use the Mth edge position among all the obtained edge positions as the reference position f1 corresponding to t1, where M is the target number of edges;

[0014] S107. Use the second preset time point t2 as the target time point, return to execute steps S102 to S105, and use the Mth edge position among all the obtained edge positions as the reference position f2 corresponding to t2;

[0015] S108. Determine the monitoring result of the voltage corresponding to t2 according to f1 and f2.

[0016] Compared with the prior art, the present invention has obvious beneficial effects. By means of the above technical solutions, a voltage change monitoring system provided by the present invention can achieve considerable technological progress and practicality, and has wide industrial utilization value. It has at least the following beneficial effects:

[0017] The present invention provides a voltage change monitoring system, and the system includes: N series-connected delay units {a₁, a₂, …, a n , …, a N}, a processor, and a memory storing a computer program, where a n is the nth delay unit, a nThere is a D flip-flop b corresponding to it n When the computer program is executed by a processor, the following steps are implemented: S101, using the first preset time point t1 as the target time point, S102, at the target time point, using the initial clock signal CLK as the input signal c1 of a1, and a1 outputs an output signal d1 after delaying the processing of c1, S103, using d i-1 as the input signal c i of a i , and a i outputs an output signal d i after delaying the processing of c i , where i is an integer in the range of [2, N]. S104, for the nth delay unit a n , using the d n output by a n as the input of the D terminal in the D flip-flop b n , using the initial clock signal CLK as the input of the clock terminal in the D flip-flop b n , and the D flip-flop b n outputs the nth delay sampling value e n . S105, according to e1, e2,..., e n ,..., e N , determine several edge positions. S106, using the Mth edge position among all the obtained edge positions as the reference position f1 corresponding to t1. S107, using the second preset time point t2 as the target time point, return to execute steps S102 to S105, and use the Mth edge position among all the obtained edge positions as the reference position f2 corresponding to t2. S108, according to f1 and f2, determine the monitoring result of the voltage corresponding to t2.

[0018] It can be seen that according to the different delay sampling values output by multiple series-connected delay units under different voltages, the corresponding reference positions under different voltages are obtained, and the monitoring result of the voltage change is determined by comparing the reference positions, realizing the indirect monitoring of the voltage, improving the flexibility of the voltage monitoring, and by configuring the target number of edges M corresponding to the reference position, the accuracy of the voltage monitoring can be effectively improved. Description of the Drawings

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0020] Figure 1Schematic diagram of the process when the computer program in a voltage change monitoring system provided by an embodiment of the present invention is executed by a processor. Detailed implementation manners

[0021] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts belong to the scope of protection of the present invention.

[0022] This embodiment provides a voltage change monitoring system, and the system includes: N serially connected delay units {a1, a2,..., a n ,..., a N}, a processor, and a memory storing a computer program, where a n is the nth delay unit, and a n corresponds to a D flip-flop b n , see Figure 1 , which is a schematic diagram of the process when the computer program in a voltage change monitoring system provided by an embodiment of the present invention is executed by a processor. When the computer program is executed by the processor, the following steps are implemented:

[0023] S101, taking the first preset time point t1 as the target time point;

[0024] S102, at the target time point, using the initial clock signal CLK as the input signal c1 of a1, and outputting the output signal d1 after delaying the processing of c1 by a1;

[0025] S103, using d i-1 as the input signal c i of a i , and outputting the output signal d i after delaying the processing of c i by a i , where i is an integer in the range of [2, N];

[0026] S104, for the nth delay unit a n , using the d n output by a n as the input of the D terminal in the D flip-flop b n , using the initial clock signal CLK as the input of the clock terminal in the D flip-flop b n , and outputting the nth delay sampling value e n n by the D flip-flop b n

[0027] S105, according to e1, e2,..., en , …, e N , determine several edge positions;

[0028] S106, use the M-th edge position among all the obtained edge positions as the reference position f1 corresponding to t1, where M is the number of target edges;

[0029] S107, use the second preset time point t2 as the target time point, return to execute steps S102 to S105, and use the M-th edge position among all the obtained edge positions as the reference position f2 corresponding to t2;

[0030] S108, determine the monitoring result of the voltage corresponding to t2 according to f1 and f2.

[0031] Among them, the delay unit is used to delay its input signal, and the N delay units are in series, that is, the output of a i-1 is connected to the input of a i . The first preset time point t1 can be the time point corresponding to the preset reference voltage or the time point corresponding to the historical voltage. The implementer can determine it according to actual needs. Correspondingly, when the first preset time point t1 is the time point corresponding to the reference voltage, the monitoring result of the voltage corresponding to t2 is the change of the voltage corresponding to t2 compared with the reference voltage. Similarly, when the first preset time point t1 is the time point corresponding to the historical voltage, the monitoring result of the voltage corresponding to t2 is the change of the voltage corresponding to t2 compared with the historical voltage. The second preset time point t2 can refer to the current time point.

[0032] The D flip-flop includes two inputs, the D terminal and the clock terminal. In this embodiment, the D terminal is connected to the output signal of the corresponding delay unit, and the clock terminal is connected to the initial clock signal CLK. That is, the D flip-flop realizes the function of sampling the output signal of the initial clock signal CLK after being delayed by several delay units at the rising edge of the initial clock signal CLK.

[0033] The edge position can be used to represent the position where the delayed sampling value changes. According to the different numbers of delay units, the number of obtained edge positions may also be different. In this embodiment, the number of target edges M is determined, and the M-th edge position is used as the reference position corresponding to the target time point. The reference position can be used to indirectly monitor the voltage change situation, that is, the voltage change situation is indirectly determined by the change situation of the reference position.

[0034] The monitoring result of the voltage corresponding to t2 can refer to the change of the voltage corresponding to t2 compared with the voltage corresponding to t1.

[0035] Specifically, since the number of edge positions is related to the number of delay units, in this embodiment, when determining the target number of edges M, it is necessary to ensure that the M-th edge position can be obtained at different time points.

[0036] In a specific implementation manner, the delay duration corresponding to the delay processing of the delay unit is negatively correlated with the voltage.

[0037] Among them, in this embodiment, the delay processing effects of each delay unit are default to be equivalent under the same voltage. Taking a single delay unit as an example, the delay duration corresponding to the delay processing of the delay unit is negatively correlated with the voltage, that is, the larger the voltage, the shorter the delay duration corresponding to the delay processing of the delay unit, and the smaller the voltage, the longer the delay duration corresponding to the delay processing of the delay unit.

[0038] In a specific implementation manner, step S105 includes the following steps:

[0039] S1051, if e i-1 ≠e i , then determine i as the edge position;

[0040] S1052, traverse all values of i to obtain several edge positions.

[0041] Among them, in this embodiment, the edge position is used to represent the position where the delay sampling value changes. Therefore, when if e i-1 ≠e i , it indicates that a change in the delay sampling value occurs between e i-1 and e i , and use the current i value as an edge position.

[0042] Specifically, each edge position determines its corresponding number of edges according to the size of the corresponding i value. The number of edges can be a positive integer. The smaller the i value, the smaller the corresponding number of edges. For example, the smallest i value corresponds to the number of edges 1.

[0043] In a specific implementation manner, when the computer program is executed by the processor, the following steps are also implemented:

[0044] S201, simulate the voltage monitoring accuracy and the required number of delay units corresponding to each edge position;

[0045] S202, determine the target number of edges M of the edge position according to the voltage monitoring accuracy and the required number of delay units corresponding to each edge position.

[0046] Among them, for the edge positions with a specific number of edges, only when the voltage change amplitude reaches a certain threshold will the edge positions with the specific number of edges change. Then, the threshold corresponding to the voltage change amplitude can be used as the voltage monitoring accuracy corresponding to the specific number of edges. For multiple edge positions with different numbers of edges, since each delay unit is in a series relationship, the delay duration of the subsequent delay unit will include the delay duration of the previous delay unit and the delay duration brought by its own delay processing. Therefore, the larger the number of edges, the smaller the threshold corresponding to the voltage change amplitude, and the higher the voltage monitoring accuracy.

[0047] However, a larger number of edges will result in a larger number of required delay units, that is, a larger number of stages of delay units. And an excessive number of delay units will increase the circuit complexity, affect the timing logic of the circuit, and further cause the voltage monitoring system of this embodiment to be unable to be normally applied to the preset frequency. Moreover, as the number of edges increases, the gain of a larger number of edges compared to its adjacent smaller number of edges will gradually decay. Therefore, it is necessary to determine the target number of edges M of the appropriate edge position according to the voltage monitoring accuracy and the required number of delay units corresponding to each edge position, and to improve the voltage monitoring accuracy as much as possible while ensuring the normal operation of the voltage monitoring system.

[0048] In a specific implementation manner, the target number of edges M takes the value of 3.

[0049] Among them, in this embodiment, through means such as simulation, the optimal value of the target number of edges M is determined to be 3.

[0050] In a specific implementation manner, the number of delay units N corresponding to the target number of edges M is 96.

[0051] Among them, corresponding to the optimal value 3 of the target number of edges M, the required number of delay units N can be set to 96.

[0052] In a specific implementation manner, step S105 includes the following steps:

[0053] If f1 < f2, then determine that the voltage corresponding to t2 is greater than the voltage corresponding to t1;

[0054] If f1 > f2, then determine that the voltage corresponding to t2 is less than the voltage corresponding to t1.

[0055] Among them, if f1 < f2, it means that the delay duration corresponding to the delay unit decreases. Correspondingly, it shows that the voltage corresponding to t2 is greater than the voltage corresponding to t1. If f1 > f2, it means that the delay duration corresponding to the delay unit increases. Correspondingly, it shows that the voltage corresponding to t2 is less than the voltage corresponding to t1.

[0056] In a specific embodiment, the voltage change amplitude between the voltage corresponding to t2 and the voltage corresponding to t1 is positively correlated with g(f1 - f2), where g() is an absolute value function.

[0057] Among them, the larger the absolute value of f1 - f2, the larger the voltage change amplitude between the voltage corresponding to t2 and the voltage corresponding to t1; the smaller the absolute value of f1 - f2, the smaller the voltage change amplitude between the voltage corresponding to t2 and the voltage corresponding to t1.

[0058] It can be seen that according to the different delay sampling values output by multiple cascaded delay units at different voltages, the corresponding reference positions at different voltages are obtained, and the monitoring result of the voltage change is determined by comparing the reference positions, realizing the indirect monitoring of the voltage, improving the flexibility of voltage monitoring, and effectively improving the accuracy of voltage monitoring by configuring the target edge number M corresponding to the reference position.

[0059] Although some specific embodiments of the present invention have been described in detail by way of examples, those skilled in the art should understand that the above examples are for illustrative purposes only and not for limiting the scope of the present invention. Those skilled in the art should also understand that various modifications can be made to the embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A voltage change monitoring system, characterized in that, The system includes: N delay units {a1, a2, …, a n , …, a N}, a processor, and a memory storing a computer program, where a n is the nth delay unit, and a n corresponds to a D flip-flop b n . When the computer program is executed by the processor, the following steps are implemented: S101, use the first preset time point t1 as the target time point; S102, at the target time point, use the initial clock signal CLK as the input signal c1 of a1, and a1 outputs the output signal d1 after delaying c1; S103, with d i-1 as a i input signal c i , from a i output the output signal d i after delay processing i , where i is an integer in the range of [2, N]; S104, for the nth delay unit a n , take a n 's output d n as the input of the D terminal of D flip-flop b n , take the initial clock signal CLK as the input of the clock terminal of the D flip-flop b n , and output the nth delayed sampled value e n from the D flip-flop b n ; S105, determine a plurality of edge positions according to e1, e2, …, e n , …, e N , …, e S106, use the Mth edge position among all obtained edge positions as the reference position f1 corresponding to t1, where M is the target number of edges; S107, use the second preset time point t2 as the target time point, return to execute steps S102 to S105, and use the Mth edge position among all obtained edge positions as the reference position f2 corresponding to t2; S108, determine the monitoring result of the voltage corresponding to t2 according to f1 and f2, where step S108 includes the following steps: If f1 < f2, it is determined that the voltage corresponding to t2 is greater than the voltage corresponding to t1; If f1 > f2, it is determined that the voltage corresponding to t2 is less than the voltage corresponding to t1.

2. The voltage change monitoring system according to claim 1, wherein The delay duration corresponding to the delay processing by the delay unit has a negative correlation with the voltage.

3. The voltage change monitoring system according to claim 1, characterized in that, Step S105 includes the following steps: S1051, if e i-1 ≠ e i , then determine i as the edge position; S1052, traverse all values of i to obtain several edge positions.

4. The voltage change monitoring system according to claim 1, characterized in that, When the computer program is executed by the processor, the following steps are also implemented: S201, simulate to obtain the voltage monitoring accuracy and the required number of delay units corresponding to each edge position; S202, determine the target number of edges M of the edge position according to the voltage monitoring accuracy and the required number of delay units corresponding to each edge position.

5. The voltage change monitoring system according to claim 4, wherein The value of the target number of edges M is 3.

6. The voltage change monitoring system according to claim 5, wherein The number of delay units N corresponding to the target number of edges M is 96.

7. The voltage change monitoring system according to claim 1, characterized in that, The voltage change amplitude between the voltage corresponding to t2 and the voltage corresponding to t1 has a positive correlation with g(f1 - f2), where g() is the absolute value function.

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