Voltage source converter output current suppression method in asymmetric fault and related equipment

Abstract

The invention belongs to the field of power electronics, and discloses a voltage source converter output current suppression method and related equipment during an asymmetric fault, and the method comprises the steps: collecting the power grid current and the power grid voltage of a power grid during the asymmetric fault; calculating to obtain virtual resistance and virtual inductance; the virtual resistor and the virtual inductor are fed back to the control loop, the active power output by the grid-connected inverter is adjusted through the virtual resistor, the reactive power output by the grid-connected inverter is adjusted through the virtual inductor, and the output current of the voltage source converter is suppressed; the cooperative control can quickly adjust the equivalent impedance at the initial stage of the fault, dynamically balance the sudden power change generated by the fault, realize millisecond-level current suppression response through power real-time dissipation instead of passive amplitude limiting, and limit the amplitude of the output current within a safety threshold. Compared with a traditional method, the method has the advantages that the current suppression capability at the fault moment is improved, the equipment damage risk is reduced, and the power grid fault ride-through capability and the system stability are enhanced.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronics, and particularly relates to a method for suppressing the output current of a voltage source converter during an asymmetric fault and related equipment. Background Art

[0002] In modern power systems, grid voltage asymmetric faults are a relatively common and serious fault form. With the widespread access of distributed energy sources and the increasing complexity of power systems, grid-connected inverters, as key devices for efficient power conversion and transmission, their operational stability is crucial. However, once a grid voltage asymmetric fault occurs, it is extremely likely to cause overcurrent in the grid-connected inverter.

[0003] Traditional control methods usually adopt positive and negative sequence separation algorithms when dealing with grid voltage asymmetric faults. This algorithm decomposes the fault voltage into a positive sequence component and a negative sequence component, and then controls these two components separately. In terms of current limiting measures, generally, a limiter is added to the control loop, attempting to suppress the overcurrent of the grid-connected inverter by means of amplitude limiting. However, when a large power imbalance occurs instantaneously during the fault, the limitations of the limiter will become prominent; since the limiter is connected in series in the control loop, its operation requires a certain response time, and at the moment of the fault occurrence, it cannot effectively suppress the overcurrent in a timely manner, resulting in limited ability to suppress the overcurrent of the grid-connected inverter during asymmetric faults. This situation not only affects the stable operation of the grid-connected inverter but also exposes the equipment to the risk of damage, and may even trigger large-scale disconnection accidents in severe cases, posing a huge threat to the reliability and security of the entire power system.

[0004] It can be seen that for grid voltage asymmetric faults, the existing current suppression methods cannot effectively suppress the overcurrent in a timely manner, affecting the stable operation of the grid-connected inverter. Summary of the Invention

[0005] The present invention provides a method for suppressing the output current of a voltage source converter during an asymmetric fault and related equipment. By using this current suppression method, the overcurrent can be effectively suppressed in a timely manner, ensuring the stable operation of the grid-connected inverter.

[0006] To achieve the above object, the present invention adopts the following technical solutions: A method for suppressing the output current of a voltage source converter during an asymmetric fault, comprising: Collecting the grid current and grid voltage during an asymmetric fault of the grid; Based on the grid current and grid voltage during an asymmetric fault of the grid, obtaining a virtual resistance and a virtual inductance; The virtual resistance and virtual inductance are fed back into the control loop. The active power output by the grid-connected inverter is regulated through the virtual resistance, and the reactive power output by the grid-connected inverter is regulated through the virtual inductance, so as to suppress the output current of the voltage source converter.

[0007] Further, before obtaining the virtual resistance and virtual inductance based on the grid current and grid voltage during the asymmetric fault of the power grid, it further includes: Based on the grid voltage during the asymmetric fault of the power grid and the output voltage of the grid-connected inverter, calculate the active power output by the grid-connected inverter p and reactive power q , and the specific calculation formulas are as follows:

[0008] In the formula, represents the grid voltage, represents the output voltage of the grid-connected inverter, represents the line impedance, is the power angle difference between the grid-connected inverter and the power grid; sin represents the sine value of the power angle difference between the grid-connected inverter and the power grid; cos represents the cosine value of the power angle difference between the grid-connected inverter and the power grid.

[0009] Further, obtaining the virtual resistance and virtual inductance based on the grid current and grid voltage during the asymmetric fault of the power grid includes: Perform positive and negative sequence separation processing on the grid current during the asymmetric fault of the power grid to obtain the positive sequence d-axis current and positive sequence q-axis current; Perform positive and negative sequence separation processing on the grid voltage during the asymmetric fault of the power grid to obtain the positive sequence d-axis voltage and positive sequence q-axis voltage; Based on the positive sequence d-axis current, positive sequence q-axis current, positive sequence d-axis voltage, positive sequence q-axis voltage and the output voltage of the grid-connected inverter, calculate the virtual resistance and virtual inductance respectively.

[0010] Further, calculating the virtual resistance and virtual inductance respectively based on the positive sequence d-axis current, positive sequence q-axis current, positive sequence d-axis voltage, positive sequence q-axis voltage and the output voltage of the grid-connected inverter, the specific calculation formulas are as follows:

[0011] In the formula, represents the virtual resistance; represents the virtual inductance; , respectively represent the positive sequence active power and positive sequence reactive power, , respectively represent the positive-sequence d-axis current and the positive-sequence q-axis current, and respectively represent the positive-sequence d-axis voltage and the positive-sequence q-axis voltage; represents the grid voltage, represents the output voltage of the grid-connected inverter; represents the grid angular frequency.

[0012] Further, separating the positive and negative sequences of the grid current during an asymmetric fault of the grid to obtain the positive-sequence d-axis current and the positive-sequence q-axis current, and also obtaining the negative-sequence d-axis current and the negative-sequence q-axis current; Separating the positive and negative sequences of the grid voltage during an asymmetric fault of the grid to obtain the positive-sequence d-axis voltage and the positive-sequence q-axis voltage, and also obtaining the negative-sequence d-axis voltage and the negative-sequence q-axis voltage; Set the negative-sequence current reference value to zero.

[0013] Further, feeding back the virtual resistance and the virtual inductor to the control loop, adjusting the active power output by the grid-connected inverter through the virtual resistance, and realizing the adjustment of the reactive power output by the grid-connected inverter through the virtual inductor; to achieve the suppression of the output current of the voltage source converter, including: Feeding forward the virtual resistance and the virtual inductor to the control loop, adjusting the active power output by the grid-connected inverter through the virtual resistance, and realizing the adjustment of the reactive power output by the grid-connected inverter through the virtual inductor, thereby generating an adjustment voltage; Superimposing the generated adjustment voltage on the positive-sequence current control output voltage for suppressing the output current of the voltage source converter.

[0014] Further, before obtaining the virtual resistance and the virtual inductor based on the grid current and the grid voltage during an asymmetric fault of the grid, it further includes: Calculating the active power output by the grid-connected inverter based on the grid current and the grid voltage during an asymmetric fault of the grid p and the reactive power q , and the specific calculation formulas are as follows:

[0015] In the formula, and respectively represent the d-axis current and the q-axis current, and respectively represent the d-axis voltage and the q-axis voltage; Among them, the d-axis current and the q-axis current are calculated based on the grid current through the d-q rotating coordinate system; the d-axis voltage and the q-axis voltage are calculated based on the grid voltage through the d-q rotating coordinate system.

[0016] A system for suppressing the output current of a voltage source converter during an asymmetric fault, characterized by comprising: A grid data acquisition module for acquiring grid current and grid voltage during an asymmetric fault of the grid; A calculation module for obtaining a virtual resistance and a virtual inductance based on the grid current and grid voltage during an asymmetric fault of the grid; A feedback module for feeding back the virtual resistance and the virtual inductance into the control loop, adjusting the active power output by the grid-connected inverter through the virtual resistance, and adjusting the reactive power output by the grid-connected inverter through the virtual inductance; so as to realize the suppression of the output current of the voltage source converter.

[0017] An electronic device, comprising: A memory for storing a computer program; A processor for implementing the steps of the method for suppressing the output current of the voltage source converter during an asymmetric fault when executing the computer program.

[0018] A computer-readable storage medium storing a computer program, characterized in that the computer program is used to implement the steps of the method for suppressing the output current of the voltage source converter during an asymmetric fault when executed by a processor.

[0019] Compared with the prior art, the present invention has the following beneficial effects: The present invention provides a method for suppressing the output current of a voltage source converter during an asymmetric fault. This method introduces a dynamic feedback mechanism of virtual resistance and virtual inductance. When an asymmetric fault occurs in the grid, by collecting the grid current, voltage and the output voltage of the inverter in real time, the virtual resistance and virtual inductance are calculated. Among them, the virtual resistance reduces the current amplitude by actively adjusting the grid active power, and the virtual inductance suppresses the current fluctuation by absorbing reactive power. Both directly act on the control loop, with good dynamic effect and no need for the series delay of the limiter. This cooperative control can quickly adjust the equivalent impedance at the initial stage of the fault, dynamically balance the power mutation generated by the fault, and realize the millisecond-level current suppression response by dissipating power in real time rather than passive limiting, and limit the output current amplitude within the safety threshold. Compared with the traditional method, this method improves the current suppression ability at the moment of the fault, reduces the risk of equipment damage, and enhances the grid fault ride-through ability and system stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 Schematic diagram of positive-sequence virtual resistance control provided by an embodiment of the present invention; Figure 2 Schematic diagram of positive-sequence virtual inductance control provided by an embodiment of the present invention; Figure 3The control block diagram of the grid-connected inverter under asymmetric faults provided by the embodiments of the present invention; Figure 4 The positive-sequence power angle under asymmetric faults provided by the embodiments of the present invention phase trajectory diagram; Figure 5 The negative-sequence power angle under asymmetric faults provided by the embodiments of the present invention phase trajectory diagram; Figure 6 The simulation diagram without adopting this suppression method under asymmetric faults provided by the embodiments of the present invention; where (a) is the output current; (b) is the active power; (c) is the reactive power; (d) is the output voltage frequency; Figure 7 The simulation diagram adopting this suppression method under asymmetric faults provided by the embodiments of the present invention; where (a) is the output current; (b) is the active power; (c) is the reactive power; (d) is the output voltage frequency; Figure 8 The flow chart of a method for suppressing the output current of a voltage source converter under asymmetric faults provided by the present invention; Figure 9 The structural schematic diagram of a system for suppressing the output current of a voltage source converter under asymmetric faults provided by the present invention. Detailed implementation manners

[0021] To further understand the content of the present invention, the following describes the present invention in detail with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments are only for explaining the present invention rather than limiting it.

[0022] The following explains the technical terms involved in the present invention: VSC: Voltage Source Converter, a voltage source converter. It is an important power electronic device used in modern power systems to achieve the conversion and control of electrical energy, which can convert direct current into alternating current or vice versa.

[0023] SVPWM: Space Vector Pulse Width Modulation, space vector pulse width modulation. This is a commonly used pulse width modulation technology that generates the desired AC voltage waveform by controlling the on and off of the inverter switching devices.

[0024] d-q rotating coordinate system: A commonly used coordinate transformation method in power system analysis and motor control. Among them, "d" represents the direct axis and "q" represents the quadrature axis. By converting the physical quantities (such as voltage and current) in the three-phase stationary coordinate system to the d-q rotating coordinate system, the analysis and control of AC motors and power converters can be simplified.

[0025] As described in the background art, traditional control methods decompose the fault voltage into positive and negative sequence components through positive and negative sequence separation algorithms, and add limiters to the control loop to suppress overcurrent. However, since the limiter is connected in series in the control loop, the response delay is significant. Especially when the power imbalance is large at the moment of fault, it is difficult to quickly suppress overcurrent. Therefore, the defects of the existing technology are mainly reflected in: First, slow response speed: the hysteresis effect of the limiter cannot adapt to transient power mutations; Second, insufficient stability: the power angle instability of the VSC under asymmetric faults leads to oscillations in active and reactive power.

[0026] To solve the above problems, this embodiment provides a method for suppressing the output current of a voltage source converter during asymmetric faults. This method directly superimposes virtual resistance and virtual inductance on the control loop in a feed-forward manner, significantly improving the response speed and suppression ability. Based on the traditional control method, by introducing grid current and grid voltage, this method accurately calculates the active power and reactive power at the moment of fault, and proposes a positive sequence current virtual impedance control strategy. This strategy can calculate the virtual resistance and virtual inductance and directly add them to the system control loop in a feed-forward manner, featuring fast response speed and convenient implementation, effectively enhancing the overcurrent suppression ability of the grid-connected inverter under asymmetric faults. At the same time, it also has a certain ability to suppress the fluctuations in the output voltage frequency of the VSC during asymmetric faults, ensuring the stable operation of the power system.

[0027] The following will introduce the design concept of this suppression method in detail with reference to the accompanying drawings: In this embodiment, by controlling the positive sequence current virtual impedance, the positive sequence overcurrent generated by asymmetric faults is suppressed. The positive sequence current virtual impedance specifically includes two parts: positive sequence virtual resistance control and positive sequence virtual inductance control. The positive sequence overcurrent virtual impedance control detects the current change rate, calculates the changes in active power and reactive power during asymmetric faults, calculates the corresponding virtual resistance and virtual inductance through the changes, and then generates the corresponding voltage to be superimposed on the positive sequence current control output voltage. For negative sequence current, when an asymmetric fault occurs, the reference value of the negative sequence current is generally zero, and the risk of overcurrent in the negative sequence current is relatively small, so there is no need to specifically suppress it.

[0028] The positive sequence current virtual resistance control mainly acts on the positive sequence d-axis current control, and the positive sequence current virtual inductance control mainly acts on the positive sequence q-axis current control. By suppressing the positive sequence current, the rapid rise of active power and reactive power during asymmetric faults can be suppressed. The following will first specifically describe the positive sequence current virtual resistance control.

[0029] According to the analysis, the expressions for the active power and reactive power output by the grid-connected inverter are as follows: (1) In the formula, represents the grid voltage, represents the output voltage of the grid-connected inverter, represents the line impedance, is the power angle difference between the grid-connected inverter and the power grid.

[0030] In this embodiment, the active power and reactive power output by the grid-connected inverter can also be obtained by using the calculation method in the d-q rotating coordinate system: (2) In the formula, , respectively represent the d-axis current and the q-axis current, , respectively represent the d-axis voltage and the q-axis voltage; Among them, the d-axis current and the q-axis current are calculated based on the grid current through the d-q rotating coordinate system; the d-axis voltage and the q-axis voltage are calculated based on the grid voltage through the d-q rotating coordinate system.

[0031] By comparing formula (1) and formula (2), it can be found that under asymmetric faults, the main reason for the overcurrent generated by the grid-connected inverter is power imbalance. Due to the grid voltage failure, the grid-connected inverter cannot adjust its output power instantaneously, causing power imbalance and resulting in overcurrent. Combining the self-characteristics of resistance and inductance, it can be found that active power can be consumed by resistance and reactive power can be consumed by inductance. Therefore, this embodiment proposes positive-sequence current virtual impedance control, calculates the virtual resistance for consuming active power and the virtual inductance for consuming reactive power, and reduces the power imbalance phenomenon during asymmetric faults through the two, realizing the function of limiting output overcurrent.

[0032] As Figure 1 shown, , respectively represent the positive-sequence d-axis current reference value and the positive-sequence q-axis current reference value, , respectively represent the positive-sequence d-axis current and the positive-sequence q-axis current, both of which are sampled values, , respectively represent the positive-sequence d-axis voltage reference value and the positive-sequence q-axis voltage reference value, , respectively represent the positive-sequence d-axis voltage and the positive-sequence q-axis voltage, both of which are sampled values. The reciprocal operator is used to take the reciprocal of the operation result. The virtual resistance is obtained through positive-sequence virtual resistance control, and the virtual resistance can be adjusted according to the degree of asymmetric fault.

[0033] As Figure 2 shown, , respectively represent the positive-sequence d-axis current reference value and the positive-sequence q-axis current reference value, , respectively represent the positive-sequence d-axis current and the positive-sequence q-axis current, both of which are sampled values, , respectively represent the positive-sequence d-axis voltage and the positive-sequence q-axis voltage reference value, , respectively represent the positive-sequence d-axis voltage and the positive-sequence q-axis voltage, both of which are sampled values. The reciprocal operator is used to take the reciprocal of the operation result, is the grid angular frequency, and the virtual inductor is obtained through positive-sequence virtual inductor control , and its magnitude can be adjusted automatically according to the degree of asymmetric fault .

[0034] Combined with Equation (1) and Figure 1 and Figure 2 the content represented by, the calculation formulas of the virtual resistance and the virtual inductor are as follows: (3) In the formula, represents the virtual resistance; represents the virtual inductor; , respectively represent the positive-sequence active power and the positive-sequence reactive power, , respectively represent the d-axis positive-sequence current and the q-axis positive-sequence current, , respectively represent the d-axis positive-sequence voltage and the q-axis positive-sequence voltage; represents the grid voltage, represents the output voltage of the grid-connected inverter; represents the grid angular frequency.

[0035] Based on the above suppression method concept and design idea, this embodiment provides a method for suppressing the output current of a voltage source converter during an asymmetric fault. The specific steps are as follows: Collect the grid current and grid voltage of the power grid during an asymmetric fault; Based on the grid current and grid voltage of the power grid during an asymmetric fault, obtain the virtual resistance and the virtual inductor; Among them, the grid current and grid voltage of the power grid during an asymmetric fault are respectively subjected to positive and negative sequence separation processing to obtain the positive-sequence d-axis current, the positive-sequence q-axis current, the positive-sequence d-axis voltage, and the positive-sequence q-axis voltage; Based on the positive-sequence d-axis current, the positive-sequence q-axis current, the positive-sequence d-axis voltage, the positive-sequence q-axis voltage, and the output voltage of the grid-connected inverter, calculate the virtual resistance and the virtual inductor respectively.

[0036] During the unbalanced fault of the power grid, the grid current and grid voltage are respectively subjected to positive and negative sequence separation processing to obtain the negative sequence d-axis current, negative sequence q-axis current, negative sequence d-axis voltage, and negative sequence q-axis voltage; the negative sequence current reference value is set to zero.

[0037] The virtual resistance and virtual inductance are fed back to the control loop. The active power output by the grid-connected inverter is regulated through the virtual resistance, and the reactive power output by the grid-connected inverter is regulated through the virtual inductance to suppress the output current of the voltage source converter. As Figure 3 shown, Figure 3 it is the control block diagram of the grid-connected inverter under unbalanced faults; where is the three-phase grid voltage (grid voltage), is the three-phase grid current (grid current), , are the sampled values of the d-axis negative sequence current and q-axis negative sequence current, , are the sampled values of the d-axis negative sequence voltage and q-axis negative sequence voltage, , are the reference values of the negative sequence d-axis current and negative sequence q-axis current, , are the sampled values of the positive sequence d-axis voltage and positive sequence q-axis voltage of the grid voltage, , are the sampled values of the d-axis negative sequence voltage and q-axis negative sequence voltage of the grid voltage, , are the control quantities of the positive sequence current d-axis and positive sequence current q-axis, , are the control quantities of the negative sequence current d-axis and negative sequence current q-axis, , are the coordinate transformation operators, , are the input voltages for SVPWM modulation operation, and are the virtual resistance and virtual inductance output by adopting this suppression method respectively. The voltage and current sampling and positive and negative sequence separation link is responsible for separating the positive and negative sequences of the grid voltage and grid current to prepare for the subsequent positive and negative sequence current control. The reference current calculation mainly determines the appropriate reference values of the d-q axis current for the positive and negative sequence current control. This suppression method mainly controls the output superimposed on the positive sequence current control. For the negative sequence current control, the negative sequence current generated by the unbalanced fault is mainly controlled to zero without additional control; in the figure, grid represents the power grid; PI represents the Proportional-Integral controller; In represents the angular frequency, represents the inductance; represents the inductive reactance of the inductance in an AC circuit.

[0038] For the method for suppressing the output current of a voltage source converter during an asymmetric fault provided in this embodiment, the large-signal model of the VSC under an asymmetric fault is adopted for the following simulation verification and theoretical analysis: When an asymmetric fault occurs in the grid voltage, due to the limitation of the small-signal analysis method of the VSC, the performance of the VSC during the fault cannot be accurately analyzed. Since the mechanisms of single-phase voltage dip faults and two-phase voltage dip faults are similar and both will generate negative sequence components. Therefore, in the large-signal analysis, the single-phase voltage dip fault is taken as an example for theoretical analysis.

[0039] The active power of the VSC during normal grid operation is: (4) In Equation (4), represents the output voltage of the VSC, represents the line impedance, is the power angle of the VSC and can be expressed as: (5) In Equation (5), represents the active power reference value, p represents the active power output by the VSC; During an asymmetric fault, the active power of the VSC adopting positive and negative sequence current control is: (6) In Equation (6), is the output voltage of the VSC, represents the grid voltage; X represents the line impedance; the power angle of the VSC after adding positive sequence current virtual impedance control can be expressed as: (7) In Equation (7), , are: (8) In Equation (8), and respectively represent the sum of the positive sequence resistance output by the VSC and the positive sequence inductance of the line. Substituting Equation (8) into Equation (7), the positive sequence power angle can be expressed as: (9) In Equation (9), and They represent the voltage components of different axes in the d-q rotating coordinate system. They are involved in the calculation of the final expression of the positive-sequence power angle and are used to comprehensively reflect the characteristics of the grid voltage on different axes.

[0040] Since the negative-sequence power angle does not adopt the suppression method provided in this embodiment, Equation (5) can be directly used.

[0041] As Figure 4 shown, it is the positive-sequence power angle phase trajectory of different control methods under asymmetric faults. It can be seen that under the traditional control method, the positive-sequence power angle of the VSC diverges and the VSC is unstable. When the suppression method provided in this embodiment is adopted, the oscillation can be significantly reduced and the stability can be quickly restored when an asymmetric fault occurs.

[0042] As Figure 5 shown, it is the negative-sequence power angle phase trajectory of current balance control under asymmetric faults. It can be seen that under the traditional control method, the VSC is unstable. When the suppression method provided in this embodiment is adopted, after the fault occurs, the negative-sequence power angle quickly converges at the origin and operates stably, enabling the VSC to quickly restore stable operation when an asymmetric fault occurs. Among them, Figure 4 and Figure 5 the Δw in represents the angular frequency deviation.

[0043] Based on the above phase trajectory analysis, in order to verify the effectiveness of the method, under an asymmetric fault (single-phase grid voltage dip fault, dip depth: 50%), the positive-sequence current virtual impedance control of the VSC is simulated, and the specific simulation parameters are shown in Table 1.

[0044] Table 1 shows the simulation parameters

[0045] Combined with Figure 6 the (a), (b), (c), and (d) in, Figure 6 they are the simulation curves of the VSC output current I, active power P, reactive power Q, and output voltage frequency f under the traditional control method. At this time, although the three-phase output current of the VSC remains balanced, during the fault, the active power and reactive power oscillate significantly, and at the same time, the overcurrent is large and the output voltage frequency oscillates.

[0046] Comparing Figure 7 the (a), (b), (c), and (d) in, Figure 7The simulation curves of the VSC output current I, active power P, reactive power Q, and output voltage frequency f under the suppression method provided in real time are shown. It can be seen that this suppression method can significantly reduce the overcurrent of the output current, decrease the overshoot of the active power and output voltage frequency. At the same time, it also controls the active power oscillation within a certain range, and the three-phase current unbalance degree is also less than that under the traditional control method.

[0047] This method suppresses the overcurrent generated by the asymmetric fault by controlling the positive-sequence current virtual impedance, and also has a certain ability to suppress the fluctuation of the VSC output voltage frequency during the asymmetric fault. It can be seen from the analysis results of the phase-plane method that this suppression method has an improvement effect on the stability of the VSC under the asymmetric fault, can effectively reduce the oscillation process, and has a good effect.

[0048] Exemplarily, as Figure 8 shown, this embodiment also provides a method for suppressing the output current of a voltage source converter during an asymmetric fault, including the following steps: Collect the grid current and grid voltage during the asymmetric fault of the power grid; Based on the grid current and grid voltage during the asymmetric fault of the power grid, obtain the virtual resistance and virtual inductance; the virtual resistance is used to adjust the active power output by the grid-connected inverter, and the virtual inductance is used to adjust the reactive power output by the grid-connected inverter; Feed back the virtual resistance and virtual inductance to the control loop, and finally realize the suppression of the output current of the voltage source converter.

[0049] In this embodiment, before obtaining the virtual resistance and virtual inductance based on the grid current and grid voltage during the asymmetric fault of the power grid, it further includes: Based on the grid voltage during the asymmetric fault of the power grid and the output voltage of the grid-connected inverter, calculate the active power p and reactive power q output by the grid-connected inverter. The specific calculation formulas are as follows:

[0050] In the formula, represents the grid voltage, represents the output voltage of the grid-connected inverter, represents the line impedance, is the power angle difference between the grid-connected inverter and the power grid; sin represents the sine value of the power angle difference between the grid-connected inverter and the power grid; cos represents the cosine value of the power angle difference between the grid-connected inverter and the power grid.

[0051] It can be seen that by accurately calculating the active power and reactive power of the power grid, clarifying the degree of power imbalance, providing a quantitative basis for the dynamic adjustment of virtual impedance parameters, ensuring the real-time matching of the impedance value with the fault state, and improving the accuracy and adaptive ability of control.

[0052] In this embodiment, the grid current and grid voltage of the power grid during an asymmetric fault are respectively subjected to positive and negative sequence separation processing to obtain positive sequence d-axis current, positive sequence q-axis current, positive sequence d-axis voltage, and positive sequence q-axis voltage; based on the positive sequence d-axis current, positive sequence q-axis current, positive sequence d-axis voltage, positive sequence q-axis voltage, and the output voltage of the grid-connected inverter, the virtual resistance and virtual inductance are respectively calculated.

[0053] The positive and negative sequence separation technology is used to decompose the grid current and grid voltage, focusing on the positive sequence component to establish a virtual impedance model, effectively suppressing the harmonic disturbance caused by asymmetric faults, simplifying the control complexity at the same time, and avoiding the interference of the negative sequence component to the system.

[0054] The specific calculation formulas of the virtual resistance and virtual inductance are as follows:

[0055] In the formula, represents the virtual resistance; represents the virtual inductance; , respectively represent the positive sequence active power and positive sequence reactive power, , respectively represent the d-axis positive sequence current and q-axis positive sequence current, , respectively represent the d-axis positive sequence voltage and q-axis positive sequence voltage; represents the grid voltage, represents the output voltage of the grid-connected inverter; represents the grid angular frequency.

[0056] Derive the mathematical expressions of the virtual resistance and inductance based on the positive sequence component, and realize the rapid calculation of the impedance value through the parametric formula, taking into account the power conservation and dynamic response requirements, and ensuring the real-time and theoretical completeness of current suppression.

[0057] In this embodiment, the step of respectively performing positive and negative sequence separation processing on the grid current and grid voltage of the power grid during an asymmetric fault further includes: The grid current and grid voltage of the power grid during an asymmetric fault are respectively subjected to positive and negative sequence separation processing to obtain negative sequence d-axis current, negative sequence q-axis current, negative sequence d-axis voltage, and negative sequence q-axis voltage; Set the negative sequence current reference value to zero.

[0058] In this way, by setting the negative-sequence current reference value to zero, the influence of the negative-sequence component on the system is actively eliminated, the current distortion rate under asymmetric faults is reduced, the risk of equipment overheating or oscillation caused by negative-sequence current is avoided, and the symmetry and reliability of system operation are further improved.

[0059] In this embodiment, the feedback of the virtual resistor and virtual inductor to the control loop to finally achieve the suppression of the output current of the voltage source converter includes: Feed forward the virtual resistor and virtual inductor to the control loop to generate a corresponding regulated voltage; Superimpose the generated regulated voltage on the positive-sequence current control output voltage to finally achieve the suppression of the output current of the voltage source converter.

[0060] By feed forward control, the compensation voltage generated by the virtual impedance is superimposed on the positive-sequence current control output terminal to form a dynamic voltage compensation loop, quickly offsetting the influence of the sudden change of the fault voltage (grid voltage) on the current, realizing multi-variable collaborative suppression, and enhancing the robustness of the control loop.

[0061] In this embodiment, before obtaining the virtual resistor and virtual inductor based on the grid current and grid voltage during asymmetric faults, it further includes: Based on the grid current and grid voltage during asymmetric faults of the power grid, calculate the active power output by the grid-connected inverter p and reactive power q , and the specific calculation formulas are as follows:

[0062] In the formula, , respectively represent the d-axis current and q-axis current, , respectively represent the d-axis voltage and q-axis voltage; Among them, the d-axis current and q-axis current are calculated based on the grid current through the d-q rotating coordinate system; the d-axis voltage and q-axis voltage are calculated based on the grid voltage through the d-q rotating coordinate system.

[0063] Use the d-q rotating coordinate system to decouple and calculate the grid current and voltage, directly extract the active and reactive power parameters, simplify the traditional power calculation process, improve the operation efficiency, and provide real-time data support for the rapid generation of virtual impedance.

[0064] Such as Figure 9As shown in the figure, this embodiment also provides a system for suppressing the output current of a voltage source converter during an asymmetric fault, including: a grid data acquisition module for acquiring the grid current and grid voltage of the grid during an asymmetric fault; a calculation module for obtaining a virtual resistance and a virtual inductance based on the grid current and grid voltage of the grid during an asymmetric fault; the virtual resistance is used to adjust the active power output by the grid-connected inverter, and the virtual inductance is used to adjust the reactive power output by the grid-connected inverter; a feedback module for feeding back the virtual resistance and the virtual inductance into the control loop to finally realize the suppression of the output current of the voltage source converter.

[0065] The present invention also provides an electronic device, including: a memory for storing a computer program; a processor for implementing the steps of the method for suppressing the output current of a voltage source converter during an asymmetric fault when executing the computer program.

[0066] When the processor executes the computer program, it implements the above steps for suppressing the output current of a voltage source converter during an asymmetric fault, for example: acquiring the grid current and grid voltage of the grid during an asymmetric fault; obtaining a virtual resistance and a virtual inductance based on the grid current and grid voltage of the grid during an asymmetric fault; the virtual resistance is used to adjust the active power output by the grid-connected inverter, and the virtual inductance is used to adjust the reactive power output by the grid-connected inverter; feeding back the virtual resistance and the virtual inductance into the control loop to finally realize the suppression of the output current of the voltage source converter.

[0067] Alternatively, when the processor executes the computer program, it implements the functions of each module in the above system.

[0068] Exemplarily, the computer program can be divided into one or more modules / units. The one or more modules / units are stored in the memory and executed by the processor to complete the present invention. The one or more modules / units can be a series of computer program instruction segments capable of completing preset functions, and the instruction segments are used to describe the execution process of the computer program in the device for suppressing the output current of a voltage source converter during an asymmetric fault. For example, the computer program can be divided into a grid data acquisition module, a calculation module, and a feedback module; the specific functions of each module are as follows: the grid data acquisition module for acquiring the grid current and grid voltage of the grid during an asymmetric fault; the calculation module for obtaining a virtual resistance and a virtual inductance based on the grid current and grid voltage of the grid during an asymmetric fault; the virtual resistance is used to adjust the active power output by the grid-connected inverter, and the virtual inductance is used to adjust the reactive power output by the grid-connected inverter; the feedback module for feeding back the virtual resistance and the virtual inductance into the control loop to finally realize the suppression of the output current of the voltage source converter.

[0069] The device for suppressing the output current of the voltage source converter during asymmetric faults can be a computing device such as a desktop computer, notebook, palm computer, and cloud server. The device for suppressing the output current of the voltage source converter during asymmetric faults may include, but is not limited to, a processor and a memory. Those skilled in the art can understand that the above are examples of the device for suppressing the output current of the voltage source converter during asymmetric faults, and do not constitute a limitation on the device for suppressing the output current of the voltage source converter during asymmetric faults. It may include more components than the above, or combine certain components, or different components. For example, the device for suppressing the output current of the voltage source converter during asymmetric faults may also include input / output devices, network access devices, buses, etc.

[0070] The so-called processor can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor, or the processor can also be any conventional processor, etc. The processor is the control center for suppressing the output current of the voltage source converter during asymmetric faults, and uses various interfaces and lines to connect all parts of the device for suppressing the output current of the voltage source converter during asymmetric faults.

[0071] The memory can be used to store the computer programs and / or modules. The processor realizes various functions of the device for suppressing the output current of the voltage source converter during asymmetric faults by running or executing the computer programs and / or modules stored in the memory, and by calling the data stored in the memory.

[0072] The memory may mainly include a program storage area and a data storage area. Among them, the program storage area can store an operating system, application programs required for at least one function (such as a sound playback function, an image playback function, etc.); the data storage area can store data created according to the use of the mobile phone (such as audio data, phone book, etc.). In addition, the memory can include high-speed random access memory, and can also include non-volatile memory, such as a hard disk, memory, plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, at least one magnetic disk storage device, flash device, or other volatile solid-state storage devices.

[0073] The present invention also provides a computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, the steps of the method for suppressing the output current of a voltage source converter during an asymmetric fault are implemented.

[0074] If the modules / units integrated in the system for suppressing the output current of a voltage source converter during an asymmetric fault are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium.

[0075] Based on such an understanding, all or part of the process of implementing the method for suppressing the output current of a voltage source converter during an asymmetric fault of the present invention can also be completed by instructing relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by a processor, the steps of the method for suppressing the output current of a voltage source converter during an asymmetric fault can be implemented. Wherein, the computer program includes computer program code, and the computer program code can be in the form of source code, object code, executable file or preset intermediate form, etc.

[0076] The computer-readable storage medium may include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disc, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal, and software distribution medium, etc.

[0077] It should be noted that the content included in the computer-readable storage medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the computer-readable storage medium does not include electrical carrier signals and telecommunication signals.

[0078] The present invention provides a method for suppressing the output current of a voltage source converter during an asymmetric fault, having the following advantages: First, strong overcurrent suppression ability: Through positive-sequence current virtual impedance control, the present invention can quickly calculate and generate a virtual resistor and a virtual inductor, which directly act on the positive-sequence current control link. Compared with the traditional limiter control method, there is no need to wait for the response time of the control loop, and the positive-sequence overcurrent can be quickly suppressed at the moment of the fault, effectively reducing the overcurrent risk of the grid-connected inverter under asymmetric faults and protecting the safe operation of the equipment.

[0079] Second, the stability is significantly improved: From the phase trajectory results of the large-signal model analysis of the VSC under asymmetric faults, it can be seen that after adopting the method proposed in the present invention, whether it is the positive-sequence power angle or the negative-sequence power angle, it can quickly converge and operate stably when a fault occurs. This indicates that the present invention can effectively enhance the stability of the VSC under asymmetric faults, enabling the grid-connected inverter to better adapt to grid faults, reducing system oscillations and instability phenomena caused by faults, and improving the overall reliability of the power system.

[0080] Third, it has an inhibitory effect on frequency fluctuations: The simulation results show that after adopting the method of the present invention, the fluctuations of the output voltage frequency of the VSC during asymmetric faults are significantly suppressed. This is of great significance for maintaining the power quality of the power system, ensuring that various electrical equipment in the power system can operate normally at a stable frequency, and reducing the damage to equipment caused by frequency fluctuations.

[0081] Fourth, it is convenient and fast to implement: The positive-sequence current virtual impedance control strategy proposed in the present invention has a calculation process based on the existing voltage and current sampling data, and the virtual resistance and virtual inductance can be obtained through simple operations. Moreover, it is added to the system control loop in the form of virtual voltage, which is easy to implement and does not require large-scale transformation of the existing grid-connected inverter control system, having good engineering application value.

[0082] The above embodiments are only one of the implementation manners capable of realizing the technical solution of the present invention. The scope of protection required by the present invention is not only limited by this embodiment, but also includes any changes, substitutions and other implementation manners that are easily conceivable by those skilled in the art within the technical scope disclosed by the present invention.

[0083] Finally, it should be noted that: The above embodiments are only used to illustrate the technical solution of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: It is still possible to modify the specific implementation manners of the present invention or make equivalent substitutions, and any modification or equivalent substitution that does not depart from the spirit and scope of the present invention should be covered within the protection scope of the present invention.

Claims

1. A method for suppressing output current of a voltage source converter during an asymmetric fault, characterized in that: include: Collect grid current and grid voltage when the grid has an asymmetric fault; Based on the grid current and grid voltage when the grid is in an asymmetric fault, a virtual resistance and a virtual inductance are obtained; The virtual resistance and virtual inductance are fed back into the control loop, the active power output by the grid-connected inverter is adjusted by the virtual resistance, and the reactive power output by the grid-connected inverter is adjusted by the virtual inductance, so as to suppress the output current of the voltage source converter.

2. The method for suppressing output current of a voltage source converter during an asymmetric fault according to claim 1, characterized in that: Before obtaining the virtual resistance and virtual inductance based on the grid current and grid voltage when the grid has an asymmetric fault, the method further includes: Based on the grid voltage and grid-connected inverter output voltage during asymmetric faults, the active power output by the grid-connected inverter is calculated. p and reactive power q , the specific calculation formula is as follows: In the formula, Indicates the grid voltage, Indicates the grid-connected inverter output voltage, represents the line impedance, is the power angle difference between the grid-connected inverter and the grid; sin Represents the sine value of the power angle difference between the grid-connected inverter and the grid; cos Indicates the cosine value of the power angle difference between the grid-connected inverter and the grid.

3. The method for suppressing output current of a voltage source converter during an asymmetric fault according to claim 1, characterized in that: The method of obtaining a virtual resistance and a virtual inductance based on a grid current and a grid voltage when the grid has an asymmetric fault comprises: The grid current is subjected to positive and negative sequence separation processing when the grid is in an asymmetric fault state, and a positive sequence d-axis current and a positive sequence q-axis current are obtained; The grid voltage under asymmetric fault is subjected to positive and negative sequence separation processing to obtain positive sequence d-axis voltage and positive sequence q-axis voltage; Based on the positive-sequence d-axis current, the positive-sequence q-axis current, the positive-sequence d-axis voltage, the positive-sequence q-axis voltage and the output voltage of the grid-connected inverter, the virtual resistance and the virtual inductance are calculated respectively.

4. The method for suppressing output current of a voltage source converter during an asymmetric fault according to claim 3, characterized in that: Based on the positive-sequence d-axis current, the positive-sequence q-axis current, the positive-sequence d-axis voltage, the positive-sequence q-axis voltage and the grid-connected inverter output voltage, the virtual resistance and virtual inductance are calculated respectively. The specific calculation formulas are as follows: In the formula, represents a virtual resistor; represents virtual inductance; , They represent positive sequence active power and positive sequence reactive power respectively, , They represent the d-axis positive sequence current and the q-axis positive sequence current respectively. , They represent the d-axis positive sequence voltage and the q-axis positive sequence voltage respectively; Indicates the grid voltage, Indicates the grid-connected inverter output voltage; Indicates the grid angular frequency.

5. The method for suppressing output current of a voltage source converter during an asymmetric fault according to claim 3, characterized in that: The grid current is subjected to positive- and negative-sequence separation processing when the grid fails, to obtain a positive-sequence d-axis current and a positive-sequence q-axis current, and also to obtain a negative-sequence d-axis current and a negative-sequence q-axis current; The grid voltage is subjected to positive and negative sequence separation processing when the grid fails, so as to obtain a positive sequence d-axis voltage and a positive sequence q-axis voltage, and also obtain a negative sequence d-axis voltage and a negative sequence q-axis voltage; Set the negative sequence current reference to zero.

6. The method for suppressing output current of a voltage source converter during an asymmetric fault according to claim 1, characterized in that: The virtual resistance and virtual inductance are fed back into the control loop, the active power output by the grid-connected inverter is adjusted by the virtual resistance, and the reactive power output by the grid-connected inverter is adjusted by the virtual inductance; To suppress the output current of the voltage source converter, including: The virtual resistor and the virtual inductor are fed forward into the control loop, the active power output by the grid-connected inverter is adjusted by the virtual resistor, and the reactive power output by the grid-connected inverter is adjusted by the virtual inductor, thereby generating a regulated voltage; The generated regulation voltage is superimposed on the positive sequence current control output voltage to suppress the output current of the voltage source converter.

7. The method for suppressing output current of a voltage source converter during an asymmetric fault according to claim 1, characterized in that: Before obtaining the virtual resistance and virtual inductance based on the grid current and grid voltage when the grid has an asymmetric fault, the method further includes: Based on the grid current and grid voltage during an asymmetric fault, the active power output of the grid-connected inverter is calculated. p and reactive power q , the specific calculation formula is as follows: In the formula, , They represent the d-axis current and the q-axis current respectively. , Respectively represent the d-axis voltage and q-axis voltage; Among them, the d-axis current and the q-axis current are calculated based on the grid current through the dq rotating coordinate system; the d-axis voltage and the q-axis voltage are calculated based on the grid voltage through the dq rotating coordinate system.

8. A voltage source converter output current suppression system during an asymmetric fault, characterized in that: include: A power grid data acquisition module, used to collect power grid current and power grid voltage when the power grid has an asymmetric fault; A calculation module, used for obtaining a virtual resistance and a virtual inductance based on a grid current and a grid voltage when the grid is in an asymmetric fault; The feedback module is used to feed back the virtual resistance and virtual inductance into the control loop, adjust the active power output by the grid-connected inverter through the virtual resistance, and adjust the reactive power output by the grid-connected inverter through the virtual inductance, so as to suppress the output current of the voltage source converter.

9. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the method for suppressing the output current of a voltage source converter during an asymmetric fault as described in any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, it is used to implement the steps of the method for suppressing the output current of a voltage source converter during an asymmetric fault as described in any one of claims 1 to 7.

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