A high-sensitivity high-voltage sensor manufacturing process and sensor
By employing SOI silicon wafer structure and hollow structure design in silicon piezoresistive pressure sensors, the problems of short service life and high cost of sensors under high pressure environment are solved, and the high sensitivity and pressure resistance are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- WUXI SENCOCH SEMICON CO LTD
- Filing Date
- 2025-04-10
- Publication Date
- 2026-04-28
AI Technical Summary
Existing silicon piezoresistive pressure sensors have short lifespans and high costs under high pressure environments, making it difficult to balance sensitivity and pressure resistance.
The SOI silicon wafer structure is adopted, and P+ and P- ion implantation is combined to form a piezoresistive sensing element. A hollow structure is made on the silicon island film structure to form an orthogonal fence design. The hollow structure buffers the gas impact force and improves the sensitivity and pressure resistance of the sensor.
Improving sensor sensitivity and lifespan under high-pressure environments while reducing costs ensures the sensor's suitability for such environments.
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Figure CN120172345B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of sensor technology, specifically to a manufacturing process and sensor for a high-sensitivity, high-pressure-resistant sensor. Background Technology
[0002] MEMS pressure sensors have been widely used in various fields such as automotive electronics, consumer electronics, healthcare, industry, agriculture, and aerospace after decades of development. Based on their working principles, MEMS pressure sensors can be classified into several types: piezoresistive, piezoelectric, capacitive, resonant, surface acoustic wave, and fiber optic. Among them, the silicon piezoresistive pressure sensor is the most commercially available and widely used MEMS pressure sensor. Silicon piezoresistive pressure sensors are made using the piezoresistive effect of single-crystal silicon. Four equal-value semiconductor resistors are diffused in a specific direction on a silicon diaphragm and connected to form a Wheatstone bridge, serving as the sensitive element of the force-to-electricity converter. When the diaphragm is subjected to external pressure, the bridge becomes unbalanced. If an excitation power supply (constant current and constant voltage) is applied to the bridge, an output voltage proportional to the measured pressure can be obtained, thus achieving the purpose of pressure measurement. In current technology, to improve the sensitivity of pressure sensors, engineers typically reduce the thickness of the sensitive diaphragm layer.
[0003] However, in some industrial and aerospace applications, there are scenarios requiring flow rate testing of large-volume gases, such as exhaust gas detection in large-scale industrial production. In these situations, high-speed impacts of large-volume gas on pressure sensors subject them to pressures exceeding 10 MPa. In such environments, a thin sensitive diaphragm layer can shorten the sensor's lifespan. Furthermore, pressure sensors made from special materials are very expensive. Summary of the Invention
[0004] To address the issue of existing high-pressure resistant sensors failing to balance cost and lifespan, this invention provides a manufacturing process for a high-sensitivity, high-pressure-resistant sensor that can simultaneously improve the sensitivity and pressure resistance of the pressure sensor at a lower cost. This application also discloses a high-sensitivity, high-pressure-resistant sensor.
[0005] The technical solution of this invention is as follows: a manufacturing process for a high-sensitivity, high-voltage-resistant sensor, comprising the following steps:
[0006] S1: Preparation of SOI silicon wafers;
[0007] The SOI silicon wafer includes, from top to bottom: a second silicon layer (4), a second isolation layer (3), a first silicon layer (1), and a first silicon dioxide isolation layer (2);
[0008] S2: P+ and P- ion implantation forms a piezoresistive sensing element;
[0009] Boron ions are implanted into the second silicon layer (4) to form a P-doped layer using light doping, which constitutes a sensitive resistor element (5).
[0010] Then, boron ions are implanted into the second silicon layer (4), and a P+ doped layer (6) is formed by heavy doping to form an ohmic contact electrical connection.
[0011] The heavily doped P-doped layer (6) connects several sensitive resistor elements (5) together and forms a Wheatstone bridge with the metal.
[0012] S3: Grow an oxide layer and etch through-holes;
[0013] An oxide layer (7) is grown on the second silicon layer (4), and then the oxide layer (7) is dry etched to form a via (8).
[0014] S4: Metal sputtering and patterning;
[0015] A metal layer (9) is sputtered on the surface of the through hole (8) and the oxide layer (7) by magnetron sputtering to form metal interconnects and bonding pads between the varistors;
[0016] Its characteristic is that it further includes the following steps:
[0017] S5: Dry etching of the first insulating layer (2) on the back of the silicon wafer, the etching stop layer is a silicon substrate (1), and after etching to form an etching window on the first insulating layer (2), a mask layer (10) for etching the silicon island film structure is formed.
[0018] S6: The silicon wafer is etched using KOH solution, and a silicon island film structure (11) is formed on the silicon substrate (1) based on the mask layer (10).
[0019] S7: Form the first layer of hollow structure (13) on the silicon island membrane structure (11).
[0020] S8: A second hollow structure (14) is formed on the first hollow structure to obtain a hollow silicon island structure.
[0021] Its further features are:
[0022] Step S7 specifically includes the following steps:
[0023] a1: Perform CMP mechanical polishing to thin the silicon island film structure (11);
[0024] a2: A layer of photoresist (12) with a regular spacing structure is coated on the surface of the silicon island film structure (11) using a photoresist plate.
[0025] a3: A platinum metal layer is deposited by magnetron sputtering on the surface of the silicon island film structure (11), and the photoresist (12) is then peeled off using a lift-off process to form a vertical platinum metal layer structure, thus obtaining the first hollow structure (13).
[0026] Step S8 specifically includes the following steps:
[0027] b1: A layer of metallic aluminum is deposited on the first hollow structure (13) by magnetron sputtering.
[0028] b2: Spin-coat photoresist onto the surface of metallic aluminum, and develop the horizontally arranged protective photoresist using a mask;
[0029] b3: Etching of metallic aluminum using an acidic wet etching solution;
[0030] b4: Remove the protective photoresist to form a fence-like strip structure perpendicular to the first hollow structure, and obtain the second hollow structure (14).
[0031] Step S6 specifically includes the following steps:
[0032] c1: Photoresist is applied to protect the pre-defined silicon island film structure on the silicon substrate (1);
[0033] c2: Use KOH solution to coarsely etch silicon to etch out left and right double windows on the first layer of silicon (1) which serves as the substrate;
[0034] The photoresist-protected area forms a boss structure;
[0035] c3: Remove the photoresist protective film;
[0036] c4: Use KOH solution for fine etching, and simultaneously etch the window and the boss. The window position is etched up to the second isolation layer (3) to generate a silicon island film structure (11).
[0037] A high-sensitivity, high-voltage-resistant sensor comprises: a second silicon layer (4), a second isolation layer (3), and a first silicon layer (1) arranged from top to bottom, characterized in that:
[0038] A cavity is provided in the first silicon layer (1) to reach the second isolation layer (3), and a silicon island film structure (11) is provided in the cavity on the lower surface of the second isolation layer (3).
[0039] The lower surface of the silicon island membrane structure (11) is provided with a hollow structure;
[0040] The hollow structure includes two layers of hollow structure arranged from top to bottom.
[0041] A further feature is:
[0042] The first layer of the hollow structure is a fence-like strip structure;
[0043] The second layer of hollow structure is a fence-like strip structure, and the strip structure in the second layer of hollow structure is not parallel to the strip structure in the first layer of hollow structure;
[0044] The second silicon layer (4) contains a sensitive resistor element (5) and a P+ doped layer (6). The P+ doped layer (6) connects several sensitive resistor elements (5) together and forms a Wheatstone bridge with the metal.
[0045] An oxide layer (7) is provided on the upper surface of the second silicon layer (4), and a through hole (8) is provided in the oxide layer (7). Metal (9) fills the through hole (8) to connect the P+ doped layer (6), and metal (9) forms a bonding pad on the surface of the oxide layer (7).
[0046] A manufacturing process for a high-sensitivity, high-pressure-resistance sensor involves placing a silicon island membrane structure in the cavity on the back of the pressure sensor. This positions the pressure-sensitive element at locations of high stress, improving the sensor's sensitivity. Simultaneously, a perforated structure is created within the silicon island membrane structure. When high-speed gas impacts this perforated structure, the slight deformation of the perforated structure buffers the impact force without hindering gas passage, effectively protecting the pressure-sensitive diaphragm layer and extending the sensor's lifespan. This ensures the silicon island membrane structure can withstand higher pressures. This application, through the combined use of the silicon island membrane structure and the perforated structure, improves both the sensitivity and pressure resistance of the pressure sensor at a relatively low cost, ensuring the sensor's suitability for high-pressure environments. Attached Figure Description
[0047] Figure 1 This is the initial part of the manufacturing process for high-sensitivity, high-pressure-resistant sensors.
[0048] Figure 2 The process for fabricating silicon island film structures for high-sensitivity, high-voltage-resistant sensors;
[0049] Figure 3 The fabrication process of the hollow structure for the manufacturing process of high-sensitivity, high-pressure-resistant sensors;
[0050] Figure 4 This is an example of a plate drawing of a silicon island membrane structure with a hollowed-out structure in this application. Detailed Implementation
[0051] like Figures 1-4 As shown, this application includes a manufacturing process for a high-sensitivity, high-pressure-resistant sensor, which includes the following steps.
[0052] S1: Preparation of SOI silicon wafers.
[0053] High-energy (120-200keV) oxygen ions (0.3-1.8e18cm-2) are implanted into a silicon wafer, and the high-energy implanted oxygen ions are distributed below the surface of the silicon wafer. Then, after annealing at high temperature (900-1500°C) for 3-6 hours, the oxygen ions in the silicon wafer react chemically with the silicon, forming a silicon dioxide insulating layer material with a thickness of about 300-500nm below the surface of the silicon wafer. This forms a first silicon layer (1) and a second isolation layer (3) with a thickness of 300-600nm on its upper surface, as well as a second silicon layer (4) on the upper surface of the second isolation layer. Subsequently, a first silicon dioxide isolation layer (2) with a thickness of about 0.3-0.5μm is formed on the lower surface of the first silicon layer using PECVD. These multiple layers constitute an SOI silicon wafer. The final SOI silicon wafer includes, from top to bottom, a second silicon layer (4), a second isolation layer (3), a first silicon layer (1), and a first silicon dioxide isolation layer (2), as shown. Figure 1 As shown in Figure a.
[0054] S2: P+ and P- ion implantation forms a piezoresistive sensing element.
[0055] On the second silicon layer (4), boron ions with an energy of 80 keV and a dose of 5 × 10e15 cm-2 are implanted to lightly dope and form a P-doped layer, forming a sensitive resistor element (5); then, boron ions with an implantation energy of 200 keV and a dose of 1.57 × 10e14 cm-2 are implanted on the second silicon layer (4) to heavily dope and form a P+ doped layer (6) to form an ohmic contact electrical connection. The process schematic diagram is shown below. Figure 1 As shown in b, the map is as follows Figure 1 As shown in b', the heavily doped structure connects several varistors together, forming a Wheatstone bridge with the metal. To reduce resistance errors in the circuit, the resistance of the internal interconnect structure should be as small as possible. Furthermore, to ensure ohmic contact with the metal, the doping concentration of the internal interconnect structure needs to be sufficiently high to reduce the width of the Schottky barrier between it and the metal. The silicon wafer is then subjected to high-temperature annealing at 1050°C for 90 minutes. After high-temperature annealing, lattice damage on the silicon wafer is repaired, and the dopant ions re-diffuse and are activated, forming N-type and P-type regions in the silicon wafer that meet the design requirements.
[0056] S3: Grow an oxide layer and etch through holes.
[0057] A 50nm thick oxide layer (7) is grown on the second silicon layer (4), and then dry etching is performed on 7 to form a via (8). The process diagram is shown below. Figure 1 As shown in C, the map is as follows: Figure 1 As shown in c'.
[0058] S4: Metal sputtering and patterning;
[0059] A 1-1.5 μm thick metal layer (9) is sputtered onto the surfaces of the via (8) and oxide layer (7) using magnetron sputtering. The sputtered metal is used to form metal interconnects and bonding pads between varistors, and also as a sealing material to seal the via. The thickness of the sputtered metal is greater than the thickness of the via to ensure that the via is completely filled. The process schematic is shown in the figure. Figure 1 As shown in d, the map is as follows Figure 1 As shown in d'.
[0060] S5: Dry etching of the first insulating layer (2) on the back of the silicon wafer, with the silicon substrate (1) as the etching stop layer, forms a mask layer (10) for etching the silicon island film structure. In this step, the first insulating layer (2) is etched to form the mask layer (10) for etching the silicon island film structure. The process diagram is shown below. Figure 2 As shown in e, the map is as follows Figure 2 As shown in e'.
[0061] S6: The silicon wafer is etched with KOH solution to form a silicon island film structure (11) on the silicon substrate (1) based on the mask layer (10).
[0062] To shorten the etching time and precisely control the thickness of the pressure-sensing diaphragm, this method employs a two-step etching process to generate the silicon island film structure. The first step is coarse etching, and the specific steps are as follows:
[0063] c1: Photoresist is applied to the position of the silicon island film structure on the silicon substrate (1) for protection;
[0064] c2: A 25% KOH solution was used for coarse etching in an 80°C water bath to etch left and right double windows on the first silicon layer (1) serving as the substrate; the photoresist-protected area formed a boss structure. During the etching process, the etching depth was measured every hour using a profilometer, and the measurement frequency was increased when approaching the target etching depth.
[0065] The first step is as follows Figure 2 As shown in Figure f, the main process involves coarse etching of the left and right double windows on both sides of the silicon island film structure (11) on the silicon substrate. Photoresist is applied to the middle position to protect and slow down the etching rate of the mass block structure. The final etching depth of the left and right double windows is approximately 100~200 μm, and the etching depth of the middle mass block is approximately 20~50 μm. The position of the silicon island film structure (11) in the bottom cavity is shown in Figure f. Figure 2 As shown in f'.
[0066] The second step is fine etching, and the specific steps are as follows:
[0067] c3: Remove the photoresist protective film;
[0068] c4: Fine etching is performed using a 45% KOH solution in a 60°C water bath. In this step, the window and the boss are etched simultaneously. The window is etched up to the second isolation layer (3) to generate a silicon island film structure (11).
[0069] During the etching process, the etching depth was measured every half hour using a profilometer. This step has a relatively fast etching rate, saving time, and the double-window and intermediate protrusion structures are etched simultaneously, with silicon oxide 3 serving as the stop layer, until the silicon substrate of the double-window is etched down to the stop layer, ultimately forming the structure shown below. Figure 2 The middle boss shown in g is retained as a 10-30μm mass block silicon island film structure (11), and the etching depth of the left and right double windows and the middle silicon island mass block is about 200~350um during the process.
[0070] S7: Form the first perforated structure (13) on the silicon island membrane structure (11). Specifically, this includes the following steps.
[0071] a1: Perform CMP mechanical polishing to thin the silicon island film structure (11) to 3~10um;
[0072] a2: A layer of photoresist (12) with a regular spacing structure is coated on the surface of the silicon island film structure (11) using a photoresist plate.
[0073] a3: A 0.1~2um platinum metal layer is deposited by magnetron sputtering on the surface of the silicon island film structure (11), and then the photoresist (12) is peeled off by lift-off process to form a vertical structure of platinum metal layer, thus obtaining the first hollow structure (13).
[0074] Specific organizations such as Figure 3 As shown in the middle h, the plate diagram is as follows: Figure 3 As shown in h'.
[0075] S8: A second hollow structure is formed on the first hollow structure to obtain a hollow silicon island structure.
[0076] Step S8 specifically includes the following steps:
[0077] b1: 0.1~2um of metallic aluminum is deposited on the upper surface of the first hollow structure (13) by magnetron sputtering.
[0078] b2: Spin-coat photoresist onto the surface of metallic aluminum, and develop the horizontally arranged protective photoresist using a mask;
[0079] b3: Etching of metallic aluminum using an acidic wet etching solution;
[0080] b4: Remove the protective photoresist to form a fence-like strip structure perpendicular to the first hollow structure (13), and obtain the second hollow structure (14).
[0081] like Figure 3 As shown in Figure i, the layout of the second layer of hollow structure (14) is as follows: Figure 3 As shown in i'.
[0082] In practical use, the hollow structure in this application can be laid in the pressure-bearing parts as needed, such as the lower surface of the second isolation layer (3) on both sides of the silicon island membrane structure (11) in the cavity. The impact force of the gas is buffered by the micro-deformation of the hollow structure, but it will not affect the gas passing through the hollow layer, effectively improving the pressure resistance of the sensor and the service life of the sensitive pressure-bearing membrane layer.
[0083] A high-sensitivity, high-pressure-resistant sensor fabricated based on the above process includes: a second silicon layer (4), a second isolation layer (3), and a first silicon layer (1) arranged from top to bottom.
[0084] The second silicon layer (4) contains a sensitive resistor element (5) and a P+ doped layer (6). The P+ doped layer (6) connects several sensitive resistor elements (5) together and forms a Wheatstone bridge with the metal. An oxide layer (7) is provided on the upper surface of the second silicon layer (4). Through holes (8) are provided in the oxide layer (7). Metal (9) fills the through holes (8) and connects to the P+ doped layer (6). The metal (9) forms bonding pads on the surface of the oxide layer (7). A cavity is provided in the first silicon layer (1) that leads to the second isolation layer (3). A silicon island film structure (11) is provided on the lower surface of the second isolation layer (3) in the cavity. A hollow structure is provided on the lower surface of the silicon island film structure (11). The hollow structure includes two hollow structures arranged from top to bottom.
[0085] The first layer of openwork structure (13) is a fence-like strip structure; the second layer of openwork structure (14) is a fence-like strip structure, and the strip structure in the second layer of openwork structure is not parallel to the strip structure in the first layer of openwork structure; various shapes of openwork structures can be formed by the angle between the strip structure of the first layer of openwork structure (13) and the second layer of openwork structure (14).
[0086] In this embodiment, to simplify the process, the first layer of hollow structure (13) and the second layer of hollow structure (14) are perpendicular to each other, forming a square hollow structure, such as... Figure 4 As shown. The first layer of hollow structure (13) and the second layer of hollow structure (14) constitute micron-level pores (20-50μm) to form local narrow channels. When the gas flows through, the flow velocity increases and the static pressure decreases. The impact kinetic energy is partially converted into the kinetic energy of high-speed flow, reducing the direct pressure on the sensitive membrane layer.
[0087] In this embodiment, the first layer of the hollow structure (13) is a vertical row of platinum bars, and the second layer of the hollow structure (14) is a row of aluminum bars. The hollow structure of this application achieves gas impact buffering through a unique double-layer orthogonal fence design. When high-pressure gas impacts, the rectangular micropores formed by the first layer of the hollow structure (13) and the second layer of the hollow structure (14) divide the longitudinal airflow into multiple microflows by the vertical structure, and absorb the impact kinetic energy through the elastic deformation of the platinum bars; the transverse airflow generates turbulent deceleration under the guidance of the horizontal aluminum bars, converting the impact energy into heat energy. Combined with the Venturi effect in the pores, the deformation of the membrane under pressure impact is reduced by 20% to 50%, and the pressure resistance limit is improved.
[0088] In this application, the second silicon layer (4), the second isolation layer (3), the first silicon layer (1), and the oxide layer (7) constitute the pressure-sensitive membrane structure of the sensor. The data is transmitted to the metal (9) and connected to the P+ doped layer (6), and bonding pads are formed on the surface of the oxide layer (7). The data of the sensitive resistor element (5) is transmitted to the outside of the sensor through the P+ doped layer (6) and the metal (9). After using the technical solution of this invention, it is not necessary to reduce the thickness of the pressure-sensitive membrane structure. Instead, a silicon island membrane structure (11) is set in the back cavity, so that the pressure-sensitive elements are all located in positions with high stress, thereby improving the sensitivity of the sensor. At the same time, a hollow structure is made on the silicon island membrane structure (11) to form a hollow silicon island structure. Compared with the conventional silicon island structure, the hollow silicon island structure can withstand greater pressure. This application can accurately generate silicon island membrane structures and silicon island membrane hollow structures at a lower cost, effectively improving the pressure resistance and sensitivity of the sensor.
[0089] The hollow structure in this application achieves multi-stage conversion of gas impact energy through an orthogonal fence-like geometric design. The first layer of vertical platinum fences utilizes its high Young's modulus to convert longitudinal impact kinetic energy into structural potential energy through elastic deformation; the second layer of horizontal aluminum fences, with its low stiffness, disperses residual stress through lateral displacement deformation. The orthogonal mesh support frame formed by the double-layer structure reconstructs the stress transmission path, allowing the impact load to diffuse synchronously along the X / Y axes, avoiding stress concentration at single points. Under dynamic impact, the interlayer metal interfaces generate micro-slip friction, converting some kinetic energy into heat dissipation based on the Coulomb friction effect. Micrometer-scale pores (20-50 μm) regulate the flow field through the Venturi effect: narrow channels accelerate gas velocity to reduce static pressure, while the sudden expansion structure at the pore outlet induces turbulent boundary layer separation, further dissipating energy through viscous drag and vortices. Compared to traditional hexagonal nanopores that rely on a single viscous energy dissipation mechanism, this application achieves a leap in pressure resistance while ensuring sensitivity through the synergistic effect of three physical principles: elastic potential energy storage, frictional heat energy conversion, and turbulent kinetic energy dissipation.
Claims
1. A manufacturing process for a high-sensitivity, high-voltage-resistant sensor, comprising the following steps: S1: Preparation of SOI silicon wafers; The SOI silicon wafer comprises, from top to bottom: a second silicon layer (4), a second isolation layer (3), a first silicon layer (1), and a first silicon dioxide isolation layer (2); with the first silicon layer as the substrate; S2: P+ and P- ion implantation forms a piezoresistive sensing element; Boron ions are implanted into the second silicon layer (4) to form a P-doped layer using light doping, which constitutes a sensitive resistor element (5). Then, boron ions are implanted into the second silicon layer (4), and a P+ doped layer (6) is formed by heavy doping to form an ohmic contact electrical connection. The heavily doped P-doped layer (6) connects several sensitive resistor elements (5) together and forms a Wheatstone bridge with the metal. S3: Grow an oxide layer and etch through-holes; An oxide layer (7) is grown on the second silicon layer (4), and then the oxide layer (7) is dry etched to form a through hole (8). S4: Metal sputtering and patterning; A metal layer (9) is sputtered on the surface of the through hole (8) and the oxide layer (7) by magnetron sputtering to form metal interconnects and bonding pads between the varistors; Its characteristic is that it further includes the following steps: S5: Dry etching of the first silicon dioxide isolation layer (2) on the back of the silicon wafer, the etching stop layer is the first silicon layer (1), and after etching to form an etching window on the first silicon dioxide isolation layer (2), a mask layer (10) for etching the silicon island film structure is formed. S6: The silicon wafer is etched using KOH solution, and a silicon island film structure (11) is formed on the first silicon layer (1) based on the mask layer (10). S7: Form the first layer of hollow structure (13) on the silicon island membrane structure (11). Step S7 specifically includes the following steps: a1: Perform CMP mechanical polishing to thin the silicon island film structure (11); a2: A layer of photoresist (12) with a regular spacing structure is coated on the surface of the silicon island film structure (11) using a photoresist plate. a3: A platinum metal layer is deposited by magnetron sputtering on the surface of the silicon island film structure (11), and the photoresist (12) is then peeled off using a lift-off process to form a vertical platinum metal layer structure, thus obtaining the first hollow structure (13). S8: A second hollow structure (14) is formed on the first hollow structure to obtain a hollow silicon island structure; Step S8 specifically includes the following steps: b1: A layer of metallic aluminum is deposited on the first hollow structure (13) by magnetron sputtering. b2: Spin-coat photoresist onto the surface of metallic aluminum, and develop the strip-shaped protective photoresist using a photomask; b3: Etching of metallic aluminum using an acidic wet etching solution; b4: Remove the protective photoresist to form a second layer of fence-like strip structure, resulting in a second layer of hollow structure (14).
2. The manufacturing process of a high-sensitivity, high-voltage-resistant sensor according to claim 1, characterized in that: Step S6 specifically includes the following steps: c1: Photoresist is applied to protect the silicon island film structure pre-set on the first silicon layer (1); c2: Use KOH solution to coarsely etch silicon to etch out left and right double windows on the first layer of silicon (1) which serves as the substrate; The photoresist-protected area forms a boss structure; c3: Remove the photoresist protective film; c4: Use KOH solution for fine etching, and simultaneously etch the window and the boss. The window position is etched up to the second isolation layer (3) to generate a silicon island film structure (11).
3. A high-sensitivity, high-voltage-resistance sensor, manufactured using the high-sensitivity, high-voltage-resistance sensor manufacturing process described in any one of claims 1-2, comprising: The second silicon layer (4), the second isolation layer (3), and the first silicon layer (1) are arranged from top to bottom, characterized in that: A cavity is provided in the first silicon layer (1) to reach the second isolation layer (3), and a silicon island film structure (11) is provided in the cavity on the lower surface of the second isolation layer (3). The lower surface of the silicon island membrane structure (11) is provided with a hollow structure; The hollow structure includes two layers of hollow structure arranged from top to bottom.
4. The high-sensitivity, high-pressure-resistant sensor according to claim 3, characterized in that: The first layer of openwork structure is a fence-like strip structure.
5. The high-sensitivity, high-pressure-resistant sensor according to claim 4, characterized in that: The second layer of openwork structure is a fence-like strip structure, and the strip structures in the second layer of openwork structure are not parallel to the strip structures in the first layer of openwork structure.
6. The high-sensitivity, high-pressure-resistant sensor according to claim 3, characterized in that: The second silicon layer (4) contains a sensitive resistor element (5) and a P+ doped layer (6). The P+ doped layer (6) connects several sensitive resistor elements (5) together and forms a Wheatstone bridge with the metal.
7. The high-sensitivity, high-pressure-resistant sensor according to claim 3, characterized in that: An oxide layer (7) is provided on the upper surface of the second silicon layer (4), and a through hole (8) is provided in the oxide layer (7). Metal (9) fills the through hole (8) to connect the P+ doped layer (6), and metal (9) forms a bonding pad on the surface of the oxide layer (7).
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