Temperature control module for furnace reactor and method of controlling temperature of furnace reactor
By implementing the temperature control module in the semiconductor processing tube, the pollution problem caused by the formation of substrate layer particles is solved, and the effect of reducing particle pollution and removing treatment by-products is achieved.
Patent Information
- Application Number
- CN202411856765.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-12-20
- Filing Date
- 2024-12-17
- Publication Date
- 2025-06-20
AI Technical Summary
During semiconductor substrate processing, particle formation in the substrate layer can lead to wafer contamination, affecting the performance of the semiconductor device.
By implementing the solution of the temperature control module in the treatment tube of the furnace system, the treatment tube temperature is first reduced to a second temperature less than the maximum treatment temperature, waiting for the purge residence time, and then increasing the treatment tube temperature to a third temperature greater than the maximum treatment temperature.
This scheme effectively reduces particle contamination, removes treatment by-products in the lining layer, allowing for a large number of deposition cycles to be performed before subsequent applications.
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Figure CN120174353A_ABST
Abstract
Description
Technical Field
[0001] The present invention generally relates to semiconductor processing, and more particularly, to temperature control of a furnace reactor. Background Art
[0002] In a vertical furnace reactor, wafers can be processed in batches by loading a plurality of wafers into a boat and inserting the boat into the reactor processing chamber. During a deposition cycle that occurs in the processing chamber, such as a low-pressure chemical vapor deposition (LPCVD) process for forming silicon nitride, one or more layers of material are formed on the wafers. In addition, material can be deposited on the lining of the processing chamber. As this lining layer accumulates, the likelihood of particle contamination increases due to particles being released from the lining layer onto the wafers in the processing chamber. The lining layer can also trap processing by-products that can be released onto the wafers, resulting in further contamination.
[0003] It should be understood that forming particles on the wafers is undesirable because the particles can have an adverse effect on the performance of semiconductor devices formed on the wafers.
[0004] Accordingly, there is a need for substrate processing systems and methods that minimize particle formation during semiconductor substrate processing. Summary of the Invention
[0005] According to a first embodiment of the present invention, there is provided a furnace system for processing a substrate, comprising: a processing tube arranged to receive one or more substrates supported on a wafer boat; one or more heating elements for heating the processing tube; a processing gas flow source for providing a processing gas flow into the processing tube; a purge gas flow source for providing a purge gas flow into the processing tube; and a temperature control module operably connected to the one or more heating elements, wherein the temperature control module is configured to perform the following steps after a deposition cycle having a maximum processing temperature T1 has occurred in the processing tube: reducing the processing tube temperature to a second temperature T2 that is less than the maximum processing temperature T1; and after a purge dwell time, increasing the processing tube temperature to a third temperature T3 that is greater than the maximum processing temperature T1.
[0006] Advantages of embodiments of the present invention are that particle contamination can be reduced. An advantage of embodiments of the present invention is that processing by-products trapped in the lining layer can be removed. An advantage of embodiments of the present invention is that after applying temperature increase and decrease according to the first embodiment, a large number of deposition cycles can be performed before a subsequent application of the temperature profile according to the first embodiment is required, such as a number sufficient to deposit a material layer 4000 Å thick or even 6000 Å or 8000 Å thick.
[0007] Reducing the processing tube temperature to the second temperature can include substantially turning off the power supply to the heating elements.
[0008] Reducing the processing tube temperature to the second temperature may include inserting a wafer boat into the processing tube. The wafer boat inserted into the processing tube to reduce the processing tube temperature may be empty. The wafer boat inserted into the processing tube to reduce the processing tube temperature may contain one or more wafers.
[0009] Reducing the processing tube temperature to the second temperature may include flowing cold gas into the processing tube.
[0010] Reducing the processing tube temperature to the second temperature may include causing a fan system to blow cold air onto a heating element.
[0011] The system may include a water cooling system arranged and configured to cool one or more heating elements. Reducing the processing tube temperature to the second temperature may include activating the water cooling system.
[0012] The third temperature T3 may be substantially equal to the maximum safe operating temperature of the processing tube.
[0013] Increasing the processing tube temperature to the third temperature may include raising the processing tube temperature. The rate of temperature increase may be the maximum rate of increase that the reactor can achieve.
[0014] The purge dwell time may be selected to be a time sufficient to purge the processing tube substantially once. The purge dwell time may be selected to be a time sufficient to purge the processing tube more than once. The purge dwell time may be selected to be a time sufficient to purge the processing tube substantially three times.
[0015] The temperature control module may be configured to hold the processing tube at the third temperature T3 for a further purge dwell time. The further purge dwell time may be selected to be a time sufficient to purge the processing tube substantially once. The further purge dwell time may be selected to be a time sufficient to purge the processing tube substantially more than once. The further purge dwell time may be selected to be a time sufficient to purge the processing tube substantially three times. The temperature control module may also be configured to reduce the processing tube temperature to the standby temperature after the further purge dwell time.
[0016] The second temperature T2 may be less than about 500 °C.
[0017] The third temperature T3 may be greater than about 770 °C.
[0018] The temperature control module may be configured such that the described steps are performed after receiving a trigger signal indicating that a predetermined number of deposition cycles have occurred. The temperature control module may be configured to count the number of deposition cycles and implement the described steps after a predetermined number of deposition cycles have occurred.
[0019] The predetermined number of cycles can be selected such that it is the number of cycles for depositing a material layer thicker than 4000 Å. It should be understood that the layer thickness can be distributed over multiple wafer deposition cycles and does not necessarily refer to depositing a single layer of 4000 Å on a single wafer.
[0020] The deposition cycle can be a process of depositing silicon nitride.
[0021] According to a second aspect of the present invention, there is provided a method for semiconductor processing in a vertical furnace, the method comprising the steps of: performing at least one deposition cycle in a processing tube of the vertical furnace, the at least one deposition cycle having a maximum processing temperature T1; reducing the temperature of the processing tube to a second temperature T2 that is less than the maximum processing temperature T1; waiting for a purge dwell time; and increasing the temperature of the processing tube to a third temperature T3 that is greater than the maximum processing temperature T1.
[0022] Reducing the temperature of the processing tube to the second temperature can include substantially turning off the power supply to the heating element.
[0023] Reducing the temperature of the processing tube to the second temperature can include inserting a wafer boat into the processing tube. The wafer boat inserted into the processing tube to reduce the temperature of the processing tube can be empty. The wafer boat inserted into the processing tube to reduce the temperature of the processing tube can contain one or more wafers.
[0024] Reducing the temperature of the processing tube to the second temperature can include flowing cold gas into the processing tube.
[0025] Reducing the temperature of the processing tube to the second temperature can include causing a fan system to blow cold air onto the heating element.
[0026] A system for implementing the method according to the second embodiment can include a water cooling system arranged and configured to cool one or more heating elements. Reducing the temperature of the processing tube to the second temperature can include activating the water cooling system.
[0027] The third temperature T3 can be substantially equal to the maximum safe operating temperature of the processing tube.
[0028] Increasing the temperature of the processing tube to the third temperature can include raising the temperature of the processing tube. The rate of temperature rise can be the maximum rate of rise that the reactor can achieve.
[0029] The purge dwell time can be selected to be a time sufficient to purge the processing tube substantially once. The purge dwell time can be selected to be a time sufficient to purge the processing tube more than once. The purge dwell time can be selected to be a time sufficient to purge the processing tube substantially three times.
[0030] The processing tube temperature can be maintained at a third temperature T3 for a further purge residence time. The further purge residence time can be selected to be a time sufficient to substantially purge the processing tube once. The further purge residence time can be selected to be a time sufficient to substantially purge the processing tube more than once. The further purge residence time can be selected to be a time sufficient to substantially purge the processing tube three times. The processing tube temperature can be reduced to a standby temperature after the further purge residence time.
[0031] The second temperature T2 can be less than about 500 °C.
[0032] The third temperature T3 can be greater than about 770 °C.
[0033] The described steps can be performed after receiving a trigger signal indicating that a predetermined number of deposition cycles have occurred. The number of deposition cycles can be counted and tracked, and the described steps can be implemented after a predetermined number of deposition cycles have occurred.
[0034] The predetermined number of cycles can be selected such that it is the number of cycles for depositing a material layer greater than 4000 Å thick. It should be understood that the layer thickness can be distributed over multiple wafer deposition cycles and does not necessarily refer to depositing a single layer of 4000 Å on a single wafer.
[0035] The deposition cycle can be a process of depositing silicon nitride.
[0036] The present invention content is provided to introduce some concepts in a simplified form. These concepts are further described in detail in the following detailed description of the exemplary embodiments disclosed. The present invention content is not intended to identify the key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] Certain embodiments of the present invention will now be described by way of example with reference to the accompanying drawings, in which:
[0038] Figure 1 is a schematic cross-sectional view of a furnace system according to an embodiment of the present invention;
[0039] Figure 2 is a flowchart showing the steps of a method according to an embodiment of the present invention;
[0040] Figure 3 shows the change of the processing tube temperature over time during a temperature control scheme implemented according to an embodiment of the present invention;
[0041] Figure 4 is a defect count graph on a selected wafer for a series of deposition cycles of silicon nitride; after the first, third, and ninth deposition cycles, a temperature control scheme according to an embodiment of the present invention is executed.
[0042] It should be understood that the elements in the drawings are shown for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some elements in the figures may be exaggerated relative to other elements to assist in improving the understanding of the illustrated embodiments of the present disclosure. Detailed Description
[0043] Although certain embodiments and examples are disclosed below, those skilled in the art will understand that the present invention extends beyond the specifically disclosed embodiments and / or uses of the present invention and their obvious modifications and equivalents. Accordingly, it is intended that the scope of the present invention disclosed should not be limited by the specifically disclosed embodiments described below. The illustrations presented herein are not meant to be actual views of any particular material, structure, or device, but are merely idealized representations for describing the embodiments of the present disclosure.
[0044] As used herein, the terms "substrate" or "wafer" may refer to any one or more underlying materials on which a device, circuit, or film can be used or formed. The term "semiconductor device structure" may refer to any part of a processed or partially processed semiconductor structure that is, includes, or defines at least a portion of an active or passive component of a semiconductor device to be formed on or in a semiconductor substrate. The semiconductor substrate can be batch processed in a vertical furnace. Examples of such processing are depositing layers of various materials on the substrate. Certain processing can be, for example, based on chlorides and ammonia.
[0045] Reference Figure 1 , a cross - section of the furnace system 1 is shown. The furnace system 1 includes an outer reaction tube 2 that is generally bell - shaped and a processing tube or liner 3 disposed within the outer reaction tube 2. The processing tube 3 is shown as having an open end in Figure 1 , but in some embodiments it can be closed at the upper end. The processing tube or liner 3 can be considered to function as an inner reaction tube.
[0046] The outer reaction tube 2 is surrounded by heating means, such as one or more resistive heating coils 4 powered by a power source (not shown). The heating means provides heat to the outer reaction tube, which subsequently heats the internal volume I of the outer reaction tube, including the processing tube 3. In some embodiments, a water cooling system (not shown) is provided for cooling the heating coils. In some embodiments, a fan system (not shown) is provided for cooling the heating coils. When the power supply to the heating coils is turned off, the coil cooling system can help provide a steeper temperature drop rate for the processing tube 3. Both the outer reaction tube 2 and the liner 3 can be made of quartz, silicon carbide, silicon, or other suitable heat - resistant materials.
[0047] In Figure 1In the illustrated embodiment, the liner 3 defines a reaction chamber C, in which a wafer boat 5 can be accommodated. Both the outer reaction tube 2 and the liner 3 can be supported at their lower ends on a flange 6 for partially closing the open end of the liner 3. The flange can be made of stainless steel. The wafer boat 5 can enter and / or leave the reaction chamber C through a central furnace opening O provided in the flange 6. A vertically movable door 7 can be configured to close the opening O in the flange 6 and can be configured to support the wafer boat 5. The wafer boat 5 is configured to support wafers 8. The wafer boat 5 can sometimes be inserted into the chamber when empty, i.e., without supporting any wafers 8. The wafers 8 can in some cases be dummy wafers not intended for further fabrication.
[0048] The door 7 can be provided with a base 9. The base 9 can be rotated to rotate the wafer boat 5 in the inner space. Below the lowermost wafer in the wafer boat 5, a flow space can be provided to prevent reaction gas from flowing between the wafers 8 in the wafer boat.
[0049] The flange 6 includes a gas inlet 10 for supplying gas, such as reaction gas, to the reaction chamber C; and an exhaust pipe 11 for removing gas from the inner space. The gas inlet 10 can be provided with a syringe 12, which is constructed and arranged within the assembly to extend vertically upward along the generally cylindrical wall of the liner 3 into the inner space I and includes a syringe opening 13 for injecting gas into the inner space C. In some embodiments, the syringe 12 is not provided, and the gas flows upward from the inlet 10 into the chamber C without its flow being guided by the syringe 12.
[0050] The assembly can be provided with a purge gas inlet 14 mounted on the flange for supplying purge gas to the reaction chamber C and the processing tube 3. The purge gas inlet can optionally be provided with a purge gas syringe (not shown), which extends vertically upward from the flange 3 along the outer surface of the cylindrical wall of the liner 2 towards the top end of the liner. In some embodiments, the purge gas syringe is not provided, and the purge gas flows upward from the purge gas inlet 14 into the chamber C without its flow being guided by the purge gas syringe. In some embodiments, the purge gas inlet 14 is not provided, and the gas inlet 10 is configured to provide a source of process gas flow for flowing process gas into the processing tube and a source of purge gas flow for flowing purge gas into the processing tube 3. For example, the gas inlet 10 can be coupled to a valve (not shown), which is coupled to a process gas source and a purge gas source, where the valve is configured to accommodate at least a configuration that only allows process gas to flow through the gas inlet 10 and a configuration that only allows purge gas to flow through the gas inlet 10.
[0051] One or more thermocouples 15 are disposed within the processing tube 3 for measuring the temperature within the processing tube 3. This temperature is referred to herein as the processing tube temperature. The thermocouples 15 may each be disposed in different heating zones of the chamber C corresponding to the respective heating elements 4. Those skilled in the art will understand that various devices / methods for measuring the process tube temperature are known and that the present invention is not limited to the Figure 1 thermocouple arrangement described. The thermocouples 15 and the heating elements 4 are directly or indirectly connected to a temperature control module 16. For example, in some embodiments, the thermocouples 15 may be connected to a data processing module (not shown) separate from the temperature control module 16, where the data processing module is configured to receive raw data from the thermocouples 15, convert the data into temperature values, and provide the temperature values to the temperature control module 15. In such an embodiment, the temperature control module 16 indirectly receives data from the thermocouples 15. In some embodiments, the temperature control module 15 may directly receive raw data from the thermocouples 15 and may convert the data into temperature values within the temperature control module 15.
[0052] The temperature control module 16 is operatively connected to one or more heating elements 4. This connection may be direct or indirect. For example, in some embodiments, the temperature control module 16 may be directly connected to the power supply of the heating element 4 such that a control signal for the heating element 4 (e.g., for implementing a thermal shock further described herein) sent as an output from the temperature control module 16 is directly provided to the power supply. In some embodiments, the temperature control module 16 may have an indirect connection to the power supply of the heating element 4 such that data indicative of a target temperature set point is output from the temperature control module to an intermediate control module or other system component (not shown), the intermediate control module or other system component being configured to receive such data as an input and provide a corresponding input to the heating element 4. The data indicative of the target temperature set point may be, for example, a temperature value, a power value, or other value corresponding to the target temperature of the processing tube.
[0053] For example, a typical deposition cycle may proceed as follows. The door 7 moves downward, and the wafer boat 5 containing the wafer 8 to be processed is placed on the pedestal. The door 7 moves upward and is positioned such that the outer reaction tube 2 is closed at the lower end. A series of temperature changes (e.g., by controlling the power supplied to heating elements or other temperature control elements such as a water cooling system), a process gas flow for forming a material layer on the wafer 8, and a purge gas flow for removing excess process gas and reaction by-products formed are carried out according to the desired wafer characteristics. In one embodiment, the deposition cycle is a process of depositing silicon nitride on the wafer 8, for example using dichlorosilane and ammonia as precursors or hexachloroethyldisilane and ammonia. Those skilled in the art will understand that other deposition processes are possible in the furnace system. At the end of the deposition cycle, the temperature returns to the standby temperature, and the wafer boat 5 is removed from the reaction tube 2 via the opening O. The maximum temperature of the process tube 3 during the deposition cycle is referred to herein as T1. The maximum temperature of a series of deposition cycles is the highest temperature among the maximum temperatures of individual cycles, each cycle itself having a different maximum temperature.
[0054] In addition to forming a material layer on the wafer 8, during the deposition cycle, a material layer is formed on the inner surface S1 of the outer reaction tube 2 and the surface S2 of the liner 3 by the process gas. This material layer is a particle pollution source. Embodiments of the present invention aim to reduce such particle contamination by controlling the temperature of the process tube 3 according to a temperature control scheme, which includes first subjecting the reaction tube 2 chamber to a thermal shock (stage 1), thereby reducing the process tube temperature to a temperature T2 that is less than the maximum process temperature T1, and then raising the process chamber temperature to a third temperature T3 that is greater than the maximum process temperature T1 (stage 2).
[0055] Without being bound by theory, it is believed that the thermal shock in stage 1 (which reduces the process tube temperature to less than the maximum temperature in the process tube during the previous deposition cycle) causes stress relaxation in the material layer deposited on the surface of the process tube 3 during the deposition cycle and causes the material layer to rupture. This generates particles, but since there is no wafer (or only a dummy wafer) in the process tube, the wafers to be further processed into the final product are not contaminated by these particles. The particles are discharged by passing a purge gas through the chamber C and / or by evacuating the chamber C. Then, during stage 2, it is believed that by heating the process tube to a temperature T3 that is higher than the maximum process temperature T1, by-products trapped within, above, or below the material layer are released and can be discharged by flowing a purge gas and / or by evacuating the process tube. Thus, in addition to the reduction achieved by stage 1, the particle contamination after stage 2 is further reduced, resulting in a cleaner atmosphere within the process tube 3 for future deposition cycles.
[0056] In an exemplary embodiment, with reference to Figure 2 and Figure 3, the temperature control scheme is as follows. After the deposition cycle has ended and the wafer boat 5 containing the processed wafer 8 has been removed from the processing tube 3, starting from time t1, the processing tube 3 is subjected to a thermal shock, where the processing tube 3 undergoes a large temperature change (decrease) in a relatively short period of time. The temperature is reduced to at least a temperature T2 that is less than the maximum processing temperature T1 of the previous deposition cycle (step S1). At time t2, after the temperature of the processing tube has dropped, a waiting time from t2 until t3 is observed, during which the temperature of the processing tube may continue to drop (step S2). During this waiting time or purge dwell time, the processing tube is purged with a purge gas. Examples of suitable purge gases include, but are not limited to, nitrogen, nitrogen-ammonia, and pure ammonia. Those skilled in the art will understand that other suitable purge gases may be used. At the end of the purge dwell time t3, the temperature of the processing tube rapidly increases to a temperature T3 that is greater than the maximum processing temperature (step S3). Once the temperature T3 is reached at time t4, the processing tube is maintained at that temperature T3 for a further waiting time or purge dwell time from t4 until t5, during which the processing tube is purged again with a purge gas. Examples of suitable purge gases include, but are not limited to, nitrogen, nitrogen-ammonia, and pure ammonia. Those skilled in the art will understand that other suitable purge gases may be used. After the waiting time, at time t5, the temperature of the processing tube can return to the standby temperature in preparation for further operation.
[0057] The temperature control scheme can be implemented by programming the temperature control module 16, which is operably connected to at least the heating element 4. In some embodiments, the temperature change of the processing tube 3 can be caused only by controlling the power supplied to the heating element 4. In some embodiments, additional optional elements of the furnace system 1 can be used to affect the temperature of the processing tube 3, and the temperature control module 16 is operably connected to those additional elements in these embodiments. These additional elements can include one or more of the following: a water cooling system for cooling the heating coil 4, a purge gas flow system for supplying cold gas into the processing tube 3, a wafer boat handling system for inserting / removing the wafer boat 5 into / from the processing tube 3, a wafer handling system for inserting / removing the wafer 8 into / from the wafer boat 5, and a fan system for blowing cold air onto the heating element 4. The temperature control module 16 can be directly or indirectly connected to one or more of these additional elements. For example, in some embodiments, the temperature control module 16 can send one or more signals directly to one or more of these additional elements to control their operation. In some embodiments, the temperature control module 16 can send one or more signals to an intermediate element, such as a central control module configured to control or send control signals to the additional elements.
[0058] For example, in one embodiment, a thermal shock can be caused by turning off the power supply of the heating coil 4. In another embodiment, a thermal shock can be caused by turning off the power supply of the heating coil 4 and activating the water cooling system of the heating coil. Using a water cooling system for the heating coil 4 can provide a greater rate of temperature drop of the processing tube and reduce the total time required for the temperature control scheme.
[0059] In a further embodiment, a thermal shock can be caused by inserting an empty wafer boat into the processing tube 3. The cold mass of the wafer boat can increase the cooling rate of the processing tube 3. In another embodiment, a thermal shock can be caused by inserting a wafer boat containing dummy wafers into the processing tube 3. The cold mass of the wafer boat plus the dummy wafers can further increase the cooling rate of the processing tube 3; the dummy wafers may be subject to potential particle contamination regardless of their future usability. In some embodiments, a thermal shock can be caused by inserting a cold mass, such as a cold solid cylinder similar in size to the wafer boat, into the processing tube 3. Compared with the wafer boat, the solid mass can provide faster cooling for the processing tube 3. The wafer boat (with or without wafers) or the cold mass can be inserted into the processing tube 3 at the maximum speed or near the maximum speed allowed by the furnace system 1 so that the boat or the cold mass quickly approaches the processing tube 3.
[0060] In some embodiments, a thermal shock can be caused by the inflow of cold gas into the processing tube 3, such as through one or both of the gas inlets 10, 14, or through one or more separate gas inlets (not shown). In some embodiments, a thermal shock can be caused by activating a fan system used to blow cold air onto the heating element 4.
[0061] In some embodiments, it is preferred that the temperature reduction is achieved in a very short period of time so as to minimize the total time of the temperature control scheme. Therefore, the method of implementing the thermal shock can be selected as the method that causes the fastest temperature drop of the relevant system. For example, in a system without water cooling or cold purge gas capabilities, a thermal shock may be caused by turning off the power supply of the heating coil and inserting a wafer boat containing dummy wafers into the processing tube.
[0062] The above methods of causing thermal shock can be combined arbitrarily. For example, but not by way of limitation, in one embodiment, the temperature control module can be configured to cause a thermal shock by turning off the power supply of the heating coil and inserting an empty wafer boat into the processing tube. In another exemplary embodiment, the temperature control module can be configured to cause a thermal shock by turning off the power supply of the heating coil, activating the water cooling system of the heating coil, and inserting a wafer boat containing dummy wafers into the processing tube.
[0063] Once a thermal shock has been applied to the processing tube and the processing tube temperature has been reduced to a value less than the maximum processing temperature, the temperature control module observes a waiting time during which the processing tube 3 is purged with a purge gas. The waiting time can start once the processing tube 3 drops below the maximum processing temperature. In some embodiments, the waiting time starts once the processing tube 3 drops below a predetermined temperature that is much less than the maximum processing temperature. For example, for a silicon nitride deposition cycle with a maximum processing temperature of 770 °C, the waiting time starts once the processing tube temperature is, for example, less than 700 °C, less than 500 °C, less than 350 °C. It should be understood that during the waiting time, the processing tube temperature can continue to decrease.
[0064] During the purge waiting time, the processing tube 3 is purged with a purge gas, which can help remove from the processing chamber particles released by the rupture of a material layer deposited on the surface of the processing tube 3 caused by the thermal shock. In some embodiments, a single purge cycle can be implemented to substantially purge the processing tube once. In some embodiments, more than one purge cycle can be implemented, such as two or three purge cycles. In some embodiments, no more than three purge cycles can be implemented. The number of purge cycles can be selected to balance, on the one hand, the need to expel particles from the processing chamber 2 (such as those considered to be released from the liner layer during the thermal shock phase) and, on the other hand, the need to minimize the duration of the temperature control scheme to maximize the system time available for the deposition cycle.
[0065] After the purge waiting time, the processing tube temperature is increased to a third temperature T3, which is greater than the maximum processing temperature T1. The third temperature T3 can be, for example, the maximum safe temperature that the reactor can reach. The temperature control module 16 can achieve this temperature increase by turning on the power supply of the heating element 4. When the power supply of the heating element 4 is turned on, the temperature control module 16 can turn off any existing cooling subsystem, such as a water cooling system or a fan system for the heater coil. The temperature increase can be a ramped temperature increase, where the temperature increases by a set amount per unit time, which can be determined by system configuration or material limitations. In some embodiments, the temperature rise can be selected to be the fastest rise possible for the furnace system 1 without causing damage.
[0066] Once the third temperature T3 has been reached, the temperature control module 16 observes a further waiting time. During the further purge waiting time, the processing chamber 2 is purged with a purge gas, which can help remove any by-products trapped by the material layer deposited on the processing tube 3, as well as any remaining particles released by the rupture induced by the thermal shock of the material layer deposited in the processing tube 3. In some embodiments, a single purge cycle may be implemented to substantially purge the processing tube once. In some embodiments, more than one purge cycle may be implemented, such as two or three purge cycles. In some embodiments, no more than three purge cycles may be implemented. The number of purge cycles can be selected to balance, on the one hand, the need to expel particles from the processing chamber 2 (such as those considered to be released from the liner layer during the thermal shock phase) and, on the other hand, the need to minimize the duration of the temperature control scheme to maximize the system time available for deposition cycles. In some embodiments, after the further waiting time, the temperature of the processing tube 3 returns to the standby temperature.
[0067] The reduction in particle contamination resulting from the application of the temperature control scheme described herein allows multiple deposition cycles to be carried out continuously before subsequent implementation of the temperature control scheme. For example, the temperature control scheme may be applied every N cycles, where N is the number of cycles required to deposit a material layer at least 4000 Å thick, at least 6000 Å thick, or at least 8000 Å thick. The temperature control module 16 may be configured to receive a "trigger" signal from the central control module indicating that the temperature control scheme is to be implemented. The temperature control module 16 may be configured to apply the temperature control scheme every N deposition cycles without receiving such a trigger signal.
[0068] The temperature control module 16 can be implemented in hardware and / or software. The temperature control module 16 can (physically) be part of the central control module or can (physically) be separated from and communicate with the central control module. The temperature control module 16 can include a memory for storing instructions for executing a temperature control scheme according to the embodiments described herein. The temperature control module can include one or more input ports for receiving data. The input data can include, for example, temperature data from one or more thermocouples or from another control element of the furnace system, such as the central control module. The input data can include, for example, data indicating that a deposition cycle has been completed, optionally indicating one or more attributes of the cycle, such as the processing tube temperature, layer thickness, or other parameters. The input data can include, for example, data or signals indicating that the temperature control module implements a temperature control scheme according to an embodiment of the present invention. The temperature control module can include one or more output ports for sending data. The output data can include, for example, the temperature or power set point of a heating element, which can be sent directly to the heating element or power supply, or indirectly through a heating element control unit or other control unit, such as the central control module. The output data can include, for example, set points or other control values for one or more of a water cooling system, a fan system, a wafer handling system, a wafer transfer system, as described herein.
[0069] The temperature control module 16 can include a processor for processing the input data and / or data loaded from the memory. For example, the processor can be configured to receive a series of input data indicating the layer thickness of a series of deposition cycles, maintain a cumulative layer thickness, compare the cumulative with a predetermined maximum layer thickness, and initiate a temperature control scheme, or send a signal indicating that the temperature control scheme should be initiated once the cumulative is greater than the predetermined maximum layer thickness.
[0070] As an illustrative (non-limiting) example, reference is made to Figure 4 , in a system according to an embodiment of the present invention, a temperature control method according to an embodiment of the present invention is executed. The system is commercially available from ASM International N.V., Almere, the Netherlands, under the trade name A412 TM. A series of deposition cycles are performed on a silicon wafer. During the deposition cycles, the number of wafers in the wafer boat varies between 150 wafers (150P) and 100 wafers (100P). For the first 9 cycles, DCS and ammonia are used as precursors to deposit a 160 nm thick silicon nitride layer on the wafers. For the last 4 cycles, DCS and ammonia are used as precursors to deposit an 80 nm thick silicon nitride layer on the wafers. The maximum processing temperature for each deposition cycle is 770 °C.
[0071] After the first, third, and ninth deposition cycles (see the dashed line labeled "A"), a temperature control scheme according to an embodiment of the present invention is performed. The heating element is turned off, and the process tube temperature is allowed to decrease. When the process tube temperature reaches 540 °C, the process chamber is purged three times. During this period, the temperature of the process chamber continues to decrease. After purging the chamber three times, the heating element is turned on, and the process tube temperature is raised to 780 °C. The process chamber is purged three times again while maintaining the process tube temperature at 780 °C.
[0072] Five wafers are selected from each deposition cycle for particle contamination analysis. They are labeled as T (wafer near the top of the boat), TC (wafer between the top and middle of the boat), C (wafer near the middle of the boat), CB (wafer between the middle and bottom of the boat), and B (wafer near the bottom of the boat). Each wafer is detected using an SP5 wafer inspection system available from KLA Corporation, California, USA. Figure 4 The number of defects greater than 26 nm after each deposition cycle is shown. It can be seen that the number of defects is significantly reduced after each application of the temperature control scheme.
[0073] Although illustrative embodiments of the present invention have been described above in part with reference to the accompanying drawings, it should be understood that the present invention is not limited to these embodiments. Variations of the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a study of the drawings, the disclosure, and the appended claims.
[0074] References throughout this specification to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" throughout this specification are not necessarily all referring to the same embodiment. Additionally, note that the particular features, structures, or characteristics of one or more embodiments may be combined in any suitable manner to form new, not explicitly described embodiments. The subject matter of the present disclosure includes all novel and non-obvious combinations and sub-combinations of various processes, systems, and configurations, as well as other features, functions, acts, and / or characteristics disclosed herein, and any and all equivalents thereof.
Claims
1. A furnace system for processing a substrate, comprising: a process tube arranged to receive one or more substrates supported on a wafer boat; one or more heating elements for heating the process tube; a process gas flow source for providing a process gas flow into the process tube; a purge gas flow source for providing a purge gas flow into the process tube; A temperature control module operably connected to the one or more heating elements, wherein the temperature control module is configured to perform the following steps after a deposition cycle having a maximum process temperature T1 has occurred in the process tube: - reducing the temperature of the process tube to a second temperature T2 which is less than the maximum process temperature T1; and - After the purge residence time, the process tube temperature is increased to a third temperature T3 which is greater than the maximum process temperature T1.
2. The system according to claim 1, wherein: Lowering the process tube temperature to the second temperature includes substantially shutting off power to the heating element.
3. The system according to claim 1 or 2, wherein: Lowering the temperature of the process tube to the second temperature includes inserting a wafer boat into the process tube.
4. The system according to claim 3, wherein: The wafer boat is empty.
5. The system according to claim 4, wherein: The wafer boat contains one or more wafers.
6. A system according to any preceding claim, wherein: Lowering the temperature of the process tube to the second temperature includes flowing a cold gas into the process tube.
7. A system according to any preceding claim, wherein: Lowering the process tube temperature to the second temperature includes causing a fan system to blow cool air onto the heating element.
8. The system of any preceding claim, comprising a water cooling system arranged and configured to cool the one or more heating elements, wherein reducing the process tube temperature to the second temperature comprises activating the water cooling system.
9. A system according to any preceding claim, wherein: Increasing the process tube temperature to the third temperature includes increasing the process tube temperature, wherein the temperature increase rate is a maximum increase rate that the reactor can achieve.
10. A system according to any preceding claim, wherein: The purge dwell time is selected to be a time sufficient to allow the process tube to be purged substantially once.
11. A system according to any preceding claim, wherein: The purge dwell time is selected to be a time sufficient to allow the process tube to be substantially purged more than once.
12. A system according to any preceding claim, wherein: The temperature control module is configured to maintain the process tube at the third temperature T3 for a further purge residence time.
13. The system according to claim 12, wherein: The further purge residence time is selected to be a time sufficient to allow the process tube to be purged substantially once.
14. The system according to claim 12, wherein: The further purge residence time is selected to be a time sufficient to allow the process tube to be substantially purged more than once.
15. A system according to any one of claims 12 to 14, wherein: The temperature control module is further configured to reduce the process tube temperature to a standby temperature after the further purge dwell time.
16. A system according to any preceding claim, wherein: The second temperature T2 is less than about 500°C.
17. A system according to any preceding claim, wherein: The third temperature T3 is greater than about 770°C.
18. A system according to any preceding claim, configured such that the described steps are performed only after receiving a trigger signal indicating that a predetermined number of deposition cycles have occurred, wherein the predetermined number of cycles is selected to result in the deposition of a material layer greater than 4000Å thick.
19. A system according to any preceding claim, wherein: The deposition cycle is a process for depositing silicon nitride.
20. A method for semiconductor processing in a vertical furnace, comprising: performing at least one deposition cycle in a process tube of the vertical furnace, the at least one deposition cycle having a maximum process temperature T1; Lowering the temperature of the processing tube to a second temperature T2 which is lower than the maximum processing temperature T1; Wait for the purge dwell time; as well as The process tube temperature is increased to a third temperature T3 greater than the maximum process temperature T1.