Method and apparatus for generating and compensating output voltage of regulator circuitry

Abstract

Embodiments of the invention relate to a method and apparatus for generating and compensating an output voltage of regulator circuitry. An example apparatus includes: a transfer gate circuit system (230) having a first terminal and a second terminal; a process tracker circuitry (240) having a first terminal and a second terminal, the first terminal of the process tracker circuitry coupled to the first terminal of the transfer gate circuit system; and temperature compensation circuitry (250) having a first terminal and a second terminal, the first terminal of the temperature compensation circuitry coupled to the second terminal of the process tracker circuitry, and the second terminal of the temperature compensation circuitry coupled to the second terminal of the transfer gate circuit system.

Description

[0001] Cross - Reference to Related Applications

[0002] This patent application claims the benefit and priority of U.S. Provisional Patent Application No. 63 / 611,963, filed on December 19, 2023, which is hereby incorporated by reference in its entirety. Technical Field

[0003] This specification generally relates to regulator circuitry, and more particularly, to methods and apparatus for generating and compensating an output voltage of a regulator circuitry. Background Art

[0004] The continuous development of electronic devices has allowed circuitry to perform increasingly complex operations while consuming less overall power. With the continuous development of electronic devices, designers are motivated to develop voltage regulator circuitry that can operate reliably across a wide range of operating conditions. For example, a voltage regulator circuitry is considered reliable when the output voltage is stable at relatively low and relatively high temperatures. Summary of the Invention

[0005] For methods and apparatus for generating and compensating an output voltage of a regulator circuitry, an example apparatus includes: a passgate circuitry having a first terminal and a second terminal; a process tracker circuitry having a first terminal and a second terminal, the first terminal of the process tracker circuitry being coupled to the first terminal of the passgate circuitry; and a temperature compensation circuitry having a first terminal and a second terminal, the first terminal of the temperature compensation circuitry being coupled to the second terminal of the process tracker circuitry, and the second terminal of the temperature compensation circuitry being coupled to the second terminal of the passgate circuitry. Other examples are described.

[0006] Methods and apparatus for generating and compensating an output voltage of a regulator circuit system, an example apparatus includes: a process tracker circuit system having terminals; and a temperature compensation circuit system including: a first transistor having a first terminal and a control terminal; a second transistor having a first terminal, a second terminal and a control terminal, the first terminal of the second transistor coupled to the first terminal of the first transistor; a third transistor having a first terminal, a second terminal and a control terminal, the first terminal of the third transistor coupled to the control terminal of the first transistor and the second terminal of the second transistor; a fourth transistor having a first terminal, a second terminal and a control terminal, the first terminal of the fourth transistor coupled to the control terminal of the second transistor and the control terminal of the third transistor; and a fifth transistor having a first terminal and a control terminal, the first terminal of the fifth transistor coupled to the terminal of the process tracker circuit system, the control terminal of the fifth transistor coupled to the control terminal of the second transistor, the second terminal of the third transistor and the second terminal of the fourth transistor. Other examples are described.

[0007] Methods and apparatus for generating and compensating an output voltage of a regulator circuit system, an example apparatus includes: a portal circuit system configured to obtain a first current from a power supply; a process tracker circuit system coupled to the portal circuit system, the process tracker circuit system configured to: generate an output voltage in response to the first current, the output voltage having a negative temperature dependence; and generate a feedback current in response to generating the output voltage; and a temperature compensation circuit system coupled to the process tracker circuit system and the portal circuit system, the temperature compensation circuit system configured to: generate an offset voltage having a positive temperature dependence; and compensate the output voltage using the offset voltage. Other examples are described. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a block diagram of an example apparatus including an example regulator circuit system that regulates a power supply voltage to supply power to a circuit system.

[0009] Figure 2 is a block diagram of an example regulator circuit system that is Figure 1 an example of a regulator circuit system that includes circuitry that regulates an output voltage in response to a bias current and tracks process variations.

[0010] Figure 3 is Figure 1 and 2 a schematic diagram of an example of a regulator circuit system that generates an output voltage in response to a bias current.

[0011] Figure 4 is Figure 1 and2 Schematic diagram of another example of a regulator circuit system that adjusts an output current in response to a modified bias current.

[0012] Figure 5A and 5B is a graph of an example compensation of the output voltage of a regulator circuit system for Figure 1 , 2 , 3, or 4 across an operating temperature range.

[0013] Figure 6 is a flowchart representative of example operations that may be performed, instantiated, and / or carried out to implement a Figure 1 , 2 , 3, or 4 regulator circuit system.

[0014] Like reference numerals or other reference indicators are used in the drawings to denote (functionally and / or structurally) identical or similar features. DETAILED DESCRIPTION

[0015] The drawings are not necessarily to scale. In general, like reference numerals in the drawings and the specification refer to like or similar parts. Although the drawings show regions having clear lines and boundaries, some or all of these lines and / or boundaries may be idealized. In reality, the boundaries and / or lines may be unobservable, blended, and / or irregular.

[0016] The ongoing development of electronic devices has allowed circuit systems to perform increasingly complex operations while consuming less overall power. As electronic devices continue to evolve, designers are motivated to develop voltage regulator circuit systems that can operate reliably across a wide range of operating conditions. For example, a voltage regulator circuit system is considered reliable when the output voltage is stable at relatively low and relatively high temperatures. A regulator circuit system generates an output voltage by regulating an input voltage. In some instances, such as in battery-operated devices, the input voltage varies as the battery charges or discharges. In such instances, the regulator circuit system generates a stable output voltage regardless of the variation in the input voltage. As electronic devices continue to evolve, regulator circuit systems continue to become more reliable and consume less energy.

[0017] Some regulator circuit systems, which may be referred to as reference bandgap regulator circuit systems, include a bandgap reference, an error amplifier circuit system, a pass gate circuit system, and a resistor ladder. The bandgap reference generates a reference voltage, and the error amplifier circuit system uses the reference voltage as a reference. The error amplifier circuit system controls the pass gate circuit system by comparing the reference voltage of the bandgap reference with the stepped-down output voltage from the resistor ladder. The pass gate circuit system controls the output voltage of the regulator circuit system by supplying an output current to an external circuit system and the resistor ladder. The output voltage of such a regulator circuit system is determined by the current supplied by the pass gate circuit system and the resistance of the resistor ladder. The error amplifier circuit system adjusts the current supplied by the pass gate circuit system to be proportional to the reference voltage. In such an operation, the output voltage of the regulator circuit system is proportional to the reference voltage and the resistance of the resistor ladder.

[0018] In such examples, the bipolar junction transistors of the bandgap reference increase the system-on-chip (SoC) size of the regulator circuit system. The error amplifier circuit system controls the pass gate circuit system to supply a fixed output voltage, regardless of process variations and temperature variations. Such control results in variations in the power consumption of the circuit system powered by the regulator circuit system. Process variations are non-ideal variations of component values relative to design values in response to component tolerances and manufacturing variations. Temperature variations are variations of component values relative to design values in response to changes in the environmental conditions of the circuit system. Due to the bandgap reference, the error amplifier circuit system, and the resistor ladder, such regulator circuit systems have a relatively high quiescent current (I Q ). The quiescent current is the current consumed by the regulator circuit system to generate the output voltage (i.e., the current that is not output from the regulator circuit system to the load). Such a relatively high quiescent current may limit the use of such regulator circuit systems. For example, a designer may use an alternative regulator circuit system for a battery-powered system.

[0019] Other regulator circuit systems, which may be referred to as power tracking regulator circuit systems, include a bias current generation circuit system, a process tracker circuit system, and a pass gate circuit system. The bias current generation circuit system generates a bias current, and the process tracker circuit system uses the bias current to sub-regulate the pass gate circuit system. Such a regulator circuit system is coupled as a feedback loop between the pass gate circuit system and the process tracker circuit system. The feedback loop controls the pass gate circuit system, which regulates the output voltage. The process tracker circuit system uses the characteristics of circuit components to regulate the output voltage of the regulator circuit system.

[0020] In some instances, a process tracker circuit system uses the threshold voltages of one or more transistors to generate an output voltage. In such instances, the threshold voltages of the transistors have relatively low process variations. However, the threshold voltages of the transistors of the process tracker circuit system vary with temperature. The gate-to-source voltage of the transistor varies in response to a complementary to absolute temperature (CTAT) bias. The CTAT bias characterizes the decrease in the gate-to-source voltage of the transistor as the temperature increases. Such CTAT bias may be referred to as negative temperature dependence. Some circuit systems, such as logic devices, coupled to a regulator circuit system having an output voltage with negative temperature dependence may not operate correctly in response to the decrease in the output voltage as the temperature increases. For example, it is difficult for a logic device to meet the timing requirements in response to the temperature-dependent variations in the regulator circuit system. Although using the threshold voltages of the transistors reduces process variations, the output voltage of the regulator circuit system still varies across temperature.

[0021] The examples described herein include example methods and apparatuses for using a temperature compensation circuit system to generate and compensate the output voltage of a regulator circuit system. In some of the described instances, the regulator circuit system includes a bias current generation circuit system, a current mirror circuit system, a pass gate circuit system, a process tracker circuit system, and a temperature compensation circuit system. The current mirror circuit system, the pass gate circuit system, the process tracker circuit system, and the temperature compensation circuit system are coupled to form a feedback loop that controls the pass gate circuit system. The process tracker circuit system includes a plurality of transistors that generate an output voltage in response to the gate-to-source voltages of the plurality of transistors. However, the gate-to-source voltages of the process tracker circuit system decrease as the temperature of the circuit system increases, which has negative temperature dependence. To compensate for such variations, the temperature compensation circuit system uses a plurality of transistors to generate an offset voltage that increases as the temperature of the circuit system increases.

[0022] In some of the described instances, the bias current generation circuit system generates a bias current that, when supplied, operates the transistors of the temperature compensation circuit system in a subthreshold operating mode. In the subthreshold operating mode, the gate-to-source voltage of the transistor increases as the temperature increases, which has positive temperature dependence. In such subthreshold operating mode, the gate-to-source voltage of the transistor is generated by a threshold voltage that decreases as the temperature increases and a thermal voltage that increases as the temperature increases. In an example operation, the thermal voltage contribution to the gate-to-source voltage is scaled by the parameters of the transistor and the bias current. Advantageously, adjusting the bias current modifies the temperature dependence of the gate-to-source voltage by scaling the thermal voltage. The temperature compensation circuit system offsets the output voltage by compensating for the decrease in the threshold voltage of the process tracker circuit system with an offset voltage that increases as the temperature increases. Advantageously, the temperature compensation circuit system reduces the variation in the output voltage of the regulator circuit system.

[0023] Figure 1 is a block diagram of an example apparatus 100. In Figure 1 an example, apparatus 100 includes an example power supply 110, an example controller circuitry 120, a first example regulator circuitry 130, an example active mode circuitry 140, a second example regulator circuitry 150, and an example always-on circuitry 160. Apparatus 100 sequences the power supply to the circuitry 140, 160 to reduce overall power consumption. For example, when apparatus 100 is a temperature measurement device, apparatus 100 sequences the power to the circuitry 140, 160 to reduce overall power consumption. In some examples, apparatus 100 uses regulator circuitry 130 to limit the power supply to active mode circuitry 140. In such examples, apparatus 100 operates active mode circuitry 140 for a relatively short duration. Advantageously, apparatus 100 reduces average power consumption by regulating the power supply to active mode circuitry 140 using regulator circuitry 130 and supplying power to always-on circuitry 160 using regulator circuitry 150 at all times.

[0024] Power supply 110 is coupled to regulator circuitries 130, 150. Power supply 110 supplies a power supply voltage (V DD ) to regulator circuitries 130, 150. In some examples, power supply 110 is an energy storage device, such as a battery. In such examples, the power supply voltage decreases as the energy storage device discharges. In one example, when power supply 110 is fully charged, the power supply voltage is approximately 12.5 volts (V). However, when power supply 110 is almost fully discharged, the power supply voltage is approximately equal to 11.5 volts. In another example, when power supply 110 is fully charged, the power supply voltage is approximately 5.5 volts (V). However, when power supply 110 is almost fully discharged, the power supply voltage is approximately equal to one and four tenths volts. In such examples, regulator circuitries 130, 150 regulate the output voltage to approximately one and four tenths volts to account for the change in the power supply voltage as power supply 110 discharges.

[0025] The controller circuit system 120 has outputs coupled to regulator circuit systems 130, 150. The controller circuit system 120 controls the operation mode of the device 100. The controller circuit system 120 generates an active mode indication (ACT_EN), which represents the operation mode of the device 100. In a first operation mode, referred to as the active mode, the controller circuit system 120 activates the regulator circuit systems 130, 150. In such an active operation mode, in response to the active mode indication from the controller circuit system 120, the regulator circuit system 130 powers the active mode circuit system 140. In a second operation mode, referred to as the sleep mode or the inactive mode, the controller circuit system 120 deactivates the regulator circuit system 130 and activates the regulator circuit system 150. In such an operation mode, in response to the active mode indication from the controller circuit system 120, the regulator circuit system 130 blocks the power supply to the active mode circuit system 140. In some instances, in response to the active mode indication indicating the active operation mode, the controller circuit system 120 increases the output voltage from the regulator circuit system 150. During the active mode, such an increase in the output voltage increases the bandwidth of the always-on circuit system 160, which increases the reliability of the logic circuit system. Advantageously, in response to the active mode circuit system 140 being deactivated, the device 100 consumes less power when in the sleep operation mode.

[0026] In an example operation, the controller circuit system 120 cyclically alternates between the active operation mode and the sleep operation mode. In such an example operation, the controller circuit system 120 divides the period into a first duration and a second duration. The first duration corresponds to the device 100 being in the active operation mode, and the second duration corresponds to the device 100 being in the sleep operation mode. In some instances, the first duration is determined by the speed of the active mode circuit system 140, and the second duration is determined by the frequency at which the operation of the active mode circuit system 140 is required. For example, when the device 100 is a temperature measurement device, the controller circuit system 120 sets the device 100 to the active operation mode for the duration required to determine the temperature. In such instances, the controller circuit system 120 sets the device 100 to the sleep operation mode for the duration between temperature measurements. Advantageously, the controller circuit system 120 reduces the total power consumption of the device 100 by cyclically switching between the active operation mode and the sleep operation mode.

[0027] The regulator circuitry 130 has a first input coupled to the power supply 110, a second input coupled to the controller circuitry 120, and an output coupled to the active mode circuitry 140. The regulator circuitry 130 receives a power supply voltage from the power supply 110 and an active mode indication from the controller circuitry 120. The controller circuitry 120 uses the active mode indication to control the regulator circuitry 130. In response to an active mode indication indicating an active operating mode, the regulator circuitry 130 is activated. When active, the regulator circuitry 130 regulates the power supply from the power supply 110 to supply an output voltage (V OUT_PRIM ) to the active mode circuitry 140. In response to an active mode indication indicating a sleep operating mode, the activation of the regulator circuitry 130 is deactivated. When deactivated, the regulator circuitry 130 blocks the power supply from the power supply 110 to the active mode circuitry 140.

[0028] The active mode circuitry 140 has an input coupled to the regulator circuitry 130. The active mode circuitry 140 receives power from the regulator circuitry 130. The active mode circuitry 140 is a circuitry that only needs to operate for a relatively short period of time. For example, a temperature sensing circuitry that measures the ambient temperature every few minutes. In response to the device 100 being in the active operating mode, the active mode circuitry 140 receives power from the regulator circuitry 130. When the device 100 is in the sleep operating mode, the active mode circuitry 140 has a power consumption that is substantially zero. Advantageously, the regulator circuitry 130 allows the deactivation of the active mode circuitry 140 during the sleep operating mode, which reduces the overall power consumption of the device 100.

[0029] The regulator circuitry 150 has a first input coupled to the power supply 110 and may have a second input coupled to the controller circuitry 120. The regulator circuitry 150 has an output coupled to the always-on circuitry 160. In some instances, the regulator circuitry 150 is referred to as a sub-regulator circuitry. The regulator circuitry 150 receives a power supply voltage from the power supply 110 and may receive an active mode indication from the controller circuitry 120. The regulator circuitry 150 regulates the power supply from the power supply 110 to supply an output voltage (V OUT_SUB)Supplied to the always-on circuitry 160. In an example operation, the regulator circuitry 150 supplies power to the always-on circuitry 160 regardless of the operating mode of the device 100. In some instances, the regulator circuitry 150 supplies a first output current and voltage in response to the device 100 being in the sleep mode, and supplies a second output current and voltage in response to the device 100 being in the active mode. In such instances, the change in the output current of the regulator circuitry 150 compensates for the increase in the power consumption of the always-on circuitry 160 during the active operating mode.

[0030] The always-on circuitry 160 has an input coupled to the regulator circuitry 150. The always-on circuitry 160 receives power from the regulator circuitry 150. For example, the always-on circuitry 160 is a circuitry that operates always or substantially always, such as digital logic that supports a power-on reset (POR) operation. In such instances, the output voltage of the regulator circuitry 150 supports the digital logic circuitry of the always-on circuitry 160 regardless of the temperature of the device 100 and the change in the power supply voltage when the power supply 110 discharges. Advantageously, the regulator circuitry 150 allows the always-on circuitry 160 to continue operating even though the device 100 is in the sleep operating mode.

[0031] Figure 2 is a block diagram of an example regulator circuitry 200, and the example regulator circuitry is Figure 1 an example of the regulator circuitries 130, 150 of Figure 2 In an example, the regulator circuitry 200 includes an example bias current circuitry 210, an example current mirror circuitry 220, an example pass gate circuitry 230, an example process tracker circuitry 240, and an example temperature compensation circuitry 250. The regulator circuitry 200 generates an output voltage (V OUT_SUB ) that is approximately equal to the offset voltage from the temperature compensation circuitry 250 plus the voltage of the process tracker circuitry 240. Advantageously, the offset voltage increases as the temperature increases to compensate for the decrease in the voltage of the process tracker circuitry 240 as the temperature increases.

[0032] The bias current circuit system 210 has a first terminal coupled to the current mirror circuit system 220 and a second terminal coupled to a common terminal that supplies a common potential (e.g., ground). The bias current circuit system 210 generates a bias current. In an example operation, the bias current circuit system 210 generates a bias current having a magnitude that sets the temperature compensation circuit system 250 to subthreshold operating conditions. Subthreshold operating conditions occur when the drain-to-source current is present in a transistor even though the gate-to-source voltage is less than the threshold voltage of the transistor. In subthreshold operating conditions, the transistor conducts current caused by non-ideal performance (e.g., leakage, relatively weak inversion region, etc.). For example, ideally, when the gate-to-source voltage of a transistor is less than the threshold voltage, the transistor blocks current flow; however, in reality, the transistor continues to allow a relatively small amount of current flow. In such instances, the magnitude of the current flowing through the transistor is proportional to the voltage at the gate of the transistor. In such an operating mode, the transistor has a proportional-to-absolute-temperature (PTAT) bias current whose magnitude increases with increasing temperature. The PTAT bias of the temperature compensation circuit system 250 characterizes the increase in the offset voltage with increasing temperature. Such PTAT bias can be referred to as positive temperature dependence. The bias current circuit system 210 obtains the bias current from the current mirror circuit system 220. Example embodiments of the bias current circuit system 210 are shown and described below in conjunction with Figure 3 and 4 Example embodiments of the bias current circuit system 210 are shown and described.

[0033] The current mirror circuit system 220 has a first terminal coupled to a power supply terminal, a second terminal coupled to the bias current circuit system 210, a third terminal coupled to the portal circuit system 230 and the temperature compensation circuit system 250, and a fourth terminal coupled to the temperature compensation circuit system 250, where the power supply terminal supplies a power supply voltage (V DD ). The current mirror circuit system 220 allows the bias current circuit system 210 to obtain a bias current from the power supply terminal. The current mirror circuit system 220 provides an output current in response to the bias current. The current mirror circuit system 220 generates the output current by mirroring the magnitude of the bias current. The current mirror circuit system 220 supplies a first output current to the temperature compensation circuit system 250 and supplies a second output current to the portal circuit system 230 and the temperature compensation circuit system 250. Example embodiments of the current mirror circuit system 220 are shown and described below in conjunction with Figure 3 and 4 Example embodiments of the current mirror circuit system 220 are shown and described.

[0034] The portal circuit system 230 has a first terminal coupled to a power supply terminal, a second terminal coupled to the current mirror circuit system 220 and the temperature compensation circuit system 250, and a third terminal coupled to the process tracker circuit system 240 and coupleable to an external circuit system, where the power supply terminal supplies a power supply voltage. The portal circuit system 230 supplies an output current to the process tracker circuit system 240 and the external circuit system by obtaining current from the power supply terminal. A feedback loop formed by the portal circuit system 230, the process tracker circuit system 240, and the temperature compensation circuit system 250 controls the current supplied by the portal circuit system 230. In an example operation, changes in the process tracker circuit system 240 and / or the temperature compensation circuit system 250 modify the current of the feedback loop, which adjusts the current supplied by the portal circuit system 230. In such example operations, adjusting the current supplied by the portal circuit system 230 compensates for changes in the current of the feedback loop. Advantageously, the portal circuit system 230 allows the process tracker circuit system 240 and the temperature compensation circuit system 250 to regulate the current and compensate for changes in the output voltage. Below is described in conjunction with Figure 3 Example embodiments of the portal circuit system 230 are shown and described.

[0035] The process tracker circuit system 240 has a first terminal and a second terminal, where the first terminal is coupled to the portal circuit system 230 and coupleable to an external circuit system, and the second terminal is coupled to the temperature compensation circuit system 250. The process tracker circuit system 240 receives current from the portal circuit system 230 and an offset voltage from the temperature compensation circuit system 250. The process tracker circuit system 240 generates an output voltage of the regulator circuit system 200, which is approximately equal to the offset voltage plus the gate-to-source voltage of one or more transistors, where the one or more transistors are shown below in Figure 3 is shown. The process tracker circuit system 240 generates an output voltage in response to a circuit system coupled to the regulator circuit system 200. For example, when power is supplied to a digital circuit system, the process tracker circuit system 240 improves the energy delay product (EDP) of the digital circuit system despite process variations in the components of the regulator circuit system 200.

[0036] Advantageously, the process tracker circuit system 240 generates an offset voltage that takes into account process variations of the components. Advantageously, as further described below, the offset voltage has a PTAT bias that compensates for the complementary to absolute temperature (CTAT) bias of the gate-to-source voltage of the process tracker circuit system 240. The CTAT bias of the process tracker circuit system 240 characterizes the decrease in the gate-to-source voltage of the transistor as the temperature increases. Such CTAT bias may be referred to as negative temperature dependence. Below is described in conjunction with Figure 3An example implementation of the process tracker circuit system 240 is shown and described.

[0037] The temperature compensation circuit system 250 has a first terminal coupled to the current mirror circuit system 220, a second terminal coupled to the current mirror circuit system 220 and the transfer gate circuit system 230, a third terminal coupled to the process tracker circuit system 240, and a fourth terminal coupled to a common terminal. The temperature compensation circuit system 250 receives an output current proportional to the bias current from the current mirror circuit system 220 and a feedback current from the process tracker circuit system 240. The feedback current is the current used by the process tracker circuit system 240 to generate the gate-to-source voltage. In some instances, the feedback current includes a bias current, which is direct current (DC), and a varying current, which is alternating current (AC). The varying current is proportional to the change in current in response to the process tracker circuit system 240 compensating the output voltage. Advantageously, such feedback current adjusts the transfer gate circuit system 230 to account for the change in the output voltage.

[0038] In response to the output current from the current mirror circuit system 220, the temperature compensation circuit system 250 generates an offset voltage. In an example operation, the transistors of the temperature compensation circuit system 250 operate in a subthreshold operation mode in response to the magnitude of the output current. In the subthreshold operation mode, the voltage of the transistors of the temperature compensation circuit system 250 has a PTAT bias. The temperature compensation circuit system 250 uses the voltage of the transistors to generate the offset voltage, which generates an offset voltage with a PTAT bias. The temperature compensation circuit system 250 supplies the offset voltage to the process tracker circuit system 240. An example implementation of the temperature compensation circuit system 250 is shown and described below in conjunction with Figure 3 and 4 An example implementation of the temperature compensation circuit system 250 is shown and described.

[0039] Figure 3 is Figure 2 A schematic diagram of an example regulator circuit system 200. In Figure 3 the instance of Figure 2 the bias current circuit system 210 of Figure 2 the current mirror circuit system 220 of Figure 2 the transfer gate circuit system 230 of Figure 2 the process tracker circuit system 240 of Figure 2 and Figure 3 the temperature compensation circuit system 250 of Figure 3 In the instance of Figure 3In an example, the portal circuit system 230 includes an example transistor 330. In Figure 3 In an example, the process tracker circuit system 240 includes a first example transistor 335 and a second example transistor 340. In Figure 3 In an example, the temperature compensation circuit system 250 includes a first example transistor 345, a second example transistor 350, a third example transistor 355, a fourth example transistor 360, a fifth example transistor 365, and a sixth example transistor 370.

[0040] The transistor 305 has a first terminal coupled to transistors 315, 320, 325, a second terminal and a third terminal coupled to the resistor 310, and a control terminal coupled to a common terminal that supplies a common electric potential (e.g., ground). In some examples, the third terminal, which may be referred to as a body terminal, is coupled to the common terminal. In Figure 3 In an example, the transistor 305 is a depletion transistor. The common terminal controls the transistor 305. When turned on, the transistor 305 obtains a bias current (I 偏置 ) from the transistor 315. When the transistor 305 is not turned on, the bias current is approximately close to zero amperes, preferably exactly zero amperes.

[0041] The resistor 310 has a first terminal coupled to the transistor 305 and a second terminal coupled to the common terminal. In response to the transistor 305 supplying a bias current, the resistor 310 generates a potential difference. The potential difference of the resistor 310 is approximately equal to the bias current multiplied by the resistance of the resistor 310. The resistor 310 allows the drain voltage of the transistor 305 to be coupled to a voltage greater than the common electric potential.

[0042] In Figure 3 In an example, the transistor 305 is a natural transistor. A natural transistor may be referred to as a native transistor. A natural transistor has a relatively low threshold voltage. In an example operation, the natural transistor obtains a current from a drain input (e.g., the voltage at the terminal of the transistor) to pull down the drain input.

[0043] In an example operation where the drain-to-source voltage of the transistor 305 is approximately five times greater than the threshold voltage (V th_NAT ) of the transistor 305, the resistance (R1) of the resistor 310 modifies the bias current. For example, using the following equation (1), adjusting the resistance of the resistor 310 modifies the bias current of the transistor 305. In such examples, the resistor 310 has a resistance that generates a bias current that sets the operating mode of the temperature compensation circuit system 250 to subthreshold operation. Additionally, as shown in the following equation (1), the parameters of the transistor 305 can be modified to adjust the bias current. For example, electron mobility (μ), gate oxide capacitance (C OX) the width (W), length (L), or subthreshold slope (m) of transistor 305.

[0044]

[0045] Transistor 315 has a first terminal coupled to a power supply terminal and a second terminal and a control terminal coupled to transistors 305, 320, 325, and the power supply terminal supplies a power supply voltage (V DD ). Transistor 315 supplies a bias current to transistor 305. In an example operation, transistor 315 acts as a diode. In such an example operation, transistor 315 obtains a current that is approximately, preferably exactly, equal to the bias current of transistor 305, and the bias current sets the control terminal of transistor 315 to a reference voltage. Transistor 315 supplies the reference voltage corresponding to the bias current to transistors 320, 325.

[0046] Transistor 320 has a first terminal coupled to a power supply terminal, a second terminal coupled to transistors 355, 360, and a control terminal coupled to transistors 305, 315, 325. Transistor 315 controls transistor 320. Transistor 320 receives a reference voltage from transistor 315. Transistor 320 supplies a replica of the bias current to transistor 360 in response to the reference voltage from transistor 315. Advantageously, transistor 320 mirrors the bias current.

[0047] Transistor 325 has a first terminal coupled to a power supply terminal, a second terminal coupled to transistors 330, 370, and a control terminal coupled to transistors 305, 315, 320. Transistor 315 controls transistor 325. Transistor 325 receives a reference voltage from transistor 315. Transistor 325 supplies a replica of the bias current to transistor 370 in response to the reference voltage from transistor 315. Advantageously, transistor 325 mirrors the bias current.

[0048] Transistor 330 has a first terminal coupled to a power supply terminal, a second terminal coupled to transistor 335 and coupleable to an external circuit system, and a control terminal coupled to transistors 325, 370. The voltages of transistors 365, 370 control transistor 330. In an example operation, feedback currents from transistors 335, 340 contribute to controlling transistor 330. Such a combination of currents and voltages from process tracker circuit system 240 and temperature compensation circuit system 250 creates a feedback loop that controls transistor 330. Transistor 330 supplies current from the power supply terminal to transistor 335 and the external circuit system.

[0049] Transistor 335 has a first terminal that is coupled to transistor 330 and can be coupled to an external circuit system. Transistor 335 has a second terminal and a control terminal, both of which are coupled to transistor 340. Transistor 335 is a p-channel transistor. Transistor 340 has a first terminal and a control terminal that are coupled to transistor 335 and a second terminal that is coupled to transistors 365, 370. Transistor 340 is an n-channel transistor. The current from transistor 365 sets the current of transistors 335, 340 that draws current from transistor 330. When turned on, transistors 335, 340 generate a voltage difference that is approximately equal to the gate-to-source voltage of transistor 335 plus the gate-to-source voltage of transistor 340. Transistors 335, 340 generate an output voltage of regulator circuit system 200, which is approximately equal to the offset voltage from temperature compensation circuit system 250 plus the voltage difference across transistors 335, 340. In an example operation, the voltage difference across transistors 335, 340 has a CTAT bias. In response to the CTAT bias, the voltage difference across transistors 335, 340 decreases as the temperature increases. However, the PTAT bias of the offset voltage across transistor 365 compensates the output voltage of regulator circuit system 200 for the CTAT bias of the voltage difference across transistors 335, 340.

[0050] Transistor 345 has a first terminal coupled to transistor 350, a second terminal coupled to a common potential, and a control terminal coupled to transistors 350, 355, 365. A bias current controls transistor 345. Transistor 345 has a first threshold voltage (V th1 ), which controls the operation of transistor 345. Transistor 345 has a first constant (β1), which is proportional to the size of transistor 345. Transistor 345 generates a first gate-to-source voltage (V gs1 ) in response to the bias current.

[0051] Transistor 350 has a first terminal coupled to transistors 345, 355, 365, a second terminal coupled to transistor 345, and a control terminal coupled to transistors 355, 360, 370. A bias current controls transistor 350. Transistor 350 has a second threshold voltage (V th2 ), which controls the operation of transistor 350. Transistor 350 has a second constant (β2), which is proportional to the size of transistor 350. Transistor 350 generates a second gate-to-source voltage (V gs2 ) in response to the bias current.

[0052] Transistor 355 has a first terminal coupled to transistors 345, 350, 365, a second terminal coupled to transistors 350, 360, 370, and a control terminal coupled to transistors 320, 360. A bias current controls transistor 355. Transistor 355 has a third threshold voltage (V th3 ), and the third threshold voltage controls the operation of transistor 355. Transistor 355 has a third constant (β3), and the third constant is proportional to the size of transistor 355. Transistor 355 generates a third gate-to-source voltage (V gs3 ) in response to the bias current.

[0053] Transistor 360 has a first terminal and a control terminal coupled to transistors 320, 355 and a second terminal coupled to transistors 350, 355, 370. A bias current controls transistor 360. Transistor 360 has a fourth threshold voltage (V th4 ), and the fourth threshold voltage controls the operation of transistor 360. Transistor 360 has a fourth constant (β4), and the fourth constant is proportional to the size of transistor 360. Transistor 360 generates a fourth gate-to-source voltage (V gs4 ) in response to the bias current.

[0054] Transistor 365 has a first terminal coupled to transistors 340, 370, a second terminal coupled to a common terminal, and a control terminal coupled to transistors 345, 350, 355. A bias current and a feedback current control transistor 365. Transistor 365 has a fifth threshold voltage (V th5 ), and the fifth threshold voltage controls the operation of transistor 365. Transistor 365 has a fifth constant (β5), and the fifth constant is proportional to the size of transistor 365. Transistor 365 generates a fifth gate-to-source voltage (V gs5 ) in response to the bias current and the feedback current. In some instances, the sizes of transistors 345, 365 are set such that transistor 365 obtains a current that is approximately equal to, preferably exactly equal to, twice the current flowing through transistor 345. In such instances, the current flowing through transistor 365 is approximately equal to twice the bias current.

[0055] Transistor 370 has a first terminal coupled to transistors 325, 330, a second terminal coupled to transistors 340, 365, and a control terminal coupled to transistors 350, 355, 360. A bias current and a feedback current control transistor 370. Transistor 370 has a sixth threshold voltage (V th6), the operation of the sixth threshold voltage control transistor 370 is controlled. The transistor 370 has a sixth constant (β6), and the sixth constant is proportional to the size of the transistor 370. The transistor 370 generates a sixth gate-to-source voltage (V gs6 ).

[0056] In an example operation, the offset voltage of the temperature compensation circuit system 250 is approximately equal to the voltages at the terminals coupled to the transistors 340, 365, 370. In such example operations, the offset voltage is approximately equal to the first gate-to-source voltage plus the third gate-to-source voltage minus the fourth gate-to-source voltage minus the sixth gate-to-source voltage. For example, the following equation (2) is used to determine the offset voltage.

[0057] V X = V gs1 + V gs3 - V gs4 - V gs6 ; Equation (2)

[0058] In other instances, the offset voltage of the temperature compensation circuit system 250 can be written based on the threshold voltages of the transistors 345, 350, 355, 360, 365, 370. In such instances, the offset voltage is approximately equal to the first threshold voltage plus the third threshold voltage minus the fourth threshold voltage minus the sixth threshold voltage plus the product of the following: a slope constant (m), a temperature-dependent voltage (V T ), and a natural logarithm that is the natural logarithm of the product of the fourth constant (β4) and the sixth constant (β6) divided by the product of the first constant (β1) and the third constant (β3). For example, the following equation (3) can be used to determine the offset voltage. However, in an example operation, the voltage difference between the first threshold voltage and the fourth threshold voltage and the voltage difference between the third threshold voltage and the sixth threshold voltage are relatively small compared to the product of the following: the slope constant (m), the temperature-dependent voltage (V T ), and a natural logarithm that is the natural logarithm of the product of the fourth constant (β4) and the sixth constant (β6) divided by the product of the first constant (β1) and the third constant (β3). In such example operations, the transistors 345, 360 are selected to have threshold voltages of approximately the same magnitude, and the transistors 355, 370 are selected to have threshold voltages of approximately the same magnitude to reduce the contribution to the offset voltage.

[0059]

[0060] Advantageously, the offset voltage increases as the temperature-dependent voltage of the above equation (3) increases. Advantageously, the temperature-dependent voltage of the offset voltage has a PTAT bias. Advantageously, the sizes of transistors 345, 350, 360, 365, 370 can be set to have a constant that sets the offset voltage to a desired value.

[0061] In Figure 3 an example, transistors 305, 340, 345, 350, 355, 360, 365, 370 are n-channel metal oxide semiconductor field effect transistors (MOSFETs). Alternatively, transistors 305, 340, 345, 350, 355, 360, 365, 370 can be n-channel field effect transistors (FETs), n-channel insulated gate bipolar transistors (IGBTs), n-channel junction field effect transistors (JFETs), NPN bipolar junction transistors (BJTs), and / or p-type equivalent devices with minor modifications. In Figure 3 an example, transistors 315, 320, 325, 330, 335 are p-channel MOSFETs. Alternatively, transistors 315, 320, 325, 330, 335 can be p-channel FETs, p-channel IGBTs, p-channel JFETs, NPN BJTs, and / or N-type equivalent devices with minor modifications. Transistors 305, 350, 355, 370 are depletion-type devices, such as natural transistors. Transistors 315, 320, 325, 330 are enhancement-type devices with relatively thick oxides. Transistors 335, 340, 345, 360, 365 are enhancement-type devices. Additionally, transistors 305, 315, 320, 325, 330, 335, 340, 345, 350, 355, 360, 365, 370 can be implemented in or above a silicon (Si) substrate, a silicon carbide (SiC) substrate, a gallium nitride (GaN) substrate, or a gallium arsenide (GaAs) substrate.

[0062] Figure 4 is a schematic diagram of an example regulator circuit system 400, which is the Figure 1 regulator circuit system 150 of Figure 2 and 3 another example of the regulator circuit system 200 of Figure 4 In an example, the regulator circuit system 400 includes Figure 2 and 3 the current mirror circuit system 220 of Figure 2 and 3 the temperature compensation circuit system 250 of Figure 3Transistors 315, 320, 325, 345, 350, 355, 360, 365, 370, example bias current circuit system 405, first example transistor 410, first example resistor 415, second example resistor 420, example switch circuit system 425, second example transistor 430, example portal circuit system 435, third example transistor 440, example process tracker circuit system 445, fourth example transistor 450, and fifth example transistor 455. The regulator circuit system 400 generates an output voltage (V OUT_SUB ), and the output voltage is proportional to the offset voltage (V X ) from the temperature compensation circuit system 250 plus the gate-to-source voltages of transistors 450 and 455.

[0063] The bias current circuit system 405 has a first terminal coupled to the current mirror circuit system 220, a second terminal coupled to a common terminal, and a control terminal that can be coupled to Figure 1 the controller circuit system 120, and the common terminal supplies a common potential (e.g., ground). In Figure 4 an instance, the bias current circuit system 405 includes transistors 410, resistors 415 and 420, and a switch circuit system 425. The bias current circuit system 405 receives an active mode indication from the controller circuit system 120. In response to the active mode indication, the bias current circuit system 405 generates a bias current having one of a first magnitude or a second magnitude. In an example operation, in response to an active mode indication from the controller circuit system 120, the bias current circuit system 405 increases the bias current.

[0064] Transistor 410 has a first terminal coupled to transistor 315, second and third terminals coupled to resistor 415, and a control terminal coupled to the common terminal. In Figure 4 an instance, transistor 410 is a depletion-mode transistor. The common terminal controls transistor 410. When turned on, transistor 410 obtains a bias current (I 偏置 ) from transistor 315. When not turned on, transistor 410 prevents the generation of the bias current.

[0065] Resistor 415 has a first terminal coupled to transistor 410 and a second terminal coupled to resistor 420 and the switch circuit system 425. Resistor 420 has a first terminal coupled to resistor 415 and the switch circuit system 425 and a second terminal coupled to the common terminal. Resistor 415 has a first resistance, and resistor 420 has a second resistance. Resistors 415 and 420 are configured as a voltage divider circuit system between transistor 410 and the common terminal.

[0066] The switch circuit system 425 has a first terminal coupled to resistors 415, 420 and a second terminal coupled to a common terminal. The controller circuit system 120 controls the switch circuit system 425 using an active mode indication. The switch circuit system 425 controls the resistance coupled between the transistor 410 and the common terminal. When open, the switch circuit system 425 allows the resistance of both resistors 415, 420 to be coupled to the transistor 410. For example, the following equation (4) can be used to determine the bias current. When closed, the switch circuit system 425 shorts the resistor 420, which sets the resistance between the transistor 410 and the common terminal to be approximately equal to the resistance of the resistor 415. For example, the following equation (4) can be used to determine the bias current. Advantageously, the bias current circuit system 405 can adjust the magnitude of the bias current in response to Figure 1 the operating mode of the device 100. The bias current circuit system 405 can be implemented in Figure 2 and 3 the regulator circuit system 200.

[0067]

[0068] The transistor 430 has a first terminal coupled to a power supply terminal, a second terminal coupled to transistors 440, 450, and a control terminal coupled to transistors 325, 370, and the power supply terminal supplies a power supply voltage (V DD ). The transistor 430 is a p-channel depletion-mode transistor. The voltages of transistors 365, 370 control the transistor 430. In an example operation, the feedback current from transistors 450, 455 helps to control the transistor 430. Such a combination of current and voltage from the process tracker circuit system 445 and the temperature compensation circuit system 250 is configured to control the first feedback loop of the transistor 430. The transistor 430 supplies current from the power supply terminal to the transistor 450 that sets the voltage of the transistor 440.

[0069] The portal circuit system 435 has a first terminal coupled to a power supply terminal, a second terminal coupled to transistors 430, 450, and a third terminal coupled to the transistor 450 and configurable to be coupled to an external circuit system. In Figure 4 an instance, the portal circuit system 435 includes a transistor 440. The portal circuit system 435 supplies current to the transistor 450 and the external circuit system. The transistor 450 is configured to control the second feedback loop of the portal circuit system 435. Figure 4 The portal circuit system 435 of Figure 2 and 3 operates similar to the portal circuit system 230 of

[0070] The transistor 440 has a first terminal coupled to a power supply terminal, a second terminal coupled to the transistor 450 and couplable to an external circuit system, and a control terminal coupled to the transistors 430, 450. The transistor 440 is an n-channel depletion-mode transistor. The voltages of the transistors 430, 450 control the transistor 440. In an example operation, a feedback current from the transistor 450 helps control the transistor 440. Such a combination of currents and voltages from the transistor 430 and the process tracker circuit system 445 is configured to control a second feedback loop of the transistor 440. The transistor 440 supplies current from the power supply terminal to the transistor 450 and the external circuit system.

[0071] The process tracker circuit system 445 has a first terminal coupled to the transistors 430, 440, a second terminal coupled to the transistor 440 and couplable to an external circuit system, and a third terminal coupled to the transistors 365, 370. In Figure 4 an instance, the process tracker circuit system 445 includes the transistors 450, 455. The process tracker circuit system 445 is Figure 2 and 3 another instance of the process tracker circuit system 240. However, different from the process tracker circuit system 240, the process tracker circuit system 445 includes an alternative configuration of the transistors 450, 455. The process tracker circuit system 445 helps control the portal circuit system 435 to set the output voltage of the regulator circuit system 400 to be approximately equal to the offset voltage from the temperature compensation circuit system 250 plus the threshold voltages of the transistors 450, 455. Advantageously, the offset voltage has a PTAT bias that compensates for the CTAT bias of the transistors 450, 455.

[0072] The transistor 450 has a first terminal coupled to the transistors 430, 440, a second terminal coupled to the transistor 455, and a control terminal coupled to the transistor 440 and couplable to an external circuit system. The transistor 450 is an n-channel enhancement-mode transistor. The transistor 455 has a first terminal coupled to the transistor 450 and second and control terminals coupled to the transistors 365, 370. The transistor 455 is a p-channel enhancement-mode transistor. The temperature compensation circuit system 250 offsets the gate-to-source voltages of the transistors 450, 455 by the offset voltage. The transistors 450, 455 set the output voltage of the regulator circuit system 400 to be approximately equal to the offset voltage plus the gate-to-source voltages of both the transistors 450, 455. Advantageously, the PTAT bias of the offset voltage reduces the variation of the output voltage in response to the CTAT bias of the transistors 450, 455.

[0073] In Figure 4In an example, transistors 345, 350, 355, 360, 365, 370, 410, 440, 450 are n-channel metal oxide semiconductor field effect transistors (MOSFETs). Alternatively, transistors 345, 350, 355, 360, 365, 370, 410, 440, 450 can be n-channel FETs, n-channel IGBTs, n-channel JFETs, NPN BJTs, and / or p-type equivalent devices with minor modifications. In Figure 4 In an example, transistors 315, 320, 325, 430, 455 are p-channel MOSFETs. Alternatively, transistors 315, 320, 325, 430, 455 can be p-channel FETs, p-channel IGBTs, p-channel JFETs, NPN BJTs, and / or N-type equivalent devices with minor modifications. Transistors 315, 320, 325, 350, 355, 370, 410, 430, 440 are depletion-type devices, such as natural transistors. Transistors 345, 360, 365, 450, 455 are enhancement-type devices. Additionally, transistors 315, 320, 325, 345, 350, 355, 360, 365, 370, 410, 430, 450, 455 can be implemented in or above a silicon (Si) substrate, a silicon carbide (SiC) substrate, a gallium nitride (GaN) substrate, or a gallium arsenide (GaAs) substrate.

[0074] Figure 5A is Figure 1 , 2 Graph 500 of an example operation of regulator circuit systems 150, 200, 400 for 1, 2, 3, or 4. In Figure 5A In an example, graph 500 includes a first example compensated output voltage 510 and a second example compensated output voltage 520. The compensated output voltage 510 shows the operation of an example regulator circuit system that does not compensate for the CTAT bias of a process tracker circuit system for 1, Figure 2 , 3 or 4. For example, the compensated output voltage 510 has a relatively low offset voltage. In such examples, Figure 2 , 3 and 4's temperature compensation circuit system 250 fails to effectively compensate for the CTAT bias of process tracker circuit system 240 by generating a relatively low offset voltage. The compensated output voltage 520 shows the operation of regulator circuit systems 150, 200, 400 that include a temperature compensation circuit system 250 that generates an offset voltage having a PTAT bias that compensates for the CTAT bias of process tracker circuit systems 240, 445.

[0075] At a first temperature 530, which is a relatively low temperature, the compensated output voltages 510, 520 are approximately equal. At temperature 530, the process tracker circuitry 240, 445 has a relatively high CTAT bias, and the offset voltage of the temperature compensation circuitry 250 has a relatively low PTAT bias.

[0076] At a second temperature 540, which is a relatively medium temperature, the compensated output voltage 510 decreases significantly in response to a decrease in the CTAT bias between temperatures 530 and 540. At temperature 540, in response to an increase in the PTAT bias with increasing temperature, the compensated output voltage 520 changes from decreasing to increasing. After temperature 540, the CTAT bias of the process tracker circuitry 240, 445 continues to decrease, and the PTAT bias of the offset voltage of the temperature compensation circuitry 250 continues to increase. Advantageously, the temperature compensation circuitry 250 compensates the output voltages of the regulator circuitry 150, 200, 400 for the decrease in the CTAT bias.

[0077] Figure 5B is one with an increased bias current Figure 1 、 2 、3 or 4 of the regulator circuitry 150, 200, 400. For example, the regulator circuitry 400 after the switch circuitry 425 is closed Figure 4 . In Figure 5B example, the graph 550 includes a first example compensated output voltage 560 and an example compensated output voltage 570. The compensated output voltage 560 shows the operation of an example regulator circuitry that does not compensate the CTAT bias of the process tracker circuitry 240, 445 Figure 2 、 3 or 4. For example, the compensated output voltage 560 has a relatively low offset voltage. In such examples, Figure 2 、 3 and 4 of the temperature compensation circuitry 250 fails to effectively compensate the CTAT bias of the process tracker circuitry 240 by generating a relatively low offset voltage. The compensated output voltage 570 shows the operation of the regulator circuitry 150, 200, 400 that includes a temperature compensation circuitry 250 that generates an offset voltage having a PTAT bias that compensates the CTAT bias of the process tracker circuitry 240, 445. Additionally, in Figure 5B example, the device 100 is in an active operating mode. In Figure 5B example, the active mode indicates disconnecting Figure 4 of the switch circuitry 425 to increase the bias current.

[0078] At a first temperature 580 that is a relatively low temperature, the compensated output voltage 560 and the compensated output voltage 570 are approximately equal. At temperature 580, the process tracker circuitry 240, 445 has a relatively high CTAT bias, and the offset voltage of the temperature compensation circuitry 250 has a relatively low PTAT bias.

[0079] At a second temperature 590 that is a relatively medium temperature, the compensated output voltage 560 decreases significantly in response to a decrease in the CTAT bias between temperatures 580 and 590. At temperature 590, in response to an increase in the PTAT bias with increasing temperature, the compensated output voltage 570 changes from decreasing to increasing. After temperature 590, the CTAT bias of the process tracker circuitry 240, 445 continues to decrease, and the PTAT bias of the offset voltage of the temperature compensation circuitry 250 continues to increase. Advantageously, the temperature compensation circuitry 250 compensates the output voltage of the regulator circuitry 150, 200, 400 for the decrease in the CTAT bias.

[0080] Figure 6 is representative of example operations 600 that may be executed, instantiated, and / or performed to implement Figure 1 、 2 、3, or 4 of the regulator circuitry 150, 200, 400. The example operations 600 begin at block 610, at which Figure 1 the controller circuitry 120 of Figure 1 determines whether the device is in an active mode. In some instances, the controller circuitry 120 determines Figure 1 the operating mode of the device 100 in response to a periodic timing that switches between an active mode and a sleep mode. In the active mode, the active mode indicates that the Figure 1 enabled regulator circuitry 130 supplies power to the

[0081] If the controller circuitry 120 determines that the device is in the active mode (e.g., the result returned by block 610 is yes), then Figure 4 the bias current circuitry 405 of Figure 4 generates a relatively high bias current. (Block 620). In some instances, the controller circuitry 120 closes the

[0082] switch circuitry 425 of Figure 2 、 3The bias current circuitry 210, 405 of 0 or 4 generates a relatively low bias current. (Block 630). In some instances, the controller circuitry 120 turns off the switch circuitry 425 to reduce the bias current, as shown in equation (4) above. In such instances, reducing the bias current reduces the output current of the regulator circuitry 150, 200, 400.

[0083] Figure 2 , 3 The current mirror circuitry 220 of 0, and 4 mirrors the bias current. (Block 640). In some instances, Figure 3 and 4 The transistors 320, 325 of 0 and Figure 3 and 4 copy the current supplied by the transistor 315 of 0 and

[0084] Figure 2 . 3 The temperature compensation circuitry 250 of 0, and 4 generates a positive temperature-dependent DC bias voltage in response to the bias current. (Block 650). In some instances, the temperature compensation circuitry 250 uses Figure 3 and 4 the transistors 345, 350, 355, 360, 365, 370 of 0 and

[0085] Figure 2 . 3 The process tracker circuitry 230, 445 of 0, or 4 generates a negative temperature-dependent output voltage in response to the bias current. (Block 660). In some instances, Figure 3 the transistors 335, 340 of 0 or Figure 4 the transistors 450, 455 of 4 have a gate-to-source voltage that has a CTAT bias. In such instances, in response to the CTAT bias, the gate-to-source voltage of the transistors 335, 340, 450, 455 decreases as the temperature increases.

[0086] The process tracker circuits 230, 445 utilize a positive temperature-dependent DC bias voltage to compensate for the negative temperature-dependent output voltage (block 670). In some examples, the temperature compensation circuit 250 offsets the gate-to-source voltages of transistors 335, 340, 450, 455. In such examples, transistors 335, 340, 450, 455 regulate the output voltages of the regulator circuits 150, 200, 400 to be approximately equal to the offset voltage plus the gate-to-source voltage of one of the process tracker circuits 230, 445. Control proceeds back to block 610.

[0087] Although the flowchart shown in Figure 6 describes an example method, many other methods of implementing the regulator circuits 150, 200, 400 may alternatively be used in this specification. For example, the order of execution of the blocks may be changed, and / or some of the blocks described may be changed, eliminated, or combined. Similarly, in the manufacturing process, additional operations may be included before, between, or after the blocks shown in the illustrated examples.

[0088] "Comprising" and "including" (and all forms and tenses thereof) are used herein as open-ended terms. Thus, whenever a technical solution uses any form of "comprising" or "including" (e.g., comprises, includes, comprising, including, having, etc.) as a leading term or is adopted within any type of technical solution citation, additional elements, terms, etc. may exist without exceeding the scope of the corresponding technical solution or citation. As used herein, when the phrase "at least" is used as a transitional term in, for example, the leading term of a technical solution, it is open-ended in the same manner as the terms "including" and "comprising". The term "and / or", when used in the form of, for example, A, B, and / or C, means any combination or subset of A, B, and C, such as (1) only A, (2) only B, (3) only C, (4) A and B, (5) A and C, (6) B and C, or (7) A and B and C. As used herein in the context of describing a structure, component, item, object, and / or thing, the phrase "at least one of A and B" means an embodiment comprising any one of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing a structure, component, item, object, and / or thing, the phrase "at least one of A or B" means an embodiment comprising any one of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. As used herein in the context of describing the performance or execution of a process, instruction, action, activity, etc., the phrase "at least one of A and B" means an embodiment comprising any one of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing the performance or execution of a process, instruction, action, activity, etc., the phrase "at least one of A or B" means an embodiment comprising any one of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B.

[0089] As used herein, singular references (e.g., "a", "an", "first", "second", etc.) do not exclude pluralities. As used herein, the term "a" or "an" object means one or more of the said objects. The terms "a or an", "one or more", and "at least one" may be used interchangeably herein. In addition, although listed separately, multiple components, elements, or acts may be implemented by, for example, the same entity or object. Additionally, although individual features may be included in different instances or technical solutions, these features may be combined, and the inclusion in different instances or technical solutions does not imply that the combination of features is not feasible and / or not advantageous.

[0090] As used herein, unless otherwise stated, the term "above" describes the relationship of two parts with respect to the earth. If at least one part of the second part is between the earth and the first part, the first part is above the second part. Similarly, as used herein, when the first part is closer to the earth than the second part, the first part is "below" the second part. As mentioned above, the first part can be above or below the second part, with one or more of the following situations: there are other parts therebetween, there are no other parts therebetween, the first part and the second part are in contact, or the first part and the second part do not directly contact each other.

[0091] As used in this patent, stating that any part (e.g., a layer, a film, a region, a zone or a plate) is on another part in any manner (e.g., positioned thereon, located thereon, disposed thereon or formed thereon, etc.) indicates that the part being referred to is in contact with the other part, or the part being referred to is above the other part, with one or more intermediate parts positioned therebetween.

[0092] As used herein, unless otherwise specified, connection references (e.g., attach, couple, connect and join) can include intermediate components between the elements referred to by the connection reference and / or relative movement between those elements. Thus, a connection reference does not necessarily infer that two elements are directly connected and / or in a fixed relationship with each other. As used herein, stating that any part is "in contact with" another part is defined to mean that there is no intermediate part between the two parts.

[0093] Unless otherwise specifically stated, descriptive terms such as "first", "second", "third", etc. used herein do not imply or otherwise indicate a priority, a physical order, a meaning of arrangement, and / or a sorting in any way in the list, but are only used as labels and / or arbitrary names to distinguish elements, so as to facilitate the understanding of the described examples. In some examples, the descriptive term "first" can be used to refer to an element in a specific embodiment, while the same element can be referred to by different descriptive terms such as "second" or "third" etc. in the claims. In such cases, such descriptive terms are only used to clearly identify those elements within the context of the discussion (e.g., within the technical solution), where the elements may, for example, otherwise share the same name.

[0094] As used herein, "substantially" and "about" modify their subject / value to identify the potential existence of variations that occur in real-world applications. For example, "substantially" and "about" can modify dimensions that may not be precise due to manufacturing tolerances and / or other real-world defects. For example, unless otherwise specified herein, "substantially" and "about" can indicate that such dimensions can be within a tolerance range of + / - 10%.

[0095] As used herein, "substantially real-time" means occurring in a near-instantaneous manner, recognizing that there may be delays in computing time, transmission, etc. in the real world. Thus, unless otherwise specified, "substantially real-time" means real-time + 1 second.

[0096] As used herein, the phrase "communicate" (including its variants) encompasses direct communication and / or indirect communication through one or more intermediate components, and does not require direct physical (e.g., wired) communication and / or continuous communication, but also includes selective communication at periodic intervals, predetermined intervals, aperiodic intervals, and / or one-time events.

[0097] As used herein, "programmable circuitry" is defined to include the following: (i) one or more dedicated circuits (e.g., application-specific integrated circuits (ASICs)) that are configured to perform one or more specific operations and include one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors); and / or (ii) one or more general-purpose semiconductor-based circuits that can be programmed with instructions to perform one or more specific functions and / or one or more operations and include one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors). Examples of programmable circuitry include programmable microprocessors such as: a central processing unit (CPU) that can execute a first instruction to perform one or more operations and / or functions; a field-programmable gate array (FPGA) that can be programmed with a second instruction to configure and / or structure the FPGA to instantiate one or more operations and / or functions corresponding to the first instruction; a graphics processing unit (GPU) that can execute a first instruction to perform one or more operations and / or functions; a digital signal processor (DSP) that can execute a first instruction to perform one or more operations and / or functions; an XPU; a network processing unit (NPU); one or more microcontrollers that can execute a first instruction to perform one or more operations and / or functions; and / or integrated circuits such as application-specific integrated circuits (ASICs). For example, an XPU can be implemented by a heterogeneous computing system that includes multiple types of programmable circuitry (e.g., one or more FPGAs, one or more CPUs, one or more GPUs, one or more NPUs, one or more DSPs, etc., and / or any combination thereof) and an orchestration technique (e.g., an application programming interface (API)) that can allocate computing tasks to any one or more of the programmable circuitry types in the heterogeneous computing system that are suitable and available to perform the computing tasks.

[0098] As used herein, an integrated circuit / circuit system is defined as one or more semiconductor packages containing one or more circuit elements, such as transistors, capacitors, inductors, resistors, current paths, diodes, etc. For example, an integrated circuit can be implemented as one or more of an ASIC, FPGA, chip, microchip, programmable circuit system, semiconductor substrate coupling multiple circuit elements, system-on-chip (SoC), etc.

[0099] In this specification, the term "and / or" (when used in the form of, for example, A, B, and / or C) refers to any combination or subset of A, B, C, such as: (a) only A; (b) only B; (c) only C; (d) A and B; (e) A and C; (f) B and C; and (g) A, B, and C. Additionally, as used herein, the phrase "at least one of A or B" (or "at least one of A and B") refers to an embodiment that includes any one of the following: (a) at least one A; (b) at least one B; and (c) at least one A and at least one B.

[0100] In this specification, the term "coupled" can encompass a connection, communication, or signal path that enables a functional relationship consistent with this specification. For example, if device A generates a signal to control the operation of device B, then: (a) in a first instance, device A is coupled to device B through a direct connection; or (b) in a second instance, device A is coupled to device B through an intermediate component C, provided that the intermediate component C does not change the functional relationship between device A and device B, such that device B is controlled by device A through the control signal generated by device A.

[0101] Numeric identifiers such as "first", "second", "third", etc. are only used to distinguish elements of essentially the same type in terms of structure and / or function. These identifiers used in the detailed description do not necessarily coincide with those used in the claims.

[0102] A device "configured to" perform a task or function can be configured (e.g., programmed and / or hardwired) to perform the function when manufactured by the manufacturer, and / or can be configured (or reconfigured) by the user after manufacture to perform the function and / or other additional or alternative functions. The configuration can be achieved through firmware and / or software programming of the device, through the construction and / or layout of the hardware components and interconnects of the device, or a combination thereof.

[0103] As used herein, the terms "terminal", "node", "interconnect", "pin", and "lead" can be used interchangeably. Unless specifically stated to the contrary, these terms are generally used to denote the interconnection between device elements, circuit elements, integrated circuits, devices, or other electronic devices or semiconductor components, or their ends.

[0104] A circuit or apparatus described herein as including certain components may in fact be adapted to be coupled to those components to form the described circuit system or apparatus. For example, a structure described as including one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage sources and / or current sources) may in fact include only semiconductor elements within a single physical device (e.g., a semiconductor die and / or an integrated circuit (IC) package), and may be adapted to be coupled to at least some of the passive elements and / or sources to form the described structure at the time of manufacture or after manufacture, e.g., by an end user and / or a third party.

[0105] The circuits described herein may be reconfigured to include the replacement components to provide functionality that is at least partially similar to the functionality obtainable before the component replacement. Unless otherwise stated, a component shown as a resistor generally represents any one or more elements coupled in series and / or in parallel to provide the amount of impedance represented by the shown resistor. For example, a resistor or capacitor shown and described herein as a single component may in fact be multiple resistors or capacitors coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component may in fact be multiple resistors or capacitors coupled in series between the same two nodes as a single resistor or capacitor. Although some elements of the described examples are included in an integrated circuit and other elements are external to the integrated circuit, in other example embodiments, additional or fewer features may be incorporated into the integrated circuit. Additionally, some or all of the features shown as external to the integrated circuit may be included in the integrated circuit, and / or some features shown as internal to the integrated circuit may be incorporated external to the integrated circuit. As used herein, the term "integrated circuit" means one or more circuits that: (i) are incorporated in / above a semiconductor substrate; (ii) are incorporated in a single semiconductor package; (iii) are incorporated into the same module; and / or (iv) are incorporated in / on the same printed circuit board.

[0106] The use of the phrase "ground" in the foregoing description includes chassis ground, earth ground, floating ground, virtual ground, digital ground, common ground, and / or any other form of ground connection applicable to or suitable for the teachings of this specification. Unless otherwise stated, "about," "substantially," or "essentially" before a value means + / - 10% of that value, or, if the value is zero, a reasonable range of values near zero.

[0107] Within the scope of the claims, modifications may be made in the described examples, and other examples are possible.

Claims

1. A device comprising: a transfer gate circuit system having a first terminal and a second terminal; a process tracker circuitry having a first terminal and a second terminal, the first terminal of the process tracker circuitry being coupled to the first terminal of the pass gate circuitry; as well as A temperature compensation circuit system has a first terminal and a second terminal, the first terminal of the temperature compensation circuit system is coupled to the second terminal of the process tracker circuit system, and the second terminal of the temperature compensation circuit system is coupled to the second terminal of the transfer gate circuit system.

2. The device according to claim 1, wherein the temperature compensation circuit system further has a third terminal, and the device further includes a current mirror circuit system, the current mirror circuit system has a first terminal and a second terminal, the first terminal of the current mirror circuit system is coupled to the second terminal of the transfer gate circuit system and the second terminal of the temperature compensation circuit system, and the second terminal of the current mirror circuit system is coupled to the third terminal of the temperature compensation circuit system.

3. The apparatus of claim 2, wherein the current mirror circuitry further has a third terminal, the apparatus further comprising bias current circuitry having a terminal coupled to the third terminal of the current mirror circuitry.

4. The apparatus of claim 1 , wherein the transfer gate circuitry comprises a transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the transistor being coupled to a power supply terminal, the second terminal of the transistor being coupled to the first terminal of the process tracker circuitry, and the control terminal of the transistor being coupled to the second terminal of the temperature compensation circuitry.

5. The apparatus of claim 1 , wherein the process tracker circuitry comprises: a first transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the first transistor being coupled to the first terminal of the pass-gate circuitry; and a second transistor having a first terminal, a second terminal and a control terminal, the first terminal of the second transistor being coupled to the second terminal of the first transistor, the control terminal of the first transistor and the control terminal of the second transistor, the second terminal of the second transistor being coupled to the first terminal of the temperature compensation circuit system.

6. The apparatus of claim 5, wherein the first transistor is a p-channel transistor and the second transistor is an n-channel transistor.

7. The apparatus of claim 1 , wherein the process tracker circuit system further has a third terminal, the apparatus further comprising a transistor having a first terminal, a second terminal and a control terminal, the first terminal of the transistor being coupled to a power supply terminal, the second terminal of the transistor being coupled to the first terminal of the transfer gate circuit system and the third terminal of the process tracker circuit system, and the control terminal of the transistor being coupled to the second terminal of the temperature compensation circuit system.

8. The apparatus of claim 7, wherein the transistor is a first transistor and the process tracker circuitry comprises: a second transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second transistor being coupled to the second terminal of the pass-gate circuitry and the second terminal of the first transistor, the control terminal of the second transistor being coupled to the first terminal of the pass-gate circuitry; and A third transistor has a first terminal, a second terminal and a control terminal, the first terminal of the third transistor being coupled to the second terminal of the second transistor, the second terminal of the third transistor being coupled to the first terminal of the temperature compensation circuit system and the control terminal of the third transistor.

9. The apparatus of claim 8, wherein the first transistor is a p-channel enhancement type transistor, the second transistor is an n-channel enhancement type transistor, and the third transistor is a p-channel enhancement type transistor.

10. The apparatus of claim 1, wherein the temperature compensation circuitry comprises: a first transistor having a control terminal; a second transistor having a first terminal and a second terminal, the first terminal of the second transistor being coupled to the control terminal of the first transistor; and A third transistor having a first terminal, a second terminal and a control terminal, the first terminal of the third transistor being coupled to the second terminal of the process tracker circuit system, the second terminal of the third transistor being coupled to the second terminal of the transfer gate circuit system, and the control terminal of the third transistor being coupled to the second terminal of the second transistor.

11. The apparatus of claim 10, wherein the first transistor is an n-channel enhancement-mode transistor, the second transistor is an n-channel depletion-mode transistor, and the third transistor is an n-channel depletion-mode transistor.

12. A device comprising: a process tracker circuit system having terminals; as well as A temperature compensation circuit system, comprising: a first transistor having a first terminal and a control terminal; a second transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second transistor being coupled to the first terminal of the first transistor; a third transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the third transistor being coupled to the control terminal of the first transistor and the second terminal of the second transistor; a fourth transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the fourth transistor being coupled to the control terminal of the second transistor and the control terminal of the third transistor; as well as A fifth transistor having a first terminal and a control terminal, wherein the first terminal of the fifth transistor is coupled to the terminal of the process tracker circuit system, and the control terminal of the fifth transistor is coupled to the control terminal of the second transistor, the second terminal of the third transistor, and the second terminal of the fourth transistor.

13. The apparatus of claim 12, wherein the terminal of the process tracker circuit system is a first terminal, the process tracker circuit system further has a second terminal, the fifth transistor further has a second terminal, the apparatus further comprises a transfer gate circuit system, the transfer gate circuit system has a first terminal and a second terminal, the first terminal of the transfer gate circuit system is coupled to the second terminal of the process tracker circuit system, the second terminal of the transfer gate circuit system is coupled to the second terminal of the fifth transistor.

14. The apparatus of claim 12, wherein the terminal of the process tracker circuitry is a first terminal, the process tracker circuitry further has a second terminal and a third terminal, the fifth transistor further has a second terminal, the apparatus further comprising: a sixth transistor having a first terminal and a control terminal, the control terminal of the sixth transistor being coupled to the second terminal of the fifth transistor; as well as A transfer gate circuit system having a first terminal and a second terminal, wherein the first terminal of the transfer gate circuit system is coupled to the second terminal of the process tracker circuit system, and the second terminal of the transfer gate circuit system is coupled to the third terminal of the process tracker circuit system and the first terminal of the sixth transistor.

15. The apparatus of claim 12, wherein the first transistor is an n-channel enhancement-mode transistor, the second transistor is an n-channel depletion-mode transistor, the third transistor is an N-channel depletion-mode transistor, the fourth transistor is an n-channel enhancement-mode transistor, and the fifth transistor is an n-channel enhancement-mode transistor.

16. The apparatus of claim 12, wherein the fifth transistor further has a second terminal, the apparatus further comprising: a bias current circuit system having terminals; as well as A current mirror circuit system having a first terminal, a second terminal and a third terminal, the first terminal of the current mirror circuit system being coupled to the terminal of the bias current circuit system, the second terminal of the current mirror circuit system being coupled to the control terminal of the third transistor, the first terminal of the fourth transistor and the control terminal of the fourth transistor, and the third terminal of the current mirror circuit system being coupled to the second terminal of the fifth transistor.

17. An apparatus comprising: a transfer gate circuit system configured to draw a first current from a power source; a process tracker circuitry coupled to the transfer gate circuitry, the process tracker circuitry being configured to: generating an output voltage in response to the first current, the output voltage having a negative temperature dependence; and generating a feedback current in response to generating the output voltage; and temperature compensation circuitry coupled to the process tracker circuitry and the transfer gate circuitry, the temperature compensation circuitry configured to: generating an offset voltage having a positive temperature dependence; and The output voltage is compensated using the offset voltage.

18. The apparatus of claim 17, further comprising: bias current circuitry configured to generate a bias current; and a current mirror circuit system coupled to the transfer gate circuit system, the temperature compensation circuit system and the bias current circuit system, the current mirror circuit system being configured to: mirroring the bias current; and An output current is supplied to the temperature compensation circuitry, the output current being proportional to the bias current.

19. The apparatus of claim 18, wherein the temperature compensation circuitry comprises a plurality of transistors, the bias current having a magnitude to operate the plurality of transistors in a subthreshold operating mode, the offset voltage having the positive temperature dependence in response to the plurality of transistors being in the subthreshold operating mode.

20. The apparatus of claim 17, wherein the process tracker circuitry is further configured to generate the output voltage using a plurality of gate-to-source voltages of transistors, the negative temperature dependency being responsive to variations in the gate-to-source voltages of the transistors across temperature.

21. The apparatus of claim 17, wherein the temperature compensation circuitry is further configured to generate the offset voltage using a plurality of gate-to-source voltages of a transistor and a threshold voltage of the transistor, the positive temperature dependency being responsive to variations in the gate-to-source voltage and the threshold voltage across temperature.

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