Non-blocking AXI read data reordering system and method in DDR controller

Abstract

The invention relates to a DDR (double data rate) controller, in particular to a non-blocking AXI (advanced extensible interface) read data reordering system and method in the DDR controller, a transaction splitting unit is used for splitting an AXI burst transmission read transaction command AXI Burst into a plurality of DDR burst transmission read transaction commands DDR Burst adapted to primary DDR burst transmission; the Token record table unit is used for recording the sequence of the sent DDR burst transmission read transaction command DDR Burst by using the Token record table, and matching the read data according to the Token carried by the returned read data; the Token generation unit is used for generating a corresponding Token according to the DDR burst transmission read transaction command DDR Burst; according to the technical scheme provided by the invention, the defect that the correctness of data returned to the host by the DDR controller cannot be ensured while the DDR reading efficiency is improved in the prior art can be effectively overcome.

Description

Technical Field

[0001] The present invention relates to a DDR controller, and more particularly to a non-blocking AXI read data reordering system and method in a DDR controller. Background Art

[0002] The DDR controller executes instructions according to the order in which the on-chip host's instructions are received. However, the host may not issue instructions in the most efficient DDR execution order. If instructions are executed in the order in which the host issues them, the DDR controller may need to delay some transactions to prevent violation of the DDR protocol, resulting in an impact on the memory bandwidth.

[0003] To improve the read and write efficiency of DDR, the interface processing part of the DDR controller disassembles an AXI burst transaction into multiple transactions adapted to a single DDR burst and rearranges the order of these transactions according to different addresses. This causes the read data returned by the AXI burst read transaction to be out of order. Therefore, the interface processing part of the DDR controller needs to reorder the returned read data internally to ensure the correctness of the data returned by the DDR controller to the host. At the same time, the interface processing part also needs to meet the requirements of the AXI protocol for the transaction order, that is, the data and responses of read transactions issued with the same ID must be in order, and the data and responses of read transactions issued with different IDs may not be in order. In the case of supporting read interleaving, AXI burst transactions with different IDs can be disassembled into multiple DDR burst transactions and sent back to the host alternately, but AXI burst transactions with the same ID still need to be in order.

[0004] In existing DDR controllers, common command sorting methods mainly include sorting based on simple address order and sorting based on fixed priorities. Sorting based on simple address order processes transactions in ascending or descending order of the received instruction addresses. For example, in some early simple DDR controller designs, when the host sends multiple read transactions, the controller directly arranges these transactions in ascending order of the transaction addresses and sends requests and receives data from the DDR in that order. The advantage of this method is its simplicity, but the disadvantage is that it cannot fully utilize the bandwidth of the DDR and may delay the execution of some transactions due to waiting for the address order, especially when the order of instructions issued by the host is not the optimal DDR execution order.

[0005] Fixed-priority sorting presets priorities according to different master devices or transaction types. For example, transactions corresponding to certain critical system tasks are set to high priority, and when processing transactions, high-priority transactions are processed first. This method can ensure the timely response of critical tasks to a certain extent, but may cause low-priority transactions to wait for a long time, thus affecting the overall performance of the system and data consistency. In addition, in the face of complex scenarios with multiple master devices and multiple transaction types, the fixed-priority setting may not be able to flexibly adapt to various situations, easily resulting in resource waste and low efficiency.

[0006] However, none of the above command sorting methods can well solve the problem of meeting the AXI protocol's requirements for transaction order while improving DDR read and write efficiency. Especially when dealing with AXI burst transactions and read interleaving situations, existing methods often cannot effectively reorder data, resulting in limited storage bandwidth or errors when data is returned to the host. Summary of the Invention

[0007] (1) Technical problems to be solved

[0008] In view of the above-mentioned shortcomings of the prior art, the present invention provides a non-blocking AXI read data reordering system and method in a DDR controller, which can effectively overcome the defect of the prior art that it is impossible to ensure the correctness of data returned by the DDR controller to the host while improving DDR read efficiency.

[0009] (2) Technical solutions

[0010] To achieve the above object, the present invention is realized through the following technical solutions:

[0011] A non-blocking AXI read data reordering system in a DDR controller includes a transaction splitting unit SPLIT, a Token record table unit TokenTable, a Token generation unit Token Gen, a port filtering unit PortFilter, a Token recycling unit Token Recycle, a reordering buffer unit ReorderBuffer, and a first-in-first-out unit FIFO;

[0012] The transaction splitting unit SPLIT splits the AXI burst transfer read transaction command AXI Burst into multiple DDR burst transfer read transaction commands DDR Burst adapted to a single DDR burst transfer;

[0013] The Token record table unit Token Table uses the Token record table to record the order of the DDR burst transfer read transaction commands DDRBurst that have been sent, and matches the read data according to the Token carried by the returned read data;

[0014] The Token generation unit Token Gen generates corresponding Tokens according to the DDR burst read transaction command DDR Burst;

[0015] The port filtering unit PortFilter filters data of non-itself ports;

[0016] The Token recycling unit Token Recycle recycles the Tokens carried by the returned read data, and determines the reorder buffer unit ReorderBuffer for storing the read data and its specific location;

[0017] The reorder buffer unit ReorderBuffer is the reorder channel for the returned read data;

[0018] The first-in-first-out unit FIFO is the first-in-first-out channel for storing intermediate commands and data, enabling the system to achieve non-blocking operations.

[0019] Preferably, the Token record table includes a valid signal Valid, an AXI protocol ID number ID, an ID token count ID_token_count, and a token sequence valid signal Token_seq_valid;

[0020] The valid signal Valid is used to indicate whether the corresponding table entry is valid;

[0021] The AXI protocol ID number ID is used to distinguish tags of different hosts;

[0022] The ID token count ID_token_count records the order of AXI burst read transaction commands AXI Burst sent by hosts with the same AXI protocol ID number ID, so as to clarify the order between AXI burst read transaction commands AXI Burst sent by the same host;

[0023] The token sequence valid signal Token_seq_valid records whether the corresponding DDR burst read transaction command DDRBurst in the table entry has been sent to the DDR controller and whether read data has been returned;

[0024] Among them, for a DDR burst read transaction command DDRBurst, the default value of its token sequence valid signal Token_seq_valid is 0. When the DDR burst read transaction command DDR Burst is sent to the DDR controller, the token sequence valid signal Token_seq_valid is rewritten as 1; when read data is returned, the token sequence valid signal Token_seq_valid is rewritten back to 0;

[0025] When the values of all Token_seq_valid signals in an entry are 0 together, it indicates that the read data corresponding to this entry has been completely returned.

[0026] Preferably, the calculation formula for the number of Token_seq_valid signals included in the entry is:

[0027] (AXI max Width * AXI max Burst Length) / (DQ max Width * DDR max BurstLength);

[0028] Where AXI max Width is the maximum data bit width of the AXI protocol supported by the current DDR controller, AXI max BurstLength is the maximum length of the AXI burst transfer supported by the current DDR controller, DQ max Width is the total data bit width of the DDR die, and DDR max Burst Length is the maximum length of the DDR burst transfer supported by the current DDR die.

[0029] Preferably, the Tokens generated by the Token Generation Unit Token Gen according to the DDR burst transfer read transaction command DDR Burst include a Burst Token, an AXI protocol ID number ID, a host access controller port Port, an ID Token, and an end flag Last;

[0030] The Burst Token records the order in which an AXI burst transfer read transaction command AXI Burst is split into multiple DDR burst transfer read transaction commands DDR Burst, to ensure that the returned read data can be correctly reordered subsequently;

[0031] The AXI protocol ID number ID is used to distinguish tags of different hosts;

[0032] The host access controller port Port is the number of different input ports, and the system supports multiple hosts accessing simultaneously;

[0033] The ID Token records the order of AXI burst transfer read transaction commands AXI Burst sent by hosts with the same AXI protocol ID number ID, to clarify the order between AXI burst transfer read transaction commands AXI Burst sent by the same host;

[0034] The end flag "Last" is used to identify the last DDR burst read transaction command "DDR Burst". If this DDR burst read transaction command "DDR Burst" is the last one, the end flag "Last" is 1; otherwise, the end flag "Last" is 0.

[0035] Preferably, the bit width calculation formula of the burst token "BurstToken" is:

[0036] log2[(AXI max Width * AXI max Burst Length) / (DQ max Width * DDR max BurstLength)].

[0037] Preferably, after the Token recycle unit "TokenRecycle" recycles the Token carried in the returned read data and determines the reorder buffer unit "Reorder Buffer" where the read data is stored and its specific location, it sets the valid signal "Valid" in the corresponding entry to 0, that is, sets it to invalid.

[0038] The non-blocking AXI read data reordering method in the DDR controller includes the following steps:

[0039] S1. The transaction splitting unit "SPLIT" splits the AXI burst read transaction command "AXI Burst" into multiple DDR burst read transaction commands "DDR Burst" adapted to one DDR burst transmission;

[0040] S2. The transaction splitting unit "SPLIT" compares the AXI protocol ID number "ID" corresponding to the AXI burst read transaction command "AXI Burst" with all the entries in the Token record table where the valid signal "Valid" is 1. If there is an entry with the same AXI protocol ID number "ID", it finds the entry with the valid signal "Valid" being 0 and the lowest sequence number, writes the AXI protocol ID number "ID" into it, adds 1 to the maximum ID token count "ID_token_count" in the entries with the same AXI protocol ID number "ID" and writes it into this entry, and sets the valid signal "Valid" in this entry to 1; otherwise, it finds the entry with the valid signal "Valid" being 0 and the lowest sequence number, writes the AXI protocol ID number "ID" into it, sets the ID token count "ID_token_count" in this entry to 0, and sets the valid signal "Valid" to 1;

[0041] S3. The Token generation unit "Token Gen" assigns the ID token count "ID_token_count" in this entry to the ID token "ID Token", and carries the AXI protocol ID number "ID", the host access controller port "Port", and the end flag "Last";

[0042] When the transaction splitting unit SPLIT sends a DDR burst transfer read transaction command DDRBurst to the DDR controller each time, increment the burst token BurstToken by 1, and set the token sequence valid signal Token_seq_valid with the same sequence number and burst token Burst Token value in this entry to 1. When the sent DDR burst transfer read transaction command DDRBurst is the last one, set the end flag Last to 1, otherwise the end flag Last is 0;

[0043] S4. The transaction splitting unit SPLIT combines the DDR burst transfer read transaction command DDRBurst with the corresponding Token and stores them in the downstream first-in-first-out unit FIFO;

[0044] S5. After receiving the DDR burst transfer read transaction command DDRBurst and the corresponding Token, the downstream first-in-first-out unit FIFO waits to read when the DDR controller is idle;

[0045] S6. After obtaining the corresponding read data in the DDR controller for the DDR burst transfer read transaction command DDR Burst, bind the read data with the carried Token and return it;

[0046] S7. The port filtering unit PortFilter checks whether the host access controller port Port is the same as the receiving port number according to the Token carried in the returned read data. If they are the same, enter S8; otherwise, ignore the read data;

[0047] S8. The Token recycling unit Token Recycle compares the AXI protocol ID number ID in the Token carried in the returned read data with the AXI protocol ID number ID in this entry, and the ID token ID Token in the Token carried in the returned read data with the ID token count ID_token_count in this entry. If they are the same, enter S9; otherwise, discard the read data;

[0048] S9. The Token recycling unit TokenRecycle reads the burst token BurstToken in the Token carried in the returned read data, stores the read data and the end flag Last in the reorder buffer unit ReorderBuffer with the same sequence number as this entry and at the position with the same value as the burst token BurstToken, and sets the token sequence valid signal Token_seq_valid with the same sequence number and burst token BurstToken value to 0;

[0049] S10. The Token Recycle unit of the Token recovery unit ORs the values of all Token_seq_valid signals in the table entry. If the obtained value is 0, it indicates that the read data reordering is completed, and it enters S11; otherwise, it continues to wait and execute this step;

[0050] S11. The Token Recycle unit of the Token recovery unit determines whether the ID_token_count in the table entry is the largest among all table entries where the Valid signal is 1 and the AXI protocol ID numbers are the same. If so, it enters S12; otherwise, it continues to wait and execute this step;

[0051] S12. The FIFO unit of the First In First Out unit reads the read data in the ReorderBuffer unit of the reordering buffer unit and sends the read data to the AXI interface until the end flag Last is 1, indicating that the read data returned by the AXI burst transfer read transaction command AXIBurst has been read completely. After reading, the Token Recycle unit of the Token recovery unit sets the Valid signal in the table entry to 0, that is, sets it to invalid.

[0052] Specifically, in S1, the SPLIT unit of the transaction splitting unit splits the AXI burst transfer read transaction command AXI Burst into multiple DDR burst transfer read transaction commands DDR Burst adapted to a single DDR burst transfer, including:

[0053] After the AXI interface receives the AXI burst transfer read transaction command AXI Burst sent by the host, it stores the command in the upstream FIFO unit of the First In First Out unit;

[0054] The SPLIT unit of the transaction splitting unit determines whether the downstream FIFO unit of the First In First Out unit is not full. If it is not full, it reads the AXI burst transfer read transaction command AXI Burst stored in the upstream FIFO unit of the First In First Out unit, splits the command into multiple DDR burst transfer read transaction commands DDR Burst adapted to a single DDR burst transfer, and enters S2; otherwise, it continues to wait for the downstream FIFO unit of the First In First Out unit to send a non-full signal.

[0055] (III) Beneficial effects

[0056] Compared with the prior art, in the non-blocking AXI read data reordering system and method provided by the present invention in the DDR controller, the controller allows the host to issue multiple requests before receiving a request response. After the controller receives a request, while splitting the AXI burst transfer read transaction command into multiple DDR burst transfer read transaction commands adapted to one DDR burst transfer, the controller interface processing part generates a Token and makes the corresponding DDR burst transfer read transaction command carry the Token. The command carrying the Token can be scrambled according to the needs of the DDR die to improve the DDR reading efficiency. The command carrying the Token enters the controller, and while obtaining the corresponding read data, binds the read data to the Token and returns it. The controller reorders the read data returned by the out-of-order commands by identifying the Token. The present invention supports out-of-order and read-interleaved reordering, and can improve the DDR reading efficiency while ensuring the correctness of the data returned by the DDR controller to the host. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention, and those of ordinary skill in the art can obtain other drawings according to these drawings without creative efforts.

[0058] Figure 1 It is a schematic diagram of the system of the present invention;

[0059] Figure 2 It is a schematic diagram of the composition of the Token generated by the Token Gen of the Token generation unit in the present invention;

[0060] Figure 3 It is a schematic diagram of the composition of the Token record table in the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0061] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.

[0062] The non-blocking AXI read data reordering system in the DDR controller, as Figure 1As shown in the figure, it includes a transaction splitting unit SPLIT, a Token record table unit TokenTable, a Token generation unit Token Gen, a port filtering unit PortFilter, a Token recycling unit Token Recycle, a reordering buffer unit ReorderBuffer, and a first-in-first-out unit FIFO;

[0063] The transaction splitting unit SPLIT splits the AXI burst read transaction command AXI Burst into multiple DDR burst read transaction commands DDR Burst adapted to a single DDR burst transmission;

[0064] The Token record table unit Token Table uses the Token record table to record the order of the DDR burst read transaction commands DDRBurst that have been sent, and matches the read data according to the Token carried by the returned read data;

[0065] The Token generation unit Token Gen generates the corresponding Token according to the DDR burst read transaction command DDR Burst;

[0066] The port filtering unit PortFilter filters the data of non-itself ports;

[0067] The Token recycling unit Token Recycle recycles the Token carried by the returned read data, and determines the reordering buffer unit ReorderBuffer where the read data is stored and the specific location;

[0068] The reordering buffer unit ReorderBuffer is the reordering channel for the returned read data;

[0069] The first-in-first-out unit FIFO is the first-in-first-out channel for storing intermediate commands and data, enabling the system to achieve non-blocking operations.

[0070] ① As Figure 3 shown (taking the maximum outstanding number as 16 as an example, one table entry corresponds to one AXI burst read transaction command AXI Burst, so there are 16 table entries), the Token record table includes a valid signal Valid, an AXI protocol ID number ID, an ID token count ID_token_count, and a token sequence valid signal Token_seq_valid;

[0071] The valid signal Valid is used to indicate whether the corresponding table entry is valid;

[0072] The AXI protocol ID number ID is used to distinguish the labels of different hosts;

[0073] The ID token count, ID_token_count, records the order of AXI burst read transaction commands AXI Burst sent by the host with the same AXI protocol ID number ID, so as to clarify the order between AXI burst read transaction commands AXI Burst sent by the same host;

[0074] The token sequence valid signal, Token_seq_valid, indicates whether the corresponding DDR burst read transaction command DDRBurst in the entry has been sent to the DDR controller and whether the read data has been returned;

[0075] Among them, for a DDR burst read transaction command DDRBurst, the default value of its token sequence valid signal Token_seq_valid is 0. When the DDR burst read transaction command DDR Burst is sent to the DDR controller, the token sequence valid signal Token_seq_valid is rewritten as 1; when the read data is returned, the token sequence valid signal Token_seq_valid is rewritten back to 0;

[0076] When the values of all token sequence valid signals Token_seq_valid in an entry are ORed together to be 0, it indicates that the read data corresponding to this entry has been completely returned.

[0077] Specifically, the calculation formula for the number of token sequence valid signals Token_seq_valid included in the entry is:

[0078] (AXI max Width * AXI max Burst Length) / (DQ max Width * DDR max BurstLength);

[0079] Among them, AXI max Width is the maximum data bit width of the AXI protocol supported by the current DDR controller, AXI maxBurstLength is the maximum length of the AXI burst transmission supported by the current DDR controller, DQ maxWidth is the total data bit width of the DDR die, and DDRmax Burst Length is the maximum length of the DDR burst transmission supported by the current DDR die.

[0080] ② Such as Figure 2Shown (taking the AXI burst length of 16, the AXI protocol data width of 256, the DDR burst length of 8, and the DDR die data width of 32 as an example: The number of DDR burst read transaction commands DDRBurst after splitting an AXI burst read transaction command AXI Burst is calculated in the same way as the number of tokens with the Token_seq_valid signal in a table entry, that is, split into (256 * 16) / (32 * 8) = 16 DDRBursts), the Token generation unit Token Gen generates tokens according to the DDR burst read transaction command DDRBurst, including the burst token BurstToken, the AXI protocol ID number ID, the host access controller port Port, the ID token ID Token, and the end flag Last;

[0081] The burst token Burst Token records the order in which an AXI burst read transaction command AXI Burst is split into multiple DDR burst read transaction commands DDRBurst (where the orders corresponding to the 1st to 16th DDR burst read transaction commands DDR Burst after splitting are 0 to 15, as Figure 2 shown), to ensure that the returned read data can be correctly reordered later;

[0082] The AXI protocol ID number ID is used to distinguish tags of different hosts;

[0083] The host access controller port Port is the number of different input ports, and the system supports multiple hosts to access simultaneously;

[0084] The ID token ID Token records the order of AXI burst read transaction commands AXI Burst sent by hosts with the same AXI protocol ID number ID, to clarify the order between AXI burst read transaction commands AXI Burst sent by the same host;

[0085] The end flag Last is used to identify the last DDR burst read transaction command DDR Burst. If this DDR burst read transaction command DDRBurst is the last one, the end flag Last is 1, otherwise the end flag Last is 0.

[0086] Specifically, the bit width calculation formula for the burst token BurstToken is:

[0087] log2[(AXI max Width * AXI max Burst Length) / (DQ max Width * DDR maxBurstLength)]

[0088] ③ The Token Recycle unit in the Token recovery unit recovers the Token carried in the returned read data, and after determining the reorder buffer unit ReorderBuffer where the read data is stored and its specific location, sets the valid signal Valid in the corresponding entry to 0, that is, sets it to invalid.

[0089] In the technical solution of this application, based on the non-blocking AXI read data reordering system of the above-mentioned disclosed DDR controller, a non-blocking AXI read data reordering method in the DDR controller is also disclosed. As Figure 1 shown, it includes the following steps:

[0090] S1. The transaction splitting unit SPLIT splits the AXI burst transfer read transaction command AXI Burst into multiple DDR burst transfer read transaction commands DDRBurst adapted to one DDR burst transfer;

[0091] S2. The transaction splitting unit SPLIT compares the AXI protocol ID number ID corresponding to the AXI burst transfer read transaction command AXI Burst with all entries in the Token record table where the valid signal Valid is 1. If there is an entry with the same AXI protocol ID number ID, find the entry with the lowest sequence number and valid signal Valid of 0 and write the AXI protocol ID number ID into it, add 1 to the maximum ID token count ID_token_count in the entries with the same AXI protocol ID number ID and write it into this entry, and set the valid signal Valid in this entry to 1; otherwise, find the entry with the lowest sequence number and valid signal Valid of 0 and write the AXI protocol ID number ID into it, set the ID token count ID_token_count in this entry to 0, and set the valid signal Valid to 1;

[0092] S3. The Token generation unit Token Gen assigns the ID token count ID_token_count in this entry to the ID token ID Token, and carries the AXI protocol ID number ID, the host access controller port Port, and the end flag Last;

[0093] When the transaction splitting unit SPLIT sends a DDR burst transfer read transaction command DDRBurst to the DDR controller each time, increment the burst token BurstToken by 1, and set the token sequence valid signal Token_seq_valid with the same sequence number and burst token Burst Token value in this table entry to 1. When the sent DDR burst transfer read transaction command DDRBurst is the last one, set the end flag Last to 1; otherwise, the end flag Last is 0;

[0094] S4. The transaction splitting unit SPLIT combines the DDR burst transfer read transaction command DDRBurst with the corresponding Token and stores them in the downstream first-in-first-out unit FIFO;

[0095] S5. After receiving the DDR burst transfer read transaction command DDRBurst and the corresponding Token, the downstream first-in-first-out unit FIFO waits to read when the DDR controller is idle;

[0096] S6. After obtaining the corresponding read data in the DDR controller for the DDR burst transfer read transaction command DDR Burst, bind the read data with the carried Token and return it;

[0097] S7. The port filtering unit PortFilter checks whether the host access controller port Port is the same as the receiving port number according to the Token carried in the returned read data. If they are the same, go to S8; otherwise, ignore the read data;

[0098] S8. The Token recycling unit Token Recycle compares the AXI protocol ID number ID in the Token carried in the returned read data with the AXI protocol ID number ID in this table entry, and compares the ID token ID Token in the Token carried in the returned read data with the ID token count ID_token_count in this table entry. If they are the same, go to S9; otherwise, discard the read data;

[0099] S9. The Token recycling unit TokenRecycle reads the burst token BurstToken in the Token carried in the returned read data, stores the read data and the end flag Last in the reorder buffer unit ReorderBuffer with the same sequence number as this table entry and at the position with the same value as the burst token BurstToken, and sets the token sequence valid signal Token_seq_valid with the same sequence number and burst token BurstToken value to 0;

[0100] S10. The Token Recycle unit of the Token recovery unit ORs together the values of all Token_seq_valid signals of the token in this entry. If the obtained value is 0, it indicates that the read data reordering is completed, and it enters S11; otherwise, it continues to wait and execute this step;

[0101] S11. The Token Recycle unit of the Token recovery unit determines whether the ID_token_count in this entry is the largest among all entries with the Valid signal being 1 and the AXI protocol ID number being the same. If so, it enters S12; otherwise, it continues to wait and execute this step;

[0102] S12. The FIFO unit of the First-In-First-Out reads the read data in the ReorderBuffer unit of the reorder buffer and sends the read data to the AXI interface until the end flag Last is 1, indicating that the read data returned by the AXI burst transfer read transaction command AXI Burst this time has been read completely. After reading is completed, the Token Recycle unit of the Token recovery unit sets the Valid signal in this entry to 0, that is, sets it to invalid.

[0103] Specifically, in S1, the SPLIT unit of the transaction splitting unit splits the AXI burst transfer read transaction command AXI Burst into multiple DDR burst transfer read transaction commands DDRBurst adapted to a single DDR burst transfer, including:

[0104] When the AXI interface receives the AXI burst transfer read transaction command AXI Burst sent by the host, it stores the command in the upstream FIFO unit of the First-In-First-Out;

[0105] The SPLIT unit of the transaction splitting unit determines whether the downstream FIFO unit of the First-In-First-Out is not full. If it is not full, it reads the AXI burst transfer read transaction command AXI Burst stored in the upstream FIFO unit of the First-In-First-Out, splits the command into multiple DDR burst transfer read transaction commands DDRBurst adapted to a single DDR burst transfer, and enters S2; otherwise, it continues to wait for the downstream FIFO unit of the First-In-First-Out to send a not-full signal.

[0106] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements will not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A non-blocking AXI read data reordering system in a DDR controller, characterized by: It includes a transaction splitting unit SPLIT, a Token record table unit TokenTable, a Token generation unit Token Gen, a port filtering unit PortFilter, a Token recycling unit Token Recycle, a reordering buffer unit ReorderBuffer and a first-in-first-out unit FIFO; A transaction splitting unit SPLIT splits an AXI burst transfer read transaction command AXI Burst into a plurality of DDR burst transfer read transaction commands DDR Burst adapted for one DDR burst transfer; The Token record table unit Token Table uses the Token record table to record the order of the DDR burst transmission read transaction command DDRBurst that has been sent, and matches the read data according to the Token carried by the returned read data; The Token generation unit Token Gen generates a corresponding Token according to the DDR burst transmission read transaction command DDR Burst; Port filter unit PortFilter, filters the data of non-self-port; The Token Recycle unit recycles the Token carried by the returned read data and determines the reorder buffer unit ReorderBuffer where the read data is stored and its specific location; The reorder buffer unit ReorderBuffer is a reorder channel for the returned read data; The first-in-first-out unit FIFO is a first-in-first-out channel for storing intermediate commands and data, enabling the system to achieve non-blocking operation.

2. The non-blocking AXI read data reordering system in a DDR controller according to claim 1, characterized in that: The Token record table includes a valid signal Valid, an AXI protocol ID number ID, an ID token count ID_token_count and a token sequence valid signal Token_seq_valid; A valid signal Valid is used to indicate whether the corresponding table entry is valid; AXI protocol ID number, used to distinguish labels of different hosts; ID token count ID_token_count records the order of AXI burst transfer read transaction commands AXI Burst sent by the host with the same AXI protocol ID number, so as to clarify the order between AXI burst transfer read transaction commands AXI Burst sent by the same host; The token sequence valid signal Token_seq_valid records whether the corresponding DDR burst transmission read transaction command DDRBurst in the table entry is sent to the DDR controller and whether the read data is returned; Among them, for a DDR burst transmission read transaction command DDRBurst, the default value of its token sequence valid signal Token_seq_valid is 0. When the DDR burst transmission read transaction command DDR Burst is sent to the DDR controller, the token sequence valid signal Token_seq_valid is rewritten to 1; when the read data is returned, the token sequence valid signal Token_seq_valid is rewritten back to 0; When the values ​​of all token sequence valid signals Token_seq_valid in a table entry are all 0, it indicates that the read data corresponding to the table entry has been returned.

3. The non-blocking AXI read data reordering system in a DDR controller according to claim 2, characterized in that: The calculation formula for the number of token sequence valid signals Token_seq_valid contained in the table entry is: (AXI max Width*AXI max Burst Length) / (DQ max Width*DDR max Burst Length); Among them, AXI max Width is the maximum data bit width of the AXI protocol supported by the current DDR controller, AXI maxBurstLength is the maximum length of the AXI burst transmission supported by the current DDR controller, DQ maxWidth is the total data bit width of the DDR particle, and DDRmax Burst Length is the maximum length of the DDR burst transmission supported by the current DDR particle.

4. The non-blocking AXI read data reordering system in a DDR controller according to claim 2, characterized in that: The Token generated by the Token generation unit Token Gen according to the DDR burst transfer read transaction command DDRBurst includes a burst token BurstToken, an AXI protocol ID number ID, a host access controller port Port, an ID token ID Token and an end identifier Last; Burst Token, which records the order in which an AXI burst read transaction command AXI Burst is split into multiple DDR burst read transaction commands DDR Burst, to ensure that the returned read data can be correctly reordered later; AXI protocol ID number, used to distinguish labels of different hosts; Host access controller port Port is the number of different input ports. The system supports multiple hosts accessing at the same time. ID Token records the order of AXI burst read transaction commands AXIBurst sent by the host with the same AXI protocol ID number, so as to clarify the order between AXI burst read transaction commands AXI Burst sent by the same host; The end marker Last is used to identify the last DDR burst transfer read transaction command DDR Burst. If the DDR burst transfer read transaction command DDRBurst is the last one, the end marker Last is 1, otherwise the end marker Last is 0.

5. The non-blocking AXI read data reordering system in a DDR controller according to claim 4, characterized in that: The bit width calculation formula of the burst token BurstToken is: log2[(AXI max Width*AXI max Burst Length) / (DQ max Width*DDR maxBurstLength)].

6. The non-blocking AXI read data reordering system in a DDR controller according to claim 4, characterized in that: The Token Recycle unit recycles the Token carried by the returned read data, and after determining the reorder buffer unit ReorderBuffer storing the read data and the specific location, sets the valid signal Valid in the corresponding table entry to 0, that is, sets it to invalid.

7. A non-blocking AXI read data reordering method in a DDR controller, applied to the non-blocking AXI read data reordering system in a DDR controller according to claim 6, characterized in that: The following steps are involved: S1, the transaction splitting unit SPLIT splits the AXI burst transfer read transaction command AXI Burst into multiple DDR burst transfer read transaction commands DDRBurst adapted for one DDR burst transfer; S2. The transaction splitting unit SPLIT compares the AXI protocol ID number ID corresponding to the AXI burst transmission read transaction command AXI Burst with all the entries in the Token record table whose valid signal Valid is 1. If there is an entry with the same AXI protocol ID number ID, find the entry with the valid signal Valid being 0 and the lowest sequence number and write it into the AXI protocol ID number ID, add 1 to the largest ID token count ID_token_count in the entry with the same AXI protocol ID number ID and write it into the entry, and set the valid signal Valid in the entry to 1; otherwise, find the entry with the valid signal Valid being 0 and the lowest sequence number and write it into the AXI protocol ID number ID, set the ID token count ID_token_count in the entry to 0, and set the valid signal Valid to 1; S3, the Token generation unit Token Gen assigns the ID token count ID_token_count in the table entry to the ID token ID Token, and carries the AXI protocol ID number ID, the host access controller port Port and the end identifier Last; When the transaction split unit SPLIT sends a DDR burst transfer read transaction command DDR Burst to the DDR controller, the burst token BurstToken is increased by 1, and the token sequence valid signal Token_seq_valid with the same sequence number as the value of the burst token Burst Token in the table entry is set to 1. When the sent DDR burst transfer read transaction command DDRBurst is the last one, the end flag Last is set to 1, otherwise the end flag Last is 0; S4, the transaction splitting unit SPLIT combines the DDR burst transfer read transaction command DDRBurst with the corresponding Token, and stores them in the downstream first-in-first-out unit FIFO; S5, after the downstream FIFO receives the DDR burst read transaction command DDRBurst and the corresponding Token, it waits for the DDR controller to be idle for reading; S6, DDR burst transmission read transaction command DDR Burst obtains the corresponding read data in the DDR controller, binds the read data with the carried Token and returns it; S7, the port filter unit PortFilter checks whether the host access controller port Port is consistent with the receiving port number according to the Token carried by the returned read data, and if they are consistent, enters S8; otherwise, ignores the read data; S8, the Token Recycle unit Token Recycle compares the AXI protocol ID number ID in the Token carried by the returned read data with the AXI protocol ID number ID in the table entry, and the ID token ID Token in the Token carried by the returned read data with the ID token count ID_token_count in the table entry. If they are consistent, the process goes to S9; otherwise, the read data is discarded; S9, the Token recycling unit TokenRecycle reads the burst token BurstToken in the Token carried by the returned read data, stores the read data and the end marker Last in the Token into the reorder buffer unit ReorderBuffer with the same sequence number as the entry and the same position as the value of the burst token BurstToken, and sets the token sequence valid signal Token_seq_valid with the same sequence number as the value of the burst token BurstToken to 0; S10, the Token Recycle unit ORs the values ​​of all token sequence valid signals Token_seq_valid in the table entry together. If the obtained value is 0, it indicates that the read data reordering is completed, and enters S11; otherwise, continue to wait and execute this step; S11, the Token Recycle unit determines whether the ID token count ID_token_count in the table entry is the largest among all the table entries with the valid signal Valid being 1 and the same AXI protocol ID number ID. If so, enter S12; otherwise, continue to wait and execute this step; S12. The first-in-first-out unit FIFO reads the read data in the reorder buffer unit ReorderBuffer, and sends the read data to the AXI interface until the end marker Last is 1, indicating that the read data returned by the AXI Burst read transaction command AXI Burst has been read. After the reading is completed, the Token recycling unit Token Recycle sets the valid signal Valid in the table entry to 0, that is, sets it to invalid.

8. The non-blocking AXI read data reordering method in a DDR controller according to claim 7, characterized in that: The transaction splitting unit SPLIT in S1 splits the AXI burst transfer read transaction command AXI Burst into multiple DDR burst transfer read transaction commands DDRBurst adapted for one DDR burst transfer, including: When the AXI interface receives the AXI burst transfer read transaction command AXI Burst sent by the host, it stores the command in the upstream first-in-first-out unit FIFO; The transaction splitting unit SPLIT determines whether the downstream first-in-first-out unit FIFO is not full. If it is not full, it reads the AXI burst transfer read transaction command AXI Burst stored in the upstream first-in-first-out unit FIFO, splits the command into multiple DDR burst transfer read transaction commands DDRBurst adapted for one DDR burst transfer, and enters S2; otherwise, it continues to wait for the downstream first-in-first-out unit FIFO to send a non-full signal.

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