Surface mount package with internal redundant electrical connections

Abstract

A surface mount package with internal redundant electrical connections is disclosed herein. A molded surface mount package includes: a power semiconductor die attached to a metal pad having a first side facing the pad and a second (opposite) side facing away from the pad, the metal pad forming a first power terminal exposed at a surface mount side of the package; a second power terminal, a first sensing terminal, and a gate terminal each exposed at the surface mounting side and spaced apart from the first power terminal; a first electrical connection between the second power terminal and the first power pad at the second side of the die; a second electrical connection between the gate terminal and a gate pad at a second side of the die; a third electrical connection between the first sensing terminal and the first sensing pad at the second side of the die; and a first redundant electrical connector for the second electrical connector or the third electrical connector.

Description

BACKGROUND OF THE INVENTION

[0001] Power semiconductors are increasingly being used in mission-critical applications such as medical devices (e.g., defibrillators) with necessary performance, space applications, railway electric traction, and automobiles. For these and other mission-critical applications, power semiconductor devices need to operate safely and reliably throughout their specified lifetimes. Molded power semiconductor packages typically are designed with only a single internal connection for a sensing function (e.g., Kelvin, temperature, or current) and a single internal connection for a control (gate) function. Failure of a single internal sensing connection or a single internal gate connection can result in overall device failure or inoperability.

[0002] Accordingly, for mission-critical applications where device failure can be catastrophic, an improved molded power semiconductor package design is needed. SUMMARY OF THE INVENTION

[0003] According to an embodiment of a surface mount package, the surface mount package includes: a power semiconductor die attached to a metal pad such that a first side of the power semiconductor die faces the metal pad and a second side opposite the first side faces away from the metal pad, the metal pad forming a first power terminal exposed at a surface mount side of the surface mount package; a second power terminal, a first sensing terminal, and a gate terminal, each exposed at the surface mount side and spaced apart from the first power terminal; a first electrical connection located between the second power terminal and a first power pad at the second side of the power semiconductor die; a second electrical connection located between the gate terminal and a gate pad at the second side of the power semiconductor die; a third electrical connection located between the first sensing terminal and a first sensing pad at the second side of the power semiconductor die; a first redundant electrical connection for the second electrical connection or the third electrical connection; and a molding compound encapsulating each of the power semiconductor die, the first electrical connection, the second electrical connection, the third electrical connection, and the first redundant electrical connection.

[0004] According to an embodiment of a surface-mounted system-in-package, the surface-mounted system-in-package includes: a power semiconductor die attached to a metal pad such that a first side of the power semiconductor die faces the metal pad and a second side opposite the first side faces away from the metal pad, the metal pad forming a first power terminal exposed at a surface-mount side of the surface-mounted system-in-package; an additional semiconductor die attached to the same or a different metal pad as the power semiconductor die, the additional semiconductor die including a driver device configured to provide a drive input to a gate of a power transistor included in the power semiconductor die; a second power terminal, a first sense terminal, and a gate terminal, each exposed at the surface-mount side and spaced apart from the first power terminal; a first electrical connection located between the second power terminal and a first power pad at the second side of the power semiconductor die; a second electrical connection located between the gate terminal and a driver input pad of the additional semiconductor die; a third electrical connection located between the first sense terminal and a first sense pad at the second side of the power semiconductor die; a first redundant electrical connection for the second electrical connection or the third electrical connection; and a molding compound encapsulating each of the power semiconductor die, the additional semiconductor die, the first electrical connection, the second electrical connection, the third electrical connection, and the first redundant electrical connection.

[0005] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description and viewing the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The elements in the drawings are not necessarily to scale relative to each other. Like reference numerals refer to corresponding like parts. Unless the features of the various illustrated embodiments are mutually exclusive, they may be combined. Embodiments are depicted in the drawings and described in detail in the following description.

[0007] Figure 1A A top perspective view of a molded surface-mount package is shown, Figure 1B A bottom perspective view of the molded surface-mount package is shown, and Figure 1C A top plan view of the molded surface-mount package viewed through the molding compound is shown.

[0008] Figure 2 A top plan view of the molded surface-mount package viewed through the molding compound according to another embodiment is shown.

[0009] Figure 3 A top plan view of the molded surface-mount package viewed through the molding compound according to another embodiment is shown.

[0010] Figure 4 A top plan view of a molded surface mount package as viewed through a molding compound according to another embodiment is shown.

[0011] Figure 5 A top plan view of a molded surface mount package as viewed through a molding compound according to another embodiment is shown.

[0012] Figure 6 A top plan view of a molded surface mount package as viewed through a molding compound according to another embodiment is shown.

[0013] Figure 7 A top plan view of a molded surface mount package as viewed through a molding compound according to another embodiment is shown.

[0014] Figure 8 A top plan view of a molded surface mount package as viewed through a molding compound according to another embodiment is shown.

[0015] Figures 9 to 11 A corresponding lead frame design is shown that is suitable for Figure 8 the different redundant internal sensing electrical connectors and / or gate electrical connectors of the lateral device embodiment shown in

[0016] Figure 12 A top plan view of a molded surface mount system-in-package (SiP) as viewed through the molding compound of the SiP is shown. DETAILED DESCRIPTION

[0017] The embodiments described herein provide a design for a molded power semiconductor package that includes a molded surface mount system-in-package having built-in internal redundancy for sensing and / or control (gate) functions. Certain molded packages can support more than one type of sensing function. For example, the package can implement current sensing, temperature sensing, and / or Kelvin sensing functions. Redundant electrical connectors encapsulated by the molding compound of the package can be provided for each sensing function supported by the package or for a subset of the supported sensing functions. Separate from and / or supplementary to any redundant sensing connectors, redundant electrical connectors encapsulated by the molding compound of the package can be provided for the gate (control) function.

[0018] At least with respect to redundant features, each molded package described herein includes redundant electrical connectors for sense electrical connectors or gate (control) electrical connectors to be encapsulated by the package molding compound. The package may include redundant electrical connectors for sense and gate (control) electrical connectors to be encapsulated by the package molding compound. Additionally, the molded packages described herein are surface mount devices (SMDs), such that the molded package is a leadless or short lead surface mount component designed to be mounted to the surface of a printed circuit board (PCB) or other type of substrate, as opposed to through-hole technology, in which the leads on the component are inserted through holes drilled in the PCB and soldered to pads located on the opposite side of the board.

[0019] Next, exemplary embodiments of a molded power semiconductor package are described with reference to the drawings, the molded power semiconductor package including a molded surface mount system-in-package having internal redundancy for sense and / or control (gate) connectors to be encapsulated by the package molding compound.

[0020] Figure 1A A top perspective view of a molded surface mount package 100 is shown, and Figure 1B a bottom perspective view of the package 100 is shown. The molded surface mount package 100 includes a molding compound 102 and a power semiconductor die (chip) 104 encapsulated by the molding compound 102. The molding compound 102 is typically a plastic encapsulant formed from an organic resin (such as an epoxy resin). The plastic encapsulant may include fillers, such as non-melting inorganic materials. Catalysts may be used to accelerate the curing reaction of the organic resin. Other materials (such as flame retardants, adhesion promoters, ion trappers, stress relievers, colorants, etc.) may be added to the plastic encapsulant as appropriate.

[0021] The power semiconductor die 104 encapsulated by the molding compound 102 forms part of a power electronic circuit (such as a DC / AC inverter, DC / DC converter, AC / DC converter, DC / AC converter, AC / AC converter, multiphase inverter, H-bridge, etc.). The power semiconductor die 104 may be a power transistor die, power diode die, half-bridge die, etc., or a die that combines logic devices and power devices on the same semiconductor substrate. In one embodiment, the power semiconductor die 104 is a power transistor die, such as a power Si MOSFET (metal oxide semiconductor field effect transistor) die, IGBT (insulated gate bipolar transistor) die, SiC MOSFET die, GaN HEMT (high electron mobility transistor) die, JFET (junction field effect transistor) die, etc.

[0022] In Figure 1A and Figure 1BIn the view, the power semiconductor die 104 is obscured by the molding compound 102 and is thus shown in Figure 1A and Figure 1B using a dashed rectangle. More than one power semiconductor die 104 may be included in the molded surface-mount package 100. The molded package 100 may be a leadless or leaded package. A leaded SMD (surface-mount device) package has small (lead) legs that protrude from the side of the package and bend downward for surface mounting to a PCB or other type of substrate. As Figure 1A and Figure 1B illustrated, the surface-mount contact points of the leadless SMD package are provided at the surface-mount side of the package.

[0023] For both the leaded SMD or leadless SMD cases, the surface-mount side 106 of the molded package 100 (which is visible in Figure 1B ) is designed to be mounted to the surface of a PCB or other type of substrate. Thus, the molded package 100 does not employ via technology. Figure 1C A top plan view of the molded surface-mount package 100 is shown looking through the molding compound 102 to provide an unobstructed view of the interior of the package. Accordingly, Figure 1C a dashed rectangle is used to represent the molding compound 102 in

[0024] The power semiconductor die 104 is attached to the metal pad 108 such that a first side (e.g., the back side) of the power semiconductor die 104 faces the metal pad 108 and a second side (e.g., the front side) opposite the first side faces away from the metal pad 108. The power semiconductor die 104 may be attached to the metal pad 108 by gluing, soldering, diffusion welding, brazing, etc. The metal pad 108 forms a first power terminal 110 that is exposed from the molding compound 102 at the surface-mount side 106 of the molded package 100.

[0025] A second power terminal 112, a first sense (S) terminal 114, and a gate (G) terminal 116 are each exposed from the molding compound 102 at the surface-mount side 106 of the molded package 100 and are spaced apart from the first power terminal 110. In one embodiment, the metal pad 108 is a die pad of a lead frame and the second power terminal 112, the first sense terminal 114, and the gate terminal 116 are different individual leads of the lead frame. The lead frame may be formed by machining a metal sheet, e.g., by punching, embossing, stamping, etching, cutting, etc. to define the metal pad 108, the second power terminal 112, the first sense terminal 114, and the gate terminal 116.

[0026] As Figure 1CAs shown, a first internal electrical connector 118 is disposed between a second power terminal 112 of the molded surface mount package 100 and a first power pad 120 at a second side of the power semiconductor die 104. A second internal electrical connector 122 is disposed between a gate terminal 116 of the molded surface mount package 100 and a gate pad 124 at a second side of the power semiconductor die 104. A third internal electrical connector 126 is disposed between a first sense terminal 114 of the molded surface mount package 100 and a first sense pad 128 at a second side of the power semiconductor die 104. The first sense die pad 128 can be a current sense pad, a temperature sense pad, or a Kelvin sense pad.

[0027] In Figures 1A to 1C a redundant internal electrical connector 130 is provided for the second (gate) internal electrical connector 122. The redundant internal gate electrical connector 130 is located between a redundant gate terminal 132 exposed at the surface mount side 106 of the molded package 100 and a redundant gate pad 134 at a second side of the power semiconductor die 104. The redundant gate die pad 134 and the main gate die pad 116 are electrically connected to the same gate electrode of a power transistor included in the power semiconductor die 104. If the internal electrical connector 122 between the package gate terminal 116 and the gate die pad 124 fails for any reason, the redundant internal gate electrical connector 130 ensures the continued operation of the power transistor included in the power semiconductor die 104.

[0028] Also in Figures 1A to 1C the internal electrical connectors 118, 122, 126, 130 are shown as being implemented using bonding wires. However, alternatively, one or more of the internal electrical connectors 118, 122, 126, 130 can be implemented using metal strips, metal clamps, etc. The internal electrical connectors 118, 122, 126, 130 can be made of any type of metal or metal alloy (such as Al, Cu, Au, Ag, etc.) suitable for implementing internal package connections. In each case, the molding compound 102 encapsulates each of the power semiconductor die 104, the first internal electrical connector 118, the second internal electrical connector 122, the third internal electrical connector 126, and the redundant internal electrical connector 130.

[0029] The power semiconductor die 104 can be a vertical device or a lateral device. For a lateral device, all electrical contact pads are located at a second side of the power semiconductor die 104, and the main current path is along this side of the die 104. For a vertical device, the load pads are located at opposite sides of the power semiconductor die 104, and the main current path is between these sides of the die 104.

[0030] In Figures 1A to 1CAmong them, the power semiconductor die 104 is a vertical power semiconductor die. According to this embodiment, the metal pad 108 is attached and electrically connected to the second power pad at the first side of the power semiconductor die 104. The power pad located at the first side of the power semiconductor die 104 is not visible in Figures 1A to 1C , but by way of example, it can be a drain pad in the case of a vertical power MOSFET, or a collector pad in the case of an IGBT. In the case of a vertical power MOSFET, the first power pad 120 located at the second side of the power semiconductor die 104 can be a source pad. In the case of a vertical IGBT, the first power pad 120 located at the second side of the power semiconductor die 104 can be an emitter pad. Subsequently, a lateral power semiconductor die embodiment is described.

[0031] Figure 2 A top plan view of the molded surface-mount package 100 as viewed through the molding compound 102 according to another embodiment is shown. In Figure 2 , a redundant internal electrical connection 200 is provided between a redundant sense terminal 202 exposed at the surface-mount side 106 of the molded package 100 and a redundant sense pad 204 at the second side of the power semiconductor die 104. The redundant sense pad 204 and the first sense die pad 128 are electrically connected to the same sense circuitry or sense structure integrated in the power semiconductor die 104. The molding compound 102 encapsulates the redundant internal sense electrical connection 200. If the internal electrical connection 126 between the first package sense terminal 114 and the first die sense pad 128 fails for any reason, the redundant internal sense connection 200 ensures continued access to the sense signal.

[0032] Figure 3 A top plan view of the molded surface-mount package 100 as viewed through the molding compound 102 according to another embodiment is shown. Figure 3 The embodiment in combines the redundant gate connection feature of the embodiment shown in Figures 1A to 1C with the redundant sense connection feature of the embodiment shown in Figure 2 . In Figure 3 , a first redundant internal electrical connection 130 is located between a redundant gate terminal 132 exposed at the surface-mount side 106 of the molded package and a redundant gate pad 134 at the second side of the power semiconductor die 104. A second redundant internal electrical connection 200 is located between a redundant sense terminal 202 exposed at the surface-mount side 106 of the molded package 100 and a redundant sense pad 204 at the second side of the power semiconductor die 104. According to this embodiment, the molded surface-mount package 100 includes internal redundancy for both the gate connection and the sense connection to the power semiconductor die 104.

[0033] Figure 4 FIG. 2 shows a top plan view of a molded surface mount package 100 as viewed through a molded compound 102 according to another embodiment. In Figure 4 , a first sense pad 128 located at a second side of the power semiconductor die 104 is a Kelvin sense pad, and a first sense terminal 114 exposed at a surface mount side 106 of the molded package 100 is a Kelvin sense (SK) terminal. According to this embodiment, a redundant internal electrical connection 300 is provided between a redundant Kelvin sense terminal 302 exposed at the surface mount side 106 of the molded package 100 and a redundant Kelvin sense pad 304 at the second side of the power semiconductor die 104. The redundant Kelvin sense pad 304 and the main Kelvin sense die pad 128 are electrically connected to the same Kelvin sense structure integrated in the power semiconductor die 104. The molded compound 102 encapsulates the redundant internal Kelvin sense connection 300.

[0034] In Figure 4 , the molded surface mount package 100 further includes a temperature sense (ST) terminal 306 exposed at the surface mount side 106 of the molded package 100, and an internal electrical connection 308 between the temperature sense terminal 306 and a temperature sense pad 310 at the second side of the power semiconductor die 104. A redundant internal electrical connection 312 is provided for the internal temperature sense electrical connection 308 in case of a failure of the internal temperature sense electrical connection 308. The molded compound 102 encapsulates the internal temperature sense electrical connection 308 and the redundant internal temperature sense electrical connection 312.

[0035] In Figure 4 , the redundant internal temperature sense electrical connection 312 is provided between a redundant temperature sense terminal 314 exposed at the surface mount side 106 of the molded package 100 and a redundant temperature sense pad 316 at the second side of the power semiconductor die 104. The redundant temperature sense pad 316 and the main temperature sense die pad 310 are electrically connected to the same temperature sense circuitry integrated in the power semiconductor die 104.

[0036] Figure 5 FIG. 3 shows a top plan view of a molded surface mount package 100 as viewed through a molded compound 102 according to another embodiment. Figure 5 The embodiment in Figures 1A to 1C combines the redundant gate connection features of the embodiment shown in Figure 4 with the dual redundant sense connection features of the embodiment shown in Figure 5In [the example], the molded surface-mount package 100 has a redundant internal gate electrical connector 130 for the internal gate electrical connector 122, a first redundant internal sensing electrical connector 300 for the internal Kelvin sensing electrical connector 126, and a second redundant internal sensing electrical connector 312 for the internal temperature sensing electrical connector 308. Each of the redundant internal electrical connectors 130, 300, 312 is encapsulated by the molding compound 102.

[0037] Figure 6 Fig. [number] shows a top plan view of the molded surface-mount package 100 as viewed through the molding compound 102 according to another embodiment. Figure 6 The embodiment in [reference] is similar to Figure 5 the embodiment in Figure 6 However, in

[0038] As explained above, the molded surface-mount package 100 can implement current sensing, temperature sensing, and / or Kelvin sensing functions. Figure 1C 、 Figure 2 and Figure 3 Fig. [number] shows a single type of sensing (e.g., current, temperature, or Kelvin) provided by the power semiconductor die 104. Figure 4 and Figure 5 Fig. [number] shows temperature and Kelvin sensing provided by the power semiconductor die 104. In Figure 4 and Figure 5 the Kelvin sensing or temperature sensing function implemented by the power semiconductor die 104 can be replaced by temperature sensing.

[0039] In the case where the power semiconductor die 104 implements current sensing, temperature sensing, and Kelvin sensing functions, the surface-mount package 100 may further include a current sensing terminal exposed at the surface-mount side 106 of the package 100, an internal electrical connector located between the current sensing terminal and a current sensing pad at the second side of the power semiconductor die 104, and a redundant internal electrical connector for the current sensing electrical connector, where the molding compound 102 encapsulates the additional electrical connectors. For example, the redundant internal current sensing electrical connector may be located between a redundant current sensing terminal exposed at the surface-mount side 106 of the molded package 100 and a redundant current sensing pad at the second side of the power semiconductor die 104.

[0040] Figure 7 Fig. [number] shows a top plan view of the molded surface-mount package 100 as viewed through the molding compound 102 according to another embodiment. In Figure 7In [description], the redundant internal gate electrical connection 130 is located between the redundant gate terminal 132 exposed at the surface-mount side 106 of the molded package 100 and the main gate pad 124 at the second side of the power semiconductor die 104. That is to say, according to this embodiment, the power semiconductor die 104 does not have a redundant gate pad.

[0041] In Figure 7 [description], the internal gate electrical connection 122 is implemented using a first bonding wire 500 that has a first end 502 attached to the gate terminal 116 exposed at the surface-mount side 106 of the molded package 100 and a second end 504 attached to the gate die pad 124. The redundant internal gate connection 130 includes a second bonding wire 506 that has a first end 508 attached to the redundant gate terminal 132 exposed at the surface-mount side 106 of the molded package 100 and a second end 510 that is stacked on and attached to the second end 504 of the first bonding wire 500. For example, depending on the type of wire bonding technique used, the second ends 504, 510 of the gate bonding wires 500, 506 can form a wedge-on-wedge bond or a ball-on-ball bond.

[0042] As Figure 7 shown, the molded surface-mount package 100 can have, for example, at least one redundant internal sensing connection 200 for internal temperature sensing, current sensing, and / or Kelvin sensing connections. In Figure 7 [description], the internal sensing electrical connection 126 is implemented using a bonding wire 512 that has a first end 514 attached to the corresponding sensing terminal 114 exposed at the surface-mount side 106 of the molded package 100 and a second end 516 attached to the corresponding sensing pad 128 at the second side of the power semiconductor die 104. The corresponding redundant internal sensing electrical connection 200 is implemented using a second bonding wire 518 that has a first end 520 attached to the corresponding redundant sensing terminal 202 exposed at the surface-mount side 106 of the molded package 100 and a second end 522 that is stacked on and attached to the second end 516 of the first sensing bonding wire 512. For example, depending on the type of wire bonding technique used, the second ends 516, 522 of the sensing bonding wires 512, 518 can form a wedge-on-wedge bond or a ball-on-ball bond.

[0043] Figure 8 FIG. [figure number] shows a top plan view of the molded surface-mount package 100 as viewed through the molding compound 102 according to another embodiment. In Figure 8In [reference], the power semiconductor die 104 is a lateral device, where all electrical contact pads 120, 124, 128, 600 are located at the second side (front side) of the die 104, and the main current path is along this side of the die 104. A separate lead 602 forms the second power terminal 112 that is exposed at the surface-mount side 106 of the molded package 100.

[0044] Also in Figure 8 In [reference], the first power pad 120 located at the second side of the power semiconductor die 104 is the source pad, and the first power terminal 110 provides the source potential to the source pad 120 via the first internal electrical connection 118. The drain pad 600 located at the second side of the power semiconductor die 104 is spaced apart from the source pad 120 and is electrically connected to the second power terminal 112 via an additional internal electrical connection 604. The additional internal electrical connection 604 is encapsulated by the molding compound 102 and can be implemented as one or more wire bonds, multiple bonding wires, metal clips, etc.

[0045] The redundant internal gate electrical connection 130 implemented by two bonding wires 500, 506 attached to the same gate die pad 124 is shown in Figure 8 and can be implemented as explained above in connection with Figure 7 . More generally, Figure 8 the lateral device embodiments shown in [reference] can incorporate any one of the redundant internal sense electrical connection and / or gate electrical connection embodiments described above in connection with Figures 1A to 7 . Figures 9 to 11 Shown is a Figure 8 corresponding lead frame design for different redundant internal sense electrical connections and / or gate electrical connections suitable for the lateral device embodiments shown in [reference].

[0046] In Figure 9 In [reference], the lead frame includes a main gate terminal 116, a redundant gate terminal 132, a sense terminal 114, and a redundant sense terminal 202. The sense terminal 114 can be used for current sensing, temperature sensing, or Kelvin sensing. The redundant gate terminal 132 can be electrically connected to the redundant gate pad 134 of the power semiconductor die 104, for example, as shown in Figure 1C , Figure 3 , Figure 5 , Figure 6 ; or electrically connected to the main gate pad 124 of the power semiconductor die 104, for example, as shown in Figure 7 . The redundant sense terminal 202 can be electrically connected to the redundant sense pads 204 / 304 / 316 of the power semiconductor die 104, for example, as shown in Figures 2 to 6 ; or electrically connected to the main sense pads 128 / 310 of the power semiconductor die 104, for example, as shown inFigure 7 as shown

[0047] In Figure 10 it, the lead frame includes a main gate terminal 116, a redundant gate terminal 132, and three sense-related terminals 700, 702, 704. The redundant gate terminal 132 can be electrically connected to the redundant gate pad 134 of the power semiconductor die 104, for example, as Figure 1C , Figure 3 , Figure 5 , Figure 6 shown; or electrically connected to the main gate pad 124 of the power semiconductor die 104, for example, as Figure 7 shown. The sense-related terminals 700, 702, 704 can be used to implement current sensing, temperature sensing, and Kelvin sensing without internal redundancy. Alternatively, two of the sense-related terminals 700, 702, 704 can be used to implement current sensing, temperature sensing, or Kelvin sensing with internal redundancy, for example, as Figures 2 to 7 shown, where the remaining sense-related terminals 700 / 702 / 704 provide different types of sensing functions without internal redundancy.

[0048] In Figure 11 it, the lead frame includes a main gate terminal 116, a redundant gate terminal 132, and four sense-related terminals 800, 802, 804, 806. The redundant gate terminal 132 can be electrically connected to the redundant gate pad 134 of the power semiconductor die 104, for example, as Figure 1C , Figure 3 , Figure 5 , Figure 6 shown; or electrically connected to the main gate pad 124 of the power semiconductor die 104, for example, as Figure 7 shown. The sense-related terminals 800, 802, 804, 806 can be used to implement current sensing, temperature sensing, or Kelvin sensing with internal redundancy for one of the sensing functions, for example, as Figures 2 to 7 shown. Alternatively, two of the sense-related terminals 800, 802, 804, 806 can be used to implement one type of sensing function (e.g., current, temperature, or Kelvin) with internal redundancy, and the remaining two sense-related terminals 800, 802, 804, 806 can be used to implement different types of sensing functions with internal redundancy, for example, as Figures 2 to 7 shown. Depending on the design of the power semiconductor die 104 and the molded package 100, other lead frame configurations can be used.

[0049] Figure 12FIG. 0 shows a top plan view of a molded surface mount system-in-package (SiP) 900 observed through a molded compound 902 of the SiP 900 to provide an unobstructed view inside the package. Accordingly, a dashed rectangle is used in Figure 12 to represent the molded compound 902.

[0050] The molded surface mount SiP 900 also includes a power semiconductor die (chip) 904 encapsulated by the molded compound 902. The power semiconductor die 904 can be a lateral device or a vertical device. The power semiconductor die 904 is attached to a metal pad 906, such as a pad of a lead frame, such that a first side (back side) of the power semiconductor die 904 faces the metal pad 906, and a second side (front side) of the die 904 faces away from the metal pad 904. The metal pad 906 forms a first power terminal 908, such as a drain or collector terminal exposed at the surface mount side of the molded surface mount SiP 900.

[0051] An additional semiconductor die 910 encapsulated in the molded compound 902 is attached to the same or a different metal pad 906 as the power semiconductor die 902. The additional semiconductor die 910 includes driver means configured to provide a drive input to a gate of a power transistor included in the power semiconductor die 904. The same or different semiconductor technologies can be used to implement the power semiconductor die 904 and the additional semiconductor die 910. For example, both the power semiconductor die 904 and the additional semiconductor die 910 can be Si dies. In another example, the power semiconductor die 904 can be a wide bandgap die (e.g., SiC or GaN die), and the additional semiconductor die 910 can be an Si die.

[0052] The molded surface mount SiP 900 also includes a second power terminal 912, a first sense terminal 914, and a gate terminal 916, each exposed at the surface mount side of the SiP 900 and spaced apart from the first power terminal 908. A first internal electrical connection 918 is provided between the second power terminal 912 of the SiP 900 and a first power pad 920 (e.g., source or emitter) at the second side of the power semiconductor die 904. A second internal electrical connection 922 is provided between the gate terminal 916 of the SiP 900 and a driver input pad 924 of the additional semiconductor die 910. The driver means included in the additional semiconductor die 910 drives the power transistor included in the power semiconductor die 904 based on a signal present at the gate terminal 916, such as applied to the driver input pad 924 of the additional semiconductor die 910.

[0053] The molded surface - mounted SiP 900 further includes a third electrical connector 926, which is located between the first sensing terminal 914 of the SiP 900 and the first sensing pad 928 at the second side of the power semiconductor die 904. The sensing signal (e.g., current, temperature, or Kelvin) output at the first sensing pad 928 of the power semiconductor die 904 is externally accessible at the first sensing terminal 914 of the SiP 900.

[0054] The molded surface - mounted SiP 900 includes redundant internal electrical connectors for the gate internal electrical connector 922 and / or the sensing internal electrical connector 926. In Figure 12 , the molded surface - mounted SiP 900 includes a first redundant internal electrical connector 930 for the gate internal electrical connector 922 and a second redundant internal electrical connector 932 for the sensing internal electrical connector 926.

[0055] In Figure 12 , the redundant internal gate electrical connector 930 is located between the redundant gate terminal 934 exposed at the surface - mounting side of the molded surface - mounted SiP 900 and the redundant gate pad 936 of the additional semiconductor die 910. The redundant internal sensing electrical connector 932 is located between the redundant sensing terminal 938 exposed at the surface - mounting side of the SiP 900 and the redundant sensing pad 940 of the power semiconductor die 104. However, alternatively, the redundant internal gate electrical connector 930 and / or the redundant internal sensing electrical connector 932 can be implemented as Figure 7 shown, where two bonding wires are stacked on top of each other and attached to the same die pad.

[0056] The molded surface - mounted SiP 900 further includes an internal electrical connector 942 located between the driver output pad 944 of the additional semiconductor die 910 and the gate pad 946 at the second side of the power semiconductor die 904. The driver device included in the additional semiconductor die 910 provides a drive input signal to the power semiconductor die 904 via the driver output pad 944. A redundant internal electrical connector 948 is provided for the internal driver output electrical connector 942. In Figure 12 , the redundant internal driver output electrical connector 948 is located between the redundant driver output pad 950 of the additional semiconductor die 910 and the redundant gate pad 952 at the second side of the power semiconductor die 904. However, alternatively, the redundant internal driver output electrical connector 948 can be implemented as Figure 7 shown, where two bonding wires are stacked on top of each other and attached to the redundant driver output pad 950 of the additional semiconductor die 910 and / or the redundant gate pad 952 of the power semiconductor die 904.

[0057] The power semiconductor die 904 may have one or more sense outputs provided to an additional semiconductor die 910 to ensure the safe operation of the power transistors included in the power semiconductor die 904. For example, a die-to-die electrical connection 954 may be disposed between a current sense input pad 956 of the additional semiconductor die 910 and a current sense output pad 958 at a second side of the power semiconductor die 904, and a redundant electrical connection 960 may be provided for the die-to-die current sense electrical connection 954.

[0058] In Figure 12 , the redundant die-to-die current sense electrical connection 960 is located between a redundant current sense input pad 962 of the additional semiconductor die 910 and a redundant current sense output pad 964 at a second side of the power semiconductor die 904. However, alternatively, the redundant die-to-die current sense electrical connection 960 may be implemented as Figure 7 shown, where two bonding wires are stacked on top of each other and attached to the redundant current sense input pad 962 of the additional semiconductor die 910 and / or the redundant current sense output pad 964 of the power semiconductor die 904.

[0059] A die-to-die electrical connection 966 may also be disposed between a Kelvin sense input pad 968 of the additional semiconductor die 910 and a Kelvin sense output pad 970 at a second side of the power semiconductor die 904, and a redundant electrical connection 972 may be provided for the die-to-die Kelvin sense electrical connection 966. In Figure 12 , the redundant die-to-die Kelvin sense electrical connection 972 is located between a redundant Kelvin sense input pad 974 of the additional semiconductor die 910 and a redundant Kelvin sense output pad 976 at a second side of the power semiconductor die 904. However, alternatively, the redundant die-to-die Kelvin sense electrical connection 972 may be implemented as Figure 7 shown, where two bonding wires are stacked on top of each other and attached to the redundant Kelvin sense input pad 974 of the additional semiconductor die 910 and / or the redundant Kelvin sense output pad 976 of the power semiconductor die 904.

[0060] The molding compound 902 encapsulates the power semiconductor die 904, the additional semiconductor die 910, each of the internal electrical connections 918, 922, 926, 942, 954, 966, and each of the redundant internal electrical connections 930, 932, 948, 960, 972. In Figure 12In [the figure], the internal electrical connectors 918, 922, 926, 942, 954, 966 and the redundant internal electrical connectors 930, 932, 948, 960, 972 are shown as being implemented using bonding wires. However, alternatively, one or more of the internal electrical connectors among 918, 922, 926, 942, 954, 966 and / or one or more of the redundant internal electrical connectors among 930, 932, 948, 960, 972 may be implemented using metal strips, metal clamps, etc.

[0061] Although the present disclosure is not limited thereto, the following numbered examples illustrate one or more aspects of the present disclosure.

[0062] Example 1: A surface mount package, comprising: a power semiconductor die attached to a metal pad such that a first side of the power semiconductor die faces the metal pad and a second side opposite the first side faces away from the metal pad, the metal pad forming a first power terminal exposed at a surface mount side of the surface mount package; a second power terminal, a first sense terminal, and a gate terminal, each exposed at the surface mount side and spaced apart from the first power terminal; a first electrical connector located between the second power terminal and a first power pad at the second side of the power semiconductor die; a second electrical connector located between the gate terminal and a gate pad at the second side of the power semiconductor die; a third electrical connector located between the first sense terminal and a first sense pad at the second side of the power semiconductor die; a first redundant electrical connector for the second electrical connector or the third electrical connector; and a molding compound encapsulating each of the power semiconductor die, the first electrical connector, the second electrical connector, the third electrical connector, and the first redundant electrical connector.

[0063] Example 2: The surface mount package according to Example 1, wherein the first redundant electrical connector is located between a redundant gate terminal exposed at the surface mount side and a redundant gate pad at the second side of the power semiconductor die.

[0064] Example 3: The surface mount package according to Example 1, wherein the first redundant electrical connector is located between a redundant sense terminal exposed at the surface mount side and a redundant sense pad at the second side of the power semiconductor die.

[0065] Example 4: The surface mount package according to Example 1 or 2, wherein the first redundant electrical connector is for the second electrical connector, the surface mount package further includes a second redundant electrical connector for the third electrical connector, and wherein the molding compound encapsulates the second redundant electrical connector.

[0066] Example 5: The surface mount package according to Example 4, wherein the first redundant electrical connector is between the redundant gate terminal exposed at the surface mount side and the redundant gate pad at the second side of the power semiconductor die, and wherein the second redundant electrical connector is between the redundant sense terminal exposed at the surface mount side and the redundant sense pad at the second side of the power semiconductor die.

[0067] Example 6: The surface mount package according to Example 1 or 3, wherein the first sense pad at the second side of the power semiconductor die is a Kelvin sense pad, wherein the first sense terminal exposed at the surface mount side is a Kelvin sense terminal, and wherein the first redundant electrical connector is between the redundant Kelvin sense terminal exposed at the surface mount side and the redundant Kelvin sense pad at the second side of the power semiconductor die.

[0068] Example 7: The surface mount package according to Example 6, further comprising: a temperature sense terminal exposed at the surface mount side; a fourth electrical connector between the temperature sense terminal and the temperature sense pad at the second side of the power semiconductor die; and a second redundant electrical connector for the fourth electrical connector, wherein the molding compound encapsulates the fourth electrical connector and the second redundant electrical connector.

[0069] Example 8: The surface mount package according to Example 7, wherein the second redundant electrical connector is between the redundant temperature sense terminal exposed at the surface mount side and the redundant temperature sense pad at the second side of the power semiconductor die.

[0070] Example 9: The surface mount package according to Example 7 or 8, further comprising: a third redundant electrical connector for the second electrical connector, wherein the molding compound encapsulates the third redundant electrical connector.

[0071] Example 10: The surface mount package according to Example 9, wherein the third redundant electrical connector is between the redundant gate terminal exposed at the surface mount side and the redundant gate pad at the second side of the power semiconductor die.

[0072] Example 11: The surface mount package according to any one of Examples 7 to 10, further comprising: a current sense terminal exposed at the surface mount side; a fifth electrical connector between the current sense terminal and the current sense pad at the second side of the power semiconductor die; and a third redundant electrical connector for the fifth electrical connector, wherein the molding compound encapsulates the fifth electrical connector and the third redundant electrical connector.

[0073] Example 12: The surface mount package according to Example 11, wherein the third redundant electrical connector is located between the redundant current sensing terminal exposed at the surface mount side and the redundant current sensing pad at the second side of the power semiconductor die.

[0074] Example 13: The surface mount package according to Example 1, wherein the first redundant electrical connector is located between the redundant gate terminal exposed at the surface mount side and the gate pad at the second side of the power semiconductor die.

[0075] Example 14: The surface mount package according to Example 13, wherein the second electrical connector includes a first bonding wire having a first end attached to the redundant gate terminal exposed at the surface mount side and a second end attached to the gate pad at the second side of the power semiconductor die, and wherein the first redundant electrical connector includes a second bonding wire having a first end attached to the redundant gate terminal exposed at the surface mount side and a second end stacked on and attached to the second end of the first bonding wire.

[0076] Example 15: The surface mount package according to Example 1, wherein the first redundant electrical connector is located between the redundant sensing terminal exposed at the surface mount side and the first sensing pad at the second side of the power semiconductor die.

[0077] Example 16: The surface mount package according to Example 15, wherein the third electrical connector includes a first bonding wire having a first end attached to the first sensing terminal exposed at the surface mount side and a second end attached to the first sensing pad at the second side of the power semiconductor die, and wherein the first redundant electrical connector includes a second bonding wire having a first end attached to the redundant sensing terminal exposed at the surface mount side and a second end stacked on and attached to the second end of the first bonding wire.

[0078] Example 17: The surface mount package according to any one of Examples 1 to 16, wherein the power semiconductor die is a vertical power semiconductor die, and wherein a metal pad is attached and electrically connected to the second power pad at the first side of the power semiconductor die.

[0079] Example 18: A surface mount package according to any one of Examples 1 to 16, wherein the power semiconductor die is a lateral power semiconductor die having all electrical contact pads at a second side of the power semiconductor die, wherein the surface mount package further includes a fourth electrical connection member located between the metal pad and a second power pad at the second side of the power semiconductor die, wherein the first power pad and the second power pad at the second side of the power semiconductor die are at different potentials, and wherein the molding compound encapsulates the fourth electrical connection member.

[0080] Example 19: A surface mount package according to any one of Examples 1 to 18, wherein the metal pad is a die pad of a lead frame, and wherein the second power terminal, the first sense terminal, and the gate terminal are different individual leads of the lead frame.

[0081] Example 20: A surface mount system-in-package, comprising: a power semiconductor die attached to a metal pad such that a first side of the power semiconductor die faces the metal pad and a second side opposite the first side faces away from the metal pad, the metal pad forming a first power terminal exposed at a surface mount side of the surface mount system-in-package; an additional semiconductor die attached to the same or a different metal pad as the power semiconductor die, the additional semiconductor die including a driver device configured to provide a drive input to a gate of a power transistor included in the power semiconductor die; a second power terminal, a first sense terminal, and a gate terminal, each exposed at the surface mount side and spaced apart from the first power terminal; a first electrical connection member located between the second power terminal and a first power pad at the second side of the power semiconductor die; a second electrical connection member located between the gate terminal and a driver input pad of the additional semiconductor die; a third electrical connection member located between the first sense terminal and a first sense pad at the second side of the power semiconductor die; a first redundant electrical connection member for the second electrical connection member or the third electrical connection member; and a molding compound encapsulating each of the power semiconductor die, the additional semiconductor die, the first electrical connection member, the second electrical connection member, the third electrical connection member, and the first redundant electrical connection member.

[0082] Example 21: The molded surface mount system-in-package according to Example 20, further comprising: a fourth electrical connection member located between a driver output pad of the additional semiconductor die and a gate pad at the second side of the power semiconductor die; and a second redundant electrical connection member for the fourth electrical connection member, wherein the molding compound encapsulates the fourth electrical connection member and the second redundant electrical connection member.

[0083] Example 22: The molded surface mount system - in - package according to Example 21 further includes: a fifth electrical connector located between the current - sensing input pad of the additional semiconductor die and the current - sensing output pad at the second side of the power semiconductor die; and a third redundant electrical connector for the fifth electrical connector, wherein the molding compound encapsulates the fifth electrical connector and the third redundant electrical connector.

[0084] Terms such as "first", "second", etc. are used to describe various elements, regions, parts, etc., and are not intended to be limiting. Throughout the specification, the same terms refer to the same elements.

[0085] As used herein, the terms "having", "containing", "including", "comprising", etc. are open - ended terms that indicate the presence of the stated element or feature, but do not exclude additional elements or features. Unless the context clearly indicates otherwise, the articles "a" and "the" are intended to include the plural as well as the singular.

[0086] Unless otherwise clearly indicated, the expression "and / or" should be interpreted to include all possible combined and separated combinations. For example, the expression "A and / or B" should be interpreted to mean only A, only B, or both A and B. Unless otherwise clearly indicated, the expression "at least one of" should be interpreted in the same manner as "and / or". For example, the expression "at least one of A and B" should be interpreted to mean only A, only B, or both A and B.

[0087] It should be understood that, unless otherwise specifically stated, the features of the various embodiments described herein may be combined with each other.

[0088] Although specific embodiments have been shown and described herein, those of ordinary skill in the art will understand that various alternative and / or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Accordingly, it is intended that the present invention be limited only by the claims and their equivalents.

Claims

1. A surface mount package comprising: a power semiconductor die attached to the metal pad such that a first side of the power semiconductor die faces the metal pad and a second side opposite the first side faces away from the metal pad, the metal pad forming a first power terminal exposed at a surface mount side of the surface mount package; a second power terminal, a first sense terminal, and a gate terminal, each of the second power terminal, the first sense terminal, and the gate terminal being exposed at the surface mounting side and spaced apart from the first power terminal; a first electrical connector between the second power terminal and a first power pad at the second side of the power semiconductor die; a second electrical connection between the gate terminal and a gate pad at the second side of the power semiconductor die; a third electrical connector located between the first sensing terminal and a first sensing pad at the second side of the power semiconductor die; a first redundant electrical connector, the first redundant electrical connector being used for the second electrical connector or the third electrical connector; as well as A mold compound encapsulates each of the power semiconductor die, the first electrical connector, the second electrical connector, the third electrical connector, and the first redundant electrical connector.

2. The surface mount package of claim 1, wherein: The first redundant electrical connection is between a redundant gate terminal exposed at the surface mount side and a redundant gate pad at the second side of the power semiconductor die.

3. The surface mount package of claim 1, wherein: The first redundant electrical connection is located between a redundant sense terminal exposed at the surface mount side and a redundant sense pad at the second side of the power semiconductor die.

4. The surface mount package of claim 1, wherein: The first redundant electrical connector is for the second electrical connector, wherein the surface mount package further comprises a second redundant electrical connector for the third electrical connector, and wherein the mold compound encapsulates the second redundant electrical connector.

5. The surface mount package of claim 4, wherein: The first redundant electrical connection is located between a redundant gate terminal exposed at the surface mounting side and a redundant gate pad at the second side of the power semiconductor die, and wherein the second redundant electrical connection is located between a redundant sensing terminal exposed at the surface mounting side and a redundant sensing pad at the second side of the power semiconductor die.

6. The surface mount package of claim 1, wherein: The first sensing pad located at the second side of the power semiconductor die is a Kelvin sensing pad, wherein the first sensing terminal exposed at the surface mounting side is a Kelvin sensing terminal, and wherein the first redundant electrical connection is located between the redundant Kelvin sensing terminal exposed at the surface mounting side and the redundant Kelvin sensing pad at the second side of the power semiconductor die.

7. The surface mount package of claim 6, further comprising: a temperature sensing terminal, the temperature sensing terminal being exposed at the surface mounting side; a fourth electrical connector located between the temperature sensing terminal and a temperature sensing pad at the second side of the power semiconductor die; as well as a second redundant electrical connector, the second redundant electrical connector being used for the fourth electrical connector, Wherein, the molding compound encapsulates the fourth electrical connector and the second redundant electrical connector.

8. The surface mount package of claim 7, wherein: The second redundant electrical connection is located between a redundant temperature sensing terminal exposed at the surface mount side and a redundant temperature sensing pad at the second side of the power semiconductor die.

9. The surface mount package of claim 7, further comprising: a third redundant electrical connector, the third redundant electrical connector being used for the second electrical connector, Wherein, the molding compound encapsulates the third redundant electrical connector.

10. The surface mount package of claim 9, wherein: The third redundant electrical connection is located between a redundant gate terminal exposed at the surface mount side and a redundant gate pad at the second side of the power semiconductor die.

11. The surface mount package of claim 7, further comprising: a current sensing terminal exposed at the surface mounting side; a fifth electrical connection between the current sensing terminal and a current sensing pad at the second side of the power semiconductor die; as well as a third redundant electrical connector, the third redundant electrical connector being used for the fifth electrical connector, Wherein, the molding compound encapsulates the fifth electrical connector and the third redundant electrical connector.

12. The surface mount package of claim 11, wherein: The third redundant electrical connection is located between a redundant current sensing terminal exposed at the surface mount side and a redundant current sensing pad at the second side of the power semiconductor die.

13. The surface mount package of claim 1, wherein: The first redundant electrical connection is between a redundant gate terminal exposed at the surface mount side and the gate pad at the second side of the power semiconductor die.

14. The surface mount package of claim 13, wherein: The second electrical connector includes a first bonding wire having a first end attached to the gate terminal exposed at the surface mounting side and a second end attached to the gate pad at the second side of the power semiconductor die, and wherein the first redundant electrical connector includes a second bonding wire having a first end attached to the redundant gate terminal exposed at the surface mounting side and a second end stacked on the second end of the first bonding wire and attached to the second end of the first bonding wire.

15. The surface mount package of claim 1, wherein: The first redundant electrical connection is between a redundant sense terminal exposed at the surface mount side and the first sense pad at the second side of the power semiconductor die.

16. The surface mount package of claim 15, wherein: The third electrical connector includes a first bonding wire having a first end attached to the first sensing terminal exposed at the surface mounting side, and a second end attached to the first sensing pad at the second side of the power semiconductor die, and wherein the first redundant electrical connector includes a second bonding wire having a first end attached to the redundant sensing terminal exposed at the surface mounting side, and a second end stacked on the second end of the first bonding wire and attached to the second end of the first bonding wire.

17. The surface mount package of claim 1, wherein: The power semiconductor die is a vertical power semiconductor die, and wherein the metal pad is attached and electrically connected to a second power pad at the first side of the power semiconductor die.

18. The surface mount package of claim 1, wherein: The power semiconductor die is a lateral power semiconductor die having all electrical contact pads at the second side of the power semiconductor die, wherein the surface mount package further comprises a fourth electrical connector located between the metal pad and a second power pad at the second side of the power semiconductor die, wherein the first power pad and the second power pad at the second side of the power semiconductor die are at different electrical potentials, and wherein the molding compound encapsulates the fourth electrical connector.

19. The surface mount package of claim 1, wherein: The metal pad is a die pad of a lead frame, and wherein the second power terminal, the first sense terminal, and the gate terminal are different individual leads of the lead frame.

20. A surface mount system-in-package, comprising: a power semiconductor die attached to the metal pad such that a first side of the power semiconductor die faces the metal pad and a second side opposite the first side faces away from the metal pad, the metal pad forming a first power terminal exposed at a surface mount side of the surface mount system-in-package; an additional semiconductor die attached to the same or different metal pad as the power semiconductor die, the additional semiconductor die including a driver device configured to provide a drive input to a gate of a power transistor included in the power semiconductor die; a second power terminal, a first sense terminal, and a gate terminal, each of the second power terminal, the first sense terminal, and the gate terminal being exposed at the surface mounting side and spaced apart from the first power terminal; a first electrical connector between the second power terminal and a first power pad at the second side of the power semiconductor die; a second electrical connection between the gate terminal and a driver input pad of the additional semiconductor die; a third electrical connector located between the first sensing terminal and a first sensing pad at the second side of the power semiconductor die; a first redundant electrical connector, the first redundant electrical connector being used for the second electrical connector or the third electrical connector; as well as A mold compound encapsulates each of the power semiconductor die, the additional semiconductor die, the first electrical connector, the second electrical connector, the third electrical connector, and the first redundant electrical connector.

21. The surface mount system-in-package of claim 20, further comprising: a fourth electrical connection between a driver output pad of the additional semiconductor die and a gate pad at the second side of the power semiconductor die; as well as a second redundant electrical connector, the second redundant electrical connector being used for the fourth electrical connector, Wherein, the molding compound encapsulates the fourth electrical connector and the second redundant electrical connector.

22. The surface mount system-in-package of claim 21 , further comprising: a fifth electrical connection between a current sensing input pad of the additional semiconductor die and a current sensing output pad at the second side of the power semiconductor die; as well as a third redundant electrical connector, the third redundant electrical connector being used for the fifth electrical connector, Wherein, the molding compound encapsulates the fifth electrical connector and the third redundant electrical connector.

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