Chip structure applied to area array emitting laser

By designing the chip structure of the surface array emitting laser, including multiple VCSEL packaging units and substrate heat sinks, the problem of complex and high cost in the array laser packaging process in the prior art is solved, and efficient heat dissipation and a chip structure suitable for large-scale production are achieved.

CN120184741AActive Publication Date: 2025-06-20GRACE LASER TECH CO LTD
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
CN202510646546.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-20
Publication Date
2025-06-20
Estimated Expiration
2045-05-20

AI Technical Summary

Technical Problem

In the prior art, the batch packaging process of the edge emission laser of array lasers is complex, the cost is high, and it is difficult to achieve large-scale production.

Method used

A chip structure applied to a surface array emitting laser is designed, including multiple VCSEL packaging units and substrate heat sinks. The VCSEL packaging unit is composed of interconnected VCSEL chips and transition heat sinks. The first side of the transition heat sink is provided with a first and a second region, and a conductive member is provided with a front and back side of the VCSEL chips, and the chips are connected through a gold wire bonding package.

Benefits of technology

This structure realizes the array layout of VCSEL chips, has a large heat dissipation area, excellent heat dissipation performance, simple processing, small stress, and is suitable for large-scale production.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120184741A_ABST
    Figure CN120184741A_ABST
Patent Text Reader

Abstract

The invention discloses a chip structure applied to an area array emitting laser, and relates to the technical field of lasers. The VCSEL packaging structure comprises a substrate heat sink and a plurality of VCSEL packaging units. The VCSEL packaging unit comprises a VCSEL chip and a transition heat sink which are connected with each other. The first surface of the transition heat sink includes a first region provided with a first conductive member and a second region provided with a second conductive member. The front surface of the VCSEL chip is provided with a first electrode and at least one conductive extension member, and the back surface of the VCSEL chip is provided with a second electrode. The second electrode is in contact with the second conductive piece. And the at least one conductive extension piece is in contact with the first electrode and the first conductive piece. The bottoms of the plurality of VCSEL packaging units are connected with the third area, and at least two VCSEL packaging units are connected with each other through a connecting structure. Therefore, the array arrangement of the VCSEL chips is realized, the heat dissipation area is large, the heat dissipation performance is excellent, the processing is simple, the stress is small, and the method is suitable for large-scale production.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This specification relates to the technical field of lasers, and particularly to a chip structure applied to a surface array emitting laser. Background Art

[0002] In the applications of the laser industry, high brightness, high power, and high reliability are often regarded as important indicators for evaluating a laser. At the same time, a high-quality light spot is also a new requirement continuously put forward by the application side. Therefore, the conversion of application scenarios forces lasers to be "arrayed", and horizontal array, vertical array, and surface array laser technologies have been vigorously developed.

[0003] In the prior art, array lasers generally form a single-line array with edge-emitting lasers (Bar), and then use the single-line array to form a surface array to achieve the arraying of lasers.

[0004] However, this method has very high requirements for the structural design and packaging process of lasers. In the traditional mass packaging process of edge-emitting lasers, it is necessary to handle the welding problems of multiple surfaces, with complex processes and high costs, making large-scale production difficult. Summary of the Invention

[0005] This specification provides a chip structure applied to a surface array emitting laser to at least partially solve the above problems existing in the prior art.

[0006] This specification adopts the following technical solutions: This specification provides a chip structure applied to a surface array emitting laser, including: A plurality of VCSEL packaging units, where the VCSEL packaging unit includes a VCSEL chip and a transition heat sink connected to each other; the first surface of the transition heat sink includes a first region and a second region; a first conductive member is provided in the first region, and a second conductive member is provided in the second region; a first electrode and at least one conductive extension are provided on the front surface of the VCSEL chip, and a second electrode is provided on the back surface of the VCSEL chip; the back surface of the VCSEL chip is closely attached to at least a part of the second region, and the second electrode is in contact with the second conductive member; the at least one conductive extension is in contact with the first electrode and in contact with the first conductive member; A substrate heat sink, where the third region on the upper surface of the substrate heat sink is smooth; the bottoms of the plurality of VCSEL packaging units are all connected to the third region, and at least two VCSEL packaging units are connected to each other through a connection structure.

[0007] Preferably, the connection structure is a metal sheet; The first end of the metal sheet is in contact with the first conductive member of a VCSEL packaging unit, and the second end of the metal sheet is in contact with the second conductive member of another VCSEL packaging unit.

[0008] Preferably, the substrate heat sink includes at least two bent electrodes; The bottom of the VCSEL packaging unit is connected to the first surface of the substrate heat sink; The first end of the bent electrode can be connected to the first conductive member or the second conductive member that is not connected to the connection structure, and the second end of the bent electrode can be bent to the first side surface or the second side surface of the substrate heat sink; Both the first side surface and the second side surface are on the side of the upper surface, and the orientations of the first side surface and the second side surface are opposite.

[0009] Preferably, an isolation groove is further provided on the first surface of the transition heat sink; The isolation groove is between the first conductive member and the second conductive member, and the isolation groove is filled with an insulating material.

[0010] Preferably, a metallization layer is provided on other regions of the transition heat sink surface except the first surface; A metallization layer is provided on the surface area of the substrate heat sink in contact with the transition heat sink.

[0011] Preferably, the first electrode is the positive electrode and the second electrode is the negative electrode; A light emitting area is further provided on the front surface of the VCSEL chip, and the light emitting area is used to output laser when a preset current flows through the first electrode and the second electrode.

[0012] Preferably, the VCSEL chip and the transition heat sink are bonded and packaged through a preset conductive and heat-conductive medium.

[0013] Preferably, the substrate heat sink is provided with a liquid inlet, a liquid outlet and a liquid channel.

[0014] Preferably, the output power of the VCSEL chip is greater than or equal to 20W.

[0015] On the other hand, this specification provides a surface array emitting laser, and the surface array emitting laser includes the chip structure applied to the surface array emitting laser provided in any one of the above aspects.

[0016] On the other hand, this specification provides a manufacturing method for a chip structure applied to a surface array emitting laser, including: Through the reflow soldering process, the chip mounter process, or the manual soldering process, the VCSEL chip is mounted on the first surface of the transition heat sink, and the reverse side of the VCSEL chip is closely attached to the first surface to form a VCSEL packaging unit; Through the reflow soldering process, the chip mounter process, or the manual soldering process, the bottom surfaces of multiple VCSEL packaging units are connected to the third area on the upper surface of the base heat sink; Through the gold wire bonding equipment, gold wire bonding packaging is performed on the VCSEL chip and the transition heat sink.

[0017] Preferably, the method further includes: Through the gold wire bonding equipment, at least two VCSEL packaging units are connected in series.

[0018] Preferably, the method further includes: Mounting the VCSEL chip on the first surface of the transition heat sink corresponds to the first operating temperature; Connecting the bottom surfaces of multiple VCSEL packaging units to the third area on the upper surface of the base heat sink corresponds to the second operating temperature; The second operating temperature is less than the first operating temperature.

[0019] Preferably, the method further includes: Through the soldering process, at least two VCSEL packaging units are connected to each other, and the temperature for connecting at least two VCSEL packaging units to each other is the third operating temperature; The third operating temperature is less than the second operating temperature.

[0020] Preferably, the method further includes: Performing metal patterning on the upper surface of the transition heat sink to form mutually isolated first conductive parts and second conductive parts as the metal pattern; Performing metallization on the lower surface and / or side surface and / or partial area of the upper surface of the transition heat sink.

[0021] Preferably, the method further includes: Outside the metallization layer formed by the metallization process, a nickel-gold layer or a titanium-platinum layer is plated.

[0022] The above at least one technical solution adopted in this specification can achieve the following beneficial effects: According to the above, the chip structure applied to the surface array emitting laser includes a substrate heat sink and a plurality of VCSEL packaging units. The VCSEL packaging unit includes a mutually connected VCSEL chip and a transition heat sink. Among them, the first surface of the transition heat sink includes a first region and a second region. The first region is provided with a first conductive member, and the second region is provided with a second conductive member. The front surface of the VCSEL chip is provided with a first electrode and at least one conductive extension member, and the back surface of the VCSEL chip is provided with a second electrode. The back surface of the VCSEL chip is closely attached to at least a partial region of the second region, and the second electrode is in contact with the second conductive member. The at least one conductive extension member is in contact with the first electrode and is in contact with the first conductive member. The third region on the upper surface of the substrate heat sink is smooth. The bottoms of the plurality of VCSEL packaging units are all connected to the third region, and at least two VCSEL packaging units are connected to each other through a connection structure.

[0023] It can be seen that the above structure realizes the array arrangement of VCSEL chips, has a large heat dissipation area, excellent heat dissipation performance, simple processing, small stress, and is suitable for large-scale production. Description of the Drawings

[0024] The drawings described herein are used to provide a further understanding of this specification and constitute a part of this specification. The schematic embodiments of this specification and their descriptions are used to explain this specification and do not constitute an improper limitation to this specification. In the drawings: Figure 1 It is a schematic structural diagram of a chip structure applied to a surface array emitting laser provided by an embodiment of this specification; Figure 2 It is a schematic structural diagram of a transition heat sink provided by an embodiment of this specification; Figure 3 It is a schematic structural diagram of a VCSEL packaging unit provided by an embodiment of this specification; Figure 4 It is a partial schematic structural diagram of a chip structure applied to a surface array emitting laser provided by an embodiment of this specification; Figure 5 It is a schematic flowchart of a manufacturing method of a chip structure applied to a surface array emitting laser provided by an embodiment of this specification.

[0025] Description of the Reference Numerals: VCSEL packaging unit 1; substrate heat sink 2; VCSEL chip 11; transition heat sink 12; first conductive member 121; second conductive member 122; isolation groove 123; conductive extension member 111; connection structure 3; bent electrode 21; liquid inlet 22; liquid outlet 23; fixing hole 24. Detailed Description of the Embodiment

[0026] To make the objectives, technical solutions and advantages of this specification clearer, the technical solutions of this specification will be clearly and completely described below in conjunction with specific embodiments of this specification and the corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this specification, rather than all the embodiments. Based on the embodiments in this specification, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the scope of protection of this application.

[0027] In the description of the present invention, it should be noted that the term "or" is generally used in the sense of including "and / or", unless otherwise clearly specified in the content.

[0028] In the description of the present invention, it should be noted that unless otherwise clearly specified and limited, the terms "installed", "connected" and "coupled" should be understood in a broad sense. In addition, in the description of this application, the terms "first", "second", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.

[0029] Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the scope of protection of the present invention.

[0030] A vertical cavity surface emitting laser (VCSEL, also translated as vertical resonant cavity surface emitting laser) is a semiconductor laser whose laser beam emits perpendicular to the top surface.

[0031] The following will detail the technical solutions provided by each embodiment of this specification in conjunction with the drawings.

[0032] Figure 1 The structural schematic diagram of a chip structure applied to a surface array emitting laser provided for an embodiment of this specification is shown as Figure 1 As shown, the structural schematic diagram of the chip structure applied to the surface array emitting laser includes a plurality of VCSEL packaging units 1 and a substrate heat sink 2.

[0033] Preferably, the VCSEL packaging unit 1 includes a mutually connected VCSEL chip 11 and a transition heat sink 12.

[0034] Preferably, the first surface of the transition heat sink 12 includes a first region and a second region.

[0035] Preferably, a first conductive member 121 is provided in the first region, and a second conductive member 122 is provided in the second region.

[0036] Preferably, the transition heat sink 12 is subjected to metal patterning, and the first conductive member 121 and the second conductive member 122 are the metal patterns formed after the processing.

[0037] Preferably, the first conductive member 121 and the second conductive member 122 are insulated from each other.

[0038] Preferably, an isolation groove 123 is further provided on the first surface of the transition heat sink 12.

[0039] Preferably, the isolation groove 123 is located between the first conductive member 121 and the second conductive member 122, and the isolation groove 123 is filled with an insulating material. Among them, the insulating material is silicone rubber, silicone gel, Epoxy, Si3N4, etc., and this specification does not limit this.

[0040] Figure 2 The structural schematic diagram of the transition heat sink 12 provided for an embodiment of this specification is as Figure 2 shown, the first conductive member 121 and the second conductive member 122 are separated by the isolation groove 123.

[0041] Preferably, a first electrode and at least one conductive extension 111 are provided on the front surface of the VCSEL chip 11.

[0042] Preferably, a second electrode is provided on the back surface of the VCSEL chip 11.

[0043] Preferably, the back surface of the VCSEL chip 11 is in close contact with at least part of the second region, and the second electrode is in contact with the second conductive member 122.

[0044] Preferably, at least one conductive extension 111 of the VCSEL chip 11 is in contact with the first electrode and is in contact with the first conductive member 121.

[0045] Figure 3 The structural schematic diagram of the VCSEL packaging unit 1 provided for an embodiment of this specification is as Figure 3 shown, the VCSEL chip 11 is connected to the transition heat sink 12, and the VCSEL chip 11 is provided with a conductive extension 111.

[0046] Preferably, the third region on the upper surface of the base heat sink 2 is smooth.

[0047] Preferably, the bottoms of the plurality of VCSEL packaging units 1 are all connected to the third region, and at least two VCSEL packaging units 1 are connected to each other through a connection structure 3.

[0048] Preferably, the multiple VCSEL packaging units 1 are all connected to each other through a connection structure 3.

[0049] According to the above, the chip structure applied to the surface array emitting laser includes a substrate heat sink 2 and multiple VCSEL packaging units 1. The VCSEL packaging unit 1 includes a VCSEL chip 11 and a transition heat sink 12 that are connected to each other. Among them, the first surface of the transition heat sink 12 includes a first region and a second region. A first conductive member 121 is provided in the first region, and a second conductive member 122 is provided in the second region. A first electrode and at least one conductive extension 111 are provided on the front surface of the VCSEL chip 11, and a second electrode is provided on the back surface of the VCSEL chip 11. The back surface of the VCSEL chip 11 is closely attached to at least a partial region of the second region, and the second electrode is in contact with the second conductive member 122. The at least one conductive extension 111 is in contact with the first electrode and is in contact with the first conductive member 121. The third region on the upper surface of the substrate heat sink 2 is smooth. The bottoms of the multiple VCSEL packaging units 1 are all connected to the third region, and at least two VCSEL packaging units 1 are connected to each other through a connection structure 3.

[0050] It can be seen that the above structure realizes the array arrangement of the VCSEL chips 11, has a large heat dissipation area, excellent heat dissipation performance, simple processing, small stress, and is suitable for large-scale production.

[0051] Preferably, the connection structure 3 is a metal sheet.

[0052] Preferably, the first end of the metal sheet is in contact with the first conductive member 121 of one VCSEL packaging unit 1, and the second end of the metal sheet is in contact with the second conductive member 122 of another VCSEL packaging unit 1.

[0053] Preferably, the material of the transition heat sink 12 is a thermally conductive and insulating material such as aluminum nitride, silicon carbide, diamond, copper molybdenum copper, etc., which is not limited in this specification.

[0054] Preferably, both the first surface and the second surface of the transition heat sink 12 are provided with metallization coatings. Among them, the second surface of the transition heat sink 12 faces the opposite direction to the first surface of the transition heat sink 12.

[0055] Preferably, a nickel-gold coating or a titanium-platinum coating is further provided outside the metallization coating.

[0056] Preferably, the substrate heat sink 2 includes at least two bent electrodes.

[0057] Preferably, the bottom of the VCSEL packaging unit 1 is connected to the first surface of the substrate heat sink 2.

[0058] Preferably, the first end of the bent electrode can be connected to the first conductive member 121 or the second conductive member 122 that is not connected to the connection structure 3, and the second end of the bent electrode can be bent to the first side or the second side of the substrate heat sink 2. Moreover, both the first side and the second side are on the side of the upper surface of the substrate heat sink 2, and the first side and the second side face in opposite directions.

[0059] Figure 4 Partial structural schematic diagram of a chip structure applied to a surface array emitting laser provided by an embodiment of this specification, as Figure 4 shown, the transition heat sinks 12 of adjacent VCSEL packaging units 1 are interconnected through a connection structure 3, and two bent electrodes 21 are respectively connected to the first conductive member 121 or the second conductive member 122 that is not connected to the connection structure 3.

[0060] Preferably, a metallization layer is provided in other areas of the surface of the transition heat sink 12 except for the first surface.

[0061] Preferably, a metallization layer is provided in the surface area where the substrate heat sink 2 contacts the transition heat sink 12.

[0062] Preferably, the first electrode is the positive electrode and the second electrode is the negative electrode.

[0063] Preferably, a light-emitting area is further provided on the front surface of the VCSEL chip 11, and the light-emitting area is used to output laser when a preset current flows through the first electrode and the second electrode.

[0064] By adopting the above method, it is realized that the light-emitting surface and the positive electrode of the VCSEL chip 11 are on the same surface, avoiding the problems caused by the flip-chip packaging of traditional edge-emitting lasers.

[0065] Preferably, a metal solder, a thermal conductive silver paste or other media with good electrical and thermal conductivity are used for bonding and packaging between the VCSEL chip 11 and the transition heat sink 12. The media include but are not limited to gold-tin, indium and indium-based metals, nano-silver paste, liquid metal, etc.

[0066] Preferably, the bonding and packaging can be gold wire bonding or gold tape bonding.

[0067] Preferably, the VCSEL chip 11 and the transition heat sink 12 are bonded and packaged through a preset conductive and thermal conductive medium.

[0068] Preferably, the substrate heat sink 2 is provided with a liquid inlet 22, a liquid outlet 23 and a liquid channel. As Figure 4 shown.

[0069] Preferably, the substrate heat sink 2 is provided with fixing holes 24. As Figure 4 shown.

[0070] Preferably, a plurality of the fixing holes 24 are provided.

[0071] Preferably, the output power of the VCSEL chip 11 is greater than or equal to 20W.

[0072] The above is the chip structure applied to the surface array emission laser provided by one or more embodiments of this specification. Based on the same idea, this specification also provides a corresponding surface array emission laser.

[0073] Preferably, the surface array emission laser includes the chip structure applied to the surface array emission laser provided by any one of the above embodiments.

[0074] The above is the chip structure applied to the surface array emission laser and the surface array emission laser provided by one or more embodiments of this specification. Based on the same idea, this specification also provides a corresponding manufacturing method for the chip structure applied to the surface array emission laser, as Figure 5 shown.

[0075] Figure 5 It is a schematic flowchart of the manufacturing method for the chip structure applied to the surface array emission laser provided by an embodiment of this specification, as Figure 5 shown, and the method specifically includes the following steps.

[0076] S500: Through a reflow soldering process, a chip mounter process, or a manual soldering process, the VCSEL chip is pasted onto the first surface of the transition heat sink, and the reverse side of the VCSEL chip is closely attached to the first surface to form a VCSEL packaging unit.

[0077] S502: Through a reflow soldering process, a chip mounter process, or a manual soldering process, the bottom surfaces of a plurality of VCSEL packaging units are connected to the third region on the upper surface of the substrate heat sink.

[0078] S504: Through a gold wire bonding device, gold wire bonding packaging is performed on the VCSEL chip and the transition heat sink.

[0079] Preferably, before step S504, at least two VCSEL packaging units can be connected in series through a gold wire bonding device.

[0080] Preferably, pasting the VCSEL chip onto the first surface of the transition heat sink corresponds to a first operating temperature. And connecting the bottom surfaces of a plurality of VCSEL packaging units to the third region on the upper surface of the substrate heat sink corresponds to a second operating temperature. Wherein, the second operating temperature is less than the first operating temperature.

[0081] Preferably, the first operating temperature is the melting point of the corresponding solder or the temperature of the medium. The second operating temperature is the melting point of the corresponding solder or the temperature of the medium. The third operating temperature is the melting point of the corresponding solder or the temperature of the medium.

[0082] Preferably, during the implementation of at least one of the reflow soldering process, the pick-and-place machine process, or the manual soldering process, the solder or the chip mounting medium used is a metal solder or a metal medium with a conductivity greater than a preset threshold.

[0083] Preferably, before step S504, at least two VCSEL packaging units can be preferentially connected to each other through a soldering process, and the temperature for connecting at least two VCSEL packaging units to each other is the third operating temperature. Among them, the third operating temperature is lower than the second operating temperature.

[0084] More preferably, a plurality of VCSEL packaging units fixed on the upper surface of the substrate heat sink can be connected in series with positive and negative polarities.

[0085] Preferably, the substrate heat sink can be a heat dissipation device with a water channel, or a heat conduction heat sink without an internal channel, or other structures with a heat dissipation function. The material of the substrate heat sink includes but is not limited to oxygen-free copper, aluminum nitride, silicon carbide, copper molybdenum copper, diamond, diamond copper, etc.

[0086] Preferably, the number of VCSEL packaging units fixed on the upper surface of the substrate heat sink is 9. More preferably, the number of VCSEL packaging units fixed on the upper surface of the substrate heat sink is not limited.

[0087] Preferably, before step S500, the upper surface of the transition heat sink can be preferentially subjected to metal patterning to form mutually isolated first conductive parts and second conductive parts. Then, the lower surface and / or side surface and / or partial area of the upper surface of the transition heat sink are metallized.

[0088] More preferably, only the lower surface and the upper surface of the transition heat sink are metallized.

[0089] More preferably, a nickel-gold layer or a titanium-platinum layer is plated outside the metallization layer formed by the metallization process.

[0090] Among them, the metallization process can be carried out by means such as copper cladding and metal diffusion, and this specification does not limit this.

[0091] More preferably, isolation grooves are opened on the upper surface of the transition heat sink, and the isolation grooves are not subjected to metallization and metal patterning.

[0092] Further preferably, no substance needs to be filled in the isolation groove, that is, the isolation groove is filled with the intrinsic material of the transition heat sink. Alternatively, the isolation groove can be filled with an insulating substance.

[0093] This specification also provides a computer-readable storage medium storing a computer program that can be used to execute the above Figure 5 manufacturing method of the chip structure applied to the surface array emission laser.

[0094] This specification also provides a computer program product. When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device implements the above Figure 5 manufacturing method of the chip structure applied to the surface array emission laser.

[0095] It should also be noted that the term "including", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, commodity or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of another identical element in the process, method, commodity or device including the said element.

[0096] The various embodiments in this specification are all described in a progressive manner. The same or similar parts among the various embodiments can be referred to each other, and the key points of each embodiment are the differences from other embodiments.

[0097] The above are only the embodiments of this specification and are not used to limit this specification. For those skilled in the art, this specification can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of this specification shall be included within the scope of the claims of this application.

Claims

1. A chip structure for a planar array emitting laser, characterized in that: include: A plurality of VCSEL packaging units, wherein the VCSEL packaging units include interconnected VCSEL chips and a transition heat sink; the first surface of the transition heat sink includes a first area and a second area; the first area is provided with a first conductive member, and the second area is provided with a second conductive member; the front surface of the VCSEL chip is provided with a first electrode and at least one conductive extension member, and the back surface of the VCSEL chip is provided with a second electrode; the back surface of the VCSEL chip is in close contact with at least a part of the second area, and the second electrode is in contact with the second conductive member; The at least one conductive extension is in contact with the first electrode and in contact with the first conductive member; A base heat sink, wherein a third area on the upper surface of the base heat sink is smooth; the bottoms of the plurality of VCSEL packaging units are all connected to the third area, and at least two VCSEL packaging units are connected to each other via a connecting structure.

2. The chip structure for a planar array emitting laser according to claim 1, characterized in that: The connecting structure is a metal sheet; The first end of the metal sheet contacts the first conductive member of one VCSEL package unit, and the second end of the metal sheet contacts the second conductive member of another VCSEL package unit.

3. The chip structure for a planar array emitting laser according to claim 2, characterized in that: The base heat sink includes at least two bent electrodes; The bottom of the VCSEL packaging unit is connected to the first surface of the base heat sink; The first end of the bent electrode can be connected to the first conductive member or the second conductive member that is not connected to the connection structure, and the second end of the bent electrode can be bent to the first side surface or the second side surface of the base heat sink; The first side surface and the second side surface are both located at the side of the upper surface, and the first side surface and the second side surface are in opposite directions.

4. The chip structure for a planar array emitting laser according to claim 1, characterized in that: The first surface of the transition heat sink is also provided with an isolation groove; The isolation groove is located between the first conductive member and the second conductive member, and the isolation groove is filled with insulating material.

5. The chip structure for a planar array emitting laser according to claim 1, characterized in that: The transition heat sink surface is provided with a metallization layer in other areas except the first surface; A metallization layer is provided on the surface area where the base heat sink contacts the transition heat sink.

6. The chip structure for a planar array emitting laser according to claim 1, characterized in that: The first electrode is a positive electrode, and the second electrode is a negative electrode; A light-emitting area is also provided on the front side of the VCSEL chip, and the light-emitting area is used to output laser when a preset current flows through the first electrode and the second electrode.

7. The chip structure for a planar array laser emitter according to any one of claims 1 to 6, characterized in that: The VCSEL chip and the transition heat sink are bonded and packaged via a preset conductive and thermally conductive medium.

8. The chip structure for a planar array emitting laser according to any one of claims 1 to 6, characterized in that: The base heat sink is provided with a liquid inlet, a liquid outlet and a liquid channel.

9. The chip structure for a planar array emitting laser according to any one of claims 1 to 6, characterized in that: The output power of the VCSEL chip is greater than or equal to 20W.

10. A planar array emitting laser, characterized in that: The surface array emitting laser comprises the chip structure applied to the surface array emitting laser according to any one of claims 1 to 9.

11. A method for manufacturing a chip structure for a planar array emitting laser, characterized in that: include: The VCSEL chip is mounted on the first surface of the transition heat sink by a reflow soldering process, a chip mounter process or a manual soldering process, and the back surface of the VCSEL chip is closely attached to the first surface to form a VCSEL packaging unit; Connecting the bottom surfaces of the plurality of VCSEL package units to the third area on the upper surface of the substrate heat sink by a reflow soldering process, a chip mounter process, or a manual soldering process; The VCSEL chip and the transition heat sink are packaged by gold wire bonding using a gold wire bonding device.

12. The method for manufacturing a chip structure for a planar array emitting laser according to claim 11, characterized in that: The method further comprises: At least two VCSEL packaging units are connected in series through gold wire bonding equipment.

13. The method for manufacturing a chip structure for a planar array emitting laser according to claim 11, characterized in that: The method further comprises: Mounting the VCSEL chip to the first side of the transition heat sink corresponds to a first operating temperature; Connecting the bottom surfaces of the plurality of VCSEL packaging units to a third area on the upper surface of the substrate heat sink corresponding to a second operating temperature; The second operating temperature is lower than the first operating temperature.

14. The method for manufacturing a chip structure for a planar array emitting laser according to claim 13, characterized in that: The method further comprises: Connecting at least two VCSEL package units to each other through a welding process, wherein the temperature at which the at least two VCSEL package units are connected to each other is a third operating temperature; The third operating temperature is lower than the second operating temperature.

15. The method for manufacturing a chip structure for a planar array emitting laser according to claim 13, characterized in that: The method further comprises: Performing metal patterning on the upper surface of the transition heat sink, the formed metal pattern is a first conductive member and a second conductive member that are isolated from each other; A metallization process is performed on a partial area of ​​the lower surface and / or the side surface and / or the upper surface of the transition heat sink.

16. The method for manufacturing a chip structure for a planar array emitting laser according to claim 15, characterized in that: The method further comprises: A nickel-gold layer or a titanium-platinum-gold layer is plated on the outer side of the metallization layer formed by the metallization process.

Citation Information

Patent Citations

  • LED chip and preparation method thereof

    CN113555485A

  • Inverted light-emitting element and light-emitting device

    CN115763663A

  • Liquid refrigeration semiconductor laser instrument and pile battle array based on it is insulating heat sink

    CN205724361U

  • Light source module and therapeutic instrument

    CN209766855U

  • LED chip and manufacturing method therefor, display panel and electronic device

    WO2019169770A1