Radio frequency power supply protection method and device based on sampling frequency, equipment and medium

Abstract

The invention relates to the technical field of radio frequency power supplies, and discloses a radio frequency power supply protection method based on sampling frequency, which comprises the following steps of: driving a digital frequency synthesizer to output a sine wave signal by utilizing an FPGA (Field Programmable Gate Array) processor to obtain an output sine wave signal; amplifying the output sine wave signal to preset power to obtain an amplified sine wave signal, and performing coupling to obtain a coupled sine wave signal; performing operational amplification on the coupled sine wave signal to obtain an amplified coupled signal, and returning the amplified coupled signal to the FPGA processor for sampling to obtain a sampled signal; the sampling period number of the sampling signal is measured within the preset time, and the feedback signal frequency is calculated according to the sampling period number; and comparing the feedback signal frequency with a preset driving frequency, and when a frequency difference value is greater than a preset threshold value, judging that radio frequency output is abnormal, and switching off a power amplifier control switch. The invention further provides a radio frequency power supply protection device and equipment based on the sampling frequency and a storage medium. The radio frequency power supply can be protected.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency power supplies, and particularly to a radio frequency power supply protection method, device, equipment and medium based on sampling frequency. Background Art

[0002] As the core power supply unit of high-precision electronic equipment, radio frequency power supplies are widely used in industrial scenarios such as semiconductor manufacturing, medical equipment (such as radio frequency ablation systems), and wireless communication base stations. The stability of its output frequency directly determines the operating efficiency and process accuracy of the equipment. Especially in key processes such as plasma generation and material etching, a small frequency offset may lead to process failure or equipment damage.

[0003] However, the working environment of radio frequency power supplies often has significant interference. For example, external electromagnetic interference, and internal high-frequency signals are prone to harmonic mixing and intermodulation distortion in non-linear circuits. These signals are alternately transmitted in the radio frequency module, amplified and mixed into the system, sometimes causing abnormal frequency output of the radio frequency system. The traditional method of removing interference through the band-pass filtering characteristics of radio frequency power amplifiers often has certain frequency bandwidth limitations. Exceeding the operating frequency of the power amplifier will cause damage to the equipment.

[0004] The above defects are worthy of improvement. Summary of the Invention

[0005] The present invention provides a radio frequency power supply protection method, device, equipment and medium based on sampling frequency, and its main purpose is to improve the protection ability of radio frequency power supplies.

[0006] To achieve the above object, a radio frequency power supply protection method based on sampling frequency provided by the present invention includes:

[0007] Obtain service requirements, and based on the service requirements, use the FPGA processor in the radio frequency circuit to drive a preset digital frequency synthesizer to output a sine wave signal, obtaining an output sine wave signal, where the radio frequency circuit includes an FPGA processor, a digital frequency synthesizer, a radio frequency power amplifier module, a coupler, an operational amplifier, and a power amplifier control switch;

[0008] Use the radio frequency power amplifier module to amplify the output sine wave signal to a preset power, obtaining an amplified sine wave signal, and couple the amplified sine wave signal through the coupler, obtaining a coupled sine wave signal;

[0009] Operate and amplify the coupled sine wave signal through the operational amplifier, obtaining an amplified coupled signal, and return the amplified coupled signal to the FPGA processor. Sample the amplified coupled signal through the FPGA processor, obtaining a sampled signal, where the FPGA processor includes a first-stage trigger and a second-stage trigger;

[0010] Obtain the timing diagrams corresponding to the first-level trigger and the second-level trigger in the sampling signal, and obtain the period of the sampling signal according to the timing diagrams to obtain the sampling period;

[0011] Measure the number of periods of the sampling signal within a preset time to obtain the number of sampling periods, and calculate the signal frequency according to the number of sampling periods to obtain the feedback signal frequency;

[0012] Compare the feedback signal frequency with the preset drive frequency. When the frequency difference between the feedback signal frequency and the preset drive frequency is greater than the preset threshold, determine that the RF output is abnormal and disconnect the power amplifier control switch.

[0013] Optionally, based on the service requirement, using a preset FPGA processor to drive a digital frequency synthesizer to output a sine wave signal includes:

[0014] Obtain the preset frequency in the service requirement to obtain the preset drive frequency, and calculate the corresponding frequency control word through the preset drive frequency;

[0015] Based on the service requirement, obtain the resources of the FPGA processor to obtain the processor resources, and call the digital frequency synthesizer according to the processor resources. Design a phase accumulator and a sine lookup table through the digital frequency synthesizer;

[0016] Obtain the clock cycle of the FPGA processor, and use the phase accumulator to accumulate the frequency control word in each clock cycle to generate a phase value;

[0017] Based on the phase value, look up the amplitude corresponding to the sine lookup table to obtain the sine wave amplitude;

[0018] According to the sine wave amplitude, use the digital frequency synthesizer to generate a sine wave signal and output it.

[0019] Optionally, using the RF power amplifier module to amplify the output sine wave signal to a preset power to obtain an amplified sine wave signal includes:

[0020] Input the output sine wave signal into the RF power amplifier module, and based on the preset power, use the RF power amplifier module to set the voltage and current to obtain the adjusted voltage and adjusted current;

[0021] Amplify the output sine wave signal based on the adjusted voltage and adjusted current to obtain an amplified sine wave signal.

[0022] Optionally, obtaining the timing diagrams corresponding to the first-level trigger and the second-level trigger in the sampling signal, and obtaining the period of the sampling signal according to the timing diagrams to obtain the sampling period includes:

[0023] Obtaining the timing diagram corresponding to the first-level trigger to obtain a first timing diagram, and obtaining the timing diagram corresponding to the second-level trigger to obtain a second timing diagram;

[0024] Obtaining the first level state of the first timing diagram to obtain a first level timing, and obtaining the second level state of the second timing diagram to obtain a second level timing;

[0025] Determining a flag point according to the positions of the first level timing and the second level timing in the first timing diagram and the second timing diagram, and obtaining the sampling period according to the repetition period of the flag point in the first timing diagram and the second timing diagram.

[0026] Optionally, measuring the number of periods of the sampling signal within a preset time to obtain the number of sampling periods, and calculating the signal frequency according to the number of sampling periods to obtain the feedback signal frequency includes:

[0027] Measuring the number of periods of the sampling signal within the preset time to obtain the number of sampling periods;

[0028] Calculating the period of the sampling signal according to the number of sampling periods to obtain the signal period, and calculating the feedback signal frequency of the sampling signal according to the signal period.

[0029] Optionally, the calculation formulas for the signal period and the feedback signal frequency are respectively:

[0030]

[0031] Where n is the period, T is the signal period, and f is the feedback signal frequency.

[0032] Optionally, after obtaining the first level state of the timing corresponding to the first-level trigger to obtain a first level timing, and obtaining the second level state of the second-level trigger to obtain a second level timing, the method further includes:

[0033] The first level state and the second level state are the high level state and the low level state. When the first level timing takes the high level, the second level timing takes the low level, and when the first level timing takes the low level, the second level timing takes the high level.

[0034] To solve the above problems, the present invention further provides a radio frequency power supply protection device based on the sampling frequency, and the device includes:

[0035] A signal generation module, configured to obtain service requirements, and based on the service requirements, drive a preset digital frequency synthesizer by using an FPGA processor in a radio frequency circuit to output a sine wave signal, so as to obtain an output sine wave signal. The radio frequency circuit includes an FPGA processor, a digital frequency synthesizer, a radio frequency power amplifier module, a coupler, an operational amplifier, and a power amplifier control switch;

[0036] A signal sampling module, configured to amplify the output sine wave signal to a preset power by using the radio frequency power amplifier module to obtain an amplified sine wave signal, and couple the amplified sine wave signal through the coupler to obtain a coupled sine wave signal;

[0037] The coupled sine wave signal is amplified through the operational amplifier to obtain an amplified coupled signal, and the amplified coupled signal is returned to the FPGA processor. The FPGA processor samples the amplified coupled signal to obtain a sampled signal. The FPGA processor includes a first-stage trigger and a second-stage trigger;

[0038] A frequency calculation module, configured to obtain timing diagrams corresponding to the first-stage trigger and the second-stage trigger in the sampled signal, and obtain the period of the sampled signal according to the timing diagrams to obtain a sampling period;

[0039] Determine the number of periods of the sampled signal within a preset time to obtain a sampling period number, and calculate a signal frequency according to the sampling period number to obtain a feedback signal frequency;

[0040] An abnormality judgment module, configured to compare the feedback signal frequency with a preset driving frequency. When the frequency difference between the feedback signal frequency and the preset driving frequency is greater than a preset threshold, it is determined that the radio frequency output is abnormal, and the power amplifier control switch is turned off.

[0041] To solve the above problems, the present invention further provides an electronic device, which includes:

[0042] At least one processor; and,

[0043] A memory communicatively connected to the at least one processor; wherein,

[0044] The memory stores a computer program executable by the at least one processor. The computer program is executed by the at least one processor, so that the at least one processor can execute the radio frequency power supply protection method based on the sampling frequency as described above.

[0045] To solve the above problems, the present invention also provides a computer-readable storage medium, including a storage data area and a storage program area. The storage data area stores the created data, and the storage program area stores a computer program. When the computer program is executed by a processor, the above-described radio frequency power supply protection method based on the sampling frequency is implemented.

[0046] In an embodiment of the present invention, an FPGA processor is used to drive a digital frequency synthesizer to output a sine wave signal, and an output sine wave signal is obtained. The output sine wave signal is amplified to a preset power to obtain an amplified sine wave signal, and is coupled to obtain a coupled sine wave signal. The coupled sine wave signal is amplified through an operation to obtain an amplified coupled signal, and the amplified coupled signal is returned to the FPGA processor for sampling to obtain a sampling signal. The number of sampling periods of the sampling signal is measured within a preset time, and the feedback signal frequency is calculated according to the number of sampling periods. The feedback signal frequency is compared with a preset driving frequency. When the frequency difference is greater than a preset threshold, it is determined that the radio frequency output is abnormal, and the power amplifier control switch is disconnected. A sine wave is generated by driving the digital frequency synthesizer through the FPGA, amplified by the power amplifier, coupled and sampled, and the feedback frequency is calculated in real time by using the double flip-flop timing analysis to realize the closed-loop control of the dynamic signal adjustment and abnormal automatic protection driven by the service requirements. Therefore, the radio frequency power supply protection method, device, electronic device and computer-readable storage medium based on the sampling frequency proposed by the present invention can improve the protection ability of the radio frequency power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 It is a schematic flowchart of a radio frequency power supply protection method based on the sampling frequency provided by an embodiment of the present invention;

[0048] Figure 2 It is a module schematic diagram of a radio frequency power supply protection device based on the sampling frequency provided by an embodiment of the present invention;

[0049] Figure 3 It is an internal structure schematic diagram of an electronic device for implementing a radio frequency power supply protection method based on the sampling frequency provided by an embodiment of the present invention.

[0050] The realization, functional characteristics and advantages of the object of the present invention will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0051] It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0052] An embodiment of the present application provides a radio frequency power supply protection method based on sampling frequency. The execution subject of the radio frequency power supply protection method based on sampling frequency includes, but is not limited to, at least one of electronic devices such as a server, a terminal, etc. that can be configured to execute the method provided in the embodiment of the present application. Among them, the server can be an independent server or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, Content Delivery Network (CDN), and big data and artificial intelligence platforms. In other words, the radio frequency power supply protection method based on sampling frequency can be executed by software or hardware installed on a remote device or a server device, and the software can be a blockchain platform. The server includes, but is not limited to: a single server, a server cluster, a cloud server, or a cloud server cluster, etc.

[0053] Referring to Figure 1 As shown, it is a schematic flowchart of a radio frequency power supply protection method based on sampling frequency provided by an embodiment of the present invention. In this embodiment, the radio frequency power supply protection method based on sampling frequency includes the following steps S1 - S6:

[0054] S1. Obtain the service requirements, and based on the service requirements, use the FPGA processor in the radio frequency circuit to drive a preset digital frequency synthesizer to output a sine wave signal, and obtain the output sine wave signal. Among them, the radio frequency circuit includes an FPGA processor, a digital frequency synthesizer, a radio frequency power amplifier module, a coupler, an operational amplifier, and a power amplifier control switch.

[0055] It can be understood that, based on the service requirements, the FPGA processor in the radio frequency circuit is used to drive the digital frequency synthesizer to output a sine wave signal, ensuring that the radio frequency circuit can flexibly generate the required sine wave signal according to specific application scenarios and performance index requirements, providing a basis for subsequent signal amplification, transmission, and processing.

[0056] In the embodiment of the present invention, the service requirements are to use the FPGA processor in the radio frequency circuit to drive the digital frequency synthesizer to output a sine wave signal according to the specific application scenarios and performance index requirements of the customer or the system, amplify it to a preset power through the radio frequency power amplifier module, and then perform signal processing and feedback control through components such as a coupler and an operational amplifier, and finally realize real-time monitoring and abnormal protection of the radio frequency output, ensuring that the radio frequency system can operate stably and reliably under the required frequency and power conditions.

[0057] Furthermore, the FPGA refers to a Field Programmable Gate Array, which is a programmable integrated circuit chip that can be configured with its internal circuit structure through programming after manufacturing to achieve specific logic functions and signal processing tasks. In the embodiments of the present invention, the FPGA serves as the core control unit, responsible for generating control signals according to service requirements, driving the digital frequency synthesizer to output sine wave signals, and sampling and processing the feedback signals to achieve real-time monitoring and abnormal protection of the RF output.

[0058] Among them, the digital frequency synthesizer refers to an electronic device that uses direct digital frequency synthesis (DDS) technology to generate frequency signals with high precision, high stability, and programmability through digital methods. Its core components include a phase accumulator, a waveform memory, and a digital-to-analog converter, etc., which can provide the required frequency signals in the fields of communication, radar, electronic measurement, etc., and have the advantages of fast frequency switching, high resolution, and low phase noise.

[0059] Furthermore, based on the service requirements, using a preset FPGA processor to drive the digital frequency synthesizer to output sine wave signals includes:

[0060] Obtain the preset frequency in the service requirements to get the preset drive frequency, and calculate the corresponding frequency control word through the preset drive frequency;

[0061] Based on the service requirements, obtain the resources of the FPGA processor to get the processor resources, and call the digital frequency synthesizer according to the processor resources. Design a phase accumulator and a sine lookup table through the digital frequency synthesizer;

[0062] Obtain the clock cycle of the FPGA processor, and use the phase accumulator to accumulate the frequency control word in each clock cycle to generate a phase value;

[0063] Based on the phase value, look up the amplitude corresponding to the sine lookup table to get the sine wave amplitude;

[0064] According to the sine wave amplitude, use the digital frequency synthesizer to generate a sine wave signal and output it.

[0065] In the embodiments of the present invention, calculating the corresponding frequency control word through the preset drive frequency will be calculated in combination with the system clock frequency in the FPGA processor. The specific calculation formula is:

[0066]

[0067] Among them, N is the bit width of the phase accumulator, f target is the preset drive frequency, f clkis the system clock frequency, and FCW is the frequency control word.

[0068] Further, the frequency control word refers to a key parameter calculated according to a preset driving frequency in a digital frequency synthesizer (DDS), which is used to control the value accumulated by the phase accumulator in each clock cycle, and thus determines the frequency of the DDS output signal.

[0069] Further, the phase accumulator adds the frequency control word to the current phase value in each clock cycle to generate a linearly increasing phase signal, and the sine look-up table looks up the corresponding sine wave amplitude according to this phase signal, jointly realizing the function of converting the digital frequency signal into an analog sine wave signal.

[0070] S2. Use the RF power amplifier module to amplify the output sine wave signal to a preset power to obtain an amplified sine wave signal, and couple the amplified sine wave signal through the coupler to obtain a coupled sine wave signal.

[0071] It can be understood that using the RF power amplifier module to amplify the output sine wave signal to a preset power and coupling it through the coupler to obtain a coupled sine wave signal, this process realizes the power amplification and effective transmission of the signal, ensuring that the signal has sufficient energy to meet the subsequent application requirements, and at the same time realizing the branching or distribution of the signal through the coupler, facilitating the monitoring and feedback control of the signal.

[0072] Further, the preset power refers to the target power value of the RF signal preset according to specific application scenarios and requirements. The RF power amplifier module is a dedicated electronic device used to amplify the power of the input RF signal to the required preset power, and the coupler is a device that can couple a part of the power of the RF signal from the main transmission path to another path, and is used for signal monitoring, feedback or power distribution, etc.

[0073] In the embodiment of the present invention, the use of the RF power amplifier module to amplify the output sine wave signal to a preset power to obtain an amplified sine wave signal includes:

[0074] Input the output sine wave signal into the RF power amplifier module, and based on the preset power, use the RF power amplifier module to set the voltage and current to obtain an adjusted voltage and an adjusted current;

[0075] Amplify the output sine wave signal based on the adjusted voltage and adjusted current to obtain an amplified sine wave signal.

[0076] S3. The operational amplifier amplifies the coupled sine wave signal through operation to obtain an amplified coupled signal, and returns the amplified coupled signal to the FPGA processor. The FPGA processor samples the amplified coupled signal to obtain a sampled signal. Herein, the FPGA processor includes a first-stage flip-flop and a second-stage flip-flop.

[0077] Understandably, the coupled sine wave signal is amplified through operation by the operational amplifier to obtain an amplified coupled signal and returned to the FPGA processor for sampling to obtain a sampled signal, which realizes further amplification of the signal for more accurate digital sampling and analysis, providing a high-quality data basis for subsequent signal processing and feedback control.

[0078] In the embodiment of the present invention, the operational amplifier is an electronic device with high gain, high input impedance, and low output impedance, and is used to perform amplification operation on the input signal to meet the requirements of signal processing and transmission.

[0079] Further, the first-stage flip-flop is used to capture the edge (such as the rising edge) of the sampled signal to generate an initial timing mark. The second-stage flip-flop is used to delay the output of the first-stage flip-flop (usually by one clock cycle) to form a stable timing comparison signal. Finally, by analyzing the output timing difference between these two stages of flip-flops, the period of the sampled signal can be accurately calculated (with an accuracy of 1 / 2 of the clock cycle), and then the signal frequency can be deduced.

[0080] S4. Obtain the timing diagrams corresponding to the first-stage flip-flop and the second-stage flip-flop in the sampled signal, and obtain the period of the sampled signal according to the timing diagrams to obtain the sampling period.

[0081] Understandably, obtaining the timing diagrams corresponding to the first-stage flip-flop and the second-stage flip-flop in the sampled signal and obtaining the period of the sampled signal (i.e., the sampling period) according to the timing diagrams helps to accurately analyze the time characteristics of the signal and provides key data for subsequent signal processing and system performance evaluation.

[0082] Further, the timing diagram is a graphical representation describing the state changes and signal interactions of these flip-flops in the time dimension. By analyzing the timing diagram, key parameters such as the period and delay of the signal can be accurately determined.

[0083] In the embodiment of the present invention, the step of obtaining the timing diagrams corresponding to the first-stage flip-flop and the second-stage flip-flop in the sampled signal and obtaining the period of the sampled signal according to the timing diagrams to obtain the sampling period includes:

[0084] Obtain the timing diagram corresponding to the first-stage flip-flop to obtain a first timing diagram, and obtain the timing diagram corresponding to the second-stage flip-flop to obtain a second timing diagram.

[0085] Obtain the first level state of the first timing diagram to obtain the first timing of the level, and obtain the second level state of the second timing diagram to obtain the second timing of the level;

[0086] Determine the flag points according to the positions of the first timing of the level and the second timing of the level in the first timing diagram and the second timing diagram, and obtain the sampling period according to the repetition period of the flag points in the first timing diagram and the second timing diagram.

[0087] In the embodiment of the present invention, when sampling the timing diagram through the first-level trigger and the second-level trigger, the frequency of the sampling clock should follow the Nyquist sampling theorem to ensure that the sampling frequency is higher than twice the highest frequency of the signal to be sampled

[0088] Further, the first level state and the second level state are the high level state and the low level state. When the first timing of the level takes the high level, the second timing of the level takes the low level. When the first timing of the level takes the low level, the second timing of the level takes the high level.

[0089] S5. Measure the number of cycles of the sampling signal within a preset time to obtain the number of sampling periods, and calculate the signal frequency according to the number of sampling periods to obtain the feedback signal frequency;

[0090] It is understandable that measuring the sampling period of the sampling signal within a preset time and calculating the feedback signal frequency can realize the real-time monitoring and accurate measurement of the signal frequency, provide key feedback information for the system, so as to timely discover and handle possible problems such as frequency deviation, and ensure the stable operation of the system.

[0091] Further, the feedback signal frequency refers to the value calculated through the number of sampling periods and reflecting the actual output signal frequency. It is an important parameter in the closed-loop control of the system and is used to compare with the preset driving frequency to judge whether the RF output is normal.

[0092] In the embodiment of the present invention, the measuring the number of cycles of the sampling signal within a preset time to obtain the number of sampling periods, and calculating the signal frequency according to the number of sampling periods to obtain the feedback signal frequency includes:

[0093] Measure the number of sampling periods of the sampling signal within the preset time to obtain the number of sampling periods of the sampling signal within the preset time;

[0094] Calculate the signal frequency according to the number of sampling periods, calculate the period of the sampling signal to obtain the signal period, and calculate the feedback signal frequency of the sampling signal according to the signal period.

[0095] Further, the calculation formulas for the signal period and the feedback signal frequency are respectively:

[0096]

[0097] Among them, n is the period, T is the signal period, and f is the feedback signal frequency.

[0098] S6. Compare the feedback signal frequency with the preset drive frequency. When the frequency difference between the feedback signal frequency and the preset drive frequency is greater than the preset threshold, it is determined that the RF output is abnormal, and the power amplifier control switch is disconnected.

[0099] It can be understood that for the abnormal detection and protection mechanism of RF output, by comparing the feedback signal frequency with the preset drive frequency, the abnormal deviation of the output signal frequency can be detected in time. When the deviation exceeds the preset threshold, a rapid response is made to disconnect the power amplifier control switch, so as to avoid further influence or damage to the system caused by abnormal signals and ensure the stability and reliability of the system.

[0100] Furthermore, the power amplifier control switch refers to a switching device used to control the working state of the RF power amplifier module. By disconnecting or closing this switch, the start and stop control of the RF power amplifier module can be realized; the preset drive frequency refers to the target frequency value that is preset according to the system design requirements and is used to drive the digital frequency synthesizer to output a sine wave signal. It is the expected output frequency during the normal operation of the system.

[0101] In the embodiment of the present invention, the FPGA processor is used to drive the digital frequency synthesizer to output a sine wave signal to obtain the output sine wave signal; the output sine wave signal is amplified to a preset power to obtain the amplified sine wave signal, and then coupled to obtain the coupled sine wave signal; the coupled sine wave signal is amplified by operation to obtain the amplified coupled signal, and the amplified coupled signal is returned to the FPGA processor for sampling to obtain the sampling signal; the number of sampling periods of the sampling signal is measured within a preset time, and the feedback signal frequency is calculated according to the number of sampling periods; the feedback signal frequency is compared with the preset drive frequency. When the frequency difference is greater than the preset threshold, it is determined that the RF output is abnormal, and the power amplifier control switch is disconnected. By driving the digital frequency synthesizer to generate a sine wave through the FPGA, amplifying it through the power amplifier, coupling and sampling it, and using the double flip-flop timing analysis to calculate the feedback frequency in real time, a closed-loop control of dynamic signal adjustment and abnormal automatic protection driven by business requirements is realized. Therefore, the present invention proposes a method, device, electronic device and computer-readable storage medium for protecting an RF power supply based on sampling frequency, and the present invention can improve the protection ability of the RF power supply.

[0102] As Figure 2 shown, it is a schematic diagram of the modules of the RF power supply protection device based on sampling frequency of the present invention.

[0103] The radio frequency power supply protection device 100 based on the sampling frequency according to the present invention can be installed in an electronic device. According to the functions achieved, the radio frequency power supply protection device based on the sampling frequency may include a signal generation module 101, a signal sampling module 102, a frequency calculation module 103, and an abnormality determination module 104. The modules in the present invention may also be referred to as units, which refer to a series of computer program segments that can be executed by the processor of the electronic device and can complete fixed functions, and are stored in the memory of the electronic device.

[0104] In this embodiment, the functions of each module / unit are as follows:

[0105] The signal generation module is used to obtain service requirements, and based on the service requirements, drive a preset digital frequency synthesizer to output a sine wave signal by using the FPGA processor in the radio frequency circuit, so as to obtain an output sine wave signal, wherein the radio frequency circuit includes an FPGA processor, a digital frequency synthesizer, a radio frequency power amplifier module, a coupler, an operational amplifier, and a power amplifier control switch;

[0106] The signal sampling module is used to amplify the output sine wave signal to a preset power by using the radio frequency power amplifier module to obtain an amplified sine wave signal, and couple the amplified sine wave signal through the coupler to obtain a coupled sine wave signal;

[0107] The coupled sine wave signal is amplified by the operational amplifier to obtain an amplified coupled signal, and the amplified coupled signal is returned to the FPGA processor. The FPGA processor samples the amplified coupled signal to obtain a sampled signal, wherein the FPGA processor includes a first-stage trigger and a second-stage trigger;

[0108] The frequency calculation module is used to obtain the timing diagrams corresponding to the first-stage trigger and the second-stage trigger in the sampled signal, and obtain the period of the sampled signal according to the timing diagrams to obtain a sampling period;

[0109] Measure the number of periods of the sampled signal within a preset time to obtain a sampling period number, and calculate the signal frequency according to the sampling period number to obtain a feedback signal frequency;

[0110] The abnormality determination module is used to compare the feedback signal frequency with a preset drive frequency. When the frequency difference between the feedback signal frequency and the preset drive frequency is greater than a preset threshold, it is determined that the radio frequency output is abnormal, and the power amplifier control switch is disconnected.

[0111] Specifically, each module in the radio frequency power supply protection device 100 based on the sampling frequency in the embodiment of the present invention adopts the same as the above Figure 1The technical means are the same as those of the radio frequency power supply protection method based on the sampling frequency, and can produce the same technical effects, which will not be elaborated here.

[0112] As Figure 3 shown, it is a schematic structural diagram of an electronic device for implementing the radio frequency power supply protection method based on the sampling frequency according to the present invention.

[0113] The electronic device may include a processor 10, a memory 11, a communication bus 12, and a communication interface 13, and may further include a computer program stored in the memory 11 and executable on the processor 10, such as a radio frequency power supply protection program based on the sampling frequency.

[0114] Among them, the processor 10 may be composed of integrated circuits in some embodiments. For example, it may be composed of a single packaged integrated circuit, or may be composed of multiple integrated circuits with the same or different functions, including a combination of one or more central processing units (CPUs), microprocessors, digital processing chips, graphics processors, and various control chips. The processor 10 is the control core (Control Unit) of the electronic device, connecting various components of the entire electronic device through various interfaces and lines, and by running or executing programs or modules stored in the memory 11 (such as executing a radio frequency power supply protection program based on the sampling frequency, etc.), and calling data stored in the memory 11, to perform various functions of the electronic device and process data.

[0115] The memory 11 includes at least one type of readable storage medium, and the readable storage medium includes flash memory, mobile hard disks, multimedia cards, card-type memories (such as SD or DX memories, etc.), magnetic memories, magnetic disks, optical disks, etc. The memory 11 may be an internal storage unit of the electronic device in some embodiments, such as the mobile hard disk of the electronic device. The memory 11 may also be an external storage device of the electronic device in other embodiments, such as a plug-in mobile hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the electronic device. Further, the memory 11 may also include both an internal storage unit and an external storage device of the electronic device. The memory 11 can be used not only to store application software installed on the electronic device and various types of data, such as the code of a radio frequency power supply protection program based on the sampling frequency, etc., but also to temporarily store data that has been output or will be output.

[0116] The communication bus 12 may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The bus can be divided into an address bus, a data bus, a control bus, etc. The bus is configured to implement connection communication between the memory 11 and at least one processor 10, etc.

[0117] The communication interface 13 is used for communication between the above-mentioned electronic device and other devices, including a network interface and a user interface. Optionally, the network interface may include a wired interface and / or a wireless interface (such as a WI-FI interface, a Bluetooth interface, etc.), and is generally used to establish a communication connection between this electronic device and other electronic devices. The user interface may be a display, an input unit (such as a keyboard), and optionally, the user interface may also be a standard wired interface or a wireless interface. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch liquid crystal display, and an OLED (Organic Light-Emitting Diode) toucher, etc. Among them, the display may also be appropriately referred to as a display screen or a display unit, and is used to display the information processed in the electronic device and to display a visual user interface.

[0118] Figure 3 Only an electronic device with components is shown. Those skilled in the art can understand that Figure 3 the shown structure does not constitute a limitation on the electronic device, and it may include fewer or more components than shown, or combine certain components, or have different component arrangements.

[0119] For example, although not shown, the electronic device may further include a power source (such as a battery) for powering each component. Preferably, the power source can be logically connected to the at least one processor 10 through a power management device, so as to implement functions such as charge management, discharge management, and power consumption management through the power management device. The power source may further include any components such as one or more DC or AC power sources, a recharge device, a power failure detection circuit, a power converter or an inverter, and a power status indicator. The electronic device may further include various sensors, a Bluetooth module, a Wi-Fi module, etc., which will not be elaborated here.

[0120] It should be understood that the above embodiments are only for illustration purposes and are not limited by this structure in the scope of the patent application.

[0121] The radio frequency power supply protection program based on the sampling frequency stored in the memory 11 in the electronic device is a combination of multiple computer programs. When running in the processor 10, it can achieve the following:

[0122] Obtain service requirements, and based on the service requirements, use the FPGA processor in the radio frequency circuit to drive a preset digital frequency synthesizer to output a sine wave signal, and obtain an output sine wave signal. Among them, the radio frequency circuit includes an FPGA processor, a digital frequency synthesizer, a radio frequency power amplifier module, a coupler, an operational amplifier, and a power amplifier control switch;

[0123] Use the radio frequency power amplifier module to amplify the output sine wave signal to a preset power to obtain an amplified sine wave signal, and couple the amplified sine wave signal through the coupler to obtain a coupled sine wave signal;

[0124] Operate and amplify the coupled sine wave signal through the operational amplifier to obtain an amplified coupled signal, and return the amplified coupled signal to the FPGA processor. Sample the amplified coupled signal through the FPGA processor to obtain a sampling signal. Among them, the FPGA processor includes a first-stage trigger and a second-stage trigger;

[0125] Obtain the timing diagrams corresponding to the first-stage trigger and the second-stage trigger in the sampling signal, and obtain the period of the sampling signal according to the timing diagrams to obtain a sampling period;

[0126] Measure the number of periods of the sampling signal within a preset time to obtain a sampling period number, and calculate the signal frequency according to the sampling period number to obtain a feedback signal frequency;

[0127] Compare the feedback signal frequency with a preset drive frequency. When the frequency difference between the feedback signal frequency and the preset drive frequency is greater than a preset threshold, determine that the radio frequency output is abnormal and disconnect the power amplifier control switch.

[0128] Specifically, for the specific implementation method of the above computer program by the processor 10, reference can be made to Figure 1 The description of the relevant steps in the corresponding embodiment, which will not be elaborated here.

[0129] Furthermore, if the modules / units integrated in the electronic device are implemented in the form of software functional units and sold or used as independent products, they can be stored in a non-volatile computer-readable storage medium. The computer-readable storage medium can be volatile or non-volatile. For example, the computer-readable medium can include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a mobile hard disk, a magnetic disk, an optical disc, a computer memory, a read-only memory (ROM, Read-Only Memory).

[0130] The present invention also provides a computer-readable storage medium. The readable storage medium stores a computer program. When the computer program is executed by a processor of an electronic device, it can implement:

[0131] Obtain service requirements, and based on the service requirements, use the FPGA processor in the radio frequency circuit to drive a preset digital frequency synthesizer to output a sine wave signal, obtaining an output sine wave signal, where the radio frequency circuit includes an FPGA processor, a digital frequency synthesizer, a radio frequency power amplifier module, a coupler, an operational amplifier, and a power amplifier control switch;

[0132] Use the radio frequency power amplifier module to amplify the output sine wave signal to a preset power, obtaining an amplified sine wave signal, and couple the amplified sine wave signal through the coupler to obtain a coupled sine wave signal;

[0133] Operate and amplify the coupled sine wave signal through the operational amplifier to obtain an amplified coupled signal, and return the amplified coupled signal to the FPGA processor. The FPGA processor samples the amplified coupled signal to obtain a sampled signal, where the FPGA processor includes a first-stage trigger and a second-stage trigger;

[0134] Obtain the timing diagrams corresponding to the first-stage trigger and the second-stage trigger in the sampled signal, and obtain the period of the sampled signal according to the timing diagrams to obtain a sampling period;

[0135] Measure the number of periods of the sampled signal within a preset time to obtain a sampling period number, and calculate the signal frequency according to the sampling period number to obtain a feedback signal frequency;

[0136] Compare the feedback signal frequency with a preset driving frequency. When the frequency difference between the feedback signal frequency and the preset driving frequency is greater than a preset threshold, determine that the radio frequency output is abnormal and disconnect the power amplifier control switch.

[0137] In several embodiments provided by the present invention, it should be understood that the disclosed devices, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For example, the division of the modules is only a logical function division, and there can be other division methods in actual implementation.

[0138] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical units, that is, they can be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0139] In addition, in each embodiment of the present invention, the functional modules can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above integrated unit can be implemented in the form of hardware or in the form of a combination of hardware and software functional modules.

[0140] For those skilled in the art, it is obvious that the present invention is not limited to the details of the above exemplary embodiments, and without departing from the spirit or basic characteristics of the present invention, the present invention can be implemented in other specific forms.

[0141] Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting. The scope of the present invention is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the present invention. Any reference signs in the claims should not be regarded as limiting the claims involved.

[0142] The blockchain referred to in the present invention is a new application mode of computer technologies such as distributed data storage, peer-to-peer transmission, consensus mechanism, and encryption algorithm. Blockchain, essentially a decentralized database, is a string of data blocks generated by using cryptographic methods. Each data block contains information about a batch of network transactions, which is used to verify the validity (anti-counterfeiting) of the information and generate the next block. The blockchain can include a blockchain underlying platform, a platform product service layer, and an application service layer, etc.

[0143] The embodiments of this application can acquire and process relevant data based on artificial intelligence technology. Among them, Artificial Intelligence (AI) is to use a digital computer or a machine controlled by a digital computer to simulate, extend, and expand human intelligence, sense the environment, acquire knowledge, and use knowledge to obtain the best results of theory, method, technology, and application system.

[0144] In addition, it is obvious that the term "comprising" does not exclude other units or steps, and the singular does not exclude the plural. A plurality of units or devices stated in the system claims can also be implemented by one unit or device through software or hardware. Words such as "second" are used to denote names and do not denote any particular order.

[0145] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. A radio frequency power supply protection method based on sampling frequency, characterized in that: The method comprises: Obtaining business requirements, and based on the business requirements, using an FPGA processor in a radio frequency circuit to drive a preset digital frequency synthesizer to output a sine wave signal, thereby obtaining an output sine wave signal, wherein the radio frequency circuit includes an FPGA processor, a digital frequency synthesizer, a radio frequency power amplifier module, a coupler, an operational amplifier, and a power amplifier control switch; Amplifying the output sine wave signal to a preset power by using the radio frequency power amplifier module to obtain an amplified sine wave signal, and coupling the amplified sine wave signal by using the coupler to obtain a coupled sine wave signal; The coupled sine wave signal is operationally amplified by the operational amplifier to obtain an amplified coupled signal, and the amplified coupled signal is returned to the FPGA processor, and the amplified coupled signal is sampled by the FPGA processor to obtain a sampled signal, wherein the FPGA processor includes a primary trigger and a secondary trigger; Obtaining a timing diagram corresponding to a primary trigger and a secondary trigger in the sampling signal, and obtaining a period of the sampling signal according to the timing diagram to obtain a sampling period; Determine the number of cycles of the sampling signal within a preset time to obtain the sampling cycle number, and calculate the signal frequency according to the sampling cycle number to obtain the feedback signal frequency; The feedback signal frequency is compared with a preset driving frequency. When a frequency difference between the feedback signal frequency and the preset driving frequency is greater than a preset threshold, it is determined that the RF output is abnormal and the power amplifier control switch is disconnected.

2. The RF power supply protection method based on sampling frequency according to claim 1, characterized in that: Based on the business requirements, the method uses a preset FPGA processor to drive a digital frequency synthesizer to output a sine wave signal, including: Acquire the preset frequency in the business requirement, obtain the preset driving frequency, and calculate the corresponding frequency control word through the preset driving frequency; Acquire resources of the FPGA processor based on the business requirements to obtain processor resources, call a digital frequency synthesizer according to the processor resources, and design a phase accumulator and a sine lookup table through the digital frequency synthesizer; Obtaining a clock cycle of the FPGA processor, and using the phase accumulator to accumulate the frequency control word in each clock cycle to generate a phase value; Based on the phase value, searching the sine lookup table for an amplitude corresponding to the sine wave to obtain a sine wave amplitude; According to the sine wave amplitude, a sine wave signal is generated and outputted by using the digital frequency synthesizer.

3. The RF power supply protection method based on sampling frequency according to claim 1, characterized in that: The step of amplifying the output sine wave signal to a preset power by using the radio frequency power amplifier module to obtain an amplified sine wave signal includes: Inputting the output sine wave signal into the radio frequency power amplifier module, and based on the preset power, using the radio frequency power amplifier module to set the voltage and current to obtain the adjusted voltage and the adjusted current; The output sinusoidal wave signal is amplified based on the adjustment voltage and the adjustment current to obtain an amplified sinusoidal wave signal.

4. The RF power supply protection method based on sampling frequency according to claim 1, characterized in that: The obtaining of a timing diagram corresponding to a primary trigger and a secondary trigger in the sampling signal, and obtaining a period of the sampling signal according to the timing diagram to obtain a sampling period, includes: Obtain a timing diagram corresponding to the first-level trigger to obtain a first timing diagram, and obtain a timing diagram corresponding to the second-level trigger to obtain a second timing diagram; Acquire a first level state of the first timing diagram to obtain a first level timing, acquire a second level state of the second timing diagram to obtain a second level timing; A mark point is determined according to positions of the first level timing and the second level timing in the first timing diagram and the second timing diagram, and a sampling period is obtained according to a repetition period of the mark point in the first timing diagram and the second timing diagram.

5. The RF power supply protection method based on sampling frequency according to claim 1, characterized in that: The step of measuring the number of cycles of the sampling signal within a preset time to obtain the number of sampling cycles, and calculating the signal frequency according to the number of sampling cycles to obtain the feedback signal frequency includes: Determine the number of cycles of the sampling signal within the preset time to obtain the number of sampling cycles; The period of the sampling signal is calculated according to the sampling period number to obtain the signal period, and the feedback signal frequency of the sampling signal is calculated according to the signal period.

6. The RF power supply protection method based on sampling frequency according to claim 5, characterized in that: The calculation formulas for the signal period and the feedback signal frequency are respectively: Where n is the period, T is the signal period, and f is the feedback signal frequency.

7. The RF power supply protection method based on sampling frequency according to any one of claims 1 to 6, characterized in that: After acquiring the first level state of the timing corresponding to the first-level trigger to obtain the first level timing, acquiring the second level state corresponding to the second-level trigger to obtain the second level timing, the method further includes: The first level state and the second level state are a high level state and a low level state. When the first level sequence takes a high level, the second level sequence takes a low level. When the first level sequence takes a low level, the second level sequence takes a high level.

8. A radio frequency power supply protection device based on sampling frequency, characterized in that: The device comprises: A signal generation module, used to obtain business requirements, and based on the business requirements, use the FPGA processor in the radio frequency circuit to drive a preset digital frequency synthesizer to output a sine wave signal to obtain an output sine wave signal, wherein the radio frequency circuit includes an FPGA processor, a digital frequency synthesizer, a radio frequency power amplifier module, a coupler, an operational amplifier, and a power amplifier control switch; A signal sampling module, used to amplify the output sinusoidal wave signal to a preset power by using the radio frequency power amplifier module to obtain an amplified sinusoidal wave signal, and couple the amplified sinusoidal wave signal through the coupler to obtain a coupled sinusoidal wave signal; The coupled sine wave signal is operationally amplified by the operational amplifier to obtain an amplified coupled signal, and the amplified coupled signal is returned to the FPGA processor, and the amplified coupled signal is sampled by the FPGA processor to obtain a sampled signal, wherein the FPGA processor includes a primary trigger and a secondary trigger; A frequency calculation module, used to obtain a timing diagram corresponding to a primary trigger and a secondary trigger in the sampling signal, and obtain a period of the sampling signal according to the timing diagram to obtain a sampling period; Determine the number of cycles of the sampling signal within a preset time to obtain the sampling cycle number, and calculate the signal frequency according to the sampling cycle number to obtain the feedback signal frequency; The abnormality judgment module is used to compare the feedback signal frequency with the preset driving frequency. When the frequency difference between the feedback signal frequency and the preset driving frequency is greater than a preset threshold, it is determined that the RF output is abnormal and the power amplifier control switch is disconnected.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and, a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the RF power supply protection method based on sampling frequency as described in any one of claims 1 to 7.

10. A computer-readable storage medium, comprising a data storage area and a program storage area, wherein the data storage area stores created data and the program storage area stores a computer program; wherein: When the computer program is executed by a processor, the sampling frequency-based RF power supply protection method according to any one of claims 1 to 7 is implemented.

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