A bidirectional energy buffer system based on a supercapacitor bank

Through a bidirectional energy buffering system based on the Farad capacitor group, combined with the fast charging and discharging characteristics of the Farad capacitor group and the bidirectional DC-DC conversion technology, the problems of power demand fluctuations and energy waste during operation of the robot are solved, efficient energy management and rapid response are achieved, and robot performance is improved.

CN120185175BActive Publication Date: 2025-07-18HUAQIAO UNIVERSITY
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Patent Information

Application Number
CN202510660972.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-05-22
Publication Date
2025-07-18
Estimated Expiration
2045-05-22

AI Technical Summary

Technical Problem

The existing technology cannot effectively solve the problems of power demand fluctuations, insufficient battery output capacity and energy waste caused by the instantaneous start-up of the motor and brake during operation.

Method used

Using a bidirectional energy buffering system based on the Farad capacitor group, combined with the fast charging and discharging characteristics of the Farad capacitor group and the bidirectional DC-DC conversion technology, intelligent control is realized through the microcontroller unit. The system can flexibly switch between energy storage and release, ensuring that the robot obtains sufficient energy support when high power demands and efficiently recovers excess energy when low power demands.

Benefits of technology

It improves the robot's stable operation ability in complex tasks, extends battery life, reduces energy loss, and improves overall performance.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The present invention provides a bidirectional energy buffer system based on a supercapacitor bank, which relates to the technical field of robot working power control. By integrating the supercapacitor bank with advanced bidirectional DC-DC conversion technology, this system can intelligently switch between energy storage and release, effectively coping with the rapid changes in load power. It introduces an intelligent control architecture with a microcontroller unit as the core, and combines signal conditioning and bus communication functions to achieve precise regulation of power flow. During operation, it can not only significantly improve the power response speed, but also reuse the energy generated during motor braking through a unique energy recovery mechanism, thereby improving the overall energy efficiency. In addition, this system also has an automatic parameter calibration function, further optimizing the performance.
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Description

Technical Field

[0001] The present invention relates to the technical field of robot working power control, and particularly relates to a bidirectional energy buffer system based on a supercapacitor bank. Background Art

[0002] In the rapid development of modern technology, robot technology has become an important force driving social progress. From industrial automation to daily life services, the application scenarios of robots are constantly expanding, and their functions and performances are also continuously improving. However, with the complexity and diversification of robot technology, its power system faces many challenges.

[0003] During the operation of a robot, especially when performing complex tasks, it often requires frequent start-stop and acceleration-deceleration operations. These operations pose extremely high requirements on the dynamic performance of the motor. For example, a high-torque motor generates a huge current demand during instant startup, and traditional battery systems are difficult to meet this instantaneous power demand due to discharge rate limitations, resulting in limited motor performance. In addition, the motor generates a back electromotive force during the braking process. If this part of the energy cannot be effectively recovered, it will not only cause energy waste but also impact the battery system, further shortening the battery life.

[0004] In addition to the dynamic characteristics of the motor, the characteristics of the battery itself also limit the performance of the robot. The battery exhibits a voltage drop phenomenon when the load current suddenly increases, and this "breathing effect" affects the stable operation of the motor. Although in some motor drive circuits, a large capacitor is connected in parallel at the power input terminal to alleviate the voltage fluctuation problem, this method can only solve the problem to a certain extent and cannot achieve effective energy recovery and reuse.

[0005] Furthermore, with the complexity of robot application scenarios, the requirements for energy management are also increasing. How to achieve fast power response, stable energy buffering, and efficient energy recovery and reuse under dynamic loads has become a key issue in the current development of robot technology. Most existing solutions focus on optimizing the motor design or improving the battery management system, but these methods often can only solve part of the problem and cannot fundamentally improve the overall performance of the system.

[0006] In view of this, this application is proposed. Summary of the Invention

[0007] The present invention provides a bidirectional energy buffer system based on a supercapacitor bank, which can at least partially improve the above problems.

[0008] To achieve the above object, the present invention adopts the following technical solutions:

[0009] A two-way energy buffer system based on a supercapacitor bank, comprising: a lower computer control circuit, a main circuit of two-way DC-DC conversion, a power supply, and a load. The data acquisition terminal of the lower computer control circuit is electrically connected to the main circuit of two-way DC-DC conversion. The output terminal of the lower computer control circuit is electrically connected to the input terminal of the main circuit of two-way DC-DC conversion. The communication terminal of the lower computer control circuit is communicatively connected to an external upper computer. The output terminal of the main circuit of two-way DC-DC conversion is electrically connected to the load. The main circuit of two-way DC-DC conversion is electrically connected to the power supply;

[0010] Wherein, the micro-control unit of the lower computer control circuit is configured to implement the following steps by executing the computer program stored therein:

[0011] Obtain the voltage and current values of the load, as well as the voltage value and charge-discharge current value of the supercapacitor energy storage device in the main circuit of two-way DC-DC conversion, calculate the current output power of the load and the power of the supercapacitor energy storage device, calculate the power difference between the current output power of the load and a preset power threshold, and switch the working mode according to the difference;

[0012] Calculate the difference between the power of the supercapacitor energy storage device and the power difference as the error of the first-stage power loop PI regulator, calculate the difference between the charge-discharge current value and a preset safe charge-discharge current as the error of the second-stage current loop PI regulator, and regulate the supercapacitor energy storage device in the main circuit of two-way DC-DC conversion according to the error.

[0013] In summary, the two-way energy buffer system based on the supercapacitor bank aims to solve problems such as power demand fluctuations, insufficient battery output capacity, and energy waste caused by instantaneous starting, braking and other operations of the robot during operation. In terms of design, the system cleverly combines the fast charge-discharge characteristics of the supercapacitor bank with two-way DC-DC conversion technology and can respond quickly when the power demand changes. Through the precise regulation of the intelligent control unit, the system can flexibly switch between energy storage and release, ensure that the robot obtains sufficient energy support when the power demand is high, and efficiently recover excess energy when the power demand is low, avoiding energy waste. In addition, the system also has an automatic parameter calibration function, further optimizing the accuracy and efficiency of energy management.

[0014] The core advantage of this system lies in its comprehensive optimization of robot energy management. Through an efficient energy recovery mechanism, the system can effectively utilize the energy generated during motor braking, reduce energy loss, and extend battery life. At the same time, its fast dynamic response ability ensures the stable operation of the robot in complex tasks, improving the overall performance. Simply put, the bidirectional energy buffer system based on a supercapacitor bank is connected between the power supply and the load. It can monitor the power during the operation of the power supply, compare it with a preset power threshold, change the power path of the circuit, and switch the topological working mode to achieve the effect of energy buffering.

[0015] Compared with the prior art, the bidirectional energy buffer system based on a supercapacitor bank has the following beneficial effects: 1. Efficient energy management: The efficiency of the single-stage converter is increased to , supporting peak power output with a stable input power. 2. Fast dynamic response: The two-stage PI control makes the power tracking error , and the response time is . 3. Realize the recovery of motor braking energy: The ideal diode separates the power supply and the load, which can not only prevent the backflow of motor braking energy from damaging the battery, but also return this part of the energy to the capacitor bank for storage. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 FIG. is the hardware connection diagram of the bidirectional energy buffer system based on a supercapacitor bank provided by an embodiment of the present invention;

[0017] Figure 2 FIG. is the circuit connection diagram of the bidirectional energy buffer system based on a supercapacitor bank provided by an embodiment of the present invention;

[0018] Figure 3 FIG. is the schematic circuit diagram of the bidirectional BUCK - BOOST main topology of the bidirectional energy buffer system based on a supercapacitor bank provided by an embodiment of the present invention;

[0019] Figure 4 FIG. is the schematic circuit diagram of the ideal diode of the bidirectional energy buffer system based on a supercapacitor bank provided by an embodiment of the present invention;

[0020] Figure 5 FIG. is the parameter fine-tuning flowchart of the bidirectional energy buffer system based on a supercapacitor bank provided by an embodiment of the present invention;

[0021] Figure 6 FIG. is the control logic flowchart of the bidirectional energy buffer system based on a supercapacitor bank provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0022] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0023] Referring to Figure 1 and Figure 2 as shown, the first embodiment of the present invention discloses a bidirectional energy buffer system based on a supercapacitor bank, which includes: a lower computer control circuit, a bidirectional DC-DC conversion main circuit, a power supply and a load. The data acquisition terminal of the lower computer control circuit is electrically connected to the bidirectional DC-DC conversion main circuit. The output terminal of the lower computer control circuit is electrically connected to the input terminal of the bidirectional DC-DC conversion main circuit. The communication terminal of the lower computer control circuit is communicatively connected to an external upper computer. The output terminal of the bidirectional DC-DC conversion main circuit is electrically connected to the load. The bidirectional DC-DC conversion main circuit is electrically connected to the power supply;

[0024] In this embodiment, the system consists of a lower computer control circuit, a bidirectional DC-DC conversion main circuit, a power supply and a load. Among them, the data acquisition terminal of the lower computer control circuit is electrically connected to the bidirectional DC-DC conversion main circuit for real-time acquisition of the operation data of the main circuit. The output terminal of the lower computer control circuit is electrically connected to the input terminal of the bidirectional DC-DC conversion main circuit for sending control instructions to the main circuit. The communication terminal of the lower computer control circuit is communicatively connected to an external upper computer for easy parameter setting and system monitoring. The output terminal of the bidirectional DC-DC conversion main circuit is electrically connected to the load to provide it with stable energy output. At the same time, the bidirectional DC-DC conversion main circuit is electrically connected to the power supply to ensure continuous energy supply.

[0025] Specifically, the micro-control unit MCU of the lower computer control circuit receives current and power information obtained from a signal conditioning circuit, and outputs two control signals to control the DC-DC converters of the bidirectional DC-DC conversion main circuit to perform mode switching, and realizes current and power closed-loop control through an automatic control algorithm. The system can switch the main topology to work in the synchronous BUCK mode or the reverse BOOST mode according to the load situation. The input power is stable in both modes, and the maximum power output can reach 250W, realizing the function of storing energy when the power demand is loose and releasing energy when the power is tight, providing a solution for reducing the power supply pressure and improving the energy utilization rate of the robot.

[0026] Aim to improve the power response speed and energy buffer stability under dynamic loads; realize the recovery of motor braking energy and improve the energy utilization rate; further ensure the stability of the battery output power and extend the battery life.

[0027] Preferably, the lower computer control circuit includes: a micro control unit, a signal conditioning circuit, an auxiliary power supply circuit, and a bus communication circuit. The input end of the auxiliary power supply circuit and the input end of the signal conditioning circuit are electrically connected to the output end of the bidirectional DC-DC conversion main circuit. The input end of the micro control unit is electrically connected to the output end of the auxiliary power supply circuit and the output end of the signal conditioning circuit. The output end of the micro control unit is electrically connected to the driving end of the bidirectional DC-DC conversion main circuit and the input end of the bus communication circuit. The data end of the bus communication circuit is communicatively connected to an external upper computer;

[0028] Among them, the auxiliary power supply circuit is configured to reduce the input voltage to a preset working range to provide stable electric energy. The signal conditioning circuit is configured to collect the voltage and current values of each port of the bidirectional DC-DC conversion main circuit. The micro control unit is configured to output corresponding control signals to the bidirectional DC-DC conversion main circuit according to the voltage and current values collected by the signal conditioning circuit. The bus communication circuit is configured to establish a connection with an external upper computer for parameter fine calibration and threshold adjustment.

[0029] In this embodiment, the lower computer control circuit is the core control unit of the system, including a micro control unit, a signal conditioning circuit, an auxiliary power supply circuit, and a bus communication circuit. The input end of the auxiliary power supply circuit and the input end of the signal conditioning circuit are electrically connected to the output end of the bidirectional DC-DC conversion main circuit. The input end of the micro control unit is electrically connected to the output end of the auxiliary power supply circuit and the output end of the signal conditioning circuit. The output end of the micro control unit is electrically connected to the driving end of the bidirectional DC-DC conversion main circuit and the input end of the bus communication circuit. The data end of the bus communication circuit is communicatively connected to an external upper computer.

[0030] During the operation of the system, the auxiliary power supply circuit first reduces the input voltage to a preset working range to provide stable electric energy for various chips in the system (such as peripheral circuits like MCU, driver chips, communication chips, etc.) to ensure their normal operation. The signal conditioning circuit then uses an analog-to-digital converter (ADC) device to collect the voltage and current values of each port of the bidirectional DC-DC conversion main circuit in real time and feeds back this data to the micro control unit. The micro control unit, based on the collected voltage and current values, that is, obtains the feedback voltage and current values through the signal conditioning circuit, calculates the port power and conducts logical analysis, generates corresponding control signals (i.e., two pulse width modulation PWM control signals), and outputs them to the driving end of the bidirectional DC-DC conversion main circuit (i.e., the NMOS driving circuit), thereby achieving precise control of the working mode of the main circuit.

[0031] In addition, the bus communication circuit is used to establish a connection with an external host computer. On the one hand, it can convert information such as the system operation status, voltage and current sampling values, working status, and power threshold into bus signals and transmit them to the host computer for real-time monitoring and data analysis. On the other hand, through the host computer, the system can be finely calibrated for parameters and the threshold can be adjusted to further optimize the system performance. This design not only improves the flexibility and scalability of the system but also enables the system to better adapt to different application scenarios and load requirements.

[0032] Preferably, the bidirectional DC-DC conversion main circuit includes a farad capacitor energy storage device, an NMOS drive circuit, a bidirectional BUCK-BOOST main topology circuit, and an ideal diode circuit. The output end of the farad capacitor energy storage device is electrically connected to the input end of the auxiliary power supply circuit. The bidirectional BUCK-BOOST main topology circuit is electrically connected to the farad capacitor energy storage device and the power supply. The ideal diode circuit is connected in parallel at both ends of the bidirectional BUCK-BOOST main topology circuit. The input end of the NMOS drive circuit is electrically connected to the output end of the micro control unit, and the output end of the NMOS drive circuit is electrically connected to the input end of the bidirectional BUCK-BOOST main topology circuit.

[0033] Among them, the ideal diode circuit is configured to prevent the energy of the farad capacitor energy storage device from flowing back. The NMOS drive circuit is configured to turn on or off the switching tube of the bidirectional BUCK-BOOST main topology circuit according to the control signal sent by the micro control unit to change its working mode.

[0034] In this embodiment, in the system, the output end of the farad capacitor energy storage device is electrically connected to the input end of the auxiliary power supply circuit to provide stable energy support for the system. The bidirectional BUCK-BOOST main topology circuit is electrically connected to the farad capacitor energy storage device and the power supply, constituting the core path of energy conversion. The bidirectional BUCK-BOOST main topology circuit can operate in the forward synchronous Buck mode and the reverse Boost mode to provide paths for charging and storing energy in the capacitor bank and discharging and releasing energy from the capacitor bank.

[0035] The input terminal of the NMOS drive circuit is electrically connected to the output terminal of the microcontroller unit, and its output terminal is electrically connected to the input terminal of the bidirectional BUCK-BOOST main topology circuit, achieving precise control of the working mode of the main topology circuit. Simply put, the NMOS drive circuit receives the PWM control signal sent from the microcontroller unit, and based on this control signal, turns on or off the switching tubes of the bidirectional BUCK-BOOST main topology circuit, thereby controlling the two NMOSs of the main topology and changing the working mode of the main topology. It realizes the switching between the forward synchronous BUCK and reverse BOOST modes of the bidirectional BUCK-BOOST main topology. This flexible control method enables the system to quickly switch between energy storage and release according to the actual needs of the load, achieving precise regulation of power flow. The microcontroller unit generates control signals through real-time monitoring of the voltage and current values of the system and after logical analysis, ensuring the efficient operation of the system under different working conditions.

[0036] Furthermore, the bidirectional BUCK-BOOST main topology and its drive circuit are as Figure 3 shown. The bidirectional synchronous rectifier BUCK-BOOST circuit is formed by cascading the synchronous BUCK circuit topology and the reverse synchronous BOOST circuit topology. Among them is defined as the duty cycle of the BUCK circuit, is defined as the duty cycle of the BOOST circuit. Among them, the voltage gain formula of the synchronous BUCK circuit topology is: , and the voltage gain formula of the reverse synchronous BOOST circuit topology is: . From this, the voltage gain formula of the BUCK-BOOST circuit is derived as: .

[0037] According to the above-mentioned BUCK-BOOST voltage gain formula, it can be seen that no matter what mode the circuit works in, it is essentially achieved by controlling the buck duty cycle and the boost duty cycle . Regarding the relevant parameters involved in the component selection of the topology circuit: the maximum input voltage , the charging voltage of the capacitor bank , the load output voltage , the ripple coefficient is taken as , the switching frequency , the maximum output current . The calculation formulas for component selection are as follows:

[0038] The inductance calculation formula required for the main topology of the circuit to work in the BUCK mode is: ; the inductance calculation formula required for the main topology of the circuit to work in the BOOST mode is ; the output voltage fluctuation is: , and the output current fluctuation is: ; obtain the capacitance value of the filter capacitor required for the operation of the main circuit topology: .

[0039] It should be noted that when actually selecting devices for the bidirectional energy buffer system based on the supercapacitor bank, a margin should be left, and larger inductance and capacitance values should be selected. Considering the bidirectional symmetry of the main circuit topology of this circuit, the input capacitor and the output capacitor need to be selected with the same capacitance to ensure the stability of the bidirectional operation of the circuit. Further, in order to improve the filtering effect, electrolytic capacitors and ceramic capacitors are selected to be used in parallel to improve the high-frequency characteristics of the circuit.

[0040] The ideal diode circuit is connected in parallel at both ends of the bidirectional BUCK - BOOST main topology circuit, which can change the energy flow path. In the forward synchronous Buck mode, the power supply can output the power supply power to charge and store energy in the capacitor bank without affecting the load output, that is, charge the supercapacitor bank; in the reverse Boost mode, the energy stored in the capacitor bank and the energy provided by the power supply are output to the load together, that is, the supercapacitor bank releases energy and supplies energy to the load together with the power supply. In addition, the ideal diode separates / isolates the charging circuit and the discharging circuit of the capacitor bank, preventing the reverse flow of the capacitor bank energy from damaging the previous-stage circuit, and playing a key protection role. When the supercapacitor energy storage device is in the charging process, the ideal diode circuit ensures that the energy can only flow unidirectionally, preventing the energy from flowing back from the energy storage device to the power supply or other circuit parts, thereby protecting the safe operation of the system. This design not only improves the reliability of the system but also extends the service life of the battery and other electronic components.

[0041] In this embodiment, the ideal diode hardware circuit is composed of an LM5050 power electronic switch chip and an N-channel MOS transistor, and the circuit schematic diagram is as Figure 4 shown. The OFF pin of the LM5050 controls the switching and conduction of the N-channel MOS transistor by monitoring the grounded state. When the OFF pin is at a low level, the MOS transistor conducts. When the power supply is disconnected, if there is reverse flow of capacitor energy, the OFF pin detects the potential fluctuation generated by the reverse flow of capacitor energy and turns off the N-channel MOS transistor to disconnect the circuit, achieving the effect of protecting the previous-stage circuit.

[0042] Preferably, the supercapacitor energy storage device is a supercapacitor bank formed by connecting 9 preset supercapacitors in series.

[0043] In this embodiment, the supercapacitor energy storage device is an important part of the system. It is formed by connecting 9 preset supercapacitors in series, equipped with a voltage equalization protection chip and an external current boosting circuit to form a supercapacitor bank, which has a high power density and fast charge and discharge capabilities. This design enables the system to release a large amount of energy in a short time to meet the requirements of the robot for instantaneous high-power demands. At the same time, it can also efficiently recover excess energy when the power demand is low, avoiding energy waste. The high-power characteristics of the supercapacitor bank provide the robot with a strong instantaneous power compensation ability, significantly improving its dynamic response speed and stability in complex tasks.

[0044] For example: A supercapacitor energy storage device is composed of 9 supercapacitors with a voltage of 2.7V and a capacitance of 100F connected in series. Since the capacitance of the 2.7V 100F capacitor is large and the current is relatively large during the charge and discharge process, in order to ensure that the capacitor monomer does not overvoltage, a high-power discharge circuit of BW6101 + external current boosting MOS + high-power resistor is adopted to protect the safe operation of the supercapacitor bank. Reading the chip instruction manual shows that the internal MOS tube of BW6101 can only discharge a current of 200mA, so a larger discharge current must be completed through an external MOS and two high-power alloy resistors. At this time, the maximum voltage of the supercapacitor bank is: , and the marked energy of the supercapacitor bank is: . Although the energy value that the supercapacitor bank can provide is not much, relying on the high power density and fast charge and discharge capabilities of the supercapacitor, a large amount of energy can be released in a short time, which can play an advantage in occasions with instantaneous high power and play a role in instantaneous power compensation. In addition, the supercapacitor bank can also recover the energy generated during motor braking and reduce energy loss.

[0045] Please refer to Figure 6 , in which the microcontroller unit of the lower computer control circuit is configured to implement the following steps by executing the computer program stored in its internal memory:

[0046] S1. Obtain the voltage and current values of the load, as well as the voltage value and charge and discharge current value of the supercapacitor energy storage device in the bidirectional DC-DC conversion main circuit, calculate the current output power of the load and the power of the supercapacitor energy storage device, and calculate the power difference between the current output power of the load and the preset power threshold, and switch the working mode according to the difference;

[0047] Specifically, step S1 includes: obtaining the voltage and current values of the output load, as well as the voltage value and charge and discharge current value of the supercapacitor energy storage device in the bidirectional DC-DC conversion main circuit , and performing a multiplication operation to obtain the current output power of the load and the power of the supercapacitor energy storage device ;

[0048] Calculate the current output power of the computing load and the preset power threshold The power difference between them , = , and judge the power difference ;

[0049] When the power difference is positive, switch to the reverse Boost working mode;

[0050] When the power difference is negative, switch to the forward Buck working mode.

[0051] S2. Calculate the difference between the power of the farad capacitor energy storage device and the power difference as the error of the first-stage power loop PI regulator, calculate the difference between the charge and discharge current value and the preset safe charge and discharge current as the error of the second-stage current loop PI regulator, and adjust the farad capacitor energy storage device of the bidirectional DC-DC conversion main circuit according to the error.

[0052] Specifically, step S2 includes: calculating the current output power of the load and the power difference The difference between them is used as the error of the first-stage power loop PI regulator , = , and perform cascade PI regulation operation according to the error , and adjust the output power supply or input charging power of the farad capacitor energy storage device based on the operation result to keep the battery output power stable and the output power meet the load requirements;

[0053] Calculate the charge and discharge current value and the preset safe charge and discharge current The difference between them is used as the error of the second-stage current loop PI regulator , = , and perform cascade PI regulation operation according to the error , and adjust the charge and discharge current of the farad capacitor energy storage device based on the operation result.

[0054] 11. Preferably, the mathematical expression of the cascade PI regulation operation is: , where is the target power, is the proportional regulation coefficient, is the integral regulation coefficient, is the integral formula.

[0055] In this embodiment, the micro-control unit (MCU) in the lower computer control circuit acquires the voltage and current values of the load, as well as the voltage value and charge / discharge current value of the farad capacitor energy storage device in the bidirectional DC-DC conversion main circuit. These data are collected through the signal conditioning circuit and transmitted to the MCU for processing in real time. Based on these data, the system calculates the current output power of the load and the power of the farad capacitor energy storage device. Specifically, by multiplying the voltage and current values, the output power of the load and the power of the farad capacitor energy storage device are obtained.

[0056] Subsequently, the power difference between the current output power of the load and the preset power threshold is calculated. According to the positive or negative of the power difference, the system decides which working mode to switch to. When the power difference is positive (i.e., the current load power is greater than the preset power threshold), it indicates that the load power demand exceeds the preset threshold, and the system switches to the reverse Boost working mode to release the energy in the farad capacitor energy storage device to meet the load demand. On the contrary, when the power difference is negative (i.e., the current load power is less than the preset power threshold), it indicates that the load power demand is lower than the preset threshold, and the system switches to the forward Buck working mode to store the excess energy in the farad capacitor energy storage device. This mode switching mechanism ensures that the system can flexibly adjust the energy flow direction under different load conditions and improves the energy utilization efficiency.

[0057] Furthermore, the farad capacitor energy storage device is precisely regulated by the cascade PI regulation algorithm. First, the difference between the power of the farad capacitor energy storage device and the power difference is calculated as the error of the first-stage power loop PI regulator. Based on this error, the system performs cascade PI regulation operations to regulate the output power supply or input charging power of the farad capacitor energy storage device to ensure that the battery output power remains stable and meets the load demand.

[0058] At the same time, the difference between the charge / discharge current value and the preset safe charge / discharge current is continuously calculated as the error of the second-stage current loop PI regulator. Based on this error, the system also performs cascade PI regulation operations to regulate the charge / discharge current of the farad capacitor energy storage device to maximize and rationalize the charge / discharge power of the capacitor bank on the premise of ensuring capacitor charging safety and not affecting the battery output power.

[0059] This regulation method can not only quickly respond to the change of load power, but also effectively suppress power fluctuations, improving the stability and reliability of the system. Based on this, the power loop has basically achieved the control of the input and output power of the farad capacitor bank, while the current loop is that the power loop converts it into the capacitor current target value , the duty cycle is output through PI regulation, and the charging and discharging current is limited within the safe current for amplitude limiting, achieving the effect of protecting the supercapacitor bank. The bidirectional energy buffer system based on the supercapacitor bank basically realizes the function of power buffering, satisfying the load power demand and ensuring the stability of the power supply input power while ensuring the safe charging and discharging of the supercapacitor bank.

[0060] Please refer to Figure 5 , preferably, it further includes: establishing a connection with an external host computer through the bus communication circuit of the lower computer control circuit to obtain the sampled voltage and current values of the system collected by the host computer , as well as the actual voltage and current values of the load ;

[0061] According to the sampled voltage and current values and the actual voltage and current values a fitting straight line is established , where is the weight of the fitting straight line, is the offset of the fitting straight line;

[0062] Based on the fitting straight line the sampling ratio coefficient of the micro control unit is adjusted so that the sampled voltage and current values approach the actual voltage and current values ;

[0063] Repeat the above steps until the goodness of fit , record the refined calibration sampling parameters at this time, and end the parameter refinement calibration process.

[0064] The mathematical expression of the weight of the fitting straight line is: , where is the total number of samples, is the average value of the sampled voltage and current, is the average value of the actual voltage and current.

[0065] The mathematical expression of the goodness of fit is: , where is the i-th actual voltage and current value, is the i-th fitting straight line.

[0066] In this embodiment, since there is an error between the MCU sampling value and the actual value, but the sampling data generally shows a linear change, the refinement calibration can be performed by increasing the offset and changing the sampling coefficient.

[0067] First, establish a stable communication connection with an external host computer through a bus communication circuit. The host computer is responsible for collecting the sampled voltage and current values of the system, which are provided by the signal conditioning circuit in the lower computer control circuit. At the same time, the host computer also collects the actual voltage and current values of the load, which reflect the real demands of the load during actual operation. By comparing the sampled values with the actual values, the system can evaluate the accuracy of the current parameter settings.

[0068] Secondly, establish a fitting straight line based on the sampled voltage and current values and the actual voltage and current values. The weights and biases of the fitting straight line are calculated through mathematical formulas. This calculation method can effectively quantify the relationship between the sampled values and the actual values, providing a basis for subsequent parameter adjustment. Based on the fitting straight line, adjust the sampling scale factor of the micro control unit. The goal of the adjustment is to make the sampled voltage and current values as close as possible to the actual voltage and current values. This process is achieved by modifying the sampling scale factor of the micro control unit. By continuously adjusting the scale factor, the system can gradually optimize the sampling accuracy.

[0069] Finally, to ensure the accuracy and reliability of parameter adjustment, repeat the above steps until the goodness of fit reaches a preset standard. When the goodness of fit reaches a high level, it indicates that the difference between the sampled values and the actual values is small enough. At this time, the calibrated sampling parameters recorded will be downloaded to the micro control unit, and the parameter calibration process will end.

[0070] In summary, in terms of hardware design, the bidirectional energy buffer system based on a supercapacitor bank consists of a lower computer control circuit, a bidirectional DC-DC conversion main circuit, a power supply, and a load. Among them, the bidirectional DC-DC conversion main circuit includes a supercapacitor energy storage device, an NMOS drive circuit, a bidirectional BUCK-BOOST main topology circuit, and an ideal diode circuit. The supercapacitor energy storage device is formed by connecting 9 large-capacity supercapacitors in series, with high power density and fast charge and discharge capabilities. It can release a large amount of energy in a short time, meet the instantaneous high-power requirements of the robot, and at the same time recover excess energy to avoid energy waste. The ideal diode circuit is connected in parallel at both ends of the bidirectional BUCK-BOOST main topology circuit, effectively preventing the reverse flow of energy in the supercapacitor energy storage device and protecting the safe operation of the system.

[0071] The core control strategy of this system is based on a microcontroller unit (MCU) and a cascade PI regulation algorithm. The MCU collects the voltage and current values of the load and the state of the ultracapacitor energy storage device in real time through a signal conditioning circuit, calculates the current output power of the load and the power of the ultracapacitor energy storage device, and compares them with a preset power threshold to determine whether to switch to the forward Buck mode or the reverse Boost mode. This mode switching mechanism ensures that the system can flexibly adjust the energy flow direction under different load conditions, improving the energy utilization efficiency. Further, the system precisely regulates the ultracapacitor energy storage device through a cascade PI regulation algorithm to ensure that the battery output power remains stable and meets the load demand, while maximizing the charge and discharge efficiency. This regulation method can not only quickly respond to changes in load power but also effectively suppress power fluctuations, improving the stability and reliability of the system.

[0072] In addition, the system also provides a parameter fine-tuning scheme. By communicating with an external host computer, it obtains the sampled voltage and current values and the actual voltage and current values, establishes a fitting line, and adjusts the sampling scale factor of the microcontroller unit until the goodness of fit reaches a preset standard. This process significantly improves the sampling accuracy of the system, ensures the accuracy of the control signal, and further optimizes the performance of the system.

[0073] Generally speaking, the bidirectional energy buffer system based on ultracapacitor banks significantly improves the performance of the robot under dynamic load conditions through optimized energy management; it can automatically switch the working mode according to the load situation, store energy when the power demand is loose, and release energy when the power is tight. The maximum power output can reach 250W, effectively reducing the power supply pressure and improving the energy utilization rate of the robot. This system can not only effectively relieve the pressure on the battery under high power demand, extend the battery life, but also improve the energy utilization efficiency and reduce energy loss. Its flexible energy storage and release mechanism, efficient control strategy, and precise parameter calibration scheme make it have broad application prospects and important practical significance in the field of robotics and other fields that require efficient energy management.

[0074] The above is the preferred embodiment of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements are also regarded as the protection scope of the present invention.

Claims

1. A bidirectional energy buffer system based on a supercapacitor bank, characterized in that, Including: A lower computer control circuit, a bidirectional DC-DC conversion main circuit, a power supply, and a load. The data acquisition terminal of the lower computer control circuit is electrically connected to the bidirectional DC-DC conversion main circuit. The output terminal of the lower computer control circuit is electrically connected to the input terminal of the bidirectional DC-DC conversion main circuit. The communication terminal of the lower computer control circuit is communicatively connected to an external upper computer. The output terminal of the bidirectional DC-DC conversion main circuit is electrically connected to the load. The bidirectional DC-DC conversion main circuit is electrically connected to the power supply; Wherein, the micro control unit of the lower computer control circuit is configured to implement the following steps by executing the computer program stored therein: Obtain the voltage and current values of the load, as well as the voltage value and charge-discharge current value of the farad capacitor energy storage device of the bidirectional DC-DC conversion main circuit, calculate the current output power of the load and the power of the farad capacitor energy storage device, and calculate the power difference between the current output power of the load and a preset power threshold, and switch the working mode according to the difference. Specifically: Obtain the voltage and current values of the output load, as well as the voltage value and charge-discharge current value of the farad capacitor energy storage device in the bidirectional DC-DC conversion main circuit , and perform a multiplication operation to obtain the current output power of the load and the power of the farad capacitor energy storage device ; Calculate the current output power of the computing load and the preset power threshold The power difference between , = , and judge the power difference ; When the power difference is a positive number, switch to the reverse Boost operating mode; When the power difference is negative, switch to the forward Buck operating mode; Calculate the difference between the power of the farad capacitor energy storage device and the power difference as the error of the first-stage power loop PI regulator, calculate the difference between the charge-discharge current value and the preset safe charge-discharge current as the error of the second-stage current loop PI regulator, and adjust the farad capacitor energy storage device of the bidirectional DC-DC conversion main circuit according to the error. Specifically: Calculate the current output power of the computing load and the power difference The difference between them is used as the error of the first-stage power loop PI regulator , = , according to the error Perform cascade PI regulation operation. Based on the operation result, adjust the output power supply or input charging power of the ultracapacitor energy storage device to keep the battery output power stable and the output power meet the load requirements; Calculate the charge and discharge current value The difference from the preset safe charge and discharge current is used as the error of the second-stage current loop PI regulator , = , and according to the error perform cascade PI regulation operation, and adjust the charge and discharge current of the ultracapacitor energy storage device based on the operation result; The mathematical expression of the cascade PI regulation operation is as follows: , where is the target power, is the proportional regulation coefficient, is the integral regulation coefficient, is the integral formula.

2. The bidirectional energy buffer system based on a supercapacitor bank according to claim 1, wherein The lower computer control circuit includes: a micro control unit, a signal conditioning circuit, an auxiliary power supply circuit, and a bus communication circuit. The input terminal of the auxiliary power supply circuit and the input terminal of the signal conditioning circuit are electrically connected to the output terminal of the bidirectional DC-DC conversion main circuit. The input terminal of the micro control unit is electrically connected to the output terminal of the auxiliary power supply circuit and the output terminal of the signal conditioning circuit. The output terminal of the micro control unit is electrically connected to the drive terminal of the bidirectional DC-DC conversion main circuit and the input terminal of the bus communication circuit. The data terminal of the bus communication circuit is communicatively connected to an external upper computer; Wherein, the auxiliary power supply circuit is configured to reduce the input voltage to a preset working range to provide stable electric energy. The signal conditioning circuit is configured to collect the voltage and current values of each port of the bidirectional DC-DC conversion main circuit. The micro control unit is configured to output corresponding control signals to the bidirectional DC-DC conversion main circuit according to the voltage and current values collected by the signal conditioning circuit. The bus communication circuit is configured to establish a connection with an external upper computer for parameter fine calibration and threshold adjustment.

3. The bidirectional energy buffer system based on a supercapacitor bank according to claim 2, wherein The bidirectional DC-DC conversion main circuit includes a farad capacitor energy storage device, an NMOS driving circuit, a bidirectional BUCK-BOOST main topology circuit, and an ideal diode circuit. The output end of the farad capacitor energy storage device is electrically connected to the input end of the auxiliary power supply circuit. The bidirectional BUCK-BOOST main topology circuit is electrically connected to the farad capacitor energy storage device and the power supply. The ideal diode circuit is connected in parallel at both ends of the bidirectional BUCK-BOOST main topology circuit. The input end of the NMOS driving circuit is electrically connected to the output end of the micro control unit, and the output end of the NMOS driving circuit is electrically connected to the input end of the bidirectional BUCK-BOOST main topology circuit; Among them, the ideal diode circuit is configured to prevent the energy of the farad capacitor energy storage device from flowing back. The NMOS driving circuit is configured to turn on or off the switching tube of the bidirectional BUCK-BOOST main topology circuit according to the control signal sent by the micro control unit to change its working mode.

4. The bidirectional energy buffer system based on a supercapacitor bank according to claim 3, wherein The farad capacitor energy storage device is a farad capacitor bank formed by connecting 9 preset farad capacitors in series.

5. The bidirectional energy buffer system based on a supercapacitor bank according to claim 1, wherein It also includes: Establish a connection with an external host computer through the bus communication circuit of the lower computer control circuit, and obtain the sampled voltage and current values of the system collected by the host computer and the actual voltage and current values of the load ; According to the sampled voltage and current values and the actual voltage and current values a fitting straight line is established , where is the weight of the fitting straight line is the offset of the fitting straight line; Based on the fitted straight line Adjust the sampling ratio coefficient of the microcontroller unit to make the sampled voltage and current values approach the actual voltage and current values ; Repeat the above steps until the goodness of fit , record the refined sampling parameters at this time, and end the parameter refinement process.

6. The bidirectional energy buffer system based on a supercapacitor bank according to claim 5, wherein, The weights of the fitted straight line have the following mathematical expression: , where is the total number of samples, is the average value of the sampled voltage and current, is the average value of the actual voltage and current.

7. The bidirectional energy buffer system based on a supercapacitor bank according to claim 6, wherein The goodness of fit has the following mathematical expression: , where is the i-th actual voltage and current value, is the i-th fitted straight line, is the total number of samples.

Citation Information

Patent Citations

  • Super capacitor energy storage control device for network-side energy suppression

    CN110649640A

  • Assistant systems and methods for handling peak power demands in an extended-reality system

    EP4429057A2