Manufacturing method of PCB with unblocked PCIe5.0 golden finger via hole

By adding barrier points at the via position in the PCIe5.0 gold finger area and using ink to plug holes, the problem of high cost of wet film inlet and resin plug holes is solved, and efficient and low-cost PCIe5.0 gold finger vias does not plug holes is achieved.

CN120186893APending Publication Date: 2025-06-20HUANGSHI HUSHI ELECTRONICS CO LTD
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Patent Information

Application Number
CN202510262757.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-06
Publication Date
2025-06-20

AI Technical Summary

Technical Problem

The prior art is prone to incapacity of nickel gold at the vias designed by the gold finger of PCIe5.0 product due to wet film holes, and the resin blocking process is long and costly.

Method used

Ink plugging instead of resin plugging, and add barriers to the vias in the gold finger area to prevent wet film from flowing in, simplifying the process and reducing costs.

Benefits of technology

It effectively avoids the problem of wet film hole entry, while reducing the process and cost, achieving efficient production of PCB without blocking the hole through the PCIe5.0 gold finger via.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a method for manufacturing a PCB (printed circuit board) with non-clogging PCIe5.0 golden finger via holes, and belongs to the technical field of PCB manufacturing. The method comprises the following steps: drilling required via holes in the PCB; carrying out electroplating treatment on the PCB; manufacturing an outer-layer circuit pattern on the PCB through a pattern transfer process; performing hole blocking treatment on the via holes except the golden finger area on the PCB by using printing ink; printing solder mask ink on the PCB, covering the area which does not need to be welded, and baking and curing the solder mask ink; silk-screening a photosensitive wet film on the PCB, adding a blocking point at the position of a via hole in a golden finger area, and then performing exposure, development and UV curing treatment; performing electrogilding treatment on a golden finger area on the PCB; carrying out etching treatment on the PCB, and etching to remove the redundant metal layer to form a final circuit pattern; the wet film can be effectively prevented from entering the hole, resin hole plugging is replaced by ink hole plugging, the process is reduced, and the cost is reduced.
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Description

Technical Field

[0001] The invention relates to a method for manufacturing a PCIe5.0 gold finger via-hole non-blocking PCB, belonging to the technical field of PCB board manufacturing. Background Art

[0002] The PCIe5.0 product gold finger has vias designed on the gold finger. Currently, the PCB industry usually plugs the vias on the gold finger with resin or POFV to avoid the risk of nickel-gold failure due to wet film entry. This process is long and the cost of resin plugging is high. Summary of the invention

[0003] The purpose of the present invention is to overcome the shortcomings of the prior art and provide a method for manufacturing a PCIe5.0 gold finger via PCB without plugging the hole, which can effectively avoid the entry of wet film into the hole, and at the same time use ink plugging instead of resin plugging to reduce the process and reduce the cost.

[0004] To achieve the above object, the present invention is implemented by adopting the following technical solutions: In a first aspect, the present invention provides a method for manufacturing a PCIe5.0 gold finger via-hole non-blocking PCB, comprising: Drill the required vias on the PCB board, including the vias in the gold finger area; Electroplating the drilled PCB board; The outer layer circuit pattern is produced on the electroplated PCB board through the pattern transfer process; Use ink to plug the vias on the PCB board except the gold finger area after the outer layer circuit pattern is made; Print solder mask ink on the PCB board after the hole plugging treatment to cover the area that does not need to be soldered, and bake and cure it; Screen print a photosensitive wet film on the baked and cured PCB board, and add blocking points at the via holes in the gold finger area to prevent the wet film from flowing in, followed by exposure, development and UV curing. Electroplating gold is performed on the gold finger area of ​​the PCB board after UV curing; The PCB board after gold plating is etched to remove the excess metal layer and form the final circuit pattern.

[0005] Furthermore, the diameter of the blocking point is 16 mil larger than the diameter of the via hole.

[0006] Furthermore, during the exposure process of the photosensitive wet film, the photosensitive wet film covers a single side of the conductive line by no less than 3 mil.

[0007] Furthermore, during the development process of the photosensitive wet film, the development line speed is controlled at 3.5-3.8 m / min.

[0008] Further, the method further includes: before the gold plating treatment and the etching treatment, performing dry film protection treatment on the PCB board respectively to form a dry film protection layer.

[0009] Further, the method further includes: after forming the final circuit pattern, removing the dry film protection layer.

[0010] Further, the method further includes: after removing the dry film protection layer, performing surface treatment on the PCB board, including electroless nickel gold or OSP organic coating.

[0011] Further, during the screen printing process of the photosensitive wet film, the mesh number of the photosensitive wet film screen printing stencil is 150 meshes.

[0012] Further, the screen printing of the photosensitive wet film is performed twice.

[0013] Further, during the exposure process of the photosensitive wet film, the exposure machine parameters are controlled according to a density value ≤ 35μm, a position error value ≤ 55μm, or an average value ≤ 15μm.

[0014] Compared with the prior art, the beneficial effects achieved by the present invention are as follows: The present invention provides a method for manufacturing a PCIe5.0 gold finger via non-blocking hole PCB. By using ink to block the vias on the PCB board except for the gold finger area, and adding stop dots at the via positions in the gold finger area to prevent the wet film from flowing in, it can effectively avoid the wet film entering the holes. At the same time, using ink to block the holes instead of resin to block the holes reduces the process and cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a schematic diagram of a photosensitive wet film exposure negative provided by the prior art; Figure 2 is a schematic diagram of a photosensitive wet film screen printing stencil stop dot provided by an embodiment of the present invention; Figure 3 is a schematic diagram of a photosensitive wet film exposure negative provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0016] The present invention will be further described below with reference to the drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and cannot be used to limit the protection scope of the present invention.

[0017] Embodiment 1. This embodiment introduces a method for manufacturing a PCIe5.0 gold finger via non-blocking hole PCB, including: Drilling the required vias on the PCB board, including the vias in the gold finger area; Performing electroplating treatment on the PCB board after drilling; The outer circuit pattern is fabricated on the electroplated PCB board through a graphic transfer process; The vias on the PCB board with the outer circuit pattern fabricated, except for the gold finger area, are plugged with ink; Solder mask ink is printed on the PCB board after the plugging process to cover the areas that do not require soldering, and then baked and cured; Photosensitive wet film is screen-printed on the PCB board after baking and curing, and stop dots are added at the via positions in the gold finger area to prevent the wet film from flowing in, and then exposure, development, and UV curing processes are carried out; Electroplated gold treatment is performed on the gold finger area of the PCB board after UV curing; The PCB board after electroplated gold treatment is etched to remove the excess metal layer to form the final circuit pattern.

[0018] The manufacturing method of the PCIe5.0 gold finger via non-plugging PCB provided in this embodiment specifically involves the following steps in its application process: Previous process: Conduct preliminary treatment and preparation work on the PCB board; Drilling: Drill the required vias on the PCB board, including the vias in the gold finger area; Electroplating: Perform electroplating treatment on the drilled PCB board to form a conductive layer; Outer pattern fabrication: Form the outer circuit pattern of the PCB board through a graphic transfer process; Solder mask plugging: Use ink to plug the vias on the PCB board instead of the traditional resin plugging, but do not include the vias in the gold finger area; Solder mask screen printing: Print solder mask ink on the PCB board to cover the areas that do not require soldering; Solder mask post-baking: Bake and cure the printed solder mask ink; Solder mask pre-treatment: Perform pre-treatment on the solder mask layer to ensure the smooth progress of subsequent processes; Screen printing photosensitive wet film: Print photosensitive wet film on the PCB board, and add stop dots at the gold finger via positions. The size of the stop dots is D + 16 mil to prevent the wet film from entering the vias; Exposure of photosensitive wet film: Perform exposure treatment on the printed photosensitive wet film to ensure that the wet film covers the conductive line on one side by ≥ 3 mil to prevent the conductive line from exposing copper; Development of photosensitive wet film: Perform development treatment on the exposed photosensitive wet film. The development line speed is controlled at 3.5 - 3.8 m / min to ensure the development effect; UV curing of photosensitive wet film: Perform UV curing treatment on the developed wet film to enhance its mechanical strength and chemical resistance; Dry film protection before TAB: Perform dry film protection treatment on the PCB board before the TAB electroplated gold process; TAB Electroplating Gold: Electroplate gold on the gold finger area to ensure its electrical conductivity and corrosion resistance; Dry Film Protection before Second Etching: Before the second etching process, perform dry film protection treatment on the PCB board; Second Etching: Perform second etching on the PCB board to remove the excess metal layer and form the final circuit pattern; Dry Film Removal: Remove the dry film protection layer on the PCB board; Surface Treatment: Perform surface treatment on the PCB board, including electroless nickel immersion gold or OSP organic coating, to protect the areas to be soldered from oxidation and improve solderability; Post - process: Conduct final inspection and packaging of the PCB board.

[0019] Next, in combination with a preferred embodiment, the content involved in the above embodiments will be described.

[0020] Existing PCIe5.0 Gold Finger Board POFV Manufacturing Process: Pre - process - Drilling - Electroplating - Resin Plugging of Holes - Resin Grinding - Second Electroplating - Outer Layer Pattern - Solder Mask Printing - Post - baking of Solder Mask - Pre - treatment of Solder Mask - Printing of Photosensitive Wet Film - Exposure of Photosensitive Wet Film - Development of Photosensitive Wet Film - UV of Photosensitive Wet Film - Dry Film Protection before TAB - TAB Electroplating Gold - Dry Film Protection before Second Etching - Second Etching - Dry Film Removal - Surface Treatment - Post - process; PCIe5.0 Gold Finger Board Manufacturing Process Provided by this Embodiment: Pre - process - Drilling - Electroplating - Outer Layer Pattern - Solder Mask Plugging of Holes - Solder Mask Printing - Post - baking of Solder Mask - Pre - treatment of Solder Mask - Printing of Photosensitive Wet Film - Exposure of Photosensitive Wet Film - Development of Photosensitive Wet Film - UV of Photosensitive Wet Film - Dry Film Protection before TAB - TAB Electroplating Gold - Dry Film Protection before Second Etching - Second Etching - Dry Film Removal - Surface Treatment - Post - process; Among them, the gold finger vias are not blocked with ink; Process Comparison: In the process, use ink plugging of holes with lower cost to replace the resin plugging of holes process. While the process is simplified, the cost is reduced.

[0021] The new process design needs to solve the problem of wet film entering the holes. The specific solution process is as follows: 1) In the original process, the vias on the gold fingers have been completed with resin plugging POFV before printing the wet film. When printing the wet film at the gold finger position, no additional blocking points are required. The wet film CAM data only needs to cover the conductive lines with the wet film and leave a conductive line (tiebar) length < 5 mil, as Figure 1 shown.

[0022] 2) In the new process, the gold finger vias are not plugged. When printing the photosensitive wet film, add a blocking point of D + 16 mil for the gold finger vias on the screen to prevent the wet film from entering the holes, as Figure 2 shown.

[0023] 3) For the wet film exposure negative of the new process, ensure that the single side of the wet film covering the conductive wire is ≥ 3 mil to ensure that the conductive wire does not expose copper, as Figure 3 shown.

[0024] 4) Process parameter control for wet film screen printing and exposure: 1. The mesh number of the wet film screen printing stencil is specified as 150 meshes, and it is printed twice.

[0025] 2. Tighten the machine parameters of the wet film exposure. Control the D value (density value) ≤ 35 μm, the PE value (position error value) ≤ 55 μm, or the average value ≤ 15 μm.

[0026] 3. Control the wet film development line speed at 3.5 - 3.8 m / min.

[0027] This embodiment provides a method for manufacturing a PCB with non-blocked vias in the PCIe 5.0 gold fingers. By using ink to block the vias on the PCB board except for the gold finger area, and adding stop dots at the via positions in the gold finger area to prevent the wet film from flowing in, it can effectively avoid the wet film entering the vias. At the same time, using ink to block the vias instead of resin to block the vias reduces the process and cost.

[0028] The above is only the preferred embodiment of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the technical principle of the present invention, several improvements and deformations can be made, and these improvements and deformations should also be regarded as the protection scope of the present invention.

Claims

1. A method for manufacturing a PCIe5.0 gold finger via-hole non-blocking PCB, characterized in that: include: Drill the required vias on the PCB board, including the vias in the gold finger area; Electroplating the drilled PCB board; The outer layer circuit pattern is produced on the electroplated PCB board through the pattern transfer process; Use ink to plug the vias on the PCB board except the gold finger area after the outer layer circuit pattern is made; Print solder mask ink on the PCB board after the hole plugging treatment to cover the area that does not need to be soldered, and bake and cure it; Screen print a photosensitive wet film on the baked and cured PCB board, and add blocking points at the via holes in the gold finger area to prevent the wet film from flowing in, followed by exposure, development and UV curing. Electroplating gold is performed on the gold finger area of ​​the PCB board after UV curing; The PCB board after gold plating is etched to remove the excess metal layer and form the final circuit pattern.

2. The method for manufacturing a PCIe5.0 gold finger via-hole non-blocking PCB according to claim 1, characterized in that: The diameter of the blocking point is 16 mil larger than the diameter of the via hole.

3. The method for manufacturing a PCIe5.0 gold finger via-hole non-blocking PCB according to claim 1, characterized in that: During the exposure process of the photosensitive wet film, the photosensitive wet film covers a single side of the conductive line by no less than 3 mil.

4. The method for manufacturing a PCIe5.0 gold finger via-hole non-blocking PCB according to claim 1, characterized in that: During the development process of the photosensitive wet film, the development line speed is controlled at 3.5-3.8 m / min.

5. The method for manufacturing a PCIe5.0 gold finger via-hole non-blocking PCB according to claim 1, characterized in that: The method further comprises: before the gold electroplating process and the etching process, respectively performing dry film protection process on the PCB board to form a dry film protection layer.

6. The method for manufacturing a PCIe5.0 gold finger via-hole non-blocking PCB according to claim 5, characterized in that: The method further comprises: after forming the final circuit pattern, removing the dry film protective layer.

7. The method for manufacturing a PCIe5.0 gold finger via-hole non-blocking PCB according to claim 6, characterized in that: The method further comprises: after removing the dry film protective layer, performing surface treatment on the PCB board, including chemical nickel gold or OSP organic coating.

8. The method for manufacturing a PCIe5.0 gold finger via-hole non-blocking PCB according to claim 1, characterized in that: During the photosensitive wet film screen printing process, the photosensitive wet film screen printing screen has a mesh count of 150 meshes.

9. The method for manufacturing a PCIe5.0 gold finger via-hole non-blocking PCB according to claim 8, characterized in that: The photosensitive wet film screen printing was performed twice.

10. The method for manufacturing a PCIe5.0 gold finger via-hole non-blocking PCB according to claim 1, characterized in that: During the exposure process of the photosensitive wet film, the exposure machine parameters are controlled according to the density value ≤35μm, the position error value ≤55μm or the average value ≤15μm.