Image sensor and manufacturing method thereof

Abstract

The invention relates to the field of semiconductors, and discloses an image sensor and a manufacturing method thereof, and the method comprises the steps: forming a groove in a bonding pad region of a substrate; depositing an isolation layer on the surface of the substrate; manufacturing a through hole in the isolation layer in the groove and only forming a conductive layer in the groove to obtain a processed substrate; depositing a dielectric layer on the surface of the processed substrate; removing the dielectric layer and the isolation layer on the surface of the processed substrate; depositing a metal grating material layer on the surface of the treated substrate; the metal grid material layer comprises a metal layer and a first protection layer; etching the metal grating material layer by adopting photoetching and etching technologies, and reserving the metal grating material layer in a logic circuit region, a pixel region and a laser labeling region as a substrate grounding structure, a metal grating structure and a metal-containing structure respectively; and at least removing the dielectric layer in the groove to at least expose part of the conductive layer. Based on a photomask of an existing process, a metal layer in a laser labeling area is prevented from being directly exposed by adjusting the process sequence, and breakdown is avoided.

Description

Technical Field

[0001] The present application relates to the field of semiconductors, and particularly to an image sensor and a manufacturing method thereof. Background Art

[0002] In a backside illumination (BSI) image sensor, the metal wiring is located below the photodiode. Light passes through the microlens to reach the color filter, and then can directly irradiate the photodiode without being blocked and reflected by the metal wiring, with high light utilization rate. The backside illumination image sensor has higher sensitivity.

[0003] The backside metal grid (BMG) of the backside illumination image sensor forms a grid structure in the pixel area of the image sensor, which can reduce optical crosstalk. Usually, the metal grid is buried under the color filter, and the obtained image sensor is called a normal backside illumination image sensor (Normal BSI).

[0004] When manufacturing a normal backside illumination image sensor, a conductive material layer is finally deposited, and then the conductive material layer is etched to retain the part of the conductive material layer in the pad (PAD) area on the substrate and the conductive material layer in the laser mark area. Therefore, the outermost layer of the laser mark area is the conductive material layer and is higher than other areas. Since the laser mark area is higher than other areas, it will cause the corners of the laser mark area to be difficult to be wrapped by the color film material in the subsequent color film process, and the conductive material layer is likely to be exposed. In the subsequent color film microlens etching process, the radio frequency power is increased to accumulate a large amount of charges. When the charges exceed the insulation breakdown voltage value, the current will damage the inside of the chip along the lower layer circuit of the edge conductive material layer, resulting in the breakdown (arcing) of the lower layer circuit of the entire wafer or a local area, causing the chip to fail and resulting in a low or zero yield rate of the image sensor.

[0005] Therefore, how to solve the above technical problems should be the focus of attention of those skilled in the art. Summary of the Invention

[0006] The purpose of the present application is to provide an image sensor and a manufacturing method thereof to improve the yield rate of the image sensor.

[0007] To solve the above technical problems, the present application provides a manufacturing method of an image sensor, including:

[0008] Forming a groove in the pad area of the substrate by using photolithography and etching techniques; the substrate includes the pad area, the logic circuit area, the pixel area, and the laser mark area;

[0009] Depositing an isolation layer on the surface of the substrate;

[0010] Form vias in the isolation layer within the groove and form a conductive layer only within the groove to obtain a processed substrate;

[0011] Deposit a dielectric layer on the surface of the processed substrate;

[0012] Remove the dielectric layer and the isolation layer located on the surface of the processed substrate;

[0013] Deposit a metal grid material layer on the surface of the processed substrate; the metal grid material layer includes a metal layer and a first protective layer;

[0014] Use photolithography and etching techniques to etch the metal grid material layer, and retain the metal grid material layer in the logic circuit region, the pixel region, and the laser tagging region as a substrate grounding structure, a metal grid structure, and a metal-containing structure, respectively;

[0015] Remove at least the dielectric layer within the groove to at least expose a part of the conductive layer.

[0016] Optionally, depositing an isolation layer on the surface of the substrate includes:

[0017] Deposit an isolation layer on the surface of the substrate, and the isolation layer includes isolation unit layers stacked alternately with two different materials.

[0018] Optionally, removing the dielectric layer and the isolation layer located on the surface of the processed substrate includes:

[0019] Use a method of multiple grindings to remove the dielectric layer and the isolation layer located on the surface of the processed substrate; wherein, one of the isolation unit layers serves as a grinding barrier layer during the grinding process, and the grinding barrier layer is located inside the isolation layer.

[0020] Optionally, depositing an isolation layer on the surface of the substrate, and the isolation layer includes isolation unit layers stacked alternately with two different materials includes:

[0021] Deposit a first isolation unit layer on the surface of the substrate;

[0022] Deposit a second isolation unit layer on the surface of the first isolation unit layer;

[0023] Deposit a first isolation unit layer on the surface of the second isolation unit layer.

[0024] Optionally, removing at least the dielectric layer within the groove to at least expose a part of the conductive layer includes:

[0025] Use a photomask that forms a groove in the pad region of the substrate, and adopt photolithography and etching techniques to remove the dielectric layer within the groove and above the conductive layer and the isolation unit layer in direct contact with the dielectric layer; wherein, one of the isolation unit layers serves as an etching stop layer during the etching process.

[0026] Optionally, before forming a groove in the pad region of the substrate by adopting photolithography and etching techniques, it further includes:

[0027] Deposit a second protective layer on the surface of the substrate;

[0028] Correspondingly, before depositing a metal grid material layer on the surface of the processed substrate, it further includes:

[0029] Remove the second protective layer located in the logic circuit region.

[0030] Optionally, make a through hole in the isolation layer within the groove and only form a conductive layer within the groove, and the obtained processed substrate includes:

[0031] Adopt photolithography and etching techniques to form a through hole in the isolation layer located within the groove;

[0032] Deposit a conductive layer on the surface of the substrate having the through hole and the isolation layer; the conductive layer is distributed within the through hole, and the conductive layer located within the through hole is electrically connected to the metal structure in the pad region;

[0033] Adopt photolithography and etching techniques to only retain the conductive layer in the partial area within the groove, and obtain the processed substrate.

[0034] Optionally, deposit a metal grid material layer on the surface of the processed substrate; the metal grid material layer includes a metal layer and a first protective layer, including:

[0035] Deposit a first adhesion layer on the surface of the processed substrate;

[0036] Deposit a metal layer on the surface of the first adhesion layer;

[0037] Deposit a second adhesion layer on the surface of the metal layer;

[0038] Deposit a first protective layer on the surface of the second adhesion layer.

[0039] Optionally, after etching the metal grid material layer by adopting photolithography and etching techniques and retaining the metal grid material layers in the logic circuit region, the pixel region, and the laser tagging region as the substrate ground structure, the metal grid structure, and the metal-containing structure respectively, it further includes:

[0040] Deposit a third protective layer on the surface of the processed substrate having the substrate grounding structure, the metal grid structure, and the metal-containing structure;

[0041] Correspondingly, at least removing the dielectric layer in the groove to at least expose part of the conductive layer includes:

[0042] At least removing the dielectric layer and the third protective layer in the groove to at least expose part of the conductive layer.

[0043] The present application also provides an image sensor, which is manufactured by using the manufacturing method of any one of the above-mentioned image sensors.

[0044] A manufacturing method of an image sensor provided by the present application includes: forming a groove in the pad area of the substrate by using photolithography and etching techniques; the substrate includes the pad area, a logic circuit area, a pixel area, and a laser marking area; depositing an isolation layer on the surface of the substrate; making a through hole in the isolation layer in the groove and forming a conductive layer only in the groove to obtain a processed substrate; depositing a dielectric layer on the surface of the processed substrate; removing the dielectric layer and the isolation layer located on the surface of the processed substrate; depositing a metal grid material layer on the surface of the processed substrate; the metal grid material layer includes a metal layer and a first protective layer; etching the metal grid material layer by using photolithography and etching techniques, and retaining the metal grid material layer in the logic circuit area, the pixel area, and the laser marking area as the substrate grounding structure, the metal grid structure, and the metal-containing structure respectively; at least removing the dielectric layer in the groove to at least expose part of the conductive layer.

[0045] It can be seen that in the manufacturing method of the present application, a groove is made in the substrate pad area, an isolation layer is made on the surface of the substrate, and then a conductive layer is made only in the groove in the pad area. At this time, there is no conductive material in the laser marking area. The groove is filled by depositing a dielectric layer, and then the dielectric layer and the isolation layer on the surface of the processed substrate are removed. Then, a metal grid material layer is deposited and etched, and the metal grid material layer in the laser marking area is retained. The metal grid material layer includes a metal layer and a first protective layer. Therefore, the metal layer in the laser marking area is protected by the first protective layer. Then, the conductive layer in the groove is etched and exposed. Based on the photomask of the existing process, the manufacturing method of the image sensor is made by adjusting the process sequence, so that the metal layer in the laser marking area is not directly exposed and is protected by the first protective layer. In the subsequent color film microlens etching process, even if the RF power is increased to accumulate a large amount of charges, due to the existence of the first protective layer, the charges cannot be transferred to the metal layer, avoiding breakdown and improving the yield of the image sensor.

[0046] In addition, the present application also provides an image sensor having the above advantages. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0048] Figures 1 to 7 It is a process flow chart of fabricating an image sensor in the prior art;

[0049] Figure 8 It is a process flow chart of a method for fabricating an image sensor provided by an embodiment of the present application;

[0050] Figures 9 to 18 It is a process flow chart of fabricating an image sensor provided by an embodiment of the present application;

[0051] In the figure, 1 is a substrate, 2 is a silicon oxide protective layer, 3 is a metal grid material layer, 4 is a substrate grounding structure, 5 is a metal grid structure, 6 is a dielectric layer, 7 is an isolation layer, 8 is a conductive layer, 9 is a second protective layer, 10 is a groove, 11 is an epitaxial silicon layer, 12 is a through hole, 13 is a metal-containing structure, 14 is a third protective layer, 15 is an opening, 31 is a metal layer, 32 is a first protective layer, 61 is a depression, 71 is a first isolation unit layer, and 72 is a second isolation unit layer. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0052] In order to enable those skilled in the art to better understand the solution of the present application, the following further detailed description of the present application will be made in conjunction with the drawings and specific embodiments. Obviously, the described embodiments are only some embodiments of the present application, rather than all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present application.

[0053] Many specific details are set forth in the following description in order to provide a thorough understanding of the present invention, but the present invention may be practiced in other ways different from those described herein. Those skilled in the art can make similar generalizations without departing from the spirit of the present invention, so the present invention is not limited by the specific embodiments disclosed below.

[0054] The fabrication process of an image sensor in the prior art includes:

[0055] Step 1: As shown in Figure 1 , deposit a silicon oxide protective layer 2 on the substrate 1;

[0056] Step 2: As shown inFigure 2 As shown, perform the first photolithography and etching on the substrate to expose the epitaxial silicon layer in the logic circuit region, and deposit the metal grid material layer 3;

[0057] Step Three: As Figure 3 shown, perform the second photolithography and etching on the substrate to form the substrate ground structure 4 and the metal grid structure 5. At this time, the metal grid material layer in the laser marking area is also etched away;

[0058] Step Four: As Figure 4 shown, deposit the dielectric layer 6 on the substrate, and perform a planarization process on the substrate to make the substrate surface flat;

[0059] Step Five: As Figure 5 shown, perform the third photolithography and etching on the substrate to form a groove in the pad area, and then deposit the isolation layer 7;

[0060] Step Six: As Figure 6 shown, perform the fourth photolithography and etching on the substrate to form a via hole in the pad area, and then deposit the conductive layer 8 for metal connection;

[0061] Step Seven: As Figure 7 shown, perform the fifth photolithography and etching on the substrate. The laser marking area is not etched, and a part of the conductive layer in the pad area and the conductive layer in the laser marking area are retained.

[0062] As described in the background art section, the outermost layer of the laser marking area is a conductive material layer and is higher than other areas, which will cause the corners of the laser marking area to be not easily wrapped by the color film material in the subsequent color film process, and the conductive material layer is likely to be exposed. During the subsequent color film microlens etching process, breakdown is likely to occur when the charge exceeds the insulation withstand voltage value.

[0063] In view of this, the present application provides a method for manufacturing an image sensor. Please refer to Figure 8 , this method may include:

[0064] Step S101: Use photolithography and etching techniques to form a groove in the pad area of the substrate; the substrate includes the pad area, the logic circuit area, the pixel area, and the laser marking area.

[0065] In this step, the substrate is the substrate after bonding and thinning, and includes an epitaxial silicon (EPI) layer. The laser marking area, the pixel area, the logic circuit area, and the pad area all have formed metal interconnection structures.

[0066] Step S102: Deposit an isolation layer on the surface of the substrate.

[0067] It should be noted that in this embodiment, the isolation layer is not specifically limited and can be set by oneself. For example, the isolation layer can be a single-layer film layer or a multi-layer film layer of different materials.

[0068] As an implementable manner, depositing an isolation layer on the surface of the substrate includes:

[0069] Deposit an isolation layer on the surface of the substrate, and the isolation layer includes isolation unit layers stacked alternately with two different materials.

[0070] Step S101 and step S102 can be the same as step five in the prior art, and the photomask used for etching the groove is the same as the photomask used for etching the groove in the prior art.

[0071] Step S103: Make a through hole in the isolation layer in the groove and form a conductive layer only in the groove to obtain a processed substrate.

[0072] The conductive layer located in the through hole is electrically connected to the metal structure in the pad area. The material of the conductive layer can be a metal material, such as aluminum, etc.

[0073] It should be emphasized that in this step, the conductive layer in the laser marking area is etched away, that is, there is no conductive layer in the laser marking area.

[0074] It should be noted that in this embodiment, the manufacturing methods of the through hole and the conductive layer are not limited and can be set by oneself.

[0075] As an implementable manner, making a through hole in the isolation layer in the groove and forming a conductive layer only in the groove to obtain a processed substrate includes:

[0076] Step S1031: Use photolithography and etching techniques to form a through hole in the isolation layer located in the groove.

[0077] In this step, the through hole needs to be etched to the metal structure of the substrate.

[0078] Step S1032: Deposit a conductive layer on the surface of the substrate having the through hole and the isolation layer; the conductive layer is distributed in the through hole, and the conductive layer located in the through hole is electrically connected to the metal structure in the pad area.

[0079] In this step, there is a conductive layer both inside and outside the groove.

[0080] Step S1033: Use photolithography and etching techniques to retain only the conductive layer in the area within the groove to obtain a processed substrate.

[0081] In this step of etching, only a part of the conductive layer in the groove is left, and the conductive layers in other areas (including the laser marking area) are all removed.

[0082] The process of fabricating the vias in this step and the process of depositing the conductive layer on the surface of the substrate with vias and isolation layer are the same as those in step six of the prior art. The photomask used for etching the vias is the same as that used for etching the vias in the prior art. The photomask used for etching the conductive layer is the same as that used for etching the conductive layer in step seven of the prior art. The difference is that in this application, the conductive layer in the laser marking area also needs to be etched off.

[0083] Step S104: Deposit a dielectric layer on the surface of the processed substrate.

[0084] The dielectric layer needs to fill the grooves, so a relatively thick dielectric layer needs to be deposited. Since the dielectric layer is conformally deposited, depressions will be formed in the part of the pad area corresponding to the grooves.

[0085] The material of the dielectric layer can be silicon oxide.

[0086] Step S105: Remove the dielectric layer and the isolation layer on the surface of the processed substrate.

[0087] It should be noted that in this embodiment, the method of removing the dielectric layer and the isolation layer on the surface of the processed substrate is not limited. For example, when the isolation layer is a single-layer film, etching can be used; when the isolation layer includes multiple layers of film with different materials, grinding can be used.

[0088] Steps S104 and S105 are similar to step four in the prior art. The difference is that the deposition thickness of the dielectric layer in this application is thicker.

[0089] Step S106: Deposit a metal grid material layer on the surface of the processed substrate; the metal grid material layer includes a metal layer and a first protective layer.

[0090] The material of the metal (i.e., the metal layer) in the metal grid structure can be aluminum or other metals.

[0091] The first protective layer can play a role in protecting the metal layer. The material of the first protective layer can be silicon oxide or the like, which is not specifically limited in this embodiment.

[0092] As an implementable manner, the first protective layer can be directly located on the surface of the metal layer.

[0093] As another implementable manner, deposit a metal grid material layer on the surface of the processed substrate; the metal grid material layer includes a metal layer and a first protective layer, including:

[0094] Deposit a first adhesion layer on the surface of the processed substrate;

[0095] Deposit a metal layer on the surface of the first adhesion layer;

[0096] Deposit a second adhesion layer on the surface of the metal layer;

[0097] Deposit a first protective layer on the surface of the second adhesion layer.

[0098] The materials of the first adhesion layer and the second adhesion layer can be titanium nitride or the like, and are not specifically limited in this embodiment.

[0099] The first adhesion layer can enhance the bonding force between the metal layer and the surface of the processed substrate. The second adhesion layer can enhance the bonding force between the first protective layer and the metal layer, and reduce the situation of the first protective layer falling off.

[0100] Step S106 is the same as step two in the prior art, and the mask for etching the isolation layer in the peripheral circuit region is the same as the mask used for etching the isolation layer in the peripheral circuit region in the prior art.

[0101] Step S107: Use photolithography and etching techniques to etch the metal grid material layer, and retain the metal grid material layer in the logic circuit region, the pixel region, and the laser tagging region as the substrate grounding structure, the metal grid structure, and the metal-containing structure respectively.

[0102] Among them, the substrate grounding structure is in direct contact with the surface of the substrate.

[0103] The metal-containing structure in the laser tagging region is formed after etching the metal grid material layer, and the metal-containing structure includes a metal layer and a first protective layer.

[0104] Step S107 is similar to step three in the prior art, and the mask for etching the metal grid material layer is the same as the mask used for etching the metal grid material layer in the prior art. However, the difference is that the metal grid material layer in the laser tagging region in this application is not etched.

[0105] Step S108: Remove at least the dielectric layer in the groove to at least expose part of the conductive layer.

[0106] The purpose of exposing part of the conductive layer is to facilitate subsequent testing.

[0107] It should be noted that in this embodiment, the method for removing at least the dielectric layer in the groove is not limited and depends on the situation. For example, when the isolation layer is a single-layer film, a specific mask can be used, and photolithography and etching techniques can be used to remove most of the dielectric layer in the area outside the groove, and then the dielectric layer on the surface of the substrate can be removed by a grinding process; or, when the isolation layer includes multiple film layers of different materials, in order to further reduce the publication of one mask, other methods can also be used, which will be elaborated in the following embodiments.

[0108] The manufacturing method in this embodiment creates a groove in the substrate pad area, manufactures an isolation layer on the substrate surface, and then manufactures a conductive layer only in the groove in the pad area. At this time, there is no conductive material in the laser marking area. The groove is filled by depositing a dielectric layer, and then the dielectric layer and the isolation layer on the surface of the processed substrate are removed. Then, a metal grid material layer is deposited and etched, and the metal grid material layer in the laser marking area is retained. The metal grid material layer includes a metal layer and a first protective layer. Therefore, the metal layer in the laser marking area is protected by the first protective layer. Then, the conductive layer in the groove is etched to be exposed. Based on the photomask of the existing process, this method manufactures an image sensor by adjusting the process sequence, so that the metal layer in the laser marking area is not directly exposed and is protected by the first protective layer. During the subsequent etching process of the color film microlens, even if a large amount of charge is accumulated due to the increase in radio frequency power, due to the presence of the first protective layer, the charge cannot be transferred to the metal layer, avoiding breakdown and improving the yield of the image sensor.

[0109] Based on the above embodiment, in an embodiment of the present application, when the isolation layer includes isolation unit layers stacked alternately with two different materials, removing the dielectric layer and the isolation layer on the surface of the processed substrate includes:

[0110] The dielectric layer and the isolation layer on the surface of the processed substrate are removed by means of multiple grindings; wherein, one of the isolation unit layers serves as a grinding barrier layer during the grinding process, and the grinding barrier layer is located inside the isolation layer.

[0111] The hardness of the isolation unit layer serving as the grinding barrier layer is greater than that of the other isolation unit layer. In this embodiment, the materials of the two isolation unit layers are not limited and can be set by oneself. For example, the material of the isolation unit layer serving as the grinding barrier layer can be a silicon nitride containing nitrogen, including but not limited to any one of silicon nitride, silicon oxynitride, and silicon carbonitride; the material of the other isolation unit layer can be an oxide, such as silicon oxide, etc.

[0112] The number of isolation unit layers in the isolation layer is at least three to ensure that the isolation unit layer serving as the grinding barrier layer is located inside the isolation layer. It should be noted that in this embodiment, the specific number of isolation unit layers is not limited and can be set by oneself.

[0113] For the convenience of description, the isolation unit layer serving as the grinding barrier layer can be referred to as the second isolation unit layer, and the other isolation unit layer can be referred to as the first isolation unit layer.

[0114] For example, when the number of isolation unit layers in the isolation layer is three, the layers are, in the direction away from the substrate, the first isolation unit layer, the second isolation unit layer, and the first isolation unit layer in sequence; when the number of isolation unit layers in the isolation layer is five, the layers are, in the direction away from the substrate, the first isolation unit layer, the second isolation unit layer, the first isolation unit layer, the second isolation unit layer, and the first isolation unit layer in sequence.

[0115] As an implementable manner, when the number of isolation unit layers in the isolation layer is three, deposit the isolation layer on the surface of the substrate. The isolation layer includes isolation unit layers formed by alternately laminating two different materials, including:

[0116] Deposit the first isolation unit layer on the surface of the substrate;

[0117] Deposit the second isolation unit layer on the surface of the first isolation unit layer;

[0118] Deposit the first isolation unit layer on the surface of the second isolation unit layer.

[0119] Since the isolation layer includes isolation unit layers of different materials, the selectivity of the grinding process for different materials is different. During grinding, start grinding from the dielectric layer towards the substrate direction, grind to the second isolation unit layer farthest from the substrate, and then remove the remaining isolation unit layers by setting an appropriate grinding time.

[0120] The grinding process can be a CMP (Chemical Mechanical Polishing) process.

[0121] Based on any of the above embodiments, in an embodiment of the present application, when the isolation layer includes isolation unit layers formed by alternately laminating two different materials, at least remove the dielectric layer in the groove to at least expose part of the conductive layer, including:

[0122] Use a photomask for forming a groove in the pad area of the substrate, and adopt photolithography and etching techniques to remove the dielectric layer in the groove and above the conductive layer and the isolation unit layer in direct contact with the dielectric layer; wherein, one of the isolation unit layers serves as an etching stop layer during the etching process.

[0123] It should be noted that in this embodiment, when the dielectric layer and the isolation layer on the surface of the processed substrate are removed by multiple grinding methods, the isolation unit layer serving as the etching stop layer and the isolation unit layer serving as the grinding stop layer are the same isolation unit layer.

[0124] The isolation unit layer in direct contact with the dielectric layer and the dielectric layer can have the same material, and can both be silicon oxide, so they can be etched and removed together.

[0125] Due to the different selectivity of the etching process for oxides and silicon nitrides, the second isolation unit layer deposited on the sidewalls of the grooves in the previous step can serve as an etching stop layer for the etching in this step, avoiding etching the epitaxial silicon (EPI) on the sidewalls of the groove region and preventing subsequent water vapor from entering, which may affect the reliability.

[0126] In this embodiment, lithography and etching techniques are also used, but the mask used is the same mask as that used when making grooves in the pad region, which can reduce the production of one layer of mask and lower the production cost.

[0127] Based on any of the above embodiments, in an embodiment of the present application, before forming grooves in the pad region of the substrate using lithography and etching techniques, it further includes:

[0128] Depositing a second protective layer on the surface of the substrate;

[0129] Correspondingly, before depositing the metal grid material layer on the surface of the processed substrate, it further includes:

[0130] Removing the second protective layer located in the logic circuit region.

[0131] The second protective layer can play a role in protecting the epitaxial silicon layer, and the second protective layer includes but is not limited to a silicon oxide layer, etc.

[0132] Since the substrate grounding structure needs to be in direct contact with the surface of the substrate, it is necessary to remove the second protective layer in the logic circuit region. The removal of the second protective layer can be achieved by using lithography and etching techniques.

[0133] Based on any of the above embodiments, in an embodiment of the present application, after etching the metal grid material layer using lithography and etching techniques and retaining the metal grid material layers in the logic circuit region, the pixel region, and the laser marking region as the substrate grounding structure, the metal grid structure, and the metal-containing structure respectively, it further includes:

[0134] Depositing a third protective layer on the surface of the processed substrate having the substrate grounding structure, the metal grid structure, and the metal-containing structure;

[0135] Correspondingly, at least removing the dielectric layer in the groove to at least expose a part of the conductive layer includes:

[0136] At least removing the dielectric layer and the third protective layer in the groove to at least expose a part of the conductive layer.

[0137] The material of the third protective layer includes but is not limited to silicon oxide, etc.

[0138] In this embodiment, by depositing a third protective layer, the third protective layer can not only protect the metal grating structure and the substrate grounding structure, avoiding the exposure of the metal sidewalls in the metal grating structure and the substrate grounding structure, but also protect the metal layer in the laser marking area, so that there are multiple protective layers above and on the sidewalls of the metal layer in the laser marking area, avoiding the exposure of the metal layer and further reducing the occurrence of breakdown.

[0139] Next, a specific situation will be used to elaborate on the manufacturing method of the back-illuminated image sensor in this application.

[0140] Step 1: As Figure 9 shown, deposit a second protective layer 9 on the surface of the substrate 1. The substrate 1 includes a pixel region, a logic circuit region, a pad region, and a laser marking region formed on the epitaxial silicon layer 11, and metal interconnect structures have been formed in each region; in this step, the film layer structure in the laser marking region only has the second protective layer 9 from the substrate upwards.

[0141] Step 2: As Figure 10 shown, perform the first photolithography and etching on the substrate 1, only completely etch away the epitaxial silicon layer 11 and the second protective layer 9 in the pad region, without etching the laser marking region, form a groove 10 in the pad region, and then deposit an isolation layer 7. The isolation layer includes a first isolation unit layer 71, a second isolation unit layer 72, and a first isolation unit layer 71 stacked in sequence in the direction away from the substrate 1; the first isolation unit 71 layer is a silicon oxide layer, and the second isolation unit layer 72 is a nitride layer; in this step, the film layer structure in the laser marking region from the substrate upwards is the second protective layer 9 and the isolation layer 7 in sequence.

[0142] Step 3: As Figure 11 shown, perform the second photolithography and etching on the substrate 1, form a through hole 12 in the pad region, and the through hole needs to be etched to the metal structure of the substrate 1, and then deposit a conductive layer 8 for metal connection; in this step, the film layer structure in the laser marking region from the substrate upwards is the second protective layer 9, the isolation layer 7, and the conductive layer 8 in sequence.

[0143] Step 4: As Figure 12 shown, perform the third photolithography and etching on the substrate 1, only retain part of the conductive layer in the pad region, and the conductive layers in other regions, including the laser marking region, are etched away; in this step, the film layer structure in the laser marking region from the substrate upwards is the second protective layer 9 and the isolation layer 7 in sequence.

[0144] Step 5: As Figure 13As shown, a silicon oxide dielectric layer 6 is deposited. In order to fill the grooves in the pad area, a relatively thick dielectric layer 6 is deposited. Since the dielectric layer 6 is conformally deposited, a depression 61 is formed in the pad area. The film layer structure in the laser marking area in this step from the substrate upwards is the second protective layer 9, the isolation layer 7, and the dielectric layer 6 in sequence.

[0145] Step 6: As Figure 14 shown, perform multiple CMP processes to optimize the flatness of the surface of the substrate 1 after polishing. The second isolation unit layer 72 in Step 2 serves as a polishing barrier layer, and the second isolation unit single layer 72 and the first isolation unit layer 71 located on the substrate 1 are further removed by setting an appropriate polishing time. The film layer structure in the laser marking area in this step is the same as that in Step 1, and there is only the second protective layer 9 from the substrate upwards.

[0146] Step 7: As Figure 15 shown, perform the fourth photolithography and etching on the substrate 1 to expose the epitaxial silicon layer 11 in the logic circuit area for subsequent grounding of the substrate. The laser marking area is not etched. Then, deposit a metal grid material layer 3 on the substrate. The metal grid material layer is a composite material layer, which is the first adhesion layer, the metal layer 31, the second adhesion layer, and the first protective layer 32 respectively. The film layer structure in the laser marking area in this step from the substrate upwards is the second protective layer 9 and the metal grid material layer 3 in sequence.

[0147] Step 8: As Figure 16 shown, perform the fifth photolithography and etching on the substrate 1 to form a substrate grounding structure 4, a metal grid structure 5, and a metal-containing structure 13. The laser marking area is not etched in this step, and the metal grid material layer deposited in Step 7 is retained as the metal-containing structure 13. The film layer structure in the laser marking area in this step from the substrate upwards is the second protective layer 9 and the metal-containing structure 13 in sequence.

[0148] Step 9: As Figure 17 shown, deposit a third protective layer 14 on the substrate 1 to protect the substrate grounding structure 4, the metal grid structure 5, and the metal-containing structure 13, prevent the sidewall metals of the substrate grounding structure and the metal grid structure from being exposed, and at the same time protect the metal layer in the laser marking area. The film layer structure in the laser marking area in this step from the substrate upwards is the second protective layer 9, the metal-containing structure 13, and the third protective layer 14 in sequence.

[0149] Step 10: As Figure 18 shown, perform the sixth photolithography and etching on the substrate 1 to completely expose the conductive layer in the pad area through photolithography and etching techniques, and form an opening 15 on the conductive layer. Only the pad area is etched in this step. The film layer structure in the laser marking area in this step from the substrate upwards is the second protective layer 9, the metal-containing structure 13, and the third protective layer 14.

[0150] The present application also provides an image sensor, which is manufactured by using the manufacturing method of the image sensor described in any of the above embodiments.

[0151] In this specification, the various embodiments are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. For the same or similar parts among the various embodiments, reference may be made to each other.

[0152] The above has introduced in detail the image sensor and its manufacturing method provided by the present application. Specific examples are used herein to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the solution and its core idea of the present application. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the protection scope of the present application.

Claims

1. A method for manufacturing an image sensor, characterized in that: include: A groove is formed in the pad area of ​​the substrate by using photolithography and etching technology; the substrate includes the pad area, the logic circuit area, the pixel area and the laser marking area; Depositing an isolation layer on the surface of the substrate; Making a through hole in the isolation layer in the groove and forming a conductive layer only in the groove to obtain a processed substrate; Depositing a dielectric layer on the surface of the processed substrate; removing the dielectric layer and the isolation layer located on the surface of the processed substrate; Depositing a metal grid material layer on the surface of the processed substrate; the metal grid material layer comprises a metal layer and a first protective layer; Etching the metal grid material layer by using photolithography and etching technology, retaining the metal grid material layer in the logic circuit area, the pixel area and the laser labeling area as the substrate grounding structure, the metal grid structure and the metal-containing structure respectively; At least the dielectric layer in the groove is removed to expose at least a portion of the conductive layer.

2. The method for manufacturing an image sensor according to claim 1, wherein: Depositing an isolation layer on the surface of the substrate comprises: An isolation layer is deposited on the surface of the substrate, wherein the isolation layer comprises isolation unit layers of two different materials alternately stacked.

3. The method for manufacturing an image sensor according to claim 2, wherein: Removing the dielectric layer and the isolation layer located on the surface of the processed substrate includes: The dielectric layer and the isolation layer on the surface of the processed substrate are removed by multiple grindings; wherein one of the isolation unit layers serves as a grinding barrier layer during the grinding process, and the grinding barrier layer is located inside the isolation layer.

4. The method for manufacturing an image sensor according to claim 2, wherein: When the number of isolation unit layers in the isolation layer is three, the isolation layer is deposited on the surface of the substrate, and the isolation layer includes two isolation unit layers alternately stacked with different materials, including: Depositing a first isolation unit layer on the surface of the substrate; Depositing a second isolation unit layer on a surface of the first isolation unit layer; A first isolation unit layer is deposited on a surface of the second isolation unit layer.

5. The method for manufacturing an image sensor according to claim 2, wherein: Removing at least the dielectric layer in the groove to expose at least a portion of the conductive layer comprises: A mask is used to form a groove in the pad area of ​​the substrate, and photolithography and etching techniques are used to remove the dielectric layer in the groove and above the conductive layer and the isolation unit layer in direct contact with the dielectric layer; wherein one of the isolation unit layers serves as an etching barrier layer during the etching process.

6. The method for manufacturing an image sensor according to claim 1, wherein: Before forming a groove in the pad area of ​​the substrate by using photolithography and etching technology, the method further includes: Depositing a second protective layer on the surface of the substrate; Accordingly, before depositing the metal grid material layer on the surface of the processed substrate, the method further includes: The second protection layer located in the logic circuit area is removed.

7. The method for manufacturing an image sensor according to claim 1, wherein: The isolation layer in the groove is provided with a through hole and a conductive layer is formed only in the groove to obtain a processed substrate, comprising: Using photolithography and etching techniques to form a through hole in the isolation layer located in the groove; Depositing a conductive layer on the surface of the substrate having the through hole and the isolation layer; the conductive layer is distributed in the through hole, and the conductive layer in the through hole is electrically connected to the metal structure in the pad area; Photolithography and etching techniques are used to retain only a portion of the conductive layer within the groove to obtain a processed substrate.

8. The method for manufacturing an image sensor according to claim 1, wherein: Depositing a metal grid material layer on the surface of the processed substrate; The metal grid material layer includes a metal layer and a first protective layer including: depositing a first adhesion layer on the surface of the processed substrate; depositing a metal layer on a surface of the first adhesion layer; depositing a second adhesion layer on the surface of the metal layer; A first protective layer is deposited on the surface of the second adhesion layer.

9. The method for manufacturing an image sensor according to any one of claims 1 to 8, characterized in that: After etching the metal grid material layer by photolithography and etching technology, retaining the metal grid material layer in the logic circuit area, the pixel area and the laser labeling area as the substrate grounding structure, the metal grid structure and the metal-containing structure respectively, the method further includes: depositing a third protective layer on the surface of the processed substrate having the substrate grounding structure, the metal grid structure and the metal-containing structure; Accordingly, removing at least the dielectric layer in the groove to expose at least a portion of the conductive layer includes: At least the dielectric layer and the third protective layer in the groove are removed to expose at least a portion of the conductive layer.

10. An image sensor, characterized in that: The image sensor is manufactured by the method for manufacturing an image sensor according to any one of claims 1 to 9.

Images