Visible infrared dual-band detection device

Abstract

The invention discloses a visible and infrared dual-band detection device, a preparation method and a visible and infrared dual-band imager. The visible and infrared dual-band detection device comprises an infrared detection chip, an annular supporting part and a visible light detection chip, the infrared detection chip comprises a substrate base and a plurality of infrared photosensitive units which are arranged in an array in the middle area of the substrate base; the visible light detection chip comprises a chip substrate and a visible light sensing unit formed in the middle area of the chip substrate; one end of the annular supporting part is in surrounding connection with the edge part of the substrate base, and the other end of the annular supporting part is in surrounding connection with the edge part of the chip substrate; the areas where the infrared light sensing units on the substrate base are located right face the areas where the visible light sensing units on the chip substrate are located, and the infrared light sensing units and the visible light sensing units are in pixel-level alignment. The visible light detection chip and the infrared detection chip are arranged in an upper layer and a lower layer, so that synchronous detection of infrared light and visible light is realized, and the preparation difficulty is low.

Description

Technical Field

[0001] The present invention relates to the technical field of photosensitive detection, and particularly to a visible-infrared dual-band detection device. Background Art

[0002] Visible light detection technology and infrared light detection technology are currently the two most widely used optoelectronic detection technologies; visible light detection technology obtains a target image by collecting visible light reflected by the target, has the characteristics of high resolution, high contrast, and rich detailed texture information, and is more in line with the visual perception habits of the human eye, but is susceptible to lighting conditions and weather, and has poor imaging effects under conditions such as rain, fog, and night. Infrared detection imaging technology is a technology that forms an image through infrared light output by the thermal radiation of an object itself or reflected infrared light, has strong anti-interference ability, and its infrared image can quantitatively or qualitatively characterize the temperature information and other information of the target and the scene, but the overall detailed and texture information of the infrared image is poor. For the same detection target, using a single optoelectronic detection technology has its own advantages and limitations; thus, combining visible light detection technology and infrared light detection technology to detect information on the same detection target can achieve the complementary advantages of the two different optoelectronic detection technologies.

[0003] Currently, in order to achieve the simultaneous detection of two different bands of light, visible light and infrared light, a hybrid layout of visible light photosensitive pixel units and infrared photosensitive pixel units is mostly adopted, that is, an infrared photosensitive pixel unit is arranged inside the periphery of each visible light photosensitive pixel unit, and a visible light photosensitive pixel unit is also arranged inside the periphery of each infrared photosensitive pixel unit, thereby realizing an alternating hybrid layout of infrared photosensitive pixel units and visible light photosensitive pixel units, so that the photosensitive area of the entire detection chip is uniformly mixed with infrared photosensitive pixel units and visible light photosensitive pixel units, and thus the same photosensitive area can sense and detect two different bands of light.

[0004] Based on the common knowledge of the preparation of optoelectronic sensors, the manufacturing of visible light detection chips is generally based on CMOS technology, while the manufacturing of infrared detection chips is generally based on MEMS technology of surface micromachining; these two manufacturing processes are not compatible. To achieve the hybrid layout of visible light photosensitive pixel units and infrared photosensitive pixel units, the overall process is complex, the process flow is greatly extended, and the probability of image defects (non-uniformity problems such as blind pixels and dark spots) also increases accordingly. Therefore, the overall yield of the obtained visible-infrared dual-band imaging chip will be low. Summary of the Invention

[0005] The purpose of the present invention is to provide a visible-infrared dual-band detection device, to avoid the problem that two different detection chips cannot be compatible and interfere with each other, and to improve the working performance of the entire detection device.

[0006] To solve the above technical problems, the present invention provides a visible and infrared dual-band detection device, comprising:

[0007] an infrared detection chip, an annular support portion, and a visible light detection chip;

[0008] The infrared detection chip includes a substrate base and a plurality of infrared photosensitive units arranged in an array in the middle region of the substrate base;

[0009] The visible light detection chip includes a chip substrate and visible light photosensitive units formed in the middle region of the chip substrate;

[0010] One end of the annular support portion is circumferentially connected to the edge portion of the substrate base, and the other end is circumferentially connected to the edge portion of the chip substrate;

[0011] The regions where the infrared photosensitive units are located on the substrate base face the regions where the visible light photosensitive units are located on the chip substrate, and pixel-level alignment is achieved between each infrared photosensitive unit and each visible light photosensitive unit.

[0012] Optionally, the middle region of the chip substrate includes a plurality of photosensitive pixel regions arranged in an array; the visible light photosensitive units are formed in each photosensitive pixel region;

[0013] Each infrared photosensitive unit has the same shape as each photosensitive pixel region, the area of each infrared photosensitive unit is the same as the area of N photosensitive pixel regions, and each infrared photosensitive unit faces N photosensitive pixel regions, where N is a positive integer greater than or equal to 1.

[0014] Optionally, the visible light detection chip further includes an infrared light-transmitting window layer disposed on the surface of the chip substrate close to the infrared detection chip;

[0015] Wherein, the infrared light-transmitting window layer is an infrared light-transmitting silicon wafer with a resistivity greater than the set resistivity.

[0016] Optionally, on the side of the chip substrate facing away from the infrared detection chip or on the side of the infrared light-transmitting window layer close to the infrared detection chip, an infrared antireflection layer and / or a graphene layer are disposed opposite to the photosensitive pixel unit region; wherein, the infrared antireflection layer is a silicon nanorod structure layer or an antireflection optical thin film layer;

[0017] On the side of the chip substrate facing away from the infrared detection chip or on the side of the infrared light-transmitting window layer close to the infrared detection chip, a metal heat-conducting film layer is disposed opposite to the region surrounding the photosensitive pixel unit region.

[0018] Optionally, the visible and infrared dual-band detection device further includes an outer sealed cavity with a vacuum inside, and the infrared detection chip, the annular support portion, and the visible light detection chip are jointly disposed inside the outer sealed cavity; and notches penetrating through the thickness of the annular support portion (3) are provided on the annular support portion and in the regions of the visible light detection chip or the infrared detection chip;

[0019] The thickness of the visible light detection chip (2) is 30 μm to 200 μm;

[0020] Alternatively, a cap support structure capable of transmitting infrared light is provided on the substrate base; the cap support structure and the substrate base jointly seal and wrap each of the infrared photosensitive units;

[0021] A flat support portion integrally formed with the annular support portion is filled and provided between the top end of the cap support structure and the visible light detection chip.

[0022] Optionally, the area of the visible light photosensitive units in each photosensitive pixel region is not greater than one-half of the area of the photosensitive pixel region; and the light transmittance of the region in each photosensitive pixel region that is not covered by the visible light photosensitive units to infrared light is greater than the light transmittance of the visible light photosensitive units.

[0023] Optionally, each of the visible light photosensitive units in each photosensitive pixel region includes at least one group of photosensitive modules; each group of photosensitive modules includes one red light photosensitive module, two green light photosensitive modules, and one blue light photosensitive module;

[0024] Among them, the red light photosensitive module, the green light photosensitive module, and the blue light photosensitive module in one group of photosensitive modules are arranged in a cross shape at the center of each photosensitive pixel region to form a Bayer array;

[0025] And / or, the red light photosensitive module, the green light photosensitive module, and the blue light photosensitive module in one group of photosensitive modules are respectively distributed at the four vertex positions of the photosensitive pixel region, so that a Bayer array is formed between the four photosensitive modules corresponding to the four adjacent vertices of four adjacent photosensitive pixel regions.

[0026] Optionally, the visible light detection chip and the infrared detection chip are commonly electrically connected to the same timing control circuit, and the timing control circuit is provided on the substrate base;

[0027] Part of the circuits in the visible light readout module electrically connected to the visible light detection chip are provided on the substrate base;

[0028] A first conductive column and a second conductive column are further provided between the visible light detection chip and the infrared detection chip;

[0029] The first end of the first conductive column is electrically connected to the circuit structure on the chip substrate in the visible light readout module, and the second end is electrically connected to the output end of the timing control circuit;

[0030] The first end of the second conductive column is electrically connected to each visible light sensing unit of the visible light detection chip, and the second end is electrically connected to the circuit structure on the substrate base in the visible light readout module.

[0031] Optionally, the visible light row selection circuit of the visible light readout module is arranged on the chip substrate and is electrically connected to each of the visible light sensing units, and the visible light column readout channel of the visible light readout module is arranged on the substrate base;

[0032] The first end of the first conductive column is electrically connected to the control input end of the visible light row selection circuit, and the second end is electrically connected to the output end of the timing control circuit;

[0033] The number of the second conductive columns is the same as the number of the visible light sensing units, and the first ends of the second conductive columns are electrically connected to the visible light sensing units one by one; the second ends of the second conductive columns in the same column are electrically connected to one of the readout channels in the visible light column readout channel through the same column output bus.

[0034] Optionally, the visible light row selection circuit of the visible light readout module is arranged on the chip substrate and is electrically connected to each of the visible light sensing units, and the visible light column readout channel of the visible light readout module is arranged on the substrate base;

[0035] The first end of the first conductive column is electrically connected to the control input end of the visible light row selection circuit, and the second end is electrically connected to the output end of the timing control circuit;

[0036] The number of the second conductive columns is the same as the number of columns of the visible light sensing units arranged in an array in the visible light detection chip, and the visible light sensing units in the same column are electrically connected to the first end of the same second conductive column through the same column output bus; the second end of each second conductive column is electrically connected to one of the visible light readout channels.

[0037] Optionally, the visible light detection chip and the infrared detection chip are commonly electrically connected to the same timing control circuit, and the timing control circuit is arranged on the substrate base;

[0038] The visible light readout module electrically connected to the visible light detection chip is arranged on the visible light detection chip;

[0039] A first conductive column and a second conductive column are further arranged between the visible light detection chip and the infrared detection chip;

[0040] The first end of the first conductive column is electrically connected to the control input terminals of the visible light row selection circuit, the visible light column selection circuit, and the control input terminal of the visible light column readout channel in the visible light readout module, and the second end is electrically connected to the output terminal of the timing control circuit;

[0041] The first end of the second conductive column is electrically connected to the output terminal of the visible light readout module, and the second end is electrically connected to the visible light image processing module circuit located on the substrate base.

[0042] A method for manufacturing an infrared dual-band detection device, comprising:

[0043] Manufacturing an infrared detection chip and a visible light detection chip respectively; wherein, the infrared detection chip includes a substrate base and a plurality of infrared photosensitive units arranged in an array in the middle area of the substrate base; the visible light detection chip includes a chip substrate and visible light photosensitive units formed in the middle area of the chip substrate;

[0044] Bonding and connecting the infrared detection chip and the visible light detection chip through an annular support portion, such that one end of the annular support portion is connected in a surrounding manner to the edge portion of the substrate base of the infrared detection chip, and the other end is connected in a surrounding manner to the edge portion of the chip substrate of the visible light detection chip, and the areas where the infrared photosensitive units are located on the substrate base face the areas where the visible light photosensitive units are located on the chip substrate, and pixel-level alignment is achieved between each infrared photosensitive unit and each visible light photosensitive unit.

[0045] A visible-infrared dual-band imager, comprising: the visible-infrared dual-band detection device according to any one of the above; an optical lens; a processor and a display;

[0046] Wherein, the visible-infrared dual-band detection device is disposed on the focal plane of the optical lens;

[0047] The processor is electrically connected to the readout circuits of the infrared detection chip and the visible light detection chip in the visible-infrared dual-band detection device, and is configured to obtain a visible-infrared dual-band fusion image according to the image signals detected by the visible-infrared dual-band detection device;

[0048] The display is configured to display the visible-infrared dual-band fusion image.

[0049] A visible-infrared dual-band detection device, a preparation method thereof, and a visible-infrared dual-band imager provided by the present invention. The visible-infrared dual-band detection device includes: an infrared detection chip, an annular support portion, and a visible light detection chip; the infrared detection chip includes a substrate base and a plurality of infrared photosensitive units arranged in an array in the middle region of the substrate base; the visible light detection chip includes a chip substrate and visible light photosensitive units formed in the middle region of the chip substrate; one end of the annular support portion is circumferentially connected to the edge portion of the substrate base, and the other end is circumferentially connected to the edge portion of the chip substrate; the regions where the infrared photosensitive units are located on the substrate base face the regions where the visible light photosensitive units are located on the chip substrate, and the infrared photosensitive units and the visible light photosensitive units are pixel-level aligned.

[0050] In this application, the infrared detection chip and the visible light detection chip are arranged in two layers on the base through the annular support portion. Thus, the visible light detection chip can sense and detect the visible light radiated and reflected by the target object, and the infrared light radiated from the same target object can be transmitted through the visible light detection chip and then incident on the infrared detection chip, thereby realizing the detection of visible light and infrared light dual-band light for the same target object. And because the detection device in this application is assembled after separately preparing the two detection chips, there is no need to mix and layout the photosensitive pixel units corresponding to the two different bands, which greatly reduces the preparation difficulty of the dual-band detection device; in addition, the infrared detection chip and the visible light detection chip are spaced apart from each other by a certain distance through the annular support portion, which can to a certain extent avoid the problem of mutual interference between the two different detection chips during actual operation; in addition, the infrared photosensitive units on the infrared detection chip and the visible light photosensitive units on the visible light detection chip are pixel-level aligned, which further reduces the difficulty of fusing the optical signals simultaneously received by the infrared detection chip and the visible light detection chip to obtain the image of the target object, thereby improving the working performance of the entire detection device. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] In order to more clearly illustrate the technical solutions of the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0052] Figure 1 It is a first structural schematic diagram of the visible-infrared dual-band detection device provided by the embodiment of the present application;

[0053] Figure 2 It is a frame structural schematic diagram of the visible-infrared dual-band imager provided by the embodiment of the present application;

[0054] Figure 3 Schematic diagram of the first process of the visible-infrared dual-band detection device provided by the embodiment of the present application;

[0055] Figure 4 The first schematic diagram of the partial structure of the visible light detection chip and partial infrared light sensing units provided by the embodiment of the present application;

[0056] Figure 5 The second schematic diagram of the partial structure of the visible light detection chip and partial infrared light sensing units provided by the embodiment of the present application;

[0057] Figure 6 The third schematic diagram of the partial structure of the visible light detection chip and partial infrared light sensing units provided by the embodiment of the present application;

[0058] Figure 7 The second structural schematic diagram of the visible-infrared dual-band detection device provided by the embodiment of the present application;

[0059] Figure 8 Schematic diagram of the second process of the visible-infrared dual-band detection device provided by the embodiment of the present application;

[0060] Figure 9 Schematic diagram of the framework of the readout module in the light detection chip;

[0061] Figure 10 Schematic diagram of the framework of the first layout structure of the visible light readout module and the infrared light readout module provided by the embodiment of the present application;

[0062] Figure 11 Schematic diagram of the framework of the second layout structure of the visible light readout module and the infrared light readout module provided by the embodiment of the present application;

[0063] Figure 12 Schematic diagram of the third process of the visible-infrared dual-band detection device provided by the embodiment of the present application;

[0064] In the drawings: 1 is an infrared detection chip, 11 is a substrate base, 12 is an infrared light sensing unit, 13 is a wiring pin, 14 is a via structure, 15 is a conductive metal, 2 is a visible light detection chip, 21 is a chip substrate, 22 is a visible light sensing unit, 220 is a photosensitive pixel area, 221 is a red light sensing module, 222 is a green light sensing module, 223 is a blue light sensing module, 23 is an infrared light transmissive window layer, 24 is an infrared antireflection layer, 231 is a silicon via, 3 is an annular support part, 30 is a flat support part, 31 is a metal bonding layer, 311 is an upper bonding layer, 312 is a lower bonding layer, 32 is an upper adhesion layer, 33 is a lower adhesion layer, 4 is a cap support structure, 51 is a first conductive column, 52 is a second conductive column. Detailed implementation manners

[0065] In this application, a visible-infrared dual-band detection device, its preparation method, and a visible-infrared dual-band imager are provided, which can simultaneously detect light of two different bands, namely visible light and infrared light, and reduce the preparation difficulty of the detection device while ensuring the quality and working performance of the detection device.

[0066] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention.

[0067] As Figures 1 to 8 shown, Figure 1 is the first structural schematic diagram of the visible-infrared dual-band detection device provided by the embodiment of the present application; Figure 2 is the frame structure schematic diagram of the visible-infrared dual-band imager provided by the embodiment of the present application; Figure 3 is the first process schematic diagram of the visible-infrared dual-band detection device provided by the embodiment of the present application; Figure 4 is the first schematic diagram of a partial structure of the visible light detection chip and partial infrared light sensing units provided by the embodiment of the present application; Figure 5 is the second schematic diagram of a partial structure of the visible light detection chip and partial infrared light sensing units provided by the embodiment of the present application; Figure 6 is the third schematic diagram of a partial structure of the visible light detection chip and partial infrared light sensing units provided by the embodiment of the present application; Figure 7 is the second structural schematic diagram of the visible-infrared dual-band detection device provided by the embodiment of the present application; Figure 8 is the second process schematic diagram of the visible-infrared dual-band detection device provided by the embodiment of the present application.

[0068] In a specific embodiment of the present application, the visible-infrared dual-band detection device may include:

[0069] an infrared detection chip 1, an annular support portion 3, and a visible light detection chip 2;

[0070] The infrared detection chip 1 includes a substrate base 11 and a plurality of infrared light sensing units 12 arranged in an array in the middle region of the substrate base 11;

[0071] The visible light detection chip 2 includes a chip substrate 21 and visible light sensing units 22 formed in the middle region of the chip substrate 21;

[0072] One end of the annular support portion 3 is connected in a surrounding manner to the edge portion of the substrate base 11, and the other end is connected in a surrounding manner to the edge portion of the chip substrate 21;

[0073] The regions on the substrate base 11 where the respective infrared light sensing units 12 are located are opposite to the regions on the chip substrate 21 where the respective visible light sensing units 22 are located, and the respective infrared light sensing units 12 and the respective visible light sensing units 22 are pixel-level aligned.

[0074] Referring Figure 1 and Figure 2 , in this embodiment, the infrared detection chip 1 includes a substrate base 11 and infrared light sensing units 12 formed in the middle region on the substrate base 11; similarly, the visible light sensing units 22 are formed in the middle region of the chip substrate 21 on the visible light detection chip 2; both the infrared detection chip 1 and the visible light detection chip 2 are obtained by using the conventional technology for preparing optoelectronic detection chips. On this basis, the infrared detection chip 1 and the visible light detection chip 2 are connected to each other through the annular support portion 3. The bottom end of the annular support portion 3 is connected to the substrate base 11 of the infrared detection chip 1, and the top end is connected to the chip substrate 21 of the visible light detection chip 2, thereby enabling the visible light detection chip 2 and the infrared detection chip 1 to be arranged in an upper and lower two-layer manner, and the infrared light sensing units 12 in the infrared detection chip 1 are exactly opposite to the visible light sensing units 22 in the visible light detection chip 2.

[0075] Among them, the chip substrate 21 in the visible light detection chip 2 is generally a silicon wafer, which has a high transmittance to infrared light and a low transmittance to visible light; and the resistivity of the silicon wafer can be greater than the set resistivity, and the set resistivity can specifically be 10 Ω·cm, so that the finally formed visible light detection chip 2 has a high transmittance not less than the set transmittance to infrared light and is opaque to visible light.

[0076] As Figure 2 shown, Figure 2 shows a schematic diagram of the imaging principle of a visible-infrared dual-band imager including the visible-infrared dual-band detection device. In practical applications, the visible light reflected from the surface of the target object and the infrared light radiated outward by the target object itself can jointly enter the visible-infrared dual-band detection device. Among them, when the visible light and the infrared light are mixed and incident on the visible light detection chip 2, the visible light can be sensed and detected by the visible light detection chip 2, and a visible light image of the target object can be generated therefrom; and the infrared light can be incident on the infrared detection chip 1 after passing through the visible light detection chip 2. Through the sensing and detection of the infrared detection chip 1, an infrared light image corresponding to the target object can be generated therefrom; further fusing the infrared light image and the visible light image can obtain a target object detection imaging image, thereby obtaining more comprehensive information of the target object.

[0077] In this embodiment, since the visible light detection chip 2 and the infrared detection chip 1 are arranged in an upper and lower layer through the annular support portion 3, thus, referring to Figure 3 , when actually fabricating the visible-infrared dual-band detection device, the visible light detection chip 2 and the infrared detection chip 1 can be separately fabricated and formed first, and then the two are integrated and assembled together. The fabrication difficulty of the entire detection device is low. Moreover, the upper and lower layer arrangement of the visible light detection chip 2 and the infrared detection chip 1 also avoids the interference of the visible light detection chip 2 detecting visible light caused by the reflection of the infrared detection chip 1 on visible light; at the same time, the heat generated by the visible light detection chip 2 during operation also has relatively less interference on the infrared detection chip 1, thereby improving the interference of the overall working performance of the visible-infrared dual-band detection device to a certain extent.

[0078] Furthermore, on the visible light detection chip 2, the middle region of the chip substrate 21 includes a plurality of photosensitive pixel regions 220 arranged in an array; each of the photosensitive pixel regions 220 is formed with the visible light photosensitive unit 22.

[0079] On this basis, the pixel-level alignment between each infrared photosensitive unit 12 and each visible light photosensitive unit 22 specifically may include:

[0080] The shape of each infrared photosensitive unit 12 is the same as the shape of each photosensitive pixel region 220, the area size of each infrared photosensitive unit 12 is the same as the area size of N photosensitive pixel regions 220, and each infrared photosensitive unit 12 faces N photosensitive pixel regions 220, where N is a positive integer greater than or equal to 1.

[0081] On this basis, referring to Figure 4 and Figure 5 , a plurality of photosensitive pixel regions 220 are arranged in an array on the chip substrate 21, and each photosensitive pixel region 220 is processed to form a visible light photosensitive unit 22; thus, when visible light is incident on the chip substrate 21, based on the visible light signals respectively detected by each visible light photosensitive unit 22, a corresponding visible light image can be formed. Moreover, the more the number of photosensitive pixel regions 220 distributed on the entire chip substrate 21, the higher the resolution of the formed visible light image.

[0082] Similar to the visible light detection chip 2, the infrared detection chip 1 also includes a plurality of infrared light-sensitive units 12 distributed in an array, and the regions where the infrared light-sensitive units 12 are located should exactly face the regions where the photosensitive pixel regions 220 on the visible light detection chip 2 are located. Thus, when visible light and infrared light are incident on the visible light detection chip 2, while the visible light is detected by the visible light-sensitive units 22 in each photosensitive pixel region 220, the infrared light can pass through each photosensitive pixel region 220 and be incident on each infrared light-sensitive unit 12, and thus be received by the infrared light-sensitive units 12, and a corresponding infrared light image can be formed; and the resolution of the infrared light image is obviously also proportional to the number of infrared light-sensitive units 12.

[0083] As described above, in the actual application of the visible-infrared dual-band detection device, it is necessary to fuse the visible light image detected by the visible light detection chip 2 and the infrared light image detected by the infrared detection chip 1. In order to simplify the difficulty of fusing the visible light image and the infrared light image, when the total area of each photosensitive pixel region 220 in the chip substrate 21 is the same as the total area of each infrared light-sensitive unit 12 on the infrared detection chip 1, as Figure 4 shown, the area shape of each photosensitive pixel region 220 in the chip substrate 21 can be set to be the same as the area shape of each infrared light-sensitive unit 12, and a one-to-one correspondence relationship is formed between each photosensitive pixel region 220 and each infrared light-sensitive unit 12. Thus, a one-to-one correspondence relationship is formed between each pixel point of the formed visible light image and each pixel point of the infrared light image. When collecting images, the obtained visible light image and infrared light image are both images formed by imaging and collecting the same target at the same time. Therefore, without any other subsequent processing, the visible light image and the infrared light image can be fused, thus greatly simplifying the difficulty of fusing the visible light image and the infrared light image with each other.

[0084] However, it can be understood that due to the differences in the physical mechanisms, process levels, and development histories of visible light imaging and infrared light imaging, the resolution of the visible light-sensitive units 22 can reach a higher level than the resolution of the infrared light-sensitive units 12. Therefore, using the same resolution for the visible light-sensitive units 22 and the infrared light-sensitive units 12 (i.e., the size of each pixel unit is the same) requires sacrificing part of the resolution of the visible light image, which is not conducive to obtaining a clear visible light image. For this reason, in actual applications, the area of each photosensitive pixel region 220 can be smaller than the area of the infrared light-sensitive units 12, so that the number of photosensitive pixel regions 220 in the chip substrate 21 is more than the number of infrared light-sensitive units 12 on the infrared detection chip 1, and thus a visible light image with a higher resolution can be obtained.

[0085] In the process of fusing a visible light image with a higher resolution and an infrared light image with a lower resolution, it is necessary to convert the infrared light image into an infrared light image with the same resolution as the visible light image to achieve the fusion of the two different images; for this purpose, as Figure 5 shown, in this embodiment, in order to reduce the difficulty of converting and processing the infrared light image, it is set that the area of each infrared photosensitive unit 12 is exactly an integer multiple of the area of each photosensitive pixel region 220; for example, the area of a single infrared photosensitive unit 12 can be equal to 4 times the area of the photosensitive pixel region 220, so that an infrared photosensitive unit 12 is exactly facing 4 photosensitive pixel regions 220 arranged in a 2×2 pattern; also for example, the area of a single infrared photosensitive unit 12 can be equal to 9 times the area of the photosensitive pixel region 220, and at this time an infrared photosensitive unit 12 is exactly facing 9 photosensitive pixel regions 220 arranged in a 3×3 pattern; thus, when the area of a single infrared photosensitive unit 12 is equal to N times the area of the photosensitive pixel region 220, each single infrared photosensitive unit is exactly facing N photosensitive pixel regions 220; when converting and processing the infrared light image into a higher resolution image, each pixel point in the infrared light image is divided into N smaller pixel points, and then the pixel values of the divided pixel points are assigned by means of interpolation method, and thus the infrared light image can be simply and quickly converted into an image with the same resolution as the visible light image.

[0086] On this basis, in another optional embodiment of the present application, the area of the visible light photosensitive unit 22 in each photosensitive pixel region 220 is not greater than one-half of the area of the photosensitive pixel region 220; and the light transmittance of the region covered by the non-visible light photosensitive unit 22 in each photosensitive pixel region 220 to infrared light is greater than the light transmittance of the visible light photosensitive unit 22.

[0087] In Figure 5 the shown embodiment, 4 photosensitive pixel regions 220 correspond to 1 infrared photosensitive unit 12, and in each photosensitive pixel region 220, the visible light photosensitive unit 22 is formed only in a partial region near one vertex angle, that is to say, the visible light photosensitive unit 22 only covers a partial area in the photosensitive pixel region 220. It can be understood that in each photosensitive pixel region 220, the light transmittance of the region not covered by the visible light photosensitive unit 22 to infrared light is greater than the light transmittance of the region covered by the visible light photosensitive unit 22 to infrared light. Thus, by forming the visible light photosensitive unit 22 only in a partial region in each photosensitive pixel region 220, the light transmittance of the entire chip substrate 21 to infrared light can be further improved to a great extent.

[0088] In Figure 5In the illustrated embodiment, the areas of the four photosensitive pixel regions 220 are the same as and correspond one by one to the area of one infrared photosensitive unit 12; in practical applications, whether each infrared photosensitive unit 12 and the photosensitive pixel region 220 correspond one by one or one infrared photosensitive unit 12 corresponds to multiple photosensitive pixel regions 220, the visible light photosensitive units 22 in each photosensitive pixel region 220 can only occupy a partial area within the photosensitive pixel region 220, thereby ensuring a high transmittance for infrared light.

[0089] In addition, the area ratio of each visible light photosensitive unit 22 within the corresponding photosensitive pixel region 220 can be set specifically based on the type of the target object in practical applications. For example, for a target object with a relatively high temperature itself, the area ratio of the visible light photosensitive unit 22 can be relatively larger, while for a target object with relatively weak infrared light radiated outward, the area ratio of the visible light photosensitive unit 22 can be relatively smaller; also for example, when performing dual-band detection on the target object, if the accuracy requirement for infrared light band detection is relatively low, while the accuracy requirement for visible light band detection is relatively high, the area ratio of the visible light photosensitive unit 22 in the photosensitive pixel region 220 can be larger, and if the accuracy requirement for infrared light band detection is relatively high, the area ratio of the visible light photosensitive unit 22 in the photosensitive pixel region 220 can be smaller. Similarly, in practical applications, the area ratio of the visible light photosensitive unit 22 within the photosensitive pixel region 220 can also be reasonably set based on other factors, and these are not listed one by one in this embodiment.

[0090] Based on the above embodiment, as Figure 6 shown, in another optional embodiment of the present application, the visible light photosensitive units 22 in each photosensitive pixel region 220 at least include a group of photosensitive modules; each group of photosensitive modules includes a red light photosensitive module 221, two green light photosensitive modules 222, and a blue light photosensitive module 223;

[0091] Among them, the red light photosensitive module 221, the green light photosensitive module 222, and the blue light photosensitive module 223 in a group of photosensitive modules are arranged in a cross shape at the center of each photosensitive pixel region 220 to form a Bayer array;

[0092] And / or, the red light photosensitive module 221, the green light photosensitive module 222, and the blue light photosensitive module 223 in a group of photosensitive modules are respectively distributed at the four vertex positions of the photosensitive pixel region 220, so that a Bayer array is formed between the four photosensitive modules corresponding to the four adjacent vertices of four adjacent photosensitive pixel regions 220.

[0093] In this embodiment, the visible light sensing units 22 in each photosensitive pixel region 220 can be a red light sensing module 221, a green light sensing module 222, and a blue light sensing module 223 that can form a Bayer array.

[0094] In Figure 6 In the illustrated embodiment, two sets of sensing modules are included in the same photosensitive pixel region 220. Each set of sensing modules includes a total of four sensing modules: one red light sensing module 221, two green light sensing modules 222, and one blue light sensing module 223. Among them, the four sensing modules of the first set of sensing modules are arranged in a cross shape in the central region of the photosensitive pixel region 220 to form a set of Bayer arrays. The four sensing modules of the second set of sensing modules are respectively distributed at the four vertex positions of the photosensitive pixel region 220. Thus, a set of Bayer arrays can also be formed between the four sensing modules corresponding to the four adjacent vertices where four adjacent photosensitive pixel regions 220 converge at a point. In Figure 6 The two dashed boxes in it are respectively the two sets of Bayer arrays. In practical applications, each photosensitive pixel region 220 can only include the first set of sensing modules arranged in the central region of the photosensitive pixel region 220, or can only include the second sensing modules arranged in the vertex region of the photosensitive pixel region 220.

[0095] Of course, it can be understood that in practical applications, the Bayer arrays formed within each photosensitive pixel region 220 are not limited to the above implementation method. For example, four sensing modules of a set of sensing modules can also be arranged in sequence along two opposite sides of the photosensitive pixel region 220, and the region between the two sets of sensing modules can be a region with high-efficiency transmission of infrared light. Thus, a Bayer array including two sets of sensing modules can also be formed between the adjacent side regions of two adjacent photosensitive pixel regions 220. The sensing modules in this embodiment can also adopt other layout methods, which are not listed one by one in this application.

[0096] In addition, a silicon nanostructure or an anti-reflection optical thin film layer can be provided in the region of each photosensitive pixel region 220 that is not covered by the visible light sensing unit 22, for improving the transmittance of the visible light detection chip 2 to infrared light, thereby improving the working performance of the infrared detection chip 1 for detecting and sensing infrared light.

[0097] In addition, in the region of each photosensitive pixel region 220 that is covered by the visible light sensing unit 22, a microlens structure and a deep trench isolation structure can be further processed to perform light condensation correction on visible light or to isolate the circuit structures in each visible light sensing unit 22 from each other, thereby improving the working performance of the visible light detection chip 2.

[0098] In any of the above embodiments, in an optional embodiment of the present application, in addition to including the chip substrate 21, the visible light detection chip 2 may further include an infrared light transmissive window layer 23, such as Figure 3 and Figure 12 As shown, the infrared light transmissive window layer 23 is disposed on the surface of the chip substrate 21 close to the infrared detection chip 1.

[0099] Specifically, the visible light detection chip 2 in this embodiment may adopt a back-illuminated structure. After the photosensitive pixel region 220 is processed on the chip substrate 21, it is wafer-bonded with the infrared light transmissive window layer 23 to form an integrated structure. The infrared light transmissive window layer 23 is disposed on the side close to the photosensitive pixel region 220; the infrared light transmissive window layer 23 may be an infrared light transmissive silicon wafer formed by a silicon wafer; and the resistivity in the infrared light transmissive window layer 23 should also be greater than a set resistivity, for example, greater than 10 Ω·cm; thus, it can be ensured that the infrared light transmissive window layer 23 has a strong transmittance to infrared light. After the wafer bonding is completed, the chip substrate 21 is thinned by a wafer thinning process, and only the photosensitive pixel region 220 and the visible light readout circuit structure on the chip substrate 21 are retained. At this time, the infrared light transmissive window layer 23 acts as a function of carrying the chip substrate 21 and is connected to the infrared detection chip 1 through the annular support portion 3.

[0100] The chip substrate 21 of the visible light detection chip 2 can be generally divided into an infrared window region located in the central region, a circuit function region surrounding the infrared window region, and a welding region surrounding the circuit function region; the infrared window region is also the region on the chip substrate 21 that is sensitive to visible light and can also transmit infrared light, that is to say, each photosensitive pixel region 220 is formed after the infrared window region is array-divided; and the circuit function region is the region where the visible light readout circuit structure electrically connected to the visible light photosensitive unit 22 in each photosensitive pixel region 220 is provided; the welding region is the region where the visible light detection chip 2 and the annular support portion 3 are welded and connected.

[0101] On this basis, in another optional embodiment of this embodiment, on the side of the chip substrate 21 facing away from the infrared detection chip 1 or on the side of the infrared light transmissive window layer 23 close to the infrared detection chip 1, an infrared antireflection layer 24 or a graphene layer is disposed opposite to the photosensitive pixel unit region 220; wherein, the infrared antireflection layer 24 is a silicon nanowire structure layer or an antireflection optical thin film layer;

[0102] On the side of the chip substrate 21 facing away from the infrared detection chip 1 or on the side of the infrared light transmissive window layer 23 close to the infrared detection chip 1, a metal heat conduction film layer is disposed opposite to the region surrounding the photosensitive pixel unit region 220.

[0103] In this embodiment, the infrared antireflection layer 24 can be disposed on the surface of the chip substrate 21 on the side facing away from the infrared detection chip 1, or on the surface of the infrared light-transmitting window layer 23 on the side close to the infrared detection chip 1. On this basis, the infrared antireflection layer 24 is directly opposite to the infrared window area in the chip substrate 21, that is, directly opposite to the area where the photosensitive pixel unit area 220 is located; the infrared antireflection layer 24 can be an antireflection optical thin film composed of multiple thin films, and the area of the entire film layer is comparable to the area of the infrared window area.

[0104] The infrared antireflection layer 24 can also be a plurality of silicon-based microstructures formed by etching, which mainly serves to enhance the transmittance of long-wave infrared and filter out stray light. The silicon-based microstructures can be silicon nanowire structures. The diameter of the silicon nanowire structures can be 1-3 μm, the period can be 2-4 μm, and the height can be 1-3 μm. Each silicon-based microstructure can be arranged corresponding to each visible light photosensitive unit 22 in the chip substrate 21.

[0105] Similar to the setting position of the above infrared antireflection layer 24, the graphene layer in this embodiment can be disposed on the surface of the chip substrate 21 on the side facing away from the infrared detection chip 1, or on the surface of the infrared light-transmitting window layer 23 on the side close to the infrared detection chip 1, and the graphene layer is directly opposite to the infrared window area in the chip substrate 21; the graphene layer has a high transmittance to infrared light and also has good thermal conductivity.

[0106] In addition, in another optional embodiment of this embodiment, the graphene layer and the infrared antireflection layer 24 can be stacked on the surface of the chip substrate 21 on the side facing away from the infrared detection chip 1, or on the surface of the infrared light-transmitting window layer 23 on the side close to the infrared detection chip 1; it is also possible to dispose the graphene layer on the surface of the chip substrate 21 on the side facing away from the infrared detection chip 1 and dispose the infrared antireflection layer 24 on the surface of the infrared light-transmitting window layer 23 on the side close to the infrared detection chip 1; it is also possible to dispose the infrared antireflection layer 24 on the surface of the chip substrate 21 on the side facing away from the infrared detection chip 1, and dispose the graphene layer on the surface of the infrared light-transmitting window layer 23 on the side close to the infrared detection chip 1.

[0107] Furthermore, in this embodiment, a metal thermal conductive film layer with a high thermal conductivity is also provided to achieve heat conduction of the visible light detection chip 2. However, differently, the metal thermal conductive film layer should be opposite to the annular area surrounding the photosensitive pixel area 220, specifically opposite to the circuit functional area on the chip substrate 21. The metal material layer can be an aluminum layer, a copper layer, a gold layer, a silver layer, or a titanium-based material layer and a zirconium-based getter material layer deposited by evaporation, etc., and the thickness can be between 100 nm and 2000 nm. It mainly has two functions: one is to enhance the overall thermal conductivity of the visible light detection chip 2 and also increase the heat dissipation area, which can quickly conduct away the heat generated by the circuit functional area; the other is that the metal material layer can play a role in evenly distributing heat, which can alleviate the problem of uneven heat generation in the circuit functional area (the circuit element density and power consumption in the circuit functional area vary greatly at different positions), thereby avoiding the local temperature rise at a certain place in the visible light detection chip 2, and thus also avoiding problems such as ghost images, light spots, and bright spots during infrared imaging.

[0108] As shown above, the visible light detection chip 2 in the present application can be bonded and arranged above the infrared detection chip 1 through the annular support portion 3, such as Figure 3 and Figure 12 shown. In an optional embodiment of this embodiment, the annular support portion 3 includes a metal bonding layer 31, and an upper adhesion layer 32 and a lower adhesion layer 33 respectively arranged at the upper and lower ends of the metal bonding layer 31;

[0109] The metal bonding layer 31 is any one of a Cu bonding layer, an Ag bonding layer, and a Ni bonding layer; the thickness of the metal bonding layer 31 is 20 μm to 400 μm;

[0110] Both the upper adhesion layer 32 and the lower adhesion layer 33 are Cr adhesion layers or Ti adhesion layers; the thicknesses of both the upper adhesion layer 32 and the lower adhesion layer 33 are 30 nm to 2 μm.

[0111] As Figure 3 shown, after the visible light detection chip 2 and the infrared detection chip 1 are respectively prepared and formed, an upper adhesion layer 32 with a thickness of 30 nm to 2 μm can be formed on the visible light detection chip 2, and an upper bonding layer 311 with a thickness of 10 μm to 200 μm can be arranged on the upper adhesion layer 32. At the same time, a lower adhesion layer 33 with a thickness of 30 nm to 2 μm and a lower bonding layer 312 with a thickness of 10 μm to 200 μm are stacked and arranged around the infrared detection chip 1 on the substrate base 11; then the upper bonding layer 311 and the lower bonding layer 312 are bonded to each other to form an integrated metal bonding layer 31, that is, the encapsulation connection between the visible light detection chip 2 and the infrared detection chip 1 is realized.

[0112] Based on any of the above embodiments, the visible light detection chip 2 in the present application can be either a COMS chip or a CCD chip. When manufacturing the visible light detection chip 2, airtight packaging is required. After exhausting the air, inert gases such as nitrogen and argon need to be further filled and then sealed. The main purpose is to prevent moisture and dust in the air from contaminating or eroding the chip. The infrared detection chip 1 must be vacuum packaged. The infrared photosensitive unit 12 in the present application can be a microbolometer made based on a thermistor. This microbolometer works in a vacuum environment, which can reduce convective heat conduction and ensure higher sensitivity of the infrared detection chip 1. Therefore, the infrared detection chip 1 needs to be vacuum packaged. Vacuum packaging is a form of airtight packaging with a higher level than inflatable airtight packaging. The inside of the packaging cavity is in a vacuum state, and the outside is in a normal atmospheric environment. There is a pressure difference between the inside and the outside. Therefore, higher requirements are imposed on the leak rate and packaging materials.

[0113] To achieve the vacuum packaging of the infrared detection chip 1, in an alternative embodiment of the present application, the infrared detection chip 1, the annular support portion 3, and the visible light detection chip 2 together form a sealed cavity with a vacuum inside; specifically, the chip substrate 21, the annular support portion 3, and the substrate base 11 can together form a vacuum cavity, so as to provide a vacuum working environment for the infrared photosensitive unit 12; in addition, a metal material layer with high thermal conductivity can be deposited on the circuit functional area of the visible light detection chip 2 as a getter layer, such as a titanium-based getter layer and a zirconium-based getter layer. After the getter layer is activated, the vacuum degree inside the vacuum cavity can be maintained. The visible-infrared dual-band imaging chip obtained by using this connection method only needs to be packaged by inflatable airtight packaging subsequently, with high packaging efficiency and low cost.

[0114] In another alternative embodiment of the present application, the visible-infrared dual-band detection device may further include an outer sealed cavity with a vacuum inside. The infrared detection chip 1, the annular support portion 3, and the visible light detection chip 2 are all arranged inside the outer sealed cavity; and notches penetrating through the thickness of the annular support portion 3 are provided in the area of the annular support portion 3 and the visible light detection chip 2 or the infrared detection chip 1.

[0115] In this embodiment, an external sealing cavity is used to provide the vacuum environment required for the operation of the infrared detection chip 1. Therefore, the annular support portion 3 only serves to connect and fix the visible light detection chip 2 and the infrared detection chip 1. There may be gaps on the annular support portion 3, such as two or four small gaps at the connection with the visible light detection chip 2 or the infrared detection chip 1, so that the space between the visible light detection chip 2 and the infrared detection chip 1 does not form a sealed cavity, and there is no pressure difference on both sides of the visible light detection chip 2. The visible light detection chip 2 can be thinned to a thinner thickness to enhance the transmittance of the visible light detection chip 2 to infrared light, and this thickness can be 30 - 200 μm. At this time, the overall package after the visible light detection chip 2 and the infrared detection chip 1 are packaged and connected needs to be packaged in the external sealing cavity, that is, it works in a vacuum environment.

[0116] In addition, in the present application, pixel-level vacuum packaging can also be adopted for each infrared photosensitive unit 12 in the infrared detection chip 1.

[0117] As Figure 7 and Figure 8 shown, in another optional embodiment of the present application, a cap support structure 4 that can transmit infrared light is provided on the infrared detection chip 1; the cap support structure 4 and the substrate base 11 together form a sealed vacuum cavity;

[0118] A flat support portion 30 integrally formed with the annular support portion 3 is filled and provided between the top end of the cap support structure 4 and the visible light detection chip 2.

[0119] As Figure 7 shown, in this embodiment, on the basis of processing the infrared detection chip 1 on the substrate base 11, a cap support structure 4 that can transmit infrared light is further formed on the infrared detection chip 1. The cap support structure 4 includes a plurality of integrally formed cap units, and each cap unit is a semi-closed structure with an open bottom end. And the open bottom end of each cap unit is hermetically connected to the substrate base 11, and each infrared photosensitive unit 12 is respectively wrapped and packaged one by one, so that each infrared photosensitive unit 12 is in a vacuum environment. On this basis, the annular support portion 3 is disposed around the outer side of the cap support structure 4, and a flat support portion 30 is provided at the top end of the cap support structure 4. The flat support portion 30 and the annular support portion 3 are of an integrally formed structure, which is equivalent to thickening the wall of the vacuum cavity, thereby enhancing the bearing capacity of the wall of the vacuum cavity to the air pressure difference while ensuring the airtightness of the vacuum cavity. In addition, the flat support portion 30 fills the steps on the surface of the infrared detection chip 1 caused by the infrared photosensitive units 12 and the cap support structure 4, making the surface of the infrared detection chip 1 flat, and preparing for the subsequent bonding between the visible light detection chip 2 and the infrared detection chip 1.

[0120] Referring to Figure 8, in the actual process of fabricating a visible-infrared dual-band detection device, on the basis of fabricating an infrared detection chip 1 on a substrate base 11 and fabricating a capping support structure 4 on the infrared detection chip 1, a ring support portion 3 and a flat support portion 30 can be integrally formed on the outer surface of the capping support structure 4; meanwhile, on the basis of fabricating a chip substrate 21 on a silicon wafer substrate, an adhesion layer is further provided on the side of the chip substrate 21 facing away from the substrate, and the chip substrate 21 can be bonded to the top of the flat support portion 30 by using this adhesion layer, thereby realizing the assembly and integration of structural components such as a visible light detection chip 2 and an infrared detection chip 1. In this embodiment, the visible light detection chip 2 may only include the chip substrate 21 without the need to provide an infrared light transmissive window layer 23; and, after the visible light detection chip 2 and the infrared detection chip 1 are bonded to each other, the substrate of the visible light detection chip 2 can be further thinned, only retaining the photosensitive pixel region 220 and the visible light readout circuit module, and the thickness of the remaining part of the visible light detection chip 2 can be less than 10 μm. In addition, a graphene layer and a metal heat conducting film layer can be provided on the surface of the visible light detection chip 2 on the side facing away from the flat support portion 30 opposite to the infrared window region and the circuit function region respectively to enhance the overall heat conductivity and temperature uniformity of the visible-infrared dual-band detection device, which will not be elaborated in detail in this embodiment.

[0121] It can be understood that the capping support structure 4 and the flat support portion 30 in this embodiment should adopt a structure that can transmit infrared light. Specifically, in actual applications, the capping support structure 4 can be any one or a combination of amorphous silicon structure, silicon nitride structure, germanium structure, zinc sulfide structure or zinc selenide structure. The above material structures are opaque to visible light or have a very low transmittance, and have a high transmittance to infrared light. Therefore, the capping support structure 4 will filter out the visible light component in the incident light and will not block the incidence of infrared light to the infrared photosensitive unit 12. And the structure formed by the integral molding of the ring support portion 3 and the flat support portion 30 is required to have a high infrared light transmittance, and specifically, a silicon dioxide layer can be used. The thickness of the integral molding of the ring support portion 3 and the flat support portion 30 can be 5 μm to 100 μm.

[0122] In addition, as Figure 8 shown, the ring support portion 3 in this embodiment may cover the wiring pins 13 of the infrared detection chip 1 on the substrate base 11. Therefore, in order to ensure that the wiring pins 13 of the infrared detection chip 1 can be electrically connected to an external circuit, a through-hole structure 14 penetrating the ring support portion 3, the flat support portion 30 and the visible light detection chip 2 can be further processed, and a conductive metal 15 is filled in the through-hole structure 14. Thus, the infrared detection chip 1 can also be electrically connected to the external circuit through the filled conductive metal 15.

[0123] Reference Figure 8 , the process for fabricating a visible-infrared dual-band detection device as shown in Figure 7 is generally as follows:

[0124] 1) Form the metal wiring layer, photodiode layer, and silicon substrate that are stacked from top to bottom in the visible light detection chip 2 through the front-end-of-line (FEOL) and back-end-of-line (BEOL) processes.

[0125] 2) Grow a thin silicon dioxide layer on the upper surface of the visible light sensing wafer (i.e., the chip substrate 21) and complete planarization.

[0126] 3) On the infrared sensing wafer, form a substrate base 11, infrared photosensitive units 12, and connection pins 13, and form a cap support structure 4 that hermetically wraps each infrared photosensitive unit 12, so that each infrared photosensitive unit 12 is vacuum encapsulated.

[0127] 4) Grow a thick silicon dioxide layer on the substrate base 11 and thin and planarize it through chemical mechanical polishing (CMP) technology, so that the silicon dioxide layer covers the cap support structure 4 and is in a state of highly flat upper surface.

[0128] 5) Flip the chip substrate 21 and align it facing the substrate base 11, and then bond the two wafer substrates together through the silicon dioxide layers on the surfaces of the chip substrate 21 and the substrate base 11 to obtain a visible-infrared combined wafer. For the process of wafer substrate bonding, it is required that the bonding platform has an alignment accuracy of the micron level or sub-micron level, so as to achieve the pixel-level accurate alignment and integration of the visible light focal plane array and the infrared focal plane array and their units. The specific alignment requirements are as described above, that is, the shape of each infrared photosensitive unit is the same as the shape of each photosensitive pixel region, the area size of each infrared photosensitive unit is the same as the area size of N photosensitive pixel regions, and each infrared photosensitive unit faces N photosensitive pixel regions, where N is a positive integer greater than or equal to 1.

[0129] 6) Use chemical mechanical planarization (CMP) technology and wet etching technology to thin the chip substrate 21 in the visible-infrared combined wafer, and only retain the required photodiode layer and metal wiring layer to obtain the visible light detection chip 2, whose remaining thickness is generally < 10 μm.

[0130] 7) According to requirements, the processes related to the remaining electrical and optical modules of the visible light detection chip 2 can be selectively completed, such as deep trench isolation (DTI), Bayer color filter, microlens and other related processes.

[0131] 8) A through-hole structure 14 is made at a position corresponding to the infrared chip pin (i.e., wiring pin 13) on the surface of the visible-infrared combination wafer. The bottom port of the through-hole structure 14 is electrically connected to the wiring pin 13, and the top port of the through-hole structure 14 reaches the surface metal of the visible-infrared combination wafer to form an infrared chip bonding pad. The through-hole structure 14 is filled with a conductive metal, and the material of the conductive metal can be copper or tungsten, etc.

[0132] 9) The dielectric layer on the surface of the visible-infrared combination wafer corresponding to the pin position on the chip substrate is opened by etching to obtain the visible chip wire bonding pad.

[0133] 10) Use the dicing equipment to scribe the visible-infrared combination wafer according to the predetermined dicing path, and finally obtain the following Figure 7 The visible-infrared dual-band detection device shown.

[0134] Based on the above discussion, in the visible-infrared dual-band detection device in the present application, it can be understood that each visible light photosensitive unit 22 on the visible light detection chip 2 should be connected to a visible light readout module, through which the photosensitive signal of each visible light photosensitive unit 22 is read and transmitted to the visible light image processing module to obtain a visible light image.

[0135] like Figure 9 As shown, Figure 9 The invention discloses a readout circuit infrastructure of a light detection chip; the readout circuit includes a row selection circuit, a column readout channel (for example, including circuit devices such as an analog amplifier circuit, an ADC conversion circuit, etc.), a column selection circuit, and an output buffer; wherein, the photosensitive units in the same column on the detection chip are electrically connected through the same column output bus and a readout channel in the column readout channel; on this basis, the row selection circuit and the column selection circuit are equivalent to switches, which are respectively used to control whether the photosensitive signals of the photosensitive units in each row and each column can be output; for example, when it is necessary to read the photosensitive signals output by the photosensitive units in the first row and the second column, the row selection circuit controls all the photosensitive units in the first row to output the photosensitive signals, while the column selection circuit controls the photosensitive units in the second column to output the photosensitive signals. Through the joint control of the row selection circuit and the column selection circuit, only the photosensitive signals of the photosensitive units in the first row and the second column can be output from the readout channel corresponding to the second column in the column readout circuit. In a similar manner, the photosensitive signals corresponding to each photosensitive unit can be read in sequence in the same manner. In addition, which row and column of photosensitive units in the row selection circuit and the column selection circuit output the photosensitive signal is controlled by a timing control circuit; the timing control circuit should include a circuit structure composed of a bias circuit, a timing circuit and a controller, which is specific and different from the timing control circuit in a conventional light detection chip, and is not described in detail in this application.

[0136] Based on the above discussion, if Figure 10As shown, in a specific embodiment of the present application, in the visible and infrared dual-band detection device, the visible light detection chip 2 and the infrared detection chip 1 are commonly electrically connected to the same timing control circuit, and the timing control circuit is arranged on the substrate base 11;

[0137] The visible light readout module electrically connected to the visible light detection chip 2 is arranged on the visible light detection chip 2;

[0138] A first conductive column 51 and a second conductive column 52 are further arranged between the visible light detection chip 2 and the infrared detection chip 1;

[0139] The first end of the first conductive column 51 is electrically connected to the control input ends of the visible light row selection circuit, the visible light column selection circuit, and the visible light column readout channel in the visible light readout module, and the second end is electrically connected to the output end of the timing control circuit;

[0140] The first end of the second conductive column 52 is electrically connected to the output end of the visible light readout module, and the second end is electrically connected to the visible light image processing module circuit located on the substrate base 11.

[0141] In this embodiment, the visible light readout circuit and the infrared light readout circuit respectively configured for the visible light detection chip 2 and the infrared detection chip 1 are commonly connected to the same set of timing control circuits, thereby simplifying the circuit structure of the entire detection device. On this basis, the timing control circuit is arranged on the substrate base 11. Therefore, in order to realize the connection between the timing control circuit and the visible light readout module, a first conductive column 51 can be arranged between the visible light detection chip 2 and the infrared detection chip 1. The first end of the first conductive column 51, that is, the end connected to the visible light detection chip 2, should be electrically connected to the visible light readout module, specifically, it should be electrically connected to the control input ends of the visible light row selection circuit, the visible light column selection circuit, and the visible light column readout channel in the visible light readout module; while the second end of the first conductive column 51, that is, the end connected to the infrared detection chip 2, should be electrically connected to the output end of the timing control circuit, thereby realizing the electrical connection between the timing control circuit and the control input ends of the visible light row selection circuit, the visible light column selection circuit, and the visible light column readout channel in the visible light readout module.

[0142] In addition, since the visible light readout module can be arranged on the visible light detection chip 2 and the visible light image processing module is arranged on the infrared detection chip 1, in order to realize the communication connection between the visible light readout module and the visible light image processing module, a second conductive column 52 can be further arranged between the visible light detection chip 2 and the infrared detection chip 1. The first end of the second conductive column 52 is electrically connected to the output end of the visible light readout module, and the second end is electrically connected to the visible light image processing module circuit located on the substrate base 11.

[0143] As Figure 11 shown, in another alternative embodiment of the present application, the visible-infrared dual-band detection device may further include:

[0144] The visible light detection chip 2 and the infrared detection chip 1 are commonly electrically connected to the same timing control circuit, and the timing control circuit is arranged on the substrate base 11;

[0145] Some circuits in the visible light readout module electrically connected to the visible light detection chip 2 are arranged on the substrate base 11; A first conductive column 51 and a second conductive column 52 are further arranged between the visible light detection chip 2 and the infrared detection chip 1;

[0146] The first end of the first conductive column 51 is electrically connected to the circuit structure on the chip substrate 21 in the visible light readout module, and the second end is electrically connected to the output end of the timing control circuit;

[0147] The first end of the second conductive column 52 is electrically connected to each visible light sensing unit 22 of the visible light detection chip 2, and the second end is electrically connected to the circuit structure of the visible light readout module arranged on the substrate base 11.

[0148] In this embodiment, the visible light readout circuit and the infrared light readout circuit are commonly connected to the same group of timing control circuits; on this basis, some circuits in the visible light readout module are arranged on the chip substrate 21 of the visible light detection chip 2, and the other part of the circuits are arranged on the substrate base 11 of the infrared detection chip 1. Thus, the first conductive column 51 can be used to realize the electrical connection between the circuit structure on the chip substrate 21 in the visible light readout module and the output end of the timing control circuit, and the second conductive column 52 is used to realize the electrical connection between each visible light sensing unit 22 of the visible light detection chip 2 and the part of the circuit arranged on the substrate base 11 in the visible light readout module. In this embodiment, some circuits in the visible light readout module are arranged on the infrared detection chip 1, so that the interference of the heat generated by the visible light readout module during actual operation on the result of the infrared detection chip 1 can be reduced to a certain extent.

[0149] On this basis, based on the different layout settings of the circuit structure of the visible light readout module on the visible light detection chip 2 and the infrared detection chip 1 respectively, there can also be various different setting methods for the second conductive column 52 between the visible light detection chip 2 and the infrared detection chip 1.

[0150] Referring Figure 11 , in an alternative implementation manner of this embodiment, the visible light row selection circuit of the visible light readout module is arranged on the chip substrate 21 and is electrically connected to each visible light sensing unit 22, and the visible light column readout channel of the visible light readout module is arranged on the substrate base 11;

[0151] The first end of the first conductive column 51 is electrically connected to the control input terminal of the visible light row selection circuit, and the second end is electrically connected to the output terminal of the timing control circuit;

[0152] The number of the second conductive columns 52 is the same as the number of the visible light photosensitive units 22. The first ends of the second conductive columns 52 are electrically connected to the visible light photosensitive units 22 one by one; the second ends of the second conductive columns 52 in the same column are electrically connected to one of the readout channels in the visible light column readout channel through the same column output bus.

[0153] In this embodiment, a second conductive column is separately provided for each visible light photosensitive unit 22. Thus, circuits such as the column output bus, the visible light column readout channel, the visible light column selection circuit, and the output buffer in the visible light readout module can be provided on the substrate base 11. The function of each second conductive column 52 is to realize the circuit connection between each visible light photosensitive unit 22 and the column output bus.

[0154] For Figure 11 , in another alternative implementation manner of this embodiment, the visible light row selection circuit of the visible light readout module is provided on the chip substrate 21 and is electrically connected to each visible light photosensitive unit 22, and the visible light column readout channel of the visible light readout module is provided on the substrate base 11;

[0155] The first end of the first conductive column 51 is electrically connected to the control input terminal of the visible light row selection circuit, and the second end is electrically connected to the output terminal of the timing control circuit;

[0156] The number of the second conductive columns 52 is the same as the number of columns of the visible light photosensitive units 22 arranged in an array in the visible light detection chip 2. The visible light photosensitive units 22 in the same column are electrically connected to the first end of the same second conductive column 52 through the same column output bus; the second end of each second conductive column 52 is electrically connected to one of the readout channels in the visible light readout channel.

[0157] In the visible light readout module of this embodiment, circuits such as the visible light column readout channel, the visible light column selection circuit, and the output buffer are also provided on the substrate base 11. However, the difference is that the column output bus is provided on the visible light detection chip 2. Thus, in this embodiment, only one second conductive column 52 needs to be correspondingly provided for each column of visible light photosensitive units 22. Each second conductive column 52 can be electrically connected to the visible light photosensitive units 22 in the same column through a column output bus. Thus, the function of each second conductive column 52 is also to realize the electrical connection between each column output bus and one of the readout channels in the visible light column readout channel. Compared with the previous embodiment, the number of the second conductive columns 52 required by the implementation manner in this embodiment is relatively smaller.

[0158] Based on the above discussion, regardless of whether the number of the second conductive posts 52 provided between the visible light detection chip 2 and the infrared detection chip 1 can be one, the same as the number of columns of the visible light photosensitive units 22 or the same as the total number of the visible light photosensitive units 22, the second ends of the second conductive posts 52 should be insulated from each of the infrared photosensitive units 12 on the substrate base 11 and also insulated from the circuit structure of the infrared light readout module.

[0159] On this basis, with reference to Figure 12 , in an optional embodiment of the present application, the visible and infrared dual-band detection device may further include:

[0160] On the infrared light transmissive window layer 23 provided on the surface of the chip substrate 21 of the visible light detection chip 2 close to the infrared detection chip 2, through silicon vias 231 are provided at positions facing the first conductive posts 51 and the second conductive posts 52; conductive fillers electrically connected to the corresponding first conductive posts 51 or second conductive posts 52 are filled in the through silicon vias 231.

[0161] It can be understood that when the circuit structure provided on the visible light detection chip 2 in the visible light readout module should be provided on the chip substrate 21. Therefore, in order to achieve the electrical connection between the first conductive posts 51 and the second conductive posts 52 and the circuit structure on the chip substrate 21, in this embodiment, through silicon vias 231 are further formed on the infrared light transmissive window layer 23 adhered to the side of the chip substrate 21 close to the infrared detection chip 1, and the electrical connection between the first ends of the first conductive posts 51 and the second conductive posts 52 and the circuit located on the chip substrate 21 is achieved by filling conductive fillers in the through silicon vias 231.

[0162] In practical applications, after the infrared detection chip 1, a partial circuit structure of the visible light readout module, and a circuit structure of the infrared light readout module are fabricated on the substrate base 11, the first conductive pillar 51 and the second conductive pillar 52 can be further disposed on the substrate base 11. Moreover, a through-silicon via 231 penetrating the infrared transparent window layer 23 is formed at a position corresponding to the first conductive pillar 51 and the second conductive pillar 52 in the fabricated visible light detection chip 2. The aperture of the through-silicon via 231 can be slightly larger than the diameters of the first conductive pillar 51 and the second conductive pillar 52, and a conductive filler, such as metallic copper, is filled in the through-silicon via 231. On this basis, the visible light detection chip 2 and the annular support portion 3 are bonded, and each of the first conductive pillar 51 and the second conductive pillar 52 is respectively in contact connection with the conductive filler in the corresponding through-silicon via 231, so that the first conductive pillar 51 is electrically connected to the circuit in the visible light readout module on the chip substrate 21 through the corresponding conductive filler, and the second conductive pillar 52 is electrically connected to each visible light photosensitive unit 22 in the chip substrate 21 through the corresponding conductive filler. In addition, the second conductive pillar 52 in this embodiment can also be a conductive copper pillar or other metal pillars with good electrical conductivity, and specific limitations are not imposed in this application.

[0163] Referring to Figure 12 , a preparation process of the visible and infrared dual-band detection device is roughly as follows:

[0164] 1) The metal wiring layer, the photodiode layer, and the silicon substrate stacked in sequence from top to bottom in the visible light detection chip 2 are formed through the front-end-of-line (FEOL) process and the back-end-of-line (BEOL) process. Among them, the photodiode layer is also the visible light photosensitive unit in the chip substrate, and the metal wiring layer is the circuit line for realizing the electrical connection between the visible light readout module and the visible light photosensitive unit 22. The circuit structure of the visible light readout module and the chip substrate 21 both have exposed copper contacts connected to the metal wiring layer for the input and output of visible light signals. The diameter of the copper contacts can be 1 to 5 μm, and the surface of the visible light detection chip 2 is planarized by chemical mechanical polishing (CMP) technology.

[0165] 2) The infrared transparent window layer 23 is prepared using a wafer. The material can be silicon, and the thickness is between 300 μm and 800 μm, and it is required to have a high transmittance in the long-wave infrared. The wafer is thinned, and the thickness after thinning can be between 10 and 200 μm. Then, the through-silicon via 231 is fabricated using deep silicon etching technology and electroplating technology. The conductive material in the through-silicon via 231 can be copper. The through-silicon via 231 penetrates the entire infrared transparent window layer 23, and the diameter can be 1 to 5 μm. Its position corresponds one-to-one with the copper contacts on the visible light sensing wafer, and the two side surfaces of the infrared transparent window layer 23 are planarized.

[0166] 3) Flip the integrated structure of the chip substrate 21 and the substrate, align it facing the infrared transparent window layer 23, and bond the two wafers together by thermocompression bonding to obtain a visible light-window combined wafer. During the alignment process, it is required that the copper contacts in the chip substrate 21 are aligned one by one with the top ports of the silicon vias 231 in the infrared transparent window layer 23, and the alignment deviation does not exceed half of the diameter of the copper contacts.

[0167] 4) Glue and lithograph the lower surface of the visible light-window combined wafer, and then etch out a silicon-based microstructure, which is the infrared antireflection layer 24, mainly used to enhance the long-wave infrared transmittance and filter out stray light. The silicon-based microstructure can be a silicon nanowire structure. The diameter of the silicon nanowire structure can be 1 - 3 μm, the period can be 2 - 4 μm, and the height can be 1 - 3 μm. The silicon-based microstructure corresponds one by one with the visible light photosensitive unit 22 in the chip substrate 21, and the position of the silicon-based microstructure does not coincide with that of the silicon via 231, so as not to affect the electrical conduction characteristics of the silicon via 231.

[0168] 5) Using the lift-off process, deposit an adhesion layer 32 on the blank area of the lower surface of the visible light-window combined wafer without the silicon-based microstructure and on the area of the silicon via 231. The position where the upper adhesion layer 32 is located is the wall (i.e., the annular support part 3). The upper adhesion layer can be made of conductive metal materials such as Cr, Ti, TiN, etc., with a thickness of 30 nm - 2 μm, and the growth method can be sputtering, evaporation plating, or electroplating, etc.

[0169] 6) After completing the entire process of the microbolometer (infrared photosensitive unit 12) on the substrate base 11, an infrared detection chip 1 is obtained. The substrate base 11 is provided with partial circuit structures of an infrared light readout module, a visible light readout module, a visible light image processing module, an infrared light image processing module, etc. The infrared detection chip 1 has not released the sacrificial layer used in the surface micromachining technology. At the corresponding positions of the copper pillars (i.e., the first conductive pillar 51 and the second conductive pillar 52) on the substrate base 11, through holes corresponding to the metal contacts electrically connected to the circuit structure of the visible light readout module are opened in the sacrificial layer; the positions of the through holes correspond one by one to the positions where the copper pillars are located.

[0170] 7) Deposit a lower adhesion layer 33. The lower adhesion layer 33 can be made of conductive metal materials such as Cr, Ti, TiN, etc., with a thickness of 30 nm - 2 μm, and the growth method can be sputtering, evaporation plating, or electroplating, etc. Then fill the through holes with copper material to obtain the wall (i.e., the metal bonding layer 31) and the copper pillars; use techniques such as CMP, etching, and plasma cleaning to remove all the materials such as the excess copper on the top of the sacrificial layer, the lower adhesion layer 33, the hard mask, and the sacrificial layer, so as to obtain the infrared detection chip 1 with a thermally isolated microbolometer structure, as well as the wall and the copper pillars.

[0171] 8) Using a high-precision alignment platform, the visible window combined wafer and the infrared detection chip are strictly aligned vertically and horizontally, and through wafer bonding, interconnection is achieved between the top of the copper pillar and the bottom port of the silicon through hole 231, and between the wall and the upper adhesion layer 32, so as to connect the two wafers together to obtain a visible light-window-infrared combined device structure. This process requires that the alignment between the visible light photosensitive unit and the microbolometer unit, and between the top of the copper pillar and the bottom port of the silicon through hole be completed with a micron-level accuracy, and the alignment deviation does not exceed half of the copper pillar diameter.

[0172] 9) Using chemical mechanical polishing technology (CMP) and wet etching technology, the substrate in the visible light-window infrared combined wafer of the visible light detection chip 2 is thinned, and only the required photodiode layer and metal wiring layer are retained to obtain the chip substrate 21, whose thickness is generally <10 μm.

[0173] 10) Pattern etching is performed at the pin position of the chip substrate 21 to remove the surface dielectric layer and open the pin pads of the visible light detection chip 2; before opening the pin pads, the remaining electrical and optical module-related processes, such as deep trench isolation (DTI), Bayer color filter, microlens, etc., can also be performed on the chip substrate 21 as needed.

[0174] 11) Using a dicing device, the infrared light-transmitting window layer 23 directly above the pin pads (i.e., the wiring pins 13) of the infrared detection chip 1 and the blank area structure without any effective structure or circuit in the edge position of the chip substrate 21 are diced off to expose the pin pads of the infrared detection chip 2. The infrared detection chip is diced using a dicing device, and finally a visible-infrared dual-band detection device is obtained.

[0175] In this embodiment, only Figure 12 the preparation process of the visible-infrared dual-band detection device is briefly described; it can be understood that for Figure 3 and Figure 12 the preparation processes shown, except that the preparation processes of structures such as the capping support structure 4, the first conductive pillar 51, and the second conductive pillar 52 are slightly different, the other processes are generally the same. The three different preparation processes can be referred to each other, and this application does not specifically elaborate on this.

[0176] In summary, in the present application, the infrared detection chip and the visible light detection chip are arranged in two layers on the base through the annular support portion. Thus, the visible light detection chip can sense and detect the visible light radiated and reflected by the target object, and the infrared light radiated from the same target object can be transmitted through the visible light detection chip and then incident on the infrared detection chip, thereby realizing the detection of visible light and infrared light in two bands for the same target object. And because the detection device in the present application is formed by assembling after separately preparing two detection chips, there is no need to mix and layout the photosensitive pixel units corresponding to two different bands, which greatly reduces the preparation difficulty of the dual-band detection device. In addition, the infrared detection chip and the visible light detection chip are spaced apart from each other by a certain distance through the annular support portion, which can, to a certain extent, avoid the problem of mutual interference between the two different detection chips during actual operation. Moreover, the infrared photosensitive units on the infrared detection chip and the visible light photosensitive units on the visible light detection chip are pixel-level aligned, further reducing the difficulty of fusing the optical signals simultaneously sensed and received by the infrared detection chip and the visible light detection chip to obtain the image of the target object, thereby improving the working performance of the entire detection device.

[0177] Referring to Figure 3 、 Figure 8 and Figure 12 , an embodiment of a preparation method for a visible-infrared dual-band detection device is also disclosed in the present application. The preparation method may include:

[0178] Separate preparation of an infrared detection chip 1 and a visible light detection chip 2;

[0179] Among them, the infrared detection chip 1 includes a substrate base 11 and a plurality of infrared photosensitive units 12 arranged in an array in the middle area of the substrate base 11; the visible light detection chip 2 includes a chip substrate 21 and visible light photosensitive units 22 formed in the middle area of the chip substrate 21;

[0180] Bond and connect the infrared detection chip 1 and the visible light detection chip 2 through the annular support portion 3, so that one end of the annular support portion 3 is connected around the edge portion of the substrate base 11 of the infrared detection chip 1, and the other end is connected around the edge portion of the chip substrate 21 of the visible light detection chip 2, and the areas where the infrared photosensitive units 12 are located on the substrate base 11 face the areas where the visible light photosensitive units 22 are located on the chip substrate 21, and the infrared photosensitive units 12 and the visible light photosensitive units 22 are pixel-level aligned.

[0181] Specifically, in the middle area of the chip substrate 21 of the visible light detection chip 2, there are a plurality of photosensitive pixel regions 220 arranged in an array; a visible light photosensitive unit 22 is formed in each photosensitive pixel region 220; the shape of each infrared photosensitive unit 12 is the same as the shape of each photosensitive pixel region 220, the area size of each infrared photosensitive unit 12 is the same as the area size of N photosensitive pixel regions 220, and each infrared photosensitive unit 12 faces N photosensitive pixel regions 220, where N is a positive integer greater than or equal to 1.

[0182] Optionally, the chip substrate 21 is a silicon wafer with a resistivity greater than a set resistivity, so that the light transmittance of the visible light detection chip 2 to infrared light is not less than a set light transmittance.

[0183] Referring to Figure 2 , an embodiment of a visible and infrared dual-band imager is also provided in this application. The visible and infrared dual-band imager includes: the visible and infrared dual-band detection device described in any one of the above embodiments; an optical lens; a processor; and a display;

[0184] Among them, the visible and infrared dual-band detection device is arranged on the focal plane of the optical lens;

[0185] The processor is electrically connected to the readout circuits of the infrared detection chip and the visible light detection chip in the visible and infrared dual-band detection device, and is used to obtain a visible and infrared dual-band fusion image according to the image signals detected by the visible and infrared dual-band detection device;

[0186] The display is used to display the visible and infrared dual-band fusion image.

[0187] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "including", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes the inherent elements thereof. Without more limitations, the element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, article or device including the said element. In addition, the parts of the above technical solutions provided in the embodiments of this application that are consistent with the corresponding technical solutions in the prior art in terms of implementation principles are not described in detail to avoid excessive elaboration.

[0188] In this article, specific examples are used to elaborate on the principles and implementation manners of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be noted that for those of ordinary skill in the art, without departing from the principles of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. A visible infrared dual-band detection device, characterized in that: include: Infrared detection chip (1), an annular support portion (3) and a visible light detection chip (2); The infrared detection chip (1) comprises a substrate base (11) and a plurality of infrared photosensitive units (12) arranged in an array in a middle area of ​​the substrate base (11); The visible light detection chip (2) comprises a chip substrate (21) and a visible light sensing unit (22) formed in a middle area of ​​the chip substrate (21); One end of the annular support portion (3) is circumferentially connected to an edge portion of the substrate base (11), and the other end is circumferentially connected to an edge portion of the chip substrate (21); The area where each infrared photosensitive unit (12) is located on the substrate base (11) faces the area where each visible light photosensitive unit (22) is located on the chip substrate (21), and each infrared photosensitive unit (12) and each visible light photosensitive unit (22) are aligned at the pixel level.

2. The visible-infrared dual-band detection device according to claim 1, characterized in that: The middle area of ​​the chip substrate (21) comprises a plurality of photosensitive pixel areas (220) arranged in an array; each of the photosensitive pixel areas (220) is formed with the visible light photosensitive unit (22); The shape of each of the infrared photosensitive units (12) is the same as the shape of each of the photosensitive pixel regions (220), the area of ​​each of the infrared photosensitive units (12) is the same as the area of ​​the N photosensitive pixel regions (220), and each of the infrared photosensitive units (12) is directly opposite to the N photosensitive pixel regions (220), where N is a positive integer greater than or equal to 1.

3. The visible-infrared dual-band detection device according to claim 2, characterized in that: The visible light detection chip (2) further comprises an infrared light-transmitting window layer (23) which is bonded to a surface of the chip substrate (21) on one side close to the infrared detection chip (1); Wherein, the infrared transparent window layer (23) is an infrared transparent silicon wafer having a resistivity greater than the set resistivity.

4. The visible-infrared dual-band detection device according to claim 3, characterized in that: An infrared transmittance-enhancing layer (24) and / or a graphene layer is provided on the side of the chip substrate (21) facing away from the infrared detection chip (1) or on the side of the infrared light-transmitting window layer (23) close to the infrared detection chip (1), facing the photosensitive pixel unit area (220); wherein the infrared transmittance-enhancing layer (24) is a silicon nanocolumn structure layer or an anti-reflection optical film layer; A metal heat-conducting film layer is provided on a side of the chip substrate (21) facing away from the infrared detection chip (1) or on a side of the infrared light-transmitting window layer (23) close to the infrared detection chip (1), facing the area surrounding the photosensitive pixel unit area (220).

5. The visible-infrared dual-band detection device according to claim 1, characterized in that: It also comprises an outer sealed cavity with a vacuum interior, wherein the infrared detection chip (1), the annular support portion (3) and the visible light detection chip (2) are arranged together inside the outer sealed cavity; and a notch penetrating the thickness of the annular support portion (3) is arranged in an area connected to the visible light detection chip (2) or the infrared detection chip (1) on the annular support portion (3); the thickness of the visible light detection chip (2) is 30 μm to 200 μm; Alternatively, a sealing cap support structure (4) capable of transmitting infrared light is provided on the substrate base (11); the sealing cap support structure (4) and the substrate base (11) jointly seal and wrap each of the infrared photosensitive units (12); and a flat plate support portion (30) integrally formed with the annular support portion (3) is filled and provided between the top of the sealing cap support structure (4) and the visible light detection chip (2).

6. The visible-infrared dual-band detection device according to any one of claims 2 to 5, characterized in that: The area of ​​the visible light photosensitive unit (22) in each of the photosensitive pixel regions (220) is not greater than half of the area of ​​the photosensitive pixel region (220); and the transmittance of the area not covered by the visible light photosensitive unit (22) in each of the photosensitive pixel regions (220) to infrared light is greater than the transmittance of the visible light photosensitive unit (22).

7. The visible-infrared dual-band detection device according to claim 6, characterized in that: The visible light photosensitive unit (22) in each photosensitive pixel area (220) comprises at least one group of photosensitive modules; each group of photosensitive modules comprises a red light photosensitive module (221), two green light photosensitive modules (222) and a blue light photosensitive module (223); The red light photosensitive module (221), the green light photosensitive module (222), and the blue light photosensitive module (223) in a group of the photosensitive modules are arranged in a field shape at the center of each photosensitive pixel area (220) to form a Bayer array; And / or, the red light photosensitive module (221), the green light photosensitive module (222), and the blue light photosensitive module (223) in a group of the photosensitive modules are respectively distributed at four vertex positions of the photosensitive pixel area (220), so that a Bayer array is formed between four adjacent photosensitive modules.

8. The visible-infrared dual-band detection device according to any one of claims 1 to 5, characterized in that: The visible light detection chip (2) and the infrared detection chip (1) are electrically connected to the same timing control circuit, and the timing control circuit is arranged on the substrate base (11); Part of the circuit in the visible light readout module electrically connected to the visible light detection chip (2) is arranged on the substrate base (11); A first conductive column (51) and a second conductive column (52) are further provided between the visible light detection chip (2) and the infrared detection chip (1); The first end of the first conductive column (51) is electrically connected to a circuit structure in the visible light readout module located on the chip substrate (21), and the second end is electrically connected to an output end of the timing control circuit; The first end of the second conductive column (52) is electrically connected to each visible light photosensitive unit (22) of the visible light detection chip (2), and the second end is electrically connected to the circuit structure of the visible light readout module located on the substrate base (11).

9. The visible-infrared dual-band detection device according to claim 8, characterized in that: The visible light row selection circuit of the visible light readout module is arranged on the chip substrate (21) and is electrically connected to each of the visible light photosensitive units (22), and the visible light column readout channel of the visible light readout module is arranged on the substrate base (11); The first end of the first conductive column (51) is electrically connected to the control input end of the visible light row selection circuit, and the second end is electrically connected to the output end of the timing control circuit; The number of the second conductive pillars (52) is the same as the number of the visible light photosensitive units (22); the first end of each second conductive pillar (52) is electrically connected to each visible light photosensitive unit (22) in a one-to-one correspondence; and the second end of the second conductive pillars (52) in the same column is electrically connected to one of the readout channels in the visible light column through the same column output bus.

10. The visible-infrared dual-band detection device according to claim 8, characterized in that: The visible light row selection circuit of the visible light readout module is arranged on the chip substrate (21) and is electrically connected to each of the visible light photosensitive units (22), and the visible light column readout channel of the visible light readout module is arranged on the substrate base (11); The first end of the first conductive column (51) is electrically connected to the control input end of the visible light row selection circuit, and the second end is electrically connected to the output end of the timing control circuit; The number of the second conductive pillars (52) is the same as the number of columns of the visible light photosensitive units (22) arranged in an array in the visible light detection chip (2); the visible light photosensitive units (22) in the same column are electrically connected to the first end of the same second conductive pillar (52) via the same column output bus; and the second end of each second conductive pillar (52) is electrically connected to one of the visible light readout channels.

11. The visible-infrared dual-band detection device according to any one of claims 1 to 5, characterized in that: The visible light detection chip (2) and the infrared detection chip (1) are electrically connected to the same timing control circuit, and the timing control circuit is arranged on the substrate base (11); A visible light readout module electrically connected to the visible light detection chip (2) is arranged on the visible light detection chip (2); A first conductive column (51) and a second conductive column (52) are further provided between the visible light detection chip (2) and the infrared detection chip (1); The first end of the first conductive column (51) is electrically connected to a control input end of a visible light row selection circuit, a control input end of a visible light column selection circuit and a control input end of a visible light column readout channel in the visible light readout module, and the second end is electrically connected to an output end of the timing control circuit; The first end of the second conductive column (52) is electrically connected to the output end of the visible light readout module, and the second end is electrically connected to the visible light image processing module circuit located on the substrate base (11).

12. A method for preparing an infrared dual-band detection device, characterized in that: include: An infrared detection chip (1) and a visible light detection chip (2) are prepared respectively; wherein the infrared detection chip (1) comprises a substrate base (11) and a plurality of infrared photosensitive units (12) arranged in an array in a middle region of the substrate base (11); and the visible light detection chip (2) comprises a chip substrate (21) and a visible light photosensitive unit (22) formed in a middle region of the chip substrate (21); The infrared detection chip (1) and the visible light detection chip (2) are bonded and connected via an annular support portion (3), such that one end of the annular support portion (3) is connected in a circumferential manner to an edge of a substrate base (11) of the infrared detection chip (1), and the other end is connected in a circumferential manner to an edge of a chip substrate (21) of the visible light detection chip (2), and the area where each infrared photosensitive unit (12) on the substrate base (11) is located is directly opposite to the area where each visible light photosensitive unit (22) on the chip substrate (21) is located, and each infrared photosensitive unit (12) and each visible light photosensitive unit (22) are aligned at a pixel level.

13. A visible infrared dual-band imager, characterized in that: include: The visible-infrared dual-band detection device according to any one of claims 1 to 11; Optical lens; processor and display; Wherein, the visible infrared dual-band detection device is arranged on the focal plane of the optical lens; The processor is electrically connected to the infrared detection chip in the visible infrared dual-band detection device and the readout circuit of the visible light detection chip, and is used to obtain a visible light infrared dual-band fused image according to the image signal detected by the visible infrared dual-band detection device; The display is used to display the visible light infrared dual-band fusion image.

Images