Solar cell, photovoltaic module and preparation method

Abstract

The invention discloses a solar cell, a photovoltaic module and a preparation method. The solar cell may include: a silicon substrate; the electric functional areas are arranged on the first main surface of the silicon substrate at intervals, and each electric functional area comprises an emitting electrode and a first passivation structure which are stacked from inside to outside; the isolation regions are arranged between the adjacent electric functional regions and comprise second passivation structures; the first metal electrode penetrates through the first passivation structure and is electrically connected with the emitting electrode; for the first main surface of the silicon substrate, the specific surface area corresponding to the isolation region is smaller than the specific surface area corresponding to the electrical functional region. According to the solar cell cutting process, the doped region can be prevented from being damaged, and carrier recombination of a cell piece is reduced.

Description

Technical Field

[0001] The present invention relates to a solar cell, a photovoltaic module and a preparation method thereof. Background Art

[0002] The cell wafers used in photovoltaic modules are generally obtained by cutting large-sized solar cell wafers, so as to improve the output power of the modules. Exemplarily, the solar cell wafer is cut once from the middle position of the solar cell wafer to obtain a half cell wafer; the solar cell wafer is cut multiple times to obtain multiple cell wafers. During the laser cutting of the solar cell wafer, it is inevitable to cause serious laser damage to the cutting surface of the cell wafer, and then a large number of dangling bonds and defect states will be formed on the cutting surface of the cell wafer. These defects, as recombination centers of carriers, will recombine with a large number of carriers, resulting in poor carrier transport ability and photoelectric conversion efficiency of the solar cell. Summary of the Invention

[0003] In view of this, the present invention provides a solar cell, a photovoltaic module and a preparation method thereof. The cell wafer obtained by cutting based on the isolation region provided on the solar cell wafer can avoid surface damage of the cutting surface, reduce carrier recombination of the cell wafer, so as to improve the carrier transport ability and photoelectric conversion efficiency of the solar cell.

[0004] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0005] In a first aspect, the present invention provides a solar cell, including: a silicon substrate, electrically functional regions arranged at intervals on a first main surface of the silicon substrate, a planar isolation region provided on the first main surface of the silicon substrate between adjacent electrically functional regions, and a first metal electrode, wherein,

[0006] For the first main surface of the silicon substrate, the specific surface area corresponding to the isolation region is smaller than the specific surface area corresponding to the electrically functional region;

[0007] The electrically functional region includes an emitter and a first passivation structure stacked from the inside to the outside;

[0008] The isolation region includes a second passivation structure, and the thickness of the second passivation structure is greater than the thickness of the first passivation structure;

[0009] The first metal electrode passes through the first passivation structure and is electrically connected to the emitter.

[0010] In a second aspect, an embodiment of the present invention provides a photovoltaic module, including: a cell wafer obtained by cutting the solar cell provided in the first aspect embodiment, wherein,

[0011] The solar cell piece includes: a silicon substrate, an electrical functional region, and an edge isolation region;

[0012] The electrical functional region and the edge isolation region are arranged side by side on the first main surface of the silicon substrate, and the extending directions of the electrical functional region and the edge isolation region are the same;

[0013] The electrical functional region includes an emitter and a first passivation structure which are stacked from inside to outside;

[0014] The edge isolation region is arranged corresponding to at least one edge of the solar cell piece, and it includes a second passivation structure;

[0015] For the first main surface of the silicon substrate, the specific surface area corresponding to the edge isolation region is smaller than the specific surface area corresponding to the electrical functional region, and the region corresponding to the edge isolation region is lower than the region corresponding to the electrical functional region.

[0016] In a third aspect, an embodiment of the present invention provides a preparation method of the solar cell provided in the first aspect embodiment above, including:

[0017] Step 1, prepare an emitter on the first main surface of the silicon substrate, and there is a first doped silicon glass layer on the surface of the emitter;

[0018] Step 2, perform laser grooving treatment on a part of the region of the emitter with the first doped silicon glass layer on the surface;

[0019] Step 3, clean the region treated by laser grooving and the first doped silicon glass layer on the surface of the emitter, so as to form spaced-apart electrical functional regions with the emitter on the first main surface of the silicon substrate and an isolation region with a planar structure between adjacent electrical functional regions, and make the specific surface area corresponding to the isolation region on the first main surface of the silicon substrate smaller than the specific surface area corresponding to the electrical functional region;

[0020] Step 4, synchronously form a first passivation structure in the electrical functional region and form a second passivation structure in the isolation region.

[0021] The technical solution of the first aspect of the above invention has the following advantages or beneficial effects:

[0022] For the solar cell provided by the embodiment of the present invention, since the electrical functional regions are arranged spaced apart on the first main surface of the silicon substrate of the solar cell, and an isolation region with a planar structure is arranged between adjacent electrical functional regions, the specific surface area corresponding to the isolation region is smaller than the specific surface area corresponding to the electrical functional region, and the region corresponding to the isolation region is lower than the region corresponding to the electrical functional region. It can ensure that the isolation region is not affected by the doped atoms of the emitter, and can improve the uniformity and compactness of the second passivation structure, thereby ensuring the passivation effect of the isolation region.

[0023] The cell slices obtained by cutting the isolation region of the planar structure based on the solar cell can avoid surface damage on the cutting surface, reduce carrier recombination of the cell slices, so as to improve the carrier transport ability and photoelectric conversion efficiency of the solar cell.

[0024] Furthermore, by setting the cutting position of the solar cell to coincide with the midline in the extending direction of the isolation region, the consistency of the cut cell slices can be effectively ensured.

[0025] In addition, by designing the second passivation structure of the isolation region to cooperate with the planar structure of the isolation region, after the solar cell is cut in the isolation region, the edges of the cell slices can maintain a good passivation effect, avoiding edge leakage of the cell slices, which helps to improve the open-circuit voltage and conversion factor of the cell slices, so as to improve the electrical performance, stability and reliability of the solar cell. Description of the Drawings

[0026] Figure 1 is a partial cross-sectional structure schematic diagram of the first structure of the solar cell according to an embodiment of the present invention;

[0027] Figure 2 is a cross-sectional structure schematic diagram after splitting the first structure of the solar cell according to an embodiment of the present invention;

[0028] Figure 3 is a partial cross-sectional structure schematic diagram of the second structure of the solar cell according to an embodiment of the present invention;

[0029] Figure 4 is a cross-sectional structure schematic diagram after splitting the second structure of the solar cell according to an embodiment of the present invention;

[0030] Figure 5 is a top view of the second structure of the solar cell according to an embodiment of the present invention;

[0031] Figure 6 is a main process schematic diagram in the method of the solar cell according to an embodiment of the present invention;

[0032] Figure 7 is an EL test diagram of the solar cell prepared in Example 1;

[0033] Figure 8 is an EL test diagram of the solar cell prepared in Comparative Example 1.

[0034] The reference numerals are as follows:

[0035] 10 - Silicon substrate; 20 - Electrical functional region; 21 - Emitter; 22 - First silicon oxide passivation layer; 23 - First aluminum oxide passivation layer; 24 - First front passivation and antireflection layer; 30 - Isolation region; 31 - Second silicon oxide passivation layer; 32 - Second aluminum oxide passivation layer; 33 - Second front passivation and antireflection layer; 30' - Edge isolation region; 40 - First metal electrode; 50 - Tunneling oxide layer; 60 - Doped polysilicon layer; 70 - Back passivation and antireflection layer; 80 - Second metal electrode; 90 - Edge passivation region; 91 - Third silicon oxide passivation layer; 92 - Third aluminum oxide passivation layer; 93 - Third front passivation and antireflection layer. Detailed implementation manners

[0036] For the solar cell provided by the embodiment of the present invention, generally, multiple cell wafers (exemplarily, two, three, four,...) are cut out through slicing technology, the cell wafers are connected in series to form a cell string, and the cell string is assembled into a photovoltaic module. Compared with directly assembling the solar cell into a photovoltaic module, the photovoltaic module assembled from the sliced cell wafers has a better photoelectric conversion efficiency.

[0037] As described in the background art, during the process of cutting a solar cell, damage inevitably exists on the cutting surface, and this damage will cause carrier recombination. Although there are currently technical means to repair the cutting damage of solar cells, generally, the existing technical means for repairing the cutting damage of solar cells need to add relatively complex processes (such as high-temperature annealing process, additional passivation process, etc.) to the existing processes of manufacturing solar cells. Although the high-temperature annealing process can repair lattice defects to a certain extent, the thermal process itself will cause certain damage to the silicon substrate, resulting in a reduction in the lifespan and open-circuit voltage of the silicon substrate. On the other hand, for example, when using atomic layer deposition passivation technology to repair the damage caused by laser scribing of half cells, there are problems of high equipment investment cost and complex processes. In addition, controlling the laser process parameters itself is the most direct solution, but due to problems such as uneven energy density of the laser spot and a small process window for mass production regulation, the problem of poor passivation effect caused by laser damage in the isolation region cannot be effectively solved.

[0038] To solve the above problems existing in the prior art, the embodiment of the present invention provides a solar cell with a novel structure and a preparation method thereof.

[0039] It should be noted that the "first", "second", etc. involved in the embodiments of the present invention are mainly used to distinguish different position structures. Exemplarily, the first passivation structure refers to the passivation structure located in the electrical functional region 20, and the second passivation structure refers to the passivation structure located in the isolation region 30; the first main surface of the silicon substrate 10 refers to the main surface of the silicon substrate 10 that belongs to the front side of the solar cell after the solar cell is fabricated on the silicon substrate 10, and the second main surface of the silicon substrate 10 refers to the main surface of the silicon substrate 10 that belongs to the back side of the solar cell; the first metal electrode 40 refers to the metal electrode located on the front side of the solar cell, and the second metal electrode 80 refers to the metal electrode located on the back side of the solar cell.

[0040] Among them, Figure 1 is a partial cross-sectional structure schematic diagram of the first structure of the solar cell according to the embodiment of the present invention; Figure 2 is a cross-sectional structure schematic diagram of the first structure of the solar cell after being sliced according to the embodiment of the present invention; Figure 3 is a partial cross-sectional structure schematic diagram of the second structure of the solar cell according to the embodiment of the present invention; Figure 4 is a cross-sectional structure schematic diagram of the second structure of the solar cell after being sliced according to the embodiment of the present invention; Figure 5 is a top view of the second structure of the solar cell according to the embodiment of the present invention.

[0041] As Figures 1 to 4 shown, the solar cell may include: a silicon substrate 10; electrical functional regions 20 arranged at intervals on the first main surface of the silicon substrate 10; a planar isolation region 30 provided on the first main surface of the silicon substrate 10 and between adjacent electrical functional regions 20; and a first metal electrode 40.

[0042] Among them, for the first main surface of the silicon substrate 10, the specific surface area corresponding to the isolation region 30 is smaller than the specific surface area corresponding to the electrical functional region 20;

[0043] The electrical functional region 20 may include an emitter 21 and a first passivation structure stacked from the inside to the outside;

[0044] The isolation region 30 may include a second passivation structure;

[0045] The first metal electrode 40 passes through the first passivation structure and is electrically connected to the emitter 21.

[0046] Among them, the thickness of the second passivation structure included in the isolation region 30 is generally greater than the thickness of the first passivation structure. Further, the second passivation structure can be used to block the emitters 21 of adjacent electrical functional regions 20.

[0047] Among them, the cutting position of the solar cell coincides with the midline in the extending direction of the isolation region 30. By designing the structure where the cutting position of the solar cell coincides with the midline in the extending direction of the isolation region 30, the electrical conductivity and appearance of each cut cell can be kept consistent, which helps to improve the performance of the cells cut from the solar cell and can ensure the appearance consistency of each cut cell.

[0048] Among them, the above-mentioned electrical functional region 20 can be a matte structure or a planar structure. Preferably, the electrical functional region 20 is a matte structure.

[0049] Among them, the first main surface and the second main surface of the silicon substrate 10 are two opposite main surfaces. After the solar cell is fabricated, the first main surface of the silicon substrate 10 is generally located on the front side of the solar cell, and the second main surface of the silicon substrate is generally located on the back side of the solar cell.

[0050] Generally speaking, the electrical functional region 20 involved in the embodiments of the present invention refers to the region in the solar cell for generating and transporting carriers; the isolation region 30 or the edge passivation region 90 is generally obtained by passivating a part of the first main surface of the silicon substrate 10. The isolation region 30 does not have the ability to transport carriers. The presence of the isolation region 30 or the edge passivation region 90 can prevent the cells cut from the solar cell from being short-circuited or leaking electricity. In addition, the presence of the isolation region 30 enables the laser slicing to have a relatively wide process window for adjustment, which helps to improve the yield of the cells cut from the solar cell. Among them, the specific surface area of the first main surface of the above-mentioned silicon substrate 10 corresponding to the isolation region 30 generally refers to the ratio of the surface area of the isolation region to its projected area on a plane; the specific surface area of the first main surface of the above-mentioned silicon substrate 10 corresponding to the electrical functional region 20 refers to the ratio of the surface area of the electrical functional region 20 to its projected area on a plane. That is to say, the specific surface area of a structure involved in the embodiments of the present invention refers to the surface area of the structure corresponding to a unit projected area on a plane.

[0051] For the solar cell structure provided by the embodiments of the present invention, by adjusting the regions of the first main surface of the silicon substrate 10 corresponding to the isolation region 30 and the electrical functional region 20, the specific surface area corresponding to the isolation region 30 is made smaller than the specific surface area corresponding to the electrical functional region 20, and the isolation region 30 cooperates with the second passivation structure, which can ensure the integrity and compactness of the second passivation structure on the isolation region 30, effectively improve the isolation and passivation effects of the isolation region 30, and at the same time can ensure the support strength of the part of the silicon substrate 10 corresponding to the isolation region 30, reduce the risk of fragmentation or chipping of the silicon substrate 10 in the isolation region 30, so as to improve the service life of the solar cell.

[0052] For the emitter 21, when the silicon substrate 10 is an N-type silicon substrate, the emitter 21 is generally formed by diffusing and doping P-type doping atoms (such as boron atoms) on the surface of the N-type silicon substrate. When the silicon substrate 10 is a P-type silicon substrate, the emitter 21 is generally formed by diffusing and doping N-type doping atoms (such as phosphorus atoms) on the surface of the P-type silicon substrate. Preferably, in the solar cell provided by the embodiment of the present invention, the silicon substrate 10 is an N-type silicon substrate, and the emitter 21 is formed by diffusing boron atoms in the N-type silicon substrate. In addition, for the emitter 21, its doping concentration is generally 1×10 17 atom / cm 3 ~1×10 19 atom / cm 3 , exemplarily, the doping concentration of the emitter 21 can be 1×10 17 atom / cm 3 、2×10 17 atom / cm 3 、5×10 17 atom / cm 3 、8×10 17 atom / cm 3 、1×10 18 atom / cm 3 、5×10 18 atom / cm 3 、7×10 18 atom / cm 3 、9×10 18 atom / cm 3 or 1×10 19 atom / cm 3 etc. For the case where the isolation region 30 is formed on the basis of forming the emitter 21 on the entire first main surface of the textured structure of the silicon substrate and removing a part of the emitter 21, by controlling the doping concentration, while ensuring the photoelectric conversion efficiency of the electrofunctional region 20, it is ensured that the doping atoms in the isolation region 30 can be completely removed to ensure the passivation effect of the isolation region 30.

[0053] For the isolation region 30 involved in the embodiment of the present invention, the second passivation structure included therein generally directly contacts the silicon substrate 10 to passivate the region of the silicon substrate 10 corresponding to the isolation region 30. In addition, the extending direction of the isolation region 30 can be as Figure 5 shown in the direction S, in this extending direction, the isolation region 30 penetrates through a part of the silicon substrate 10, and the midline in the extending direction of the isolation region 30 is as Figure 5 shown in the midline l. Exemplarily, for the Figure 1 shown solar cell, after cutting along the midline in the extending direction of the isolation region 30, the Figure 2 shown half-cell is obtained; forFigure 3 The solar cell shown, after being cut along the center line in the extending direction of the isolation region 30, obtains Figure 4 the three-part cell shown.

[0054] By cutting the solar cell along Figure 5 the center line l shown, that is, the cutting position of the solar cell coincides with the center line in the extending direction of the isolation region 30. On the one hand, it can ensure that the appearance of each cut cell is consistent, guaranteeing the aesthetic appearance of the photovoltaic module prepared based on the cells; on the other hand, it can ensure the integrity of the electrical functional region 20 of each cell, improving the yield of the cut cells.

[0055] For the solar cell provided in the above embodiment, since the electrical functional regions 20 are arranged at intervals on the first main surface of the silicon substrate 10 of the solar cell, and a planar isolation region 30 is provided between adjacent electrical functional regions 20, the specific surface area corresponding to the isolation region 30 is smaller than the specific surface area corresponding to the electrical functional region 20. It can ensure that the isolation region 30 is not affected by the doped atoms of the emitter 21, thereby ensuring the isolation effect of the isolation region 30.

[0056] The cell obtained by cutting the planar isolation region 30 provided based on this solar cell can avoid surface damage on the cutting surface, reduce the carrier recombination of the cell, so as to improve the carrier transport ability and photoelectric conversion efficiency of the solar cell.

[0057] In the embodiment of the present invention, as Figures 1 to 4 shown, the region of the first main surface of the silicon substrate 10 corresponding to the isolation region 30 is lower than the region corresponding to the electrical functional region 20. Generally speaking, the region of the isolation region 30 being lower than the region of the electrical functional region 20 is relative to the first main surface of the silicon substrate 10 when placed facing upward. Particularly, for the case where the electrical functional region 20 is a textured structure, the surface of the region of the first main surface of the silicon substrate 10 corresponding to the isolation region 30 is lower than the concave surface of the textured structure corresponding to the electrical functional region 20. By designing this structure, the isolation and passivation effects of the isolation region 30 can be further improved.

[0058] Furthermore, for the first main surface of the silicon substrate 10, the relationship between the specific surface area of the region corresponding to the isolation region 30 and the specific surface area of the region corresponding to the electro-functional region 20: The ratio of the specific surface area of the region corresponding to the isolation region 30 to the specific surface area of the region corresponding to the electro-functional region 20 (i.e., the specific surface area of the region corresponding to the isolation region 30: the specific surface area of the region corresponding to the electro-functional region 20) is generally controlled within the range of 0.25 to 0.65. Exemplarily, the ratio can be 0.25, 0.3, 0.35, 0.4, 0.45, 0.5, 0.55, 0.6, or 0.65, etc. For the first main surface of the silicon substrate 10, by controlling the ratio of the specific surface area of the region corresponding to the isolation region 30 to the specific surface area of the region corresponding to the electro-functional region 20 within the range of 0.25 to 0.65, during the synchronous formation of the first passivation structure and the second passivation structure, it is possible to further ensure that the thickness of the second passivation structure is greater than the thickness of the first passivation structure, and the integrity and density of the second passivation structure can be improved.

[0059] In addition, for the case where the isolation region 30 is formed on the basis of forming the emitter 21 on the entire first main surface of the textured structure of the silicon substrate 10 and removing a partial region of the emitter 21, by controlling the ratio within the range of 0.25 to 0.65, it can be ensured that the region of the emitter 21 corresponding to the isolation region 30 can be completely removed, and the isolation region 30 forms a planar structure. In cooperation with the second passivation structure, the passivation effect of the isolation region 30 can be effectively improved. When the ratio is less than 0.25, the isolation region 30 is over-polished and the reflectivity is too high, resulting in a large current loss at the solar cell and photovoltaic module ends. At the same time, the depth of the isolation region 30 is also too large, which will lead to an increase in the carrier transport distance and an increase in the recombination phenomenon, affecting the fill factor and open-circuit voltage of the battery; when the ratio is greater than 0.65, the laser damage of the isolation region 30 cannot be completely removed, affecting the passivation effect on the battery surface, and the photoluminescence detection image or electroluminescence detection image will turn black.

[0060] In addition, for the structure where the region corresponding to the isolation region 30 is lower than the region corresponding to the electro-functional region 20, on the first main surface of the silicon substrate 10, the height difference between the region corresponding to the isolation region 30 and the region corresponding to the electro-functional region 20 (such as Figures 1 to 4The height difference ΔH shown is generally 2 μm to 15 μm. This height difference ΔH generally refers to the height difference existing between the surface of the isolation region 30 and the surface of the recessed region of the textured surface of the electro-functional region 20. Exemplarily, the height difference ΔH can be 2 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, 12 μm, 14 μm, 15 μm, etc. For the case where the isolation region 30 is formed on the entire first main surface of the textured structure of the silicon substrate 10 by forming the emitter 21 and removing a partial region of the emitter 21, by controlling this height difference, it can be ensured that the region of the emitter 21 corresponding to the isolation region 30 can be completely removed. Additionally, by controlling this height difference, it can be ensured that the second passivation structure can completely cover the side surfaces of the emitter 21 of the electro-functional region 20 and the side surfaces of the first passivation structure, while avoiding the risk of fragmentation or hidden cracks caused by the portion of the silicon substrate 10 corresponding to the isolation region 30 being too thin.

[0061] In addition to the structural relationship between the isolation region 30 and the electro-functional region 20 and the structure of the emitter 21, the first passivation structure of the electro-functional region 20 and the second passivation structure of the isolation region 30 also affect the photoelectric conversion efficiency, stability, reliability, etc. of the entire solar cell. The first passivation structure and the second passivation structure will be described in detail below.

[0062] Furthermore, regarding the relationship between the above-mentioned first passivation structure and the second passivation structure, generally speaking, the thickness of the second passivation structure of the isolation region 30 is greater than the thickness of the first passivation structure of the electro-functional region 20. By designing the thickness of the second passivation structure of the isolation region 30 to be greater than the thickness of the first passivation structure of the electro-functional region 20 and cooperating with the planar-structured isolation region 30, after the isolation region 30 of the solar cell is cut, the edge of the cell can maintain a good passivation effect, avoiding the occurrence of edge leakage of the cell, which helps to increase the open-circuit voltage and conversion factor of the cell, so as to improve the electrical performance, stability, and reliability of the solar cell.

[0063] Generally speaking, the second passivation structure is formed synchronously with the first passivation structure. As Figures 1 to 4 shown, the first passivation structure may include: a first silicon oxide passivation layer 22 and a first aluminum oxide passivation layer 23 stacked from the inside to the outside. The second passivation structure may include a second silicon oxide passivation layer 31 and a second aluminum oxide passivation layer 32 stacked from the inside to the outside.

[0064] By the cooperation of the first passivation structure including the first silicon oxide passivation layer 22 and the first aluminum oxide passivation layer 23 and the second passivation structure including the second silicon oxide passivation layer 31 and the second aluminum oxide passivation layer 32, the passivation effect on the surfaces of the isolation region 30 and the electro-functional region 20 of the solar cell can be ensured, and it can be ensured that the second passivation structure completely covers the side surfaces of the emitter 21 and the side surfaces of the first passivation structure.

[0065] More specifically, the thickness of the second silicon oxide passivation layer 31 is greater than that of the first silicon oxide passivation layer 22. The thickness of the second aluminum oxide passivation layer 32 is greater than that of the first aluminum oxide passivation layer 23. By this thickness superposition, it can be ensured that the second passivation structure completely covers the sides of the emitter 21 and the first passivation structure, and the passivation effect of the isolation region 30 is ensured.

[0066] Among them, the thickness of the second silicon oxide passivation layer 31 ( Figure 2 the thickness T4 shown) is generally 0.5 nm to 5 nm. By controlling the thickness of the second silicon oxide passivation layer 31, most of the dangling bonds on the surface of the silicon substrate 10 can be combined to achieve a passivation effect. Exemplarily, the thickness of the second silicon oxide passivation layer 31 ( Figure 2 the thickness T4 shown) can be 0.5 nm, 1 nm, 1.3 nm, 1.5 nm, 1.8 nm, 2 nm, 2.5 nm, 2.8 nm, 3 nm, 3.3 nm, 3.5 nm, 3.8 nm, 4 nm, 4.2 nm, 4.5 nm, 4.8 nm or 5 nm, etc.

[0067] The thickness of the first silicon oxide passivation layer 22 ( Figure 2 the thickness T1 shown) is generally 0.3 nm to 3.5 nm. Exemplarily, the thickness of the first silicon oxide passivation layer 22 ( Figure 2 the thickness T4 shown) can be 0.3 nm, 0.8 nm, 1 nm, 1.1 nm, 1.3 nm, 1.5 nm, 1.7 nm, 2 nm, 2.2 nm, 2.5 nm, 2.7 nm, 2.9 nm, 3 nm, 3.3 nm or 3.5 nm, etc. It can be understood that the thickness of the first silicon oxide passivation layer 22 and the thickness of the second silicon oxide passivation layer 31 still satisfy that the thickness of the first silicon oxide passivation layer 22 is less than that of the second silicon oxide passivation layer 31. Exemplarily, if the thickness of the first silicon oxide passivation layer 22 is controlled to be 1 nm, then the thickness of the second silicon oxide passivation layer 31 is greater than 1 nm.

[0068] The thickness of the second aluminum oxide passivation layer 32 ( Figure 2 the thickness T3 shown) is generally 3 nm to 15 nm. Exemplarily, the thickness of the second aluminum oxide passivation layer 32 can be 3 nm, 5 nm, 8 nm, 10 nm, 12 nm or 15 nm, etc. By controlling the second aluminum oxide passivation layer 32, it can assist the second silicon oxide passivation layer 31 to further combine the dangling bonds not combined by the second silicon oxide passivation layer 31, and form a complementary passivation effect with the second silicon oxide passivation layer 31.

[0069] The thickness of the first aluminum oxide passivation layer 23 ( Figure 2The thickness T2 shown is generally 2 nm to 10 nm. Exemplarily, the thickness of the first aluminum oxide passivation layer 23 can be 2 nm, 4 nm, 5 nm, 6 nm, 8 nm, 10 nm, etc.

[0070] It should be noted that the thickness of the second silicon oxide passivation layer 31 is greater than that of the first silicon oxide passivation layer 22, and the thickness of the second aluminum oxide passivation layer 32 is greater than that of the first aluminum oxide passivation layer 23, which is determined by the relationship between the specific surface area of the isolation region 30 and the specific surface area corresponding to the electrical functional region 20. Additionally, based on the ratio (0.25 to 0.65) between the specific surface area of the isolation region 30 and the specific surface area corresponding to the electrical functional region 20 given above, the smaller this ratio, the better the isolation effect of the isolation region.

[0071] Furthermore, for the electrical functional region 20, based on the above first passivation structure, the solar cell may further include: a first front passivation and antireflection layer 24 laminated outside the first passivation structure. Preferably, for the first passivation structure including the first silicon oxide passivation layer 22 and the first aluminum oxide passivation layer 23, the first front passivation and antireflection layer 24 is laminated outside the first aluminum oxide passivation layer 23. The first front passivation and antireflection layer 24 can be a single-layer or multilayer structure, and the first front passivation and antireflection layer 24 may include at least one of aluminum oxide, silicon oxide, gallium oxide, silicon nitride, aluminum nitride, silicon oxynitride, and aluminum oxynitride.

[0072] In addition, for the isolation region 30, based on the above second passivation structure, the solar cell may further include: a second front passivation and antireflection layer 33 laminated outside the second passivation structure. Preferably, for the second passivation structure including the second silicon oxide passivation layer 31 and the second aluminum oxide passivation layer 32, the second front passivation and antireflection layer 33 is laminated outside the second aluminum oxide passivation layer 32. The second front passivation and antireflection layer 33 can also be a single-layer or multilayer structure, and the second front passivation and antireflection layer 33 may include at least one of aluminum oxide, silicon oxide, gallium oxide, silicon nitride, aluminum nitride, silicon oxynitride, and aluminum oxynitride.

[0073] In addition, the thickness of the above first front passivation and antireflection layer 24 is generally 20 nm to 180 nm. Exemplarily, the thickness of the first front passivation and antireflection layer 24 can be 20 nm, 30 nm, 50 nm, 60 nm, 70 nm, 100 nm, 120 nm, 140 nm, 150 nm, 170 nm, 180 nm, etc. By controlling the thickness of the first front passivation and antireflection layer 24, the light reflection of the electrical functional region 20 can be effectively reduced to improve the light utilization rate of the electrical functional region 20.

[0074] The thickness of the second front passivation and antireflection layer 33 can be set according to actual needs and is not limited herein.

[0075] In addition, for the isolation region 30, the width of the isolation region 30 (such as Figure 1 or Figure 3 the width W shown) is generally 20 μm to 1000 μm. Exemplarily, the width of the isolation region 30 can be 20 μm, 30 μm, 50 μm, 70 μm, 80 μm, 100 μm, 200 μm, 250 μm, 500 μm, 600 μm, 800 μm, 900 μm, or 1000 μm, etc. Preferably, the width of the isolation region 30 is 20 μm to 600 μm. By controlling the width of the isolation region 30, the isolation effect and passivation effect of the isolation region 30 can be ensured. At the same time, a relatively sufficient space can be reserved for the dicing deviation, avoiding damage to the electrical functional region 20 due to dicing error during the dicing process, and improving the production yield of the solar cell. In addition, through the control of the width of the isolation region 30, the passivation effect at the edge of the diced solar cell can also be ensured, avoiding the aggregation of carriers at the edge of the solar cell.

[0076] Further, for the emitter 21, its thickness ( Figures 1 to 4 the thickness T shown) is generally 0.5 μm to 1.5 μm. Exemplarily, the thickness of the emitter 21 can be 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 1.0 μm, 1.2 μm, 1.3 μm, or 1.5 μm, etc. By controlling the thickness of the emitter 21, it is helpful to improve the photoelectric conversion efficiency of the electrical functional region 20. In addition, for the case where the isolation region 30 is formed on the entire first main surface of the textured structure of the silicon substrate 10 by forming the emitter 21 and removing a part of the emitter 21, by controlling the thickness of the emitter 21, while improving the photoelectric conversion efficiency of the electrical functional region 20, it can be ensured that the region of the emitter 21 corresponding to the isolation region 30 can be completely removed.

[0077] Further, as Figures 1 to 4 shown, the above solar cell may further include: a tunneling oxide layer 50, a doped polysilicon layer 60, and a back surface passivation and antireflection layer 70 stacked from the inside to the outside on the second main surface of the silicon substrate 10; and a second metal electrode 80, the second metal electrode 80 passing through the back surface passivation and antireflection layer 70 and being electrically connected to the doped polysilicon layer 60. Among them, the tunneling oxide layer 50 is generally silicon oxide, and its thickness is generally 0.5 nm to 3 nm. Exemplarily, the thickness of the tunneling oxide layer 50 can be 0.5 nm, 1 nm, 1.5 nm, 2 nm, 2.5 nm, or 3 nm, etc. In addition, the thickness of the doped polysilicon layer 60 is generally 30 nm to 200 nm. Exemplarily, the thickness of the doped polysilicon layer 60 can be 30 nm, 50 nm, 80 nm, 100 nm, 120 nm, 150 nm, 180 nm, or 200 nm, etc. The doping concentration of the doped polysilicon layer 60 is generally 1×10 20 atom / cm 3~1×10 21 atom / cm 3 For example, the doping concentration of the doped polysilicon layer 60 can be 1×10 20 atom / cm 3 、2×10 20 atom / cm 3 、4×10 20 atom / cm 3 、5×10 20 atom / cm 3 、7×10 20 atom / cm 3 、9×10 20 atom / cm 3 or 1×10 21 atom / cm 3 and so on. The conductivity type of the doped atoms in the doped polysilicon layer 60 is opposite to that of the doped atoms in the above-mentioned emitter 21. That is, when the doped atom type of the emitter 21 is P-type, the doped atom type of the doped polysilicon layer 60 is N-type; when the doped atom type of the emitter 21 is N-type, the doped atom type of the doped polysilicon layer 60 is P-type. In addition, the back surface passivation and antireflection layer 70 may include at least one of alumina, silica, gallium oxide, silicon nitride, aluminum nitride, silicon oxynitride, and aluminum oxynitride. The thickness of the back surface passivation and antireflection layer 70 is generally 25 nm to 200 nm. For example, the thickness of the back surface passivation and antireflection layer 70 can be 25 nm, 30 nm, 40 nm, 45 nm, 50 nm, 70 nm, 80 nm, 100 nm, 120 nm, 130 nm, 150 nm, 170 nm, 180 nm or 200 nm and so on.

[0078] Furthermore, as Figures 3 to 5 shown, the above-mentioned solar cell further includes: edge passivation regions 90 with a planar structure disposed on two opposite edges on the first main surface of the silicon substrate 10, wherein, as Figure 5 shown, the edge passivation regions 90 are parallel to the isolation regions 30; for the first main surface of the silicon substrate 10, the specific surface area corresponding to the edge passivation regions 90 is smaller than the specific surface area corresponding to the electrical functional regions 20, and the region corresponding to the edge passivation regions 90 is lower than the region corresponding to the electrical functional regions 20; the edge passivation regions 90 include a third passivation structure for blocking the extension of the emitter 21 to the edge.

[0079] By setting the edge passivation region 90, on the one hand, the cut-out solar cells can be kept consistent, and the process of flipping the solar cells can be omitted during the process of connecting the solar cells in series to form a solar cell string, thus simplifying the manufacturing process of the photovoltaic module; on the other hand, the insulation of the edges of the solar cells is ensured, avoiding edge leakage of the solar cells, which helps to improve the photoelectric conversion efficiency of the solar cell and helps to reduce the spacing between the solar cells in the photovoltaic module.

[0080] Furthermore, the thickness of the third passivation structure is generally greater than that of the first passivation structure. Among them, the third passivation structure is generally formed synchronously with the first passivation structure. As Figure 3 shown, the third passivation structure may include a third silicon oxide passivation layer 91 and a third aluminum oxide passivation layer 92 stacked from the inside to the outside. Preferably, the thickness of the third silicon oxide passivation layer 91 is greater than that of the first silicon oxide passivation layer 22, and the thickness of the third aluminum oxide passivation layer 92 is greater than that of the first aluminum oxide passivation layer 23.

[0081] The thickness of the third aluminum oxide passivation layer 92 is generally 3 nm to 15 nm. Exemplarily, the thickness of the third aluminum oxide passivation layer 92 can be 3 nm, 5 nm, 8 nm, 10 nm, 12 nm or 15 nm, etc. By controlling the third aluminum oxide passivation layer 92, it can assist the third silicon oxide passivation layer 91 to further combine the dangling bonds not combined by the third silicon oxide passivation layer 91, and form a complementary passivation effect with the third silicon oxide passivation layer 91.

[0082] The thickness of the third silicon oxide passivation layer 91 is generally 0.5 nm to 5 nm. Exemplarily, the thickness of the third silicon oxide passivation layer 91 can be 1 nm, 1.5 nm, 2 nm, 2.8 nm, 3 nm, 3.5 nm, 4 nm, 4.5 nm or 4.8 nm, etc.

[0083] Furthermore, as Figure 3 shown, the third passivation structure may further include a third front passivation and antireflection layer 93. For the third passivation structure including the third silicon oxide passivation layer 91 and the third aluminum oxide passivation layer 92, the third front passivation and antireflection layer 93 is generally stacked outside the third aluminum oxide passivation layer 92.

[0084] Generally speaking, the formation method of the edge passivation region 90 is the same as that of the isolation region 30 described above, except that the width of the edge passivation region 90 is smaller than that of the isolation region 30. Preferably, the width of the edge passivation region 90 is half of the width of the isolation region 30 to further ensure the consistency of the appearance of each cut-out solar cell.

[0085] It should be noted that the above Figures 3 to 5The shown solar cell with the edge passivation region 90 is only a preferred structure. For a triple-junction cell or a cell sliced more times, it may not include the edge passivation region 90. Additionally, for Figure 2 the structure of the shown solar cell sliced into half cells, an edge passivation region 90 may also be provided at the edge.

[0086] Furthermore, an embodiment of the present invention provides a photovoltaic module. The photovoltaic module may include: the cells shown in the above various embodiments after cutting the provided solar cells, where Figure 2 and Figure 4 as shown; among them,

[0087] the cell may include: a silicon substrate 10, an electro-functional region 20, and an edge isolation region 30';

[0088] The electro-functional region 20 and the edge isolation region 30' are arranged side by side on the first main surface of the silicon substrate 10, and the extending directions of the electro-functional region 20 and the edge isolation region 30' are the same;

[0089] The electro-functional region 20 includes an emitter 21 and a first passivation structure stacked from the inside to the outside;

[0090] The edge isolation region 30' is provided corresponding to at least one edge of the cell, and it includes a second passivation structure;

[0091] For the first main surface of the silicon substrate 10, the specific surface area corresponding to the edge isolation region 30' is smaller than the specific surface area corresponding to the electro-functional region 20.

[0092] Furthermore, the region corresponding to the edge isolation region 30' is lower than the region corresponding to the electro-functional region 20.

[0093] In addition, the thickness of the second passivation structure is greater than the thickness of the first passivation structure. The second passivation structure can be used to block the extension of the emitter 21 of the electro-functional region 20 to the edge.

[0094] For the edge isolation region 30', for Figure 1 or Figure 3 the shown solar cell, after slicing, the original isolation region 30 and the edge passivation layer 90 in the solar cell become the edge isolation region 30' of the cell. By designing such an edge isolation region 30' for the cell, the carriers of the emitter 21 can be prevented from diffusing to the edge, thereby avoiding edge leakage of the cell and helping to improve the photoelectric conversion efficiency of the photovoltaic module.

[0095] Among them, the width of the edge isolation region 30' (such as Figure 2 or Figure 4The width W1) shown is generally 10 μm to 300 μm. Exemplarily, the width of the edge isolation region 30' can be 10 μm, 20 μm, 50 μm, 100 μm, 120 μm, 150 μm, 180 μm, 200 μm, 230 μm, 250 μm, 280 μm, or 300 μm, etc. By controlling the width of the edge isolation region 30', the insulation of the edge of the cell can be ensured.

[0096] Furthermore, an embodiment of the present invention also provides a method for manufacturing a solar cell. Preferably, the method for manufacturing a solar cell provided by the embodiment of the present invention is used to manufacture the solar cell provided by any of the above embodiments. As Figure 6 shown, the method for manufacturing a solar cell may include the following steps:

[0097] Step S601, forming an emitter 21 on the first main surface of the silicon substrate 10, and there is a first doped silicon glass layer on the surface of the emitter 21.

[0098] The specific implementation scheme for forming the emitter 21 in this step may include: forming the emitter 21 on the entire surface of the first main surface of the silicon substrate 10 through an element diffusion process. During the process of forming the emitter 21, due to the presence of oxygen in the air, a first doped silicon glass layer is formed on the surface of the emitter 21. Exemplarily, for a diffused atom being a boron atom, the first doped silicon glass layer is a borosilicate glass layer; for a diffused atom being a phosphorus atom, the first doped silicon glass layer is a phosphosilicate glass layer. This diffusion process can directly use the existing diffusion process used in the production of solar cells.

[0099] Furthermore, during the process of forming the emitter 21 in this step S601, control the doping concentration of the emitter 21 within 1×10 17 atom / cm 3 ~1×10 19 atom / cm 3 range. Exemplarily, the doping concentration of the emitter 21 can be 1×10 17 atom / cm 3 , 2×10 17 atom / cm 3 , 5×10 17 atom / cm 3 , 8×10 17 atom / cm 3 , 1×10 18 atom / cm 3 , 5×10 18 atom / cm 3 , 7×10 18 atom / cm 3 , 9×10 18atoms / cm 3 or 1×10 19 atoms / cm 3 etc. For the case where the isolation region 30 is formed on the entire first main surface of the textured structure of the silicon substrate and a partial region of the emitter 21 is removed, by controlling the doping concentration, while ensuring the photoelectric conversion efficiency of the electrofunctional region 20, it is ensured that the doped atoms in the isolation region 30 can be completely removed to ensure the passivation effect of the isolation region 30.

[0100] In addition, in this step, under the diffusion process, there may also be overplating on the second main surface and the side surfaces of the silicon substrate 10. Exemplarily, for the doped atoms of the emitter being boron, a boron-doped layer and a borosilicate glass layer will be overplated on the second main surface and the side surfaces of the silicon substrate 10. Based on this structure, the second main surface and the side surfaces of the silicon substrate 10 can be etched with hydrofluoric acid to remove the overplated borosilicate glass layer. The second main surface and the side surfaces of the silicon substrate 10 are polished with an alkaline solution to remove the boron-doped layer.

[0101] Furthermore, after this step S601 and before step S602, it may further include: by chemical deposition, a tunneling oxide layer 50 and a doped polysilicon layer 60 are sequentially stacked on the second main surface of the silicon substrate 10. The conduction type of the doped atoms contained in the doped polysilicon layer 60 is opposite to the conduction type of the doped atoms contained in the emitter 21 (exemplarily, the doped polysilicon layer 60 is a phosphorus-doped polysilicon layer, and the doped atoms of the emitter 21 are boron; the doped polysilicon layer 60 is a boron-doped polysilicon layer, and the doped atoms of the emitter 21 are phosphorus). Among them, the formation of the tunneling oxide layer 50 and the doped polysilicon layer 60 can be achieved by one or more technical means such as plasma-enhanced chemical vapor deposition (PECVD), atmospheric pressure chemical vapor deposition (APCVD), in-situ low-pressure chemical vapor deposition, mist chemical vapor deposition (Mist-CVD), or physical vapor deposition (PVD).

[0102] During the formation of the tunneling oxide layer 50 and the doped polysilicon layer 60, a second doped silicon glass layer is formed outside the doped polysilicon layer 60, and multiple layers of deposited doped layers are formed outside the first doped silicon glass layer. Among them, the specific formation process of the multiple layers of deposited doped layers is as follows: during the formation of the tunneling oxide layer 50 on the second main surface of the silicon substrate 10, a first deposited layer corresponding to the tunneling oxide layer 50 is synchronously formed outside the first doped silicon glass layer, and the doped atoms in the first doped silicon glass layer enter the first deposited layer, so that the first deposited layer doped with doped atoms and the original first doped silicon glass layer are fused into a new first doped silicon glass layer. Then, during the formation of the doped polysilicon layer 60, a second deposited layer corresponding to the doped polysilicon layer 60 is synchronously formed outside the new first doped silicon glass layer, and a third deposited layer corresponding to the second doped silicon glass layer is formed outside the second deposited layer. During the formation of the doped polysilicon 60, the doped atoms in the second deposited layer will diffuse into the new first doped silicon glass layer, so that the outer part of the new first doped silicon glass layer forms a third doped silicon glass layer, and the inner part of the third doped silicon glass layer still exists as the first doped silicon glass layer. That is, after the doped polysilicon layer 60 is processed, a first doped silicon glass layer, a third doped silicon glass layer, a second deposited layer corresponding to the doped polysilicon layer 60, and a third deposited layer corresponding to the second doped silicon glass layer are stacked from the inside to the outside on the outside of the emitter 21. That is, the multiple layers of deposited doped layers are collectively referred to as the third doped silicon glass layer, the second deposited layer, and the third deposited layer stacked from the inside to the outside.

[0103] Exemplarily, taking the doping atom in the emitter 21 as a boron atom and the doping atom in the doped polysilicon layer 60 as a phosphorus atom, and taking the formation of a borosilicate glass layer (this borosilicate glass layer is the above-mentioned first doped silicon glass layer) in the emitter 21 as an example, the specific process of forming the tunneling oxide layer 50, the doped polysilicon layer 60, the second doped silicon glass layer and the multi-layer wrap-around doped layer: By chemical deposition, the tunneling oxide layer 50 and the polysilicon layer are sequentially prepared on the second main surface of the silicon substrate 10, and the polysilicon layer is doped and diffused with phosphorus atoms to form a phosphorus-doped polysilicon layer, and a phosphosilicate glass layer (i.e., the above-mentioned second doped silicon glass layer) is formed outside the phosphorus-doped polysilicon layer. Synchronously, a first wrap-around layer corresponding to the tunneling oxide layer 50 is first formed outside the borosilicate glass layer on the first main surface of the silicon substrate 10, and the boron atoms in the borosilicate glass layer enter the first wrap-around layer, and the first wrap-around layer and the borosilicate glass layer are fused into a new borosilicate glass layer. Then, a wrap-around layer corresponding to the polysilicon layer is formed outside the new borosilicate glass layer, and during the process of doping and diffusing phosphorus atoms in the polysilicon layer, phosphorus atoms are synchronously diffused into the wrap-around layer corresponding to the polysilicon layer to form a second wrap-around layer corresponding to the phosphorus-doped polysilicon layer (the composition of this second wrap-around layer is essentially phosphorus-doped polysilicon). In addition, the phosphorus atoms in the second wrap-around layer will enter the outer part of the new borosilicate glass layer, so that the outer part of the new borosilicate glass layer forms a phosphoborosilicate glass layer (i.e., the above-mentioned third doped silicon glass layer), and the inner part of the phosphoborosilicate glass layer is still a borosilicate glass layer. Further, a third wrap-around layer corresponding to the phosphosilicate glass layer (i.e., the above-mentioned second doped silicon glass layer) is formed outside the second wrap-around layer (the composition of this third wrap-around layer is essentially a phosphosilicate glass layer), that is, the multi-layer wrap-around doped layer is a stack of a phosphoborosilicate glass layer, a phosphorus-doped polysilicon layer and a phosphosilicate glass layer from the inside to the outside. It can be understood that there is no obvious boundary between the phosphoborosilicate glass layer, the phosphorus-doped polysilicon layer and the phosphosilicate glass layer in this multi-layer wrap-around doped layer. The description of the phosphoborosilicate glass layer, the phosphorus-doped polysilicon layer and the phosphosilicate glass layer is only for clearly explaining the formation process of the multi-layer wrap-around doped layer. In addition, a wrap-around layer will also be formed on the side surface of the silicon substrate 10. The composition of the wrap-around layer formed on the side surface of the silicon substrate 10: from the inside to the outside is a phosphosilicate glass layer (this phosphosilicate glass layer is formed by phosphorus atoms entering the wrap-around layer of the tunneling oxide layer), a phosphorus-doped polysilicon layer and a phosphosilicate glass layer.

[0104] In addition, before this step S601, the planar silicon substrate can also be made into a textured structure first.

[0105] Step S602, laser grooving is used to process a part of the region of the emitter 21 with the first doped silicon glass layer on its surface.

[0106] The specific implementation solutions for this step may include: selecting a green picosecond pulsed laser with a wavelength of 200 nm to 600 nm, and controlling the power of the green picosecond pulsed laser within the range of 20 W to 100 W, the pulse width within the range of 1 ps to 50 ps, and the single-pulse energy within the range of 50 mJ to 200 mJ. Exemplarily, the wavelength of the selected green picosecond pulsed laser is 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, etc. The power of the green picosecond pulsed laser can be 20 W, 25 W, 30 W, 40 W, 50 W, 70 W, 80 W, 90 W, 100 W, etc. The pulse width can be 1 ps, 5 ps, 10 ps, 15 ps, 18 ps, 20 ps, 25 ps, 30 ps, 40 ps, 50 ps, etc. The single-pulse energy is 50 mJ, 80 mJ, 100 mJ, 120 mJ, 140 mJ, 150 mJ, 180 mJ, 200 mJ, etc.

[0107] By selecting a green picosecond pulsed laser with a wavelength of 200 nm to 600 nm and controlling the parameters of the green picosecond pulsed laser, the first doped silicon glass layer in the laser grooving area, the emitter 21, and the single-crystalline silicon on the surface of the silicon substrate can be turned into a molten state. Subsequently, in cooperation with step S603, a planar structure can be formed in the laser grooving area. While ensuring that the first doped silicon glass layer in the laser grooving area and the emitter 21 can be completely removed, the surface damage in the laser grooving area is relatively small. In addition, for other areas outside the laser grooving (i.e., the above-mentioned electrical functional area 20), the first doped silicon glass layer can be etched away by using hydrofluoric acid with a volume concentration of 2% to 10%, and the emitter 21 can be kept relatively intact in the electrical functional area 20.

[0108] Furthermore, as described above, during the process of sequentially laminating the tunneling oxide layer 50 and the doped polysilicon layer 60 on the second main surface of the silicon substrate 10, there is a situation of related overplating on the first main surface of the silicon substrate 10 (i.e., multiple-layer overplated doped layers are formed outside the first doped silicon glass layer). This step S602 can also turn the multiple-layer overplated doped layers in the laser grooving area into a molten state, and it does not affect the first doped silicon glass layer and the emitter in the laser grooving area from becoming molten, which is beneficial to the subsequent preferential removal of each film layer in the laser grooving area.

[0109] It should be noted that the various film layers or functional structure layers involved in this step becoming molten does not mean that they become a flowing liquid state, but rather that the chemical bonds in each film layer or functional structure layer are damaged by the laser, making each film layer or functional structure layer "loose", which is conducive to the penetration and cleaning of the cleaning agent in step S603.

[0110] Step S603: Clean the region processed by laser grooving and the first doped silicon glass layer on the surface of the emitter 21, so as to form, on the first main surface of the silicon substrate 10, spaced-apart electrical functional regions 20 having the emitter 21 and isolation regions 30 with a planar structure located between adjacent electrical functional regions 20, and make the specific surface area corresponding to the isolation regions 30 on the first main surface of the silicon substrate 10 smaller than the specific surface area corresponding to the electrical functional regions 20.

[0111] Specifically, in view of the case of overplating during the process of forming the tunneling oxide layer 50 and the doped polysilicon layer 60 on the first main surface of the silicon substrate 10 (that is, a multi-layer overplated doped layer composed of a third doped silicon glass layer, a second overplated layer, and a third overplated layer stacked from the inside to the outside is formed outside the first doped silicon glass layer), first use hydrofluoric acid with a volume concentration of 2% - 10% to clean and remove the outermost third overplated layer in the multi-layer overplated doped layer. Then, use an alkaline solution to clean the first main surface of the silicon substrate 10 for a treatment time of 280 s - 450 s to etch the region processed by laser grooving, where the alkaline solution can be a sodium hydroxide solution or a potassium hydroxide solution in the RCA technology, and the volume concentration of the alkaline solution is 4% - 8%. More specifically, the sodium hydroxide solution or potassium hydroxide solution in the RCA technology removes the second overplated layer, the third doped silicon glass layer, the first doped silicon glass layer, and the emitter 21 that have become molten in the region processed by laser grooving. In addition, during the process of cleaning the first main surface of the silicon substrate 10 with the sodium hydroxide solution or potassium hydroxide solution in the RCA technology, the second overplated layer corresponding to the doped polysilicon layer 60 in the multi-layer overplated doped layer in other regions (that is, the regions corresponding to the electrical functional regions 20) can also be removed synchronously. Finally, use an acid solution in the RCA technology to remove the remaining part of the multi-layer overplated doped layer in other regions (that is, the regions corresponding to the electrical functional regions 20), that is, remove the third doped silicon glass layer and the first doped silicon glass layer corresponding to the electrical functional regions 20.

[0112] Among them, the volume concentration of the hydrofluoric acid used to remove the outermost third overplated layer in the multi-layer overplated doped layer can be 2%, 5%, 7%, 8%, 10%, etc.

[0113] The cleaning duration of sodium hydroxide in the RCA technology can be 280 s, 300 s, 320 s, 350 s, 380 s, 400 s, 430 s, 450 s, etc.

[0114] In addition, the cleaning duration of the acid solution in the RCA technology can be determined according to the actual situation and is not limited herein.

[0115] In addition, in this step, the overplated layer on the side surface of the silicon substrate 10 can also be removed synchronously by cleaning.

[0116] The cooperation between step S603 and the above-mentioned step S602 can achieve that the specific surface area of the first main surface of the silicon substrate 10 corresponding to the isolation region 30 is smaller than the specific surface area corresponding to the electro-functional region 20. Preferably, the cooperation between step S603 and the above-mentioned step S602 generally requires controlling the ratio of the specific surface area of the first main surface of the silicon substrate 10 corresponding to the isolation region 30 to the specific surface area corresponding to the electro-functional region 20 to be 0.25 to 0.65. Exemplarily, the ratio can be 0.25, 0.3, 0.35, 0.4, 0.45, 0.5, 0.55, 0.6 or 0.65, etc. For the first main surface of the silicon substrate 10, by the cooperation of step S602 and step S603, controlling the ratio of the specific surface area of the region corresponding to the isolation region 30 to the specific surface area of the region corresponding to the electro-functional region 20 within the range of 0.25 to 0.65, during the synchronous formation of the first passivation structure and the second passivation structure, it can further ensure that the thickness of the second passivation structure is greater than the thickness of the first passivation structure, and can improve the integrity and compactness of the second passivation structure. It can be understood that before the emitter 21 is prepared in the above-mentioned step S601, the specific surface area of the first main surface of the silicon substrate 10 corresponding to the electro-functional region 20 has been fixed. Therefore, the technical solution provided by the embodiments of the present invention is to regulate the specific surface area of the first main surface of the silicon substrate 10 corresponding to the planar isolation region 30 through step S602 and step S603, so as to achieve the purpose of controlling the ratio of the specific surface area of the first main surface of the silicon substrate 10 corresponding to the isolation region 30 to the specific surface area corresponding to the electro-functional region 20.

[0117] It should be noted that the specific surface area corresponding to the isolation region 30 and the specific surface area corresponding to the electro-functional region 20 refer to the first main surface of the silicon substrate 10, and it does not refer to the specific surface area of the first passivation structure and the second passivation structure located on the first main surface of the silicon substrate 10, nor the specific surface area of the emitter 21 located on the silicon substrate 10.

[0118] In addition, by coordinating the above steps S602 and S603, the region of the first main surface of the silicon substrate 10 corresponding to the isolation region 30 can be controlled to be lower than the region corresponding to the electro-functional region 20. By controlling the region of the first main surface corresponding to the isolation region 30 to be lower than the region corresponding to the electro-functional region 20, it can be ensured that all the doped atoms in the isolation region 30 can be removed, and it can be further ensured that the thickness of the second passivation structure formed in the subsequent step S604 in the isolation region 30 is greater than that of the first passivation structure formed in the electro-functional region 20 (that is, the thickness of the second silicon oxide passivation layer 31 is greater than that of the first silicon oxide passivation layer 22; the thickness of the second aluminum oxide passivation layer 32 is greater than that of the first aluminum oxide passivation layer 23), thereby improving the isolation and passivation effects of the isolation region 30. Preferably, by coordinating the above steps S602 and S603, generally, the height difference (such as Figures 1 to 4 the height difference ΔH shown) between the region of the first main surface of the silicon substrate 10 corresponding to the isolation region 30 and the region corresponding to the electro-functional region 20 is 2 μm to 15 μm. Exemplarily, the height difference ΔH can be 2 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, 12 μm, 14 μm, 15 μm, etc. For the case where the isolation region 30 is formed on the basis of forming the emitter 21 on the entire first main surface of the textured structure of the silicon substrate 10 and removing a part of the emitter 21, by controlling this height difference, it can be ensured that the emitter 21 in the region corresponding to the isolation region 30 can be completely removed. In addition, by controlling this height difference, it can be ensured that the second passivation structure can completely cover the side surfaces of the emitter 21 in the electro-functional region 20 and the side surfaces of the first passivation structure, and at the same time, it can avoid the risk of fragmentation or hidden cracks caused by the overly thin part of the silicon substrate 10 corresponding to the isolation region 30.

[0119] By coordinating this step S603 with the above step S602, without a mask process or an additional wet etching treatment process, the first doped silicon glass layer on the emitter 21 can be removed, and at the same time, the emitter 21 will not be significantly damaged, and all the emitters 21 in the laser grooving region can be removed, ensuring the insulation and passivation effects of the isolation region 30 formed in the laser grooving region. Moreover, the processing procedure is simple, reducing the surface damage of the isolation region 30. While effectively controlling the production cost, it can ensure the performance of the produced solar cells.

[0120] Step S604, forming a first passivation structure in the electro-functional region 20 and simultaneously forming a second passivation structure in the isolation region 30.

[0121] Specifically, the solution of step S604 may include sequentially depositing a silicon oxide layer and an aluminum oxide layer by atomic layer deposition (ALD). Since there are structural differences between the electrical functional region 20 and the isolation region 30 after being processed by step S602 and step S603, the thicknesses of the deposited silicon oxide layer and aluminum oxide layer on the electrical functional region 20 and the isolation region 30 are different. That is, for the silicon oxide layer, the thickness corresponding to the isolation region 30 is greater than the thickness corresponding to the electrical functional region 20; for the aluminum oxide layer, the thickness corresponding to the isolation region 30 is greater than the thickness corresponding to the electrical functional region 20.

[0122] Further, this step may also deposit a front passivation and antireflection layer on the surface of the aluminum oxide layer by PECVD.

[0123] In addition, in this step, while forming the front passivation and antireflection layer, a back passivation and antireflection layer 70 may be laminated on the doped polysilicon layer 60.

[0124] Further, after the above step S604, it may further include preparing a first metal electrode 40 and a second metal electrode 80 on the electrical functional region 20 and the second main surface of the silicon substrate 10 respectively. Among them, the first metal electrode 40 penetrates through the first front passivation and antireflection layer 24, the first aluminum oxide passivation layer 23 and the first silicon oxide passivation layer 22 and is electrically connected to the emitter 21, and the second metal electrode 80 penetrates through the back passivation and antireflection layer 70 and is electrically connected to the doped polysilicon layer 60.

[0125] The following uses several embodiments to detail the solar cell preparation process provided by the embodiments of the present invention.

[0126] Example 1

[0127] Step A1: Select a qualified N-type silicon substrate and prepare a textured structure on the surface of the N-type silicon substrate.

[0128] Step B1: Diffuse and prepare an emitter with a boron atom doping concentration of 1×10 18 atom / cm 3 on the first main surface of the N-type silicon substrate by boron diffusion process, and a borosilicate glass layer is formed on the surface of the emitter.

[0129] Step C1: Clean the second main surface and the sidewall-deposited borosilicate glass layer of the N-type silicon substrate with hydrofluoric acid, and polish the second main surface of the N-type silicon substrate with an alkaline solution.

[0130] Step D1: Sequentially deposit a tunneling oxide layer with a thickness of 1.5 nm and an N-type doped polysilicon layer with a thickness of 130 nm on the second main surface of the N-type silicon substrate by PECVD.

[0131] Step E1: Use a green picosecond pulsed laser with a wavelength of 532 nm to perform laser grooving on a partial area of the first main surface of the N-type silicon substrate under the conditions of a power of 50 W, a pulse of 25 ps, and a single pulse energy of 100 mJ.

[0132] Step F1: Use HF with a volume concentration of 10% to remove the phosphorus-silicon glass layer deposited around the first main surface and the phosphorus-silicon glass layer deposited around the side surface of the N-type silicon substrate, and use a NaOH solution with a volume concentration of 5% in the RCA technology to clean for 400 s to remove the deposited layers corresponding to the N-type doped polysilicon layer, the phosphorus-boron-silicon glass layer, the boron-silicon glass layer, and the emitter 21 in the laser grooving area, and simultaneously remove the deposited layers corresponding to the N-type doped polysilicon layer in the electrical functional area 20, and clean the laser grooving area into an isolation area 30 with a planar structure. Use an acid solution in the RCA technology to clean the phosphorus-boron-silicon glass layer and the boron-silicon glass layer in the electrical functional area 20. After this step of treatment, the ratio of the specific surface area of the isolation area 30 to the specific surface area of the electrical functional area 20 with the emitter 21 is 0.3:1.

[0133] Step G1: Sequentially deposit a silicon oxide passivation layer and an aluminum oxide passivation layer on the first main surface of the N-type silicon substrate at 320 °C by ALD technology. The thickness of the silicon oxide passivation layer on the surface of the emitter 21 is 1 nm, and the thickness of the aluminum oxide passivation layer is 5 nm. The thickness of the silicon oxide passivation layer deposited in the isolation area is 3 nm, and the thickness of the aluminum oxide passivation layer is 8 nm. And use PECVD technology to deposit a passivation antireflection layer on the surface of the aluminum oxide passivation layer and the surface of the N-type doped polysilicon layer on the second main surface of the N-type silicon substrate under the conditions of a temperature of 550 °C, a pressure of 255 Pa, and a radio frequency power of 10000 W.

[0134] Step H1: Use screen printing to print metal paste on the first main surface and the second main surface respectively, and sinter to form a first metal electrode 40 electrically connected to the emitter 21 and a second metal electrode 80 electrically connected to the N-type doped polysilicon layer.

[0135] Example 2

[0136] The preparation process is basically the same as that of Example 1. The difference from Example 1 is that the cleaning time of the laser grooving area with the alkaline solution in Example 2 is 300 s, and the ratio of the specific surface area of the obtained isolation area 30 to the specific surface area of the electrical functional area 20 with the emitter 21 is 0.5:1. The thickness of the silicon oxide passivation layer on the surface of the emitter 21 is 1 nm, the thickness of the aluminum oxide passivation layer is 5 nm, the thickness of the silicon oxide passivation layer deposited in the isolation area is 2 nm, and the thickness of the aluminum oxide passivation layer is 6 nm.

[0137] Comparative Example 1

[0138] The preparation process is basically the same as that of Example 1. The difference from Example 1 is that the cleaning time of the laser grooving area of the alkaline solution in Example 2 is 100 s, and the ratio of the specific surface area of the isolation area to the specific surface area of the electro-functional area with an emitter is 0.75:1. The thickness of the silicon oxide passivation layer on the surface of the emitter 21 is 0.2 nm, the thickness of the aluminum oxide passivation layer is 2 nm, the thickness of the silicon oxide passivation layer deposited in the isolation area is 0.2 nm, and the thickness of the aluminum oxide passivation layer is 1.5 nm.

[0139] Multiple solar cells prepared through the above Example 1, Example 2 and Comparative Example 1 were subjected to multiple electrical performance tests (using an IV detection device to test the relevant electrical performance parameters of the solar cells, and the electrical performance parameters were the photoelectric conversion efficiency (pEFF), open circuit voltage (Voc), fill factor (pFF), quasi-neutral region reference, and saturation dark current density (J01) generated by recombination in the emitter region, as well as the saturation dark current density (J02) generated by recombination in the space charge region) of the solar cells. The average values of the multiple test results of the multiple solar cells prepared in Example 1, Example 2 and Comparative Example 1 were calculated respectively, and the results are shown in Table 1 below. And the solar cells of Example 1 and the solar cells of Comparative Example 1 were respectively subjected to photoluminescence detection (PL), and the PL images taken are as Figure 7 and Figure 8 shown.

[0140] From Figure 7 it can be seen that in the solar cell obtained by the technical solution provided in Example 1 of the present invention, there will be no gray area in the cut area of the solar cell (that is, the edge of the cell cut from the solar cell wafer), and its measured photoluminescence performance is good, and there are no problems of defects and damages at the edge. While Figure 8 in the cut area (that is, the edge of the cell cut from the solar cell wafer) of the solar cell in the PL image of

[0141] Table 1

[0142] pEFF_(%) Voc_(V) pFF(%) <![CDATA[J01 (A / cm 2 )]]> <![CDATA[J02 (A / cm 2 )]]> Example 1 25.87 0.7356 85.65 <![CDATA[1.32×10 -14 > <![CDATA[1.64×10 -10 > Example 2 25.59 0.7348 85.01 <![CDATA[1.43×10 -14 > <![CDATA[1.89×10 -10 > Comparative Example 1 24.84 0.7334 84.69 <![CDATA[1.66×10 -14 > <![CDATA[3.44×10 -10 >

[0143] Furthermore, it can be clearly seen from the results in Table 1 above that the photoelectric conversion efficiency, open-circuit voltage, and fill factor of the solar cells in Example 1 and Example 2 are all higher than those in Comparative Example 1. Thus, it can be known that the technical solution provided by the embodiments of the present invention helps to improve the photoelectric conversion efficiency, open-circuit voltage, and fill factor of the solar cells. In addition, by controlling the ratio of the specific surface area of the isolation region 30 to the specific surface area of the electro-functional region 20 having the emitter 21, it also helps to improve the photoelectric conversion efficiency, open-circuit voltage, and fill factor of the solar cells, indirectly indicating that the passivation effect of the isolation region is relatively good and can avoid edge leakage of the cell slices cut from the solar cells.

[0144] In addition, the quasi-neutral region reference, the saturation dark current density generated by recombination in the emitter region, and the saturation dark current density generated by recombination in the space charge region in the test results of the solar cells in Example 1 and Example 2 are all significantly lower than the test results of the solar cells in Comparative Example 1. Thus, it can be known that the technical solution provided by the embodiments of the present invention helps to reduce carrier recombination and improve the carrier transport ability, and also indirectly indicates that the passivation effect of the isolation region is relatively good and can avoid carrier recombination at the edges of the cell slices cut from the solar cells.

[0145] In summary, the embodiments of the present invention provide the following technical solutions:

[0146] Technical Solution 1: A solar cell, comprising: a silicon substrate 10, electro-functional regions 20 arranged at intervals on the first main surface of the silicon substrate 10, a planar isolation region 30 provided on the first main surface of the silicon substrate 10 between adjacent electro-functional regions 20, and a first metal electrode 40, wherein,

[0147] For the first main surface of the silicon substrate 10, the specific surface area corresponding to the isolation region 30 is smaller than the specific surface area corresponding to the electro-functional region 20;

[0148] The electro-functional region 20 includes an emitter 21 and a first passivation structure stacked from the inside to the outside;

[0149] The isolation region 30 includes a second passivation structure;

[0150] The first metal electrode 40 passes through the first passivation structure and is electrically connected to the emitter 21.

[0151] Technical Solution 2: The solar cell according to Technical Solution 1,

[0152] For the first main surface of the silicon substrate 10, the ratio of the specific surface area corresponding to the isolation region 30 to the specific surface area corresponding to the electro-functional region 20 is 0.25 to 0.65.

[0153] Technical solution 3. The solar cell according to technical solution 1,

[0154] For the first main surface of the silicon substrate 10, the region corresponding to the isolation region 30 is lower than the region corresponding to the electrical functional region 20.

[0155] Technical solution 4. The solar cell according to technical solution 3,

[0156] For the first main surface of the silicon substrate 10, the height difference between the region corresponding to the isolation region 30 and the region corresponding to the electrical functional region 20 is 2 μm to 15 μm.

[0157] Technical solution 5. The solar cell according to technical solution 1,

[0158] The thickness of the second passivation structure is greater than the thickness of the first passivation structure.

[0159] Technical solution 6. The solar cell according to technical solution 1 or 5,

[0160] The first passivation structure includes: a first silicon oxide passivation layer 22 and a first aluminum oxide passivation layer 23 stacked from the inside to the outside;

[0161] The second passivation structure includes: a second silicon oxide passivation layer 31 and a second aluminum oxide passivation layer 32 stacked from the inside to the outside.

[0162] Technical solution 7. The solar cell according to technical solution 6,

[0163] The thickness of the second silicon oxide passivation layer 31 is greater than the thickness of the first silicon oxide passivation layer 22;

[0164] and / or,

[0165] The thickness of the second aluminum oxide passivation layer 32 is greater than the thickness of the first aluminum oxide passivation layer 23.

[0166] Technical solution 8. The solar cell according to technical solution 6 further includes:

[0167] A first front passivation and antireflection layer 24 stacked outside the first aluminum oxide passivation layer 23;

[0168] A second front passivation and antireflection layer 33 stacked outside the second aluminum oxide passivation layer 32.

[0169] Technical solution 9. The solar cell according to any one of technical solutions 1 to 5, 7, and 8,

[0170] The width of the isolation region 30 is 20 μm to 1000 μm.

[0171] Technical solution 10. The solar cell according to any one of technical solutions 1 to 5, 7, and 8,

[0172] The width of the isolation region 30 is 20 μm to 600 μm.

[0173] Technical solution 11. The solar cell according to any one of technical solutions 1 to 5, 7, and 8,

[0174] The thickness of the emitter 21 is 0.5 μm to 1.5 μm.

[0175] Technical solution 12. The solar cell according to any one of technical solutions 1 to 5, 7, and 8,

[0176] The second passivation structure is formed synchronously with the first passivation structure.

[0177] Technical solution 13. The solar cell according to any one of technical solutions 1 to 5, 7, and 8,

[0178] The electrical functional region 20 is a textured structure.

[0179] Technical solution 14. The solar cell according to any one of technical solutions 1 to 5, 7, and 8 further includes:

[0180] A tunneling oxide layer 50, a doped polysilicon layer 60, and a back passivation and antireflection layer 70 stacked from the inside to the outside on the second main surface of the silicon substrate 10;

[0181] And a second metal electrode 80, which passes through the back passivation and antireflection layer 70 and is electrically connected to the doped polysilicon layer 60.

[0182] Technical solution 15. The solar cell according to any one of technical solutions 1 to 5, 7, and 8 further includes: edge passivation regions 90 with a planar structure disposed on two opposite edges of the first main surface of the silicon substrate 10, wherein,

[0183] The edge passivation regions 90 are parallel to the isolation region 30;

[0184] For the first main surface of the silicon substrate 10, the specific surface area corresponding to the edge passivation region 90 is smaller than the specific surface area corresponding to the electrical functional region 20, and the region corresponding to the edge passivation region 90 is lower than the region corresponding to the electrical functional region 20;

[0185] The edge passivation regions 90 include a third passivation structure.

[0186] Technical solution 16. The solar cell according to technical solution 15,

[0187] The thickness of the third passivation structure is greater than that of the first passivation structure;

[0188] and / or,

[0189] The width of the edge passivation region 90 is half of the width of the isolation region 30.

[0190] Technical solution 17. The solar cell according to technical solution 1,

[0191] The cutting position of the solar cell coincides with the midline in the extending direction of the isolation region 30.

[0192] Technical solution 18. A photovoltaic module, comprising: a cell piece obtained by cutting the solar cell according to any one of technical solutions 1 to 17, wherein,

[0193] The cell piece includes: a silicon substrate 10, an electro-functional region 20, and an edge isolation region 30';

[0194] The electro-functional region 20 and the edge isolation region 30' are arranged side by side on the first main surface of the silicon substrate 10, and the extending directions of the electro-functional region 20 and the edge isolation region 30' are the same;

[0195] The electro-functional region 20 includes an emitter 21 and a first passivation structure stacked from the inside to the outside;

[0196] The edge isolation region 30' is disposed corresponding to at least one edge of the cell piece, and includes a second passivation structure;

[0197] For the first main surface of the silicon substrate 10, the specific surface area corresponding to the edge isolation region 30' is smaller than the specific surface area corresponding to the electro-functional region 20, and the region corresponding to the edge isolation region 30' is lower than the region corresponding to the electro-functional region 20.

[0198] Technical solution 19. A method for manufacturing a solar cell, comprising:

[0199] Step 1, preparing an emitter 21 on the first main surface of the silicon substrate 10, and there is a first doped silicon glass layer on the surface of the emitter 21;

[0200] Step 2, performing laser grooving treatment on a partial region of the emitter 21 having the first doped silicon glass layer on the surface;

[0201] Step 3: Clean the area processed by laser grooving and the first doped silicon glass layer on the surface of the emitter 21, so as to form spaced-apart electrical functional regions 20 having the emitter 21 and isolation regions 30 with a planar structure between adjacent electrical functional regions 20 on the first main surface of the silicon substrate 10, and make the specific surface area corresponding to the isolation region 30 on the first main surface of the silicon substrate 10 smaller than the specific surface area corresponding to the electrical functional region 20;

[0202] Step 4: Synchronously form a first passivation structure in the electrical functional region 20 and a second passivation structure in the isolation region 30.

[0203] Technical solution 20: The method for preparing a solar cell according to technical solution 19, step 2 includes:

[0204] Use a green picosecond pulsed laser with a wavelength of 200 nm to 600 nm to laser groove a partial area of the emitter 21 with a first doped silicon glass layer on its surface. Among them, the power of the green picosecond pulsed laser is 20 W to 100 W, the pulse width is 1 ps to 50 ps, and the single pulse energy is 50 mJ to 200 mJ.

[0205] Technical solution 21: The method for preparing a solar cell according to technical solution 20, step 3 includes:

[0206] Use an alkaline solution to clean the first main surface of the silicon substrate 10 for a treatment time of 280 s to 450 s to etch the area processed by laser grooving. Among them, the volume concentration of the alkaline solution is 4% to 8%, and the alkaline solution is one of sodium hydroxide solution or potassium hydroxide solution.

[0207] Technical solution 22: The method for preparing a solar cell according to any one of technical solutions 19 to 21,

[0208] Steps 2 and 3 cooperate to control the ratio of the specific surface area corresponding to the isolation region 30 on the first main surface of the silicon substrate 10 to the specific surface area corresponding to the electrical functional region 20 to be 0.25 to 0.65.

[0209] Technical solution 23: The method for preparing a solar cell according to any one of technical solutions 19 to 21,

[0210] Steps 2 and 3 cooperate to control the region corresponding to the isolation region 30 on the first main surface of the silicon substrate 10 to be lower than the region corresponding to the electrical functional region 20.

[0211] Technical solution 24: The method for preparing a solar cell according to technical solution 23,

[0212] Step 2 and Step 3 cooperate to control the height difference between the region corresponding to the isolation region 30 and the region corresponding to the electro-functional region 20 on the first main surface of the silicon substrate 10 to be 2 μm to 15 μm.

[0213] Technical solution 25. The method for manufacturing a solar cell according to Technical solution 19,

[0214] Step 1 further includes: controlling the doping concentration of the emitter 21 to be within 1×10 17 atom / cm 3 ~1×10 19 atom / cm 3 range.

[0215] The introductions provided in the above steps are only used to help understand the method, structure and core idea of the present invention. For those of ordinary skill in the art of this technology, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. A solar cell, characterized in that: include: A silicon substrate (10), electrical functional areas (20) arranged at intervals on a first main surface of the silicon substrate (10), an isolation area (30) of a planar structure arranged between adjacent electrical functional areas (20) on the first main surface of the silicon substrate (10), and a first metal electrode (40), wherein: For the first main surface of the silicon substrate (10), the specific surface area corresponding to the isolation region (30) is smaller than the specific surface area corresponding to the electrical functional region (20); The electrical functional area (20) comprises an emitter (21) and a first passivation structure stacked from inside to outside; The isolation region (30) includes a second passivation structure; The first metal electrode (40) passes through the first passivation structure and is electrically connected to the emitter (21).

2. The solar cell according to claim 1, characterized in that: For the first main surface of the silicon substrate (10), the ratio of the specific surface area corresponding to the isolation region (30) to the specific surface area corresponding to the electrical functional region (20) is 0.25 to 0.

65.

3. The solar cell according to claim 1, characterized in that With respect to the first main surface of the silicon substrate (10), the area corresponding to the isolation region (30) is lower than the area corresponding to the electrical functional region (20).

4. The solar cell according to claim 3, characterized in that: For the first main surface of the silicon substrate (10), the height difference between the region corresponding to the isolation region (30) and the region corresponding to the electrical functional region (20) is 2 μm to 15 μm.

5. The solar cell according to claim 1, characterized in that: The thickness of the second passivation structure is greater than the thickness of the first passivation structure.

6. The solar cell according to claim 1 or 5, characterized in that: The first passivation structure comprises: a first silicon oxide passivation layer (22) and a first aluminum oxide passivation layer (23) stacked from inside to outside; The second passivation structure comprises: a second silicon oxide passivation layer (31) and a second aluminum oxide passivation layer (32) stacked from inside to outside.

7. The solar cell according to claim 6, characterized in that: The thickness of the second silicon oxide passivation layer (31) is greater than the thickness of the first silicon oxide passivation layer (22); and / or, The thickness of the second aluminum oxide passivation layer (32) is greater than the thickness of the first aluminum oxide passivation layer (23).

8. The solar cell according to claim 6, characterized in that: Also includes: A first front passivation anti-reflection layer (24) stacked on the outer side of the first aluminum oxide passivation layer (23); A second front-side passivation anti-reflection layer (33) is stacked on the outer side of the second aluminum oxide passivation layer (32).

9. A photovoltaic module, characterized in that: include: The cell obtained by cutting the solar cell according to any one of claims 1 to 8, wherein: The cell comprises: a silicon substrate (10), an electrical functional area (20) and an edge isolation area (30'); The electrical functional area (20) and the edge isolation area (30') are arranged side by side on the first main surface of the silicon substrate (10), and the electrical functional area (20) and the edge isolation area (30') extend in the same direction; The electrical functional area (20) comprises an emitter (21) and a first passivation structure stacked from inside to outside; The edge isolation region (30') is arranged corresponding to at least one edge of the battery cell, and comprises a second passivation structure; With respect to the first main surface of the silicon substrate (10), the specific surface area corresponding to the edge isolation region (30') is smaller than the specific surface area corresponding to the electrical functional region (20), and the area corresponding to the edge isolation region (30') is lower than the area corresponding to the electrical functional region (20).

10. A method for preparing a solar cell, characterized in that: include: Step 1, preparing an emitter (21) on a first main surface of the silicon substrate (10), wherein the surface of the emitter (21) has a first doped silicon glass layer; Step 2, using laser grooving to process a partial area of ​​the emitter (21) having the first doped silicon glass layer on the surface; Step 3, cleaning the laser grooved area and the first doped silicon glass layer on the surface of the emitter (21), so as to form spaced electrical functional areas (20) having the emitter (21) and isolation areas (30) of a planar structure located between adjacent electrical functional areas (20) on the first main surface of the silicon substrate (10), and making the specific surface area corresponding to the isolation area (30) on the first main surface of the silicon substrate (10) smaller than the specific surface area corresponding to the electrical functional area (20); Step 4: simultaneously forming a first passivation structure in the electrical functional area (20) and a second passivation structure in the isolation area (30).

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