Charger plug identification

By introducing a light source into the charger plug and sending an activation signal, the problem of difficult to identify the charger plug in multiple electronic devices is solved, and accurate identification and convenient operation are achieved.

CN120200335APending Publication Date: 2025-06-24INTEL CORP
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202411679724.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-12-22
Filing Date
2024-11-22
Publication Date
2025-06-24

AI Technical Summary

Technical Problem

In multiple electronic devices, it is difficult to identify the charger plugs corresponding to the specific electronic devices, especially when the multiple charger plugs appear similar.

Method used

By introducing a light source into the charger plug and sending a signal to the charger plug along the power line to activate the light source, the user can identify the individual charger plugs.

Benefits of technology

It is realized that among multiple charger plugs with similar appearance, accurately identifying the charger plugs corresponding to specific electronic devices, improving the convenience of user operation.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120200335A_ABST
    Figure CN120200335A_ABST
Patent Text Reader

Abstract

Embodiments herein relate to a power cable assembly comprising a light source, an output for providing direct current (DC) power to an electronic device, an input for receiving alternating current (AC) power from a power source, first circuitry and second circuitry. The first circuitry may be configured to identify a first signal from an electronic device; generating a high frequency (HF) signal having a frequency equal to or higher than 9 kHz based on the first signal; and outputting the HF signal to the second circuitry. The second circuitry may be configured to provide power to the light source based on the AC high frequency signal. Other embodiments may be described and / or claimed.
Need to check novelty before this filing date? Find Prior Art

Description

Background Art

[0001] In situations such as offices, audio / video (A / V) equipment, or other scenarios, there may be multiple charger plugs with similar appearances inserted into a power strip or a multi-port wall socket. When a user wants to disconnect the charger plug corresponding to a specific electronic device among multiple electronic devices, it may be difficult to identify the desired charger plug from the multiple charger plugs. BRIEF DESCRIPTION OF THE DRAWINGS

[0002] Embodiments will be readily understood by the following detailed description in conjunction with the accompanying drawings. For ease of description, like reference numerals represent like structural elements. Embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings.

[0003] Figure 1 Examples of systems including multiple plugs with similar appearances according to various embodiments are shown.

[0004] Figure 2 Examples of systems that can facilitate charger plug identification according to various embodiments are shown.

[0005] Figure 3 Alternative examples of systems that can facilitate charger plug identification according to various embodiments are shown.

[0006] Figure 4 Examples of exemplary electronic devices that can be configured to facilitate charger plug identification according to some embodiments are shown. DETAILED DESCRIPTION

[0007] As previously mentioned, if a user wishes to disconnect the charger plug that is charging a specific electronic device among multiple electronic devices, it may be difficult to identify which charger plug corresponds to which electronic device. Embodiments herein relate to a configuration in which an electronic device sends a signal along a power line to a charger plug, where the signal activates a light source (e.g., a light-emitting diode (LED) or some other light source) on the charger plug. In this way, the user may be able to identify which charger plug among multiple charger plugs with similar appearances corresponds to a specific electronic device. In some embodiments, the signal may be sent based on a received user input (e.g., a long press of a specific key, a voice command, etc.). In other embodiments, the signal may be sent based on an identification of the system state of the electronic device (e.g., the battery of the electronic device is full and thus the electronic device can be disconnected from the power). In other embodiments, the signal may be sent based on some other additional or alternative criteria.

[0008] Figure 1Depicts an example of system 100, where there may be multiple electronic devices, such as electronic devices 105a, 105b, and 105c (collectively referred to as "electronic devices 105"). The electronic devices 105 can be, for example, laptop computers, desktop computers, gaming systems, peripheral devices (such as monitors or printers), and / or some other types of electronic devices. Although three different electronic devices are depicted, each with different power cables, adapters, and chargers (as described below), it should be understood that this depiction is for discussion purposes only and is not intended to limit the embodiments to any specific number or type of electronic devices or other components.

[0009] System 100 may also include a power supply 120 having multiple power connections. The power supply 120 can be, for example, a power strip plugged into a wall socket (e.g., a 120-volt (V) wall socket, a 220V wall socket, etc.). In this embodiment, the power strip may include multiple power connections, such as power outlets configured to couple with multiple charger plugs. In other embodiments, the power supply 120 can be a wall socket configured to couple with multiple charger plugs. In other embodiments, the power supply 120 can be some other type of power supply or some other configuration configured to couple with multiple charger plugs, as Figure 1 shown.

[0010] The respective electronic devices 105 among the electronic devices 105 can be coupled to the power supply 120 via power cables 110a, 110b, and 110c (collectively referred to as "power cables 110"). Specifically, the power cables 110 can include charger plugs 125a, 125b, and 125c (collectively referred to as "charger plugs 125"). The respective charger plugs 125 among the charger plugs 125 can be configured to cooperate with the power supply 120 such that alternating current (AC) power can be transmitted from the power supply 120 to the power cables 110. The power cables 110 can also include adapters, such as adapters 115a, 115b, and 115c (collectively referred to as "adapters 115"). The adapters 115 can be configured to convert the AC power received from the power supply 120 into direct current (DC) power for providing to the electronic devices 105. In some embodiments, one or more of the power cables 110 can be fixedly attached to the respective electronic device (e.g., the power cable 110 is designed not to allow the user to un-attach and re-attach). Additionally or alternatively, one or more of the power cables 110 can be configured to be detachable from the electronic device 105 such that the user can "pull out" and re-insert the power cable from the electronic device 105.

[0011] In an embodiment of the present disclosure, a corresponding charger plug 125 may include light sources 130a, 130b, and 130c (collectively referred to as "light sources 130"). In an embodiment, the light sources 130 may be light-emitting diodes (LEDs) and / or some other type of light source. In operation, an input signal may be provided to the charger plug (e.g., charger plug 125a), as described in further detail below, and the input signal may cause the light source 130a to emit light. In this manner, a user can easily identify which charger plug 125 in the charger plug 125 corresponds to which electronic device 105 in the electronic device 105.

[0012] It should be understood that embodiments have been described herein with respect to light sources located at the charger plug. However, other embodiments may use some additional / alternative form of charger plug identification. For example, in some embodiments, the charger plug may include a speaker or a vibration element that is activated in the same manner as the light sources described herein, thereby generating a noise that can be used to identify the charger plug. In other embodiments, the charger plug may include a mechanical element, such as a button or a lever that extends or retracts based on a signal provided by the electronic device. In this manner, a user can identify the charger plug based on the activation of the mechanical element. Other embodiments may have other variations. For the purposes of the discussion herein, specific embodiments will be described with respect to light sources, but it should be understood that such discussion can be extended to other identification elements as described above or as may be recognized in the art.

[0013] Generally, charger plug identification may be based on the use of analog or digital signals. Identification via an analog signal may include generating a high-frequency (HF) signal by an electronic device (e.g., one of the electronic devices 105) and providing the HF signal to an adapter (e.g., one of the adapters 115). The adapter may then provide the HF signal to a charger plug (e.g., one of the charger plugs 125), and the charger plug may in turn activate a light source (e.g., one of the light sources 130). As used herein, although the HF signal may refer to a signal having a frequency between approximately 9 kilohertz (kHz) and approximately 95 kHz, in other embodiments, the frequency of the signal may be higher or lower based on the particular materials used. Additionally, it should be understood that in some embodiments, the HF signal is an AC signal. For purposes of discussion, different lines are discussed, such as HF DC signal line 265 and HF AC signal line 255. Such labeling is for purposes of discussion with respect to whether the line is on the AC side of the power signal path (e.g., between the charger plug 125 and the adapter 115) or on the DC side of the power signal path (e.g., between the adapter 115 and the electronic device 105).

[0014] More generally, control logic (e.g., an embedded controller (EC) and / or some other type of system-on-chip (SoC), processor, processor core, etc.) can be used to identify / transmit user input (e.g., long key press input, voice command, etc.) or system status (e.g., fully charged battery) as a signal provided to a power line communication (PLC) injection circuit. The PLC injection circuit introduces an HF signal that is sent over the DC power line, where the HF signal is received by the adapter. Inside the adapter, the HF signal can be demodulated from the DC power line and then reinjected as an HF signal over the AC power line, where the HF signal is sent to the charger plug. The HF signal can be demodulated at the charger plug and cause activation of the light source. In some embodiments, the light source can be activated whenever a user or system input is provided, while in other embodiments, some form of timer can be used to limit or extend the amount of time the light source is activated.

[0015] Identification via a digital signal can involve providing the digital signal from an electronic device (e.g., one of the electronic devices 105) to an adapter (e.g., one of the adapters 115). The digital signal can be according to an interconnect protocol such as Universal Serial Bus (USB) Type-C, Compute Express Link (CXL), Peripheral Component Interconnect Express (PCIe), and / or some other type of protocol. Upon receiving the digital signal, the adapter can then generate an HF signal and provide it to the charger plug, as described above.

[0016] More generally, in this embodiment, the EC of the electronic device and / or some other SoC can identify user and / or system input as described above and provide a signal to the power delivery (PD) controller of the electronic device. The signal can be provided to the PD controller via some form of inter-integrated circuit (I2C) protocol or some other type of protocol. Based on the received signal, the PD controller can generate a digital signal and send it to the PD controller of the adapter. For example, the digital signal can be sent according to some type of interconnect protocol as described above. In one particular example, if USB Type-C is used, the digital signal can be sent via the configuration channel (CC) lines. Based on the received digital signal, the PD controller of the adapter can cause an HF signal to be generated, as described above, and then provide the HF signal to the charger plug, as described above.

[0017] Embodiments herein provide several advantages. Specifically, embodiments can allow for identification of the charger plug without the need to change one or more of the electronic device, the adapter, or the charger plug (or its components, such as a particular circuit board) in height. Additionally, embodiments may not require a change to the power cable standard while still providing an enhanced user experience at a relatively low increased cost.

[0018] Figure 2 Shows an example of a system that can facilitate charger plug identification according to various embodiments. Specifically, Figure 2 Depicts an example of a configuration that can provide identification via an analog signal, as described above.

[0019] Generally, Figure 2 (and some or all of the elements of the system discussed below Figure 3 ) can be considered to be a power cable assembly, a part of a power cable assembly, or include a power cable assembly. The specific delimitation of what elements of Figure 2 (or Figure 3 ) can constitute part of a power cable (e.g., the part depicted inside the electronic device 205 is considered part of the electronic device or part of the power cable) can vary based on the user's perception or a particular implementation of the embodiments herein. In some embodiments, the adapter 215 and the charger plug 225 can be considered part of the power cable, while in other embodiments, the adapter 215 and / or the charger plug can be considered different from the power cable. In some embodiments, the adapter 215 and the charger plug 225 and / or the adapter 215 and the electronic device 205 can be implemented in a single device or form factor, while in other embodiments, the charger plug 225, the adapter 215, and the electronic device 205 can be physically separated from each other but communicate via a cable that allows the transmission of electronic signals between various devices. More generally, the specific depiction of the number, location, or separation of various elements is intended as a specific example of a particular implementation and is not intended to limit the embodiments to the single physical depiction attached Figure 2 or 3. Thus, the phrase "power cable assembly" will be used for the purposes of discussion herein and can refer in a non - limiting manner to a combination of elements of one or more of the electronic devices 205 / 305, the adapters 215 / 315, and the charger plugs 225, as well as the elements listed above (such as the HF DC signal line 265, the HF AC signal line 255, the DC VBus 250, the AC VBus 260, and the CC line 350) of the power cable (single or multiple).

[0020] It will also be understood that Figure 2 and Figure 3 the various elements of are described as circuitry; however, it should be understood that the various elements (e.g., various filters, converters, etc.) can be implemented as hardware, software, firmware, and / or some combination thereof.

[0021] Finally, it will be understood that in Figure 2 and Figure 3The various communication flows depicted are intended to be highly simplified communication flows. Various additional / alternative circuit systems may not be depicted, or there may be additional signal flows between various elements in a direction opposite to the depicted arrows. To reduce clutter and redundancy, these variations are not shown in Figure 2 and Figure 3 . More simply, Figure 2 the depiction in

[0022] Figure 2 is intended to be used to discuss the flow of various electronic signals and is not intended to depict a specific physical implementation of the concepts herein. The system of

[0022] Figure 2 may include an electronic device 205, an adapter 215, and a charger plug 225, which may be similar to one of the electronic devices 105, one of the adapters 115, and one of the charger plugs 125, respectively. The charger plug 225 may be communicatively coupled to a power source 220, which may be similar to the power source 120. Specifically, the power source 220 may be a wall socket, a power strip plugged into a wall socket, or some other type of power source configured to provide AC power, as previously described.

[0023] AC power may flow from the power source 220 through the charger plug 225 to the adapter 215 along a power line such as the AC VBus. At the adapter 215, an AC-to-DC (labeled AC->DC in Figure 2 ) converter circuit system 211 may convert the received AC power to DC power and then output the DC power to the electronic device 205 via the DC VBus. The DC power may be received at a DC charging port 201 in the electronic device 205, where the DC power may then be redirected to other electronic components or circuit systems of the electronic device (e.g., a battery, one or more processors, memory, etc., not shown in Figure 2 to keep the figure uncluttered).

[0024] As in Figure 2As shown, the system can also include HF signal lines, such as HF DC signal line 265 and HF AC signal line 255. In various embodiments, a power cable, such as one of power cables 110, can be formed of multiple wires (where various wires can be electrically isolated from each other), and different electronic signals can flow along these wires between the depicted components. DC and AC VBus 250 / 260 can be implemented on one of these wires, and HF signal lines 265 / 255 can be implemented on another of these wires. In other embodiments, different electronic signals can be implemented on different wires that are physically separated from each other (e.g., there can be two wires between charger plug 225 and adapter 215, and AC VBus 260 is implemented on one of these wires while HF AC signal line 255 is implemented on the other of those wires). These are two possible variations described for discussion, and there can be other variations in other embodiments.

[0025] Electronic device 205 can include control logic 202 configured to provide an activation signal to HF signal insertion circuitry 209. Control logic 202 can be implemented, for example, as hardware, software, firmware, and / or some combination thereof. In some embodiments, control logic 202 can be an EC, PD controller, and / or some other type of SoC as described above, a part of the foregoing, or include the foregoing. In some embodiments, control logic 202 can be a processor, a processor core, or some other type of logic. HF signal insertion circuitry 209 can be referred to as a PLC injector. HF signal insertion circuitry 209 can be configured to receive a signal from control logic 202 and output an HF signal, as described above. Specifically, control logic 202 can identify triggers, such as user input (button press, user voice command, etc.) and / or system input (e.g., an indication that the battery of the electronic device is fully charged or above a certain threshold) and provide an activation signal to HF signal insertion circuitry 209.

[0026] An HF signal can be output from HF signal insertion circuitry 209, and the HF signal can reach HF DC signal line 265 through decoupling capacitor 207. The decoupling capacitor can act as a high-pass filter and block external signals (i.e., "noise") having a frequency lower than the frequency of the HF signal output by HF signal insertion circuitry 209. In some embodiments, the decoupling capacitor can have a capacitance on the order of 1 microfarad (uF). However, it should be understood that the specific value of the capacitor can depend on the specific embodiment and factors such as the frequency of the signal output by HF signal insertion circuitry 209.

[0027] The electronic device may additionally include an HF blocking circuitry 203 located between the decoupling capacitor 207 and the DC charging port 201. In some embodiments, the HF blocking circuitry 203 may additionally / alternatively be referred to as a "notch filter". The HF blocking circuitry 203 in the electronic device may act as a low-pass filter and is used to prevent HF signals output by the decoupling capacitor 207 from traveling into the DC charging port. In this way, relatively low-frequency DC power (which may have a frequency on the order of about 50 - 60 Hertz (Hz)) may pass through the HF blocking circuitry 203 and be received by the DC charging port 201 from the DC Vbus 250. However, HF signals can be prevented from reaching the DC charging port 201 from the HF DC signal line 265.

[0028] As previously described, the HF DC signal line 265 may transmit HF signals from the electronic device 205 to the adapter 215. As previously described, the adapter 215 may include an AC-to-DC converter circuitry 211, which may be configured to convert AC power received via the AC VBus 260 into DC power and then output the DC power on the DC Vbus 250.

[0029] Additionally, the adapter 215 may generally include a DC side 219 and an AC side 221. The particular sides 219 / 221 may not be physically separated or arranged as shown, but may be a logical separation depicted for the purpose of discussion. Specifically, the DC side 219 may include circuitry related to the transmission of DC electronic signals, and the AC side 221 may include circuitry related to the transmission of AC electronic signals.

[0030] It can be seen that the DC side 219 may include the HF blocking circuitry 203, the decoupling capacitor 207, and a receiver (RX) high-pass filter 213. The HF blocking circuitry 203 and the decoupling capacitor 207 may be similar to the HF blocking circuitry 203 and the decoupling capacitor 207 of the previously described electronic device 205. Specifically, the HF blocking circuitry 203 on the DC side 219 may function as a low-pass circuitry that prevents HF signals on the HF DC signal line 265 from reaching the AC-to-DC converter circuitry 211. The decoupling capacitor 207 on the DC side 219 of the adapter 215 may function as a high-pass filter that removes extraneous noise from the HF signals received on the HF DC signal line 265. Specifically, the decoupling capacitor 207 may remove signals at the frequencies of the DC or AC power signals (e.g., about 50 - 60 Hz). The RX high-pass filter 213 may then filter out additional signals that may cause noise at frequencies lower than the HF signals.

[0031] Then, an HF signal can be provided from the RX high-pass filter 213 to the isolation circuit 217. The isolation circuit can be configured to identify the HF signal and provide an indication to the HF signal insertion circuitry 209 on the AC side 211 of the adapter 215. The HF signal insertion circuitry 209 can be similar to the HF signal insertion circuitry 209 of the electronic device. The HF signal can be output from the HF signal insertion circuitry 209 to the decoupling capacitor 207 on the AC side 221 of the adapter 215, and the decoupling capacitor 207 can function similarly to the decoupling capacitor 207 of the electronic device 205. The HF signal can be output from the decoupling capacitor 207 to the HF AC signal line 255. It can be seen that the AC side 221 of the adapter 215 can further include an HF blocking circuitry 203, and the HF blocking circuitry 203 can prevent the HF signal on the HF AC signal line 255 from entering the AC-to-DC converter circuitry 211.

[0032] Then, the HF signal can be transmitted from the adapter 215 to the charger plug 225 via the HF AC signal line 255. It can be seen that the charger plug 225 can include an HF blocking circuitry 203, and the HF blocking circuitry 203 can prevent the HF signal from flowing from the HF AC signal line 255 to the AC power supply 220.

[0033] The charger plug 225 can further include a decoupling capacitor 207 and an RX high-pass filter 213, which can operate similarly to the decoupling capacitor 207 and the RX high-pass filter 213 on the DC side of the adapter 215 as described above. Then, the HF signal can be provided to the gate driver circuitry 223. The gate driver circuitry 223 (which can include a frequency-to-voltage converter) can be configured to identify the corresponding signal provided by the RX high-pass filter 213 and provide an activation signal to the switch 229.

[0034] As can be seen in Figure 2 the switch 229 can be an element of the circuit between the ground 227 and the AC VBus 260. The circuit can additionally include an LED 231, a diode 233, and a resistor 237. The resistor can limit the current provided to the LED 231 such that when the switch 229 is closed, the LED 231 does not receive a destructive electrical surge (as described below). In some embodiments, the resistor can have a resistance between approximately 47 kiloohms (kΩ) and approximately 63 kΩ. The diode can be unidirectional and biased to allow current to flow from the AC VBus 260 to the ground 227 only when the switch 229 is closed.

[0035] The switch 229 can be biased in the off state. However, when the switch 229 receives a signal from the gate driver 223, the switch can close, enabling current to flow between the AC VBus 260 and ground 227. When this occurs, the LED 231 can emit light, thereby providing an indication that the charger plug 225 is associated with the electronic device 205.

[0036] Figure 3 Alternative examples of systems that can facilitate charger plug identification according to various embodiments are shown. It should be noted that Figure 3 The system includes several components similar to those of Figure 2 To avoid redundancy, the description of these components will not be repeated herein.

[0037] Figure 3 The system of can include an electronic device 305 and an adapter 315, which can be generally similar to the electronic device 205 and the adapter 215. In this embodiment, the electronic device 305 can be configured to provide a digital signal to the adapter 315, rather than the HF signal as described above.

[0038] It can be seen that the electronic device 305 can include control logic 302, which can be similar to the control logic 202. In this embodiment, the control logic 302 can identify user and / or system inputs as described above and provide a control signal to the PD controller 303 of the electronic device 305. The PD controller 303 of the electronic device can be coupled to the PD controller 303 of the adapter 315. As can be seen, the adapter 315 can include a PD controller 303 at the DC side 319 of the adapter 315.

[0039] In one embodiment, the PD controller 303 can be communicatively coupled via a digital signal line such as the CC line 350 (which can be implemented via a physical connection in the power cable and / or via some other type of connection as described above). Based on the control signal received from the control logic 302, the PD controller 303 of the electronic device 305 can generate a digital signal and send it to the PD controller 303 of the adapter. The digital signal can be according to an interconnect protocol, such as USB Type-C as described above. In some embodiments, the digital signal sent via the CC line 350 can be an "Identify Plug" message as shown in Table 1 below:

[0040]

[0041] Table 1

[0042] It should be understood that the specific names of the messages, the specific digital identifiers of the messages, etc. are intended to be examples of such messages that can be provided by the electronic device 305 to the adapter 315, and other embodiments may use one or more additional or alternative messages, messages with different numerical values, etc.

[0043] Based on the digital message received from the electronic device 305, the PD controller 303 may provide instructions to the isolation circuit 217, and the instructions may be similar to those provided by the Figure 2 RX high-pass filter 213 in the embodiments of. Then, the isolation circuit may provide the previously described instructions to the HF signal insertion circuitry 209.

[0044] As previously described, it will be understood that Figure 2 and Figure 3 the embodiments of are intended to be highly simplified example embodiments. Other embodiments may include circuitry or logic capable of transmitting both HF signals and digital signals as described above. In some embodiments, some of the depicted elements may be divided into separate elements or circuitry, or various elements or circuitry in the elements or circuitry may be combined. In some embodiments, in addition to the connections depicted in the drawings, there may be additional or alternative connections between the elements. Other variations may exist in other embodiments.

[0045] Figure 4 An example electronic device that can be configured to facilitate charger plug identification according to some embodiments is shown.

[0046] In some embodiments, the device 400 may be similar to one or more of the electronic devices 105, 205, and / or 305. In an embodiment, the device 400 may represent a suitable computing device, such as a computing tablet, mobile phone or smart phone, laptop computer, desktop computer, Internet of Things (IoT) device, server, wearable device, set-top box, wireless-enabled e-reader, etc. It should be understood that some components are generally shown, and not all components of such devices are shown in the device 400.

[0047] In the example, the device 400 includes a SoC (System on Chip) 401. The example boundary of the SoC 401 is shown using a dashed line in Figure 4 where some example components are shown as being included within the SoC 401. However, the SoC 401 may include any suitable components of the device 400. It should be understood that Figure 4The SoC design shown is only intended as an example design, and other embodiments may include additional or alternative designs, architectures, and / or configurations. For example, in another embodiment, device 400 may be or include a SiP (System in Package), which may consist of multiple chips or die in a single package. Other embodiments may further vary in terms of design, architecture, and / or configuration.

[0048] In some embodiments, device 400 includes a processor 404. Processor 404 may include one or more physical devices, such as a microprocessor, application processor, microcontroller, programmable logic device, processing core, or other processing module. Processing operations performed by processor 404 include the execution of an operating platform or operating system on which applications and / or device functions are executed. Processing operations include operations related to I / O (input / output) with a human user or other device, operations related to power management, operations related to connecting the computing device 400 to another device, etc. Processing operations may also include operations related to audio I / O and / or display I / O.

[0049] In some embodiments, processor 404 includes multiple processing cores (also referred to as cores) 408a, 408b, 408c. Although Figure 4 only three cores 408a, 408b, 408c are shown, processor 404 may include any other suitable number of processing cores, e.g., dozens or even hundreds of processing cores. Processor cores 408a, 408b, 408c may be implemented on a single integrated circuit (IC) chip. Additionally, the chip may include one or more shared and / or private caches, buses or interconnects, graphics and / or memory controllers, or other components.

[0050] In some embodiments, processor 404 includes a cache 406. In an example, a section of cache 406 may be dedicated to a separate core 408 (e.g., a first section of cache 406 dedicated to core 408a, a second section of cache 406 dedicated to core 408b, etc.). In an example, one or more sections of cache 406 may be shared among two or more of the cores 408 in core 408. Cache 406 may be divided into different levels, e.g., a level 1 (L1) cache, a level 2 (L2) cache, a level 3 (L3) cache, etc.

[0051] In some embodiments, the processor core 404 may include a fetch unit to fetch instructions (including instructions with conditional branches) for execution by the core 404. The instructions may be fetched from any storage device such as the memory 430. The processor core 404 may also include a decode unit to decode the fetched instructions. For example, the decode unit may decode the fetched instructions into a plurality of micro-operations. The processor core 404 may include a scheduling unit to perform various operations associated with storing the decoded instructions. For example, the scheduling unit may hold data from the decode unit until the instruction is ready for dispatch, e.g., until all source values of the decoded instruction become available. In one embodiment, the scheduling unit may schedule and / or issue (or dispatch) the decoded instruction to an execution unit for execution.

[0052] The execution unit may execute the dispatched instruction after the dispatched instruction is decoded (e.g., by the decode unit) and dispatched (e.g., by the scheduling unit). In an embodiment, the execution unit may include more than one execution unit (such as an imaging computing unit, a graphics computing unit, a general computing unit, etc.). The execution unit may also perform various arithmetic operations (such as addition, subtraction, multiplication, and / or division), and may include one or more arithmetic logic units (ALUs). In an embodiment, a coprocessor (not shown) may perform various arithmetic operations in conjunction with the execution unit.

[0053] In addition, the execution unit may execute instructions out of order. Thus, in one embodiment, the processor core 404 may be an out-of-order processor core. The processor core 404 may also include a retirement unit. The retirement unit may retire the executed instruction after the executed instruction is committed. In an embodiment, the retirement of the executed instruction may result in the submission of the processor state from the execution of the instruction, the deallocation of the physical registers used by the instruction, etc. The processor core 404 may also include a bus unit to enable communication between the components of the processor core 404 and other components via one or more buses. The processor core 404 may also include one or more registers to store data accessed by various components of the core 404 (such as values associated with assigned application priorities and / or subsystem states (modes)).

[0054] In some embodiments, the device 400 includes connection circuitry 431. For example, the connection circuitry 431 includes hardware devices (e.g., wireless and / or wired connectors and communication hardware) and / or software components (e.g., drivers, protocol stacks), e.g., to enable the device 400 to communicate with external devices. The device 400 may be separate from external devices (such as other computing devices, wireless access points, or base stations, etc.).

[0055] In an example, the connection circuitry 431 can include various different types of connectivity. For generalization, the connection circuitry 431 can include cellular connection circuitry, wireless connection circuitry, and the like. The cellular connection circuitry of the connection circuitry 431 generally refers to a cellular network connection provided by a wireless carrier, such as via GSM (Global System for Mobile Communications) or variants or derivatives, CDMA (Code Division Multiple Access) or variants or derivatives, TDM (Time Division Multiplexing) or variants or derivatives, 3rd Generation Partnership Project (3GPP) Universal Mobile Telecommunications System (UMTS) system or variants or derivatives, 3GPP Long Term Evolution (LTE) system or variants or derivatives, 3GPP Advanced LTE (LTE-A) system or variants or derivatives, 5th Generation (5G) wireless system or variants or derivatives, 5G mobile network system or variants or derivatives, 5G New Radio (NR) system or variants or derivatives, 6th Generation (6G) wireless system or variants or derivatives, or other cellular service standards. The wireless connection circuitry (or wireless interface) of the connection circuitry 431 refers to a wireless connection that is not cellular and can include personal area networks (such as Bluetooth, near field, etc.), local area networks (such as Wi-Fi), and / or wide area networks (such as WiMax) and / or other wireless communications. In an example, the connection circuitry 431 can include a network interface (such as a wired or wireless interface), for example, such that a system embodiment can be incorporated into a wireless device (such as a cellular phone or a personal digital assistant).

[0056] In some embodiments, the device 400 includes a controller 432, which represents a hardware device and / or software component related to the interaction with one or more I / O devices. For example, the processor 404 can communicate with one or more of the display 422, one or more peripheral devices 424, the storage device 428, one or more other external devices 429, etc. via the controller 432. The controller 432 can be a chipset or some other type of controller.

[0057] For example, the controller 432 shows one or more connection points for attaching additional devices to the device 400. For example, users can interact with the system through these connection points. For example, devices that can be attached to the device 400 (such as the device 429) include microphone devices, speakers or stereo systems, audio devices, video systems or other display devices, keyboard or keypad devices, or other I / O devices for use with specific applications such as card readers or other devices.

[0058] As described above, the controller 432 can interact with an audio device, the display 422, and the like. For example, input through a microphone or other audio device can provide input or commands for one or more applications or functions of the device 400. Additionally, instead of or in addition to a display output, an audio output can be provided. In another example, if the display 422 includes a touch screen, the display 422 also acts as an input device, and the input device can be at least partially managed by the controller 432. Additional buttons or switches may also be present on the computing device 400 to provide I / O functions managed by the controller 432. In one embodiment, the controller 432 manages devices such as an accelerometer, a camera, a light sensor, or other environmental sensors or other hardware that may be included in the device 400. The input can be part of a direct user interaction and provide environmental input to the system to affect its operation (such as filtering noise, adjusting the display for brightness detection, applying a flash or other features for the camera).

[0059] In some embodiments, the controller 432 can be coupled to various devices using any suitable communication protocol (e.g., PCIe (Peripheral Component Interconnect Express), USB (Universal Serial Bus), Thunderbolt, High-Definition Multimedia Interface (HDMI), FireWire, etc.).

[0060] In some embodiments, the display 422 represents the hardware (e.g., a display device) and software (e.g., drivers) components that provide a visual and / or tactile display for a user to interact with the device 400. The display 422 can include a display interface, a display screen, and / or a hardware device for providing a display to the user. In some embodiments, the display 422 includes a touch screen (or touchpad) device that provides both output and input to the user. In an example, the display 422 can communicate directly with the processor 404. The display 422 can be one or more of an internal display device in a mobile electronic device or a laptop device or an external display device attached via a display interface (e.g., DisplayPort, High-Definition Multimedia Interface (HDMI), etc.). In one embodiment, the display 422 can be a head-mounted display (HMD), such as a stereoscopic display device for virtual reality (VR) applications or augmented reality (AR) applications.

[0061] In some embodiments, and although not shown in the figure, in addition to (or instead of) the processor 404, the device 400 can also include a graphics processing unit (GPU) that includes one or more graphics processing cores that can control one or more aspects of the content displayed on the display 422.

[0062] The controller 432 may include a hardware interface and connectors, as well as software components (e.g., drivers, protocol stacks) for implementing a peripheral connection, for example, to the peripheral device 424.

[0063] It should be understood that the device 400 can be either a peripheral device to other computing devices or have peripheral devices connected to it. The device 400 may have a "docking" connector to connect to other computing devices for purposes such as managing (e.g., downloading and / or uploading, changing, synchronizing) the content on the device 400. Additionally, the docking connector can allow the device 400 to connect to certain peripheral devices that allow the computing device 400 to control, for example, the content output to an audio-visual or other system.

[0064] In addition to proprietary docking connectors or other proprietary connection hardware, the device 400 can implement peripheral connections via common or standards-based connectors. Common types can include Universal Serial Bus (USB) connectors (which can include any of a variety of different hardware interfaces), DisplayPort (including MiniDisplayPort (MDP)), HDMI, FireWire, or other types.

[0065] In some embodiments, for example, in addition to being directly coupled to the processor 404 or instead of being directly coupled to the processor 404, the connection circuitry 431 can be coupled to the controller 432. In some embodiments, for example, in addition to being directly coupled to the processor 404 or instead of being directly coupled to the processor 404, the display 422 can be coupled to the controller 432.

[0066] In some embodiments, the device 400 includes a memory 430 coupled to the processor 404 via a memory interface 434. The memory 430 includes memory devices for storing information in the device 400.

[0067] In some embodiments, the memory 430 includes a device for maintaining stable timing, as described with reference to various embodiments. The memory may include non-volatile (state does not change if power to the memory device is interrupted) and / or volatile (state is indeterminate if power to the memory device is interrupted) memory devices. The memory device 430 may be a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, a flash memory device, a phase change memory device, or some other memory device having properties suitable as a process memory. In one embodiment, the memory 430 may operate as the system memory of the device 400 to store data and instructions used when one or more processors 404 execute an application or process. The memory 430 may store application data, user data, music, photos, documents, or other data, as well as system data (whether long-term or temporary) related to the execution of the applications and functions of the device 400.

[0068] The elements of the various embodiments and examples are also provided as a machine-readable medium (e.g., memory 430) for storing computer-executable instructions (e.g., instructions for implementing any of the other processes discussed herein). The machine-readable medium (e.g., memory 430) may include, but is not limited to, flash memory, optical disks, CD-ROMs, DVD ROMs, RAMs, EPROMs, EEPROMs, magnetic or optical cards, phase change memory (PCM), or other types of machine-readable media suitable for storing electronic or computer-executable instructions. For example, embodiments of the present disclosure may be downloaded as a computer program (e.g., BIOS), which may be transmitted via a communication link (e.g., a modem or network connection) by a data signal from a remote computer (e.g., a server) to a requesting computer (e.g., a client).

[0069] In some embodiments, the device 400 includes a temperature measurement circuitry 440, e.g., for measuring the temperature of various components of the device 400. In an example, the temperature measurement circuitry 440 may be embedded or coupled or attached to the various components whose temperature is to be measured and monitored. For example, the temperature measurement circuitry 440 may measure the temperature of one or more of the cores 408a, 408b, 408c, the voltage regulator 414, the memory 430, the motherboard of the SoC 401, and / or any suitable component of the device 400.

[0070] In some embodiments, device 400 includes a power measurement circuitry 442, e.g., for measuring the power consumed by one or more components of device 400. In an example, in addition to or instead of measuring power, power measurement circuitry 442 may measure voltage and / or current. In an example, power measurement circuitry 442 may be embedded or coupled or attached to various components whose power, voltage, and / or current consumption is to be measured and monitored. For example, power measurement circuitry 442 may measure the power, current, and / or voltage supplied by one or more voltage regulators 414, the power supplied to the SoC 401, the power supplied to device 400, the power consumed by the processor 404 (or any other component) of device 400, etc.

[0071] In some embodiments, device 400 includes one or more voltage regulator circuitries, commonly referred to as voltage regulators (VRs) 414. VR 414 generates signals at appropriate voltage levels, which may be supplied for operating any suitable component of device 400. By way of example only, VR 414 is shown supplying a signal to the processor 404 of device 400. In some embodiments, VR 414 receives one or more voltage identification (VID) signals and generates a voltage signal at an appropriate level based on the VID signals. Various types of VRs may be used for VR 414. For example, VR 414 may include a "buck" VR, a "boost" VR, a combination of a buck VR and a boost VR, a low dropout (LDO) regulator, a switched DC-DC regulator, a DC-DC regulator based on a constant on-time controller, etc. A buck VR is typically used in power delivery applications where the input voltage needs to be transformed to the output voltage at a ratio less than 1. A boost VR is typically used in power delivery applications where the input voltage needs to be transformed to the output voltage at a ratio greater than 1. In some embodiments, each processor core has its own VR, which is controlled by the PCU 410a / b and / or the PMIC 412. In some embodiments, each core has a network of distributed LDOs to provide efficient control for power management. The LDO may be a digital LDO, an analog LDO, or a combination of a digital LDO or an analog LDO. In some embodiments, VR 414 includes a current tracking device for measuring the current through the power supply rail(s) (single or multiple).

[0072] In some embodiments, device 400 includes one or more clock generator circuitry, commonly referred to as clock generator 416. Clock generator 416 generates clock signals at appropriate frequency levels, which can be supplied to any appropriate component of device 400. By way of example only, clock generator 416 is shown supplying a clock signal to processor 404 of device 400. In some embodiments, clock generator 416 receives one or more frequency identification (FID) signals and generates a clock signal at an appropriate frequency based on the FID signals.

[0073] In some embodiments, device 400 includes a battery 418 that supplies power to various components of device 400. By way of example only, battery 418 is shown supplying power to processor 404. Although not shown in the figure, device 400 may include a charging circuitry, e.g., to recharge the battery based on alternating current (AC) power received from an AC adapter.

[0074] In some embodiments, device 400 includes a power control unit (PCU) 410 (also referred to as a power management unit (PMU), power controller, etc.). In an example, some sections of PCU 410 may be implemented by one or more processing cores 408, and these sections of PCU 410 are symbolically shown using a dashed box and labeled as PCU 410a. In an example, some other sections of PCU 410 may be implemented outside of processing core 408, and these sections of PCU 410 are symbolically shown using a dashed box and labeled as PCU 410b. PCU 410 may implement various power management operations for device 400. PCU 410 may include hardware interfaces, hardware circuitry, connectors, registers, etc. for implementing various power management operations for device 400 as well as software components (e.g., drivers, protocol stacks).

[0075] In some embodiments, device 400 includes a power management integrated circuit (PMIC) 412, e.g., to implement various power management operations for device 400. In some embodiments, PMIC 412 is a reconfigurable power management IC (RPMIC) and / or IMVP ( mobile voltage positioning). In an example, the PMIC is within an IC chip separate from processor 404. PMIC 412 may implement various power management operations for device 400. PMIC 412 may include hardware interfaces, hardware circuitry, connectors, registers, etc. for implementing various power management operations for device 400 as well as software components (e.g., drivers, protocol stacks).

[0076] In an example, device 400 includes one or both of PCU 410 or PMIC 412. In an example, neither PCU 410 nor PMIC 412 may be present in device 400, and thus, these components are shown using dashed lines.

[0077] Various power management operations of device 400 may be performed by PCU 410, PMIC 412, or a combination of PCU 410 and PMIC 412. For example, PCU 410 and / or PMIC 412 may select a power state (e.g., a P state) for various components of device 400. For example, PCU 410 and / or PMIC 412 may select a power state for various components of device 400 (e.g., according to the ACPI (Advanced Configuration and Power Interface) specification). By way of example only, PCU 410 and / or PMIC 412 may transition various components of device 400 to a sleep state, an active state, an appropriate C state (e.g., a C0 state or another appropriate C state according to the ACPI specification), etc. In an example, PCU 410 and / or PMIC 412 may control the voltage output by VR 414 and / or the frequency of the clock signal output by the clock generator, for example, by respectively outputting a VID signal and / or an FID signal. In an example, PCU 410 and / or PMIC 412 may control battery power usage, charging of battery 418, and features related to power saving operations.

[0078] The clock generator 416 may include a phase-locked loop (PLL), a frequency-locked loop (FLL), or any suitable clock source. In some embodiments, each core of processor 404 has its own clock source. Thus, each core may operate at a frequency independent of the operating frequencies of other cores. In some embodiments, PCU 410 and / or PMIC 412 perform adaptive or dynamic frequency scaling or adjustment. For example, if a core is not operating at its maximum power consumption threshold or limit, the clock frequency of the processor core may be increased. In some embodiments, PCU 410 and / or PMIC 412 determine the operating conditions of each core of the processor, and opportunistically adjust the frequency and / or power supply voltage of the core when PCU 410 and / or PMIC 412 determine that the core is operating below a target performance level, without the core clock source (e.g., the PLL of the core) losing lock. For example, if a core is drawing less current from the power supply rail than the total current allocated for that core or processor 404, PCU 410 and / or PMIC 412 may temporarily increase the power drawn for that core or processor 404 (e.g., by increasing the clock frequency and / or the power supply voltage level) such that the core or processor 404 may perform at a higher performance level. Thus, for processor 404, the voltage and / or frequency may be temporarily increased without violating product reliability.

[0079] In the example, the PCU 410 and / or the PMIC 412 may perform power management operations based at least in part on, for example, measurements received from the power measurement circuitry 442, the temperature measurement circuitry 440, the charge level of the battery 418, and / or any other suitable information that may be used for power management. To this end, the PMIC 412 is communicatively coupled to one or more sensors to sense / detect various values / changes of one or more factors that affect the power / thermal behavior of the system / platform. Examples of one or more factors include current, voltage drop, temperature, operating frequency, operating voltage, power consumption, inter-core communication activity, etc. One or more of these sensors may be provided in physical proximity (and / or thermal contact / coupling) to one or more components or logic / IP blocks of the computing system. Additionally, in at least one embodiment, the sensors may be directly coupled to the PCU 410 and / or the PMIC 412 to allow the PCU 410 and / or the PMIC 412 to manage processor core energy based at least in part on the values (single or multiple) detected by one or more sensors.

[0080] An example software stack of the device 400 is also shown (but not all elements of the software stack are shown). By way of example only, the processor 404 may execute an application 450, an operating system 452, one or more power management (PM)-specific applications (e.g., generally referred to as PM application 458), etc. The PM application 458 may also be executed by the PCU 410 and / or the PMIC 412. The OS 452 may also include one or more PM applications 456a, 456b, 456c. The OS 452 may also include various drivers 454a, 454b, 454c, etc., some of which may be specific to power management purposes. In some embodiments, the device 400 may also include a basic input / output system (BIOS) 420. The BIOS 420 may communicate with the OS 452 (e.g., via one or more drivers 454), communicate with the processor 404, and so on.

[0081] For example, one or more of the PM applications 458, 456, the drivers 454, the BIOS 420, etc. may be used to implement power management-specific tasks, such as controlling the voltage and / or frequency of various components of the device 400, controlling wake states, sleep states, and / or any other suitable power states of various components of the device 400, controlling battery power usage, charging of the battery 418, features related to power saving operations, etc.

[0082] In some embodiments, the battery 418 is a Li metal battery having a pressure chamber to allow uniform pressure on the battery. The pressure chamber is supported by a metal plate (such as a pressure equalization plate) for providing uniform pressure to the battery. The pressure chamber may include a pressurized gas, an elastic material, a spring plate, etc. The outer skin of the pressure chamber can be freely bent, restricted by a (metal) skin at its edges, but still apply uniform pressure on the plates that compress the battery cells. The pressure chamber provides uniform pressure to the battery, which is used to achieve a high energy density battery with, for example, a battery life 20% longer.

[0083] In some embodiments, the pCode executed on the PCU 410a / b has the ability to implement additional computational and telemetry resources for run-time support for the pCode. Here, the pCode refers to the firmware executed by the PCU 410a / b to manage the performance of the SoC 401. For example, the pCode can set the frequency and appropriate voltage for the processor. Parts of the pCode are accessible via the OS 452. In various embodiments, mechanisms and methods are provided for dynamically changing the Energy Performance Preference (EPP) values based on workload, user behavior, and / or system conditions. A well-defined interface may exist between the OS 452 and the pCode. This interface may allow or facilitate the software configuration of several parameters and / or may provide hints to the pCode. As an example, the EPP parameter can inform the pCode algorithm whether performance or battery life is more important.

[0084] This support can also be performed by the OS 452 by including machine learning support as part of the OS 452 and by adjusting the EPP values prompted by the OS to the hardware (e.g., various components of the SoC 401) through machine learning predictions or by delivering the machine learning predictions to the pCode in a manner similar to that performed by the Dynamic Tuning Technology (DTT) driver. In this model, the OS 452 can have visibility into the same set of telemetry available to the DTT. As a result of the DTT machine learning hint settings, the pCode can adjust its internal algorithms to achieve optimal power and performance results after activation-type machine learning predictions. As an example, the pCode can increase the responsibility for processor utilization changes to achieve a quick response to user activities, or can increase the bias for energy savings by reducing the responsibility for processor utilization or by adjusting energy-saving optimizations to save more power and increase performance losses. This approach can help save more battery life in case the type of activity enabled misses some performance levels that the system can achieve. The pCode can include an algorithm for dynamic EPP that can take two inputs, one from the OS 452 and the other from software such as the DTT, and can selectively choose to provide higher performance and / or responsiveness. As part of this method, the pCode can enable options in the DTT to adjust its response to the DTT for different types of activities.

[0085] Some non-limiting examples of various embodiments are given below.

[0086] Example 1 may include a power cable assembly including: a light source; an output terminal for providing direct current (DC) power to an electronic device; an input terminal for receiving alternating current (AC) power from a power source; a first circuitry for: identifying a first signal from the electronic device; generating a high-frequency (HF) signal having a frequency equal to or higher than 9 kHz based on the first signal; and outputting the HF signal to a second circuitry; and the second circuitry for providing power to the light source based on the AC high-frequency signal.

[0087] Example 2 may include the power cable assembly of Example 1 and / or some other examples herein, wherein the second circuitry includes: the light source; a switch biased to an open state; and a gate driver configured to: identify the reception of the HF signal; and provide an activation signal to the switch based on the AC high-frequency signal, wherein the activation signal is for causing the switch to close, and wherein the closing of the switch causes power to be provided to the light source.

[0088] Example 3 may include the power cable assembly described in any one of Examples 1-2 and / or some other examples herein, wherein the first signal is based on an input provided by a user to the electronic device.

[0089] Example 4 may include the power cable assembly described in any one of Examples 1-3 and / or some other examples herein, wherein the first signal is a second HF signal having a frequency equal to or higher than 9 kHz.

[0090] Example 5 may include the power cable assembly described in any one of Examples 1-4 and / or some other examples herein, wherein the first signal is a digital signal according to an interconnect protocol.

[0091] Example 6 may include the power cable assembly described in Example 5, wherein the interconnect protocol is a Universal Serial Bus (USB) Type-C protocol.

[0092] Example 7 may include the power cable assembly described in any one of Examples 1-6 and / or some other examples herein, wherein the light source is a light emitting diode (LED).

[0093] Example 8 may include the power cable assembly described in any one of Examples 1-7 and / or some other examples herein, wherein the first circuitry further includes an AC-to-DC converter configured to convert the AC power to the DC power.

[0094] Example 9 may include the power cable assembly described in any one of Examples 1-8 and / or some other examples herein, wherein the first circuitry is an adapter of the power cable assembly.

[0095] Example 10 may include the power cable assembly described in any one of Examples 1-9 and / or some other examples herein, wherein the second circuitry is a charger plug of the power cable assembly.

[0096] Example 11 may include an adapter for a power cable assembly, wherein the adapter includes: an alternating current (AC) to direct current (DC) circuitry configured to: receive AC power from an AC power source; and convert the AC power to DC power to be output to an electronic device; and a second circuitry configured to: receive a first signal from the electronic device, the first signal including an indication that a light source of a charger plug of the power cable assembly is to be activated; and output an alternating current (AC) signal to the charger plug, wherein the AC signal is for activating the light source.

[0097] Example 12 may include the adapter described in Example 11 and / or some other examples herein, wherein the first signal is based on a user-provided input to the electronic device.

[0098] Example 13 may include the adapter described in any one of Examples 11-12 and / or some other examples herein, wherein the first signal is based on the electronic device's logic recognition of the system state.

[0099] Example 14 may include the adapter described in any one of Examples 11-13 and / or some other examples herein, wherein the first signal and the AC signal have a frequency equal to or higher than 9 kilohertz (kHz).

[0100] Example 15 may include the adapter described in any one of Examples 11-14 and / or some other examples herein, wherein the first signal is a digital signal according to an interconnection protocol.

[0101] Example 16 may include a charger plug for a power cable assembly of an electronic device, wherein the charger plug includes: a light source; a switch biased to an off state; and a gate driver configured to: receive an AC signal having a frequency equal to or higher than 9 kilohertz (kHz) from an adapter of the power cable assembly, wherein the AC signal is based on a first signal received from the electronic device, and wherein the first signal is related to an indication that the light source is to be activated; and close the switch based on the AC signal, wherein closing the switch causes activation of the light source.

[0102] Example 17 may include the charger plug described in Example 16 and / or some other examples herein, wherein the indication is based on a user input provided by a user of the electronic device to the electronic device.

[0103] Example 18 may include the charger plug described in any one of Examples 16-17 and / or some other examples herein, wherein the indication is based on a system state recognized by the logic of the electronic device.

[0104] Example 19 may include the charger plug described in any one of Examples 16-18 and / or some other examples herein, wherein the light source is a light-emitting diode (LED).

[0105] Example 20 may include the charger plug described in any one of Examples 16-19 and / or some other examples herein, wherein the first signal is a digital signal according to an interconnection protocol or an AC signal having a frequency equal to or higher than 9 kilohertz (kHz).

[0106] Example 21 may include an electronic device, comprising: a charging port for receiving power from a power source via a direct current (DC) VBus of a power cable assembly; and a circuitry for outputting an indication via a signal line of the power cable assembly that a light source of a charger plug of the power cable assembly is to be activated.

[0107] Example 22 may include the electronic device as described in Example 21 and / or some other examples herein, wherein the circuitry includes a high frequency (HF) signal insertion circuitry, and wherein the indication is an HF DC signal having a frequency equal to or higher than 9 kilohertz (kHz).

[0108] Example 23 may include the electronic device as described in Example 21 and / or some other examples herein, wherein the signal line is a configuration channel (CC) line, and wherein the indication is a digital signal according to a Universal Serial Bus (USB) protocol.

[0109] Example 24 may include the electronic device as described in any one of Examples 21 - 23 and / or some other examples herein, wherein the indication is based on an input provided by a user of the electronic device.

[0110] Example 25 may include the electronic device as described in any one of Examples 21 - 24 and / or some other examples herein, wherein the indication is based on an identification of a system state of the electronic device.

[0111] Example 26 may include a power cable assembly, comprising: a light source; an output terminal for providing direct current (DC) power to an electronic device; an input terminal for receiving alternating current (AC) power from a power source; a first circuitry for: identifying a first signal from the electronic device; generating a high frequency (HF) signal based on the first signal; and outputting the HF signal to a second circuitry; and the second circuitry for providing power to the light source based on the AC high frequency signal.

[0112] Example 27 may include the power cable assembly as described in Example 26 and / or some other examples herein, wherein the second circuitry includes: the light source; a switch biased to an off state; and a gate driver configured to: identify a reception of the HF signal; and provide an activation signal to the switch based on the AC high frequency signal, wherein the activation signal is for causing the switch to close, and wherein the closing of the switch causes power to be provided to the light source.

[0113] Example 28 may include the power cable assembly as described in any one of Examples 26 - 27 and / or some other examples herein, wherein the first signal is based on an input provided by a user of the electronic device.

[0114] Example 29 may include the power cable assembly described in any of Examples 26 - 28 and / or some other examples herein, wherein the first signal is a second HF signal having a frequency equal to or higher than 9 kilohertz (kHz).

[0115] Example 30 may include the power cable assembly described in any of Examples 26 - 29 and / or some other examples herein, wherein the first signal is a digital signal according to an interconnect protocol.

[0116] Example 31 may include the power cable assembly described in any of Examples 26 - 30 and / or some other examples herein, wherein the interconnect protocol is a Universal Serial Bus (USB) Type - C protocol.

[0117] Example 32 may include the power cable assembly described in any of Examples 26 - 31 and / or some other examples herein, wherein the HF signal has a frequency equal to or higher than 9 kilohertz (kHz).

[0118] Example 33 may include the power cable assembly described in any of Examples 26 - 32 and / or some other examples herein, wherein the first circuitry further includes an AC - to - DC converter configured to convert the AC power to the DC power.

[0119] Example 34 may include the power cable assembly described in any of Examples 26 - 33 and / or some other examples herein, wherein the first circuitry is an adapter of the power cable assembly.

[0120] Example 35 may include the power cable assembly described in any of Examples 26 - 34 and / or some other examples herein, wherein the second circuitry is a charger plug of the power cable assembly.

[0121] In the foregoing detailed description, reference has been made to the accompanying drawings, which form a part hereof. Throughout the text, like reference numerals represent like parts, and wherein embodiments that may be practiced are shown by way of illustration. It should be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Accordingly, the foregoing detailed description should not be considered limiting.

[0122] The various operations may in turn be described as a number of discrete actions or operations in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be construed as implying that these operations necessarily depend on the order. In particular, these operations may not be performed in the order presented. The described operations may be performed in a different order than the described embodiments. In additional embodiments, various additional operations may be performed and / or the described operations may be omitted.

[0123] The terms "substantially", "close", "about", "near", and "approximate" generally mean within + / - 10% of the target value. Unless otherwise specified, the use of ordinal adjectives "first", "second", and "third", etc. to describe a common object only indicates that different instances of similar objects are being referred to, and is not intended to imply that the objects so described must be in a given sequence in terms of time, space, ranking, or in any other way.

[0124] For the purposes of this disclosure, the phrases "A and / or B" and "A or B" mean (A), (B), or (A and B). For the purposes of this disclosure, the phrase "A, B, and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C).

[0125] The description may use the phrases "in one embodiment" or "in embodiments", which may each refer to one or more of the same or different embodiments. Additionally, the terms "comprising", "including", "having", etc. used with respect to embodiments of the present disclosure are synonymous. References in the specification to "an embodiment", "one embodiment", "some embodiments", or "other embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least some embodiments, but not necessarily in all embodiments. The various occurrences of "an embodiment", "one embodiment", or "some embodiments" do not necessarily all refer to the same embodiment. If the specification states that a component, feature, structure, or characteristic "may", "might", or "could" be included, inclusion of the specific component, feature, structure, or characteristic is not required. If the specification or claim refers to "a" or "an" element, it does not mean there is only one element. If the specification or claim refers to "additional" elements, there may be more than one additional element.

[0126] In addition, in one or more embodiments, specific features, structures, functions, or characteristics may be combined in any suitable manner. For example, wherever a particular feature, structure, function, or characteristic associated with two embodiments is not mutually exclusive, the first embodiment may be combined with the second embodiment. Although the present disclosure has been described in connection with its specific embodiments, many alternatives, modifications, and variations of these embodiments will be apparent to those of ordinary skill in the art in light of the foregoing description. Embodiments of the present disclosure are intended to cover all such alternatives, modifications, and variations that fall within the broad scope of the appended claims.

[0127] As used herein, the term "circuitry" may refer to an application specific integrated circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group), combinational logic circuitry, and / or other suitable hardware components that provide the described functionality, may be part of any of the foregoing, or may include any of the foregoing. As used herein, a "computer-implemented method" may refer to any method performed by one or more processors, a computer system having one or more processors, a mobile device such as a smart phone (which may include one or more processors), a tablet computer, a laptop computer, a set-top box, a gaming console, etc.

[0128] Additionally, to simplify the illustration and discussion, and to avoid obscuring the present disclosure, well-known power / ground connections to integrated circuit (IC) chips and other components may or may not be shown in the presented figures. Further, to avoid obscuring the present disclosure and also in view of the fact that the details regarding the implementation of such a block diagram arrangement highly depend on the platform on which the present disclosure is implemented (i.e., such details should be entirely within the purview of those skilled in the art), the arrangement may be shown in block diagram form. In cases where specific details (e.g., circuitry) are set forth to describe example embodiments of the present disclosure, it should be apparent to those skilled in the art that the present disclosure can be practiced without these specific details or with variations of these specific details. Thus, the description should be regarded as illustrative rather than restrictive.

[0129] A summary is provided to allow the reader to ascertain the nature and gist of the technical disclosure. The abstract is submitted with the understanding that it will not be used to limit the scope or meaning of the claims. The appended claims are hereby incorporated into the detailed description, where each claim stands on its own as a separate embodiment.

Claims

1. A power cable assembly, comprising: light source; an output terminal for providing direct current (DC) power to an electronic device; an input terminal for receiving alternating current (AC) power from a power source; A first circuit system is used for: identifying a first signal from the electronic device; generating a high frequency (HF) signal based on the first signal; as well as outputting the HF signal to a second circuit system; and The second circuit system is used to provide power to the light source based on the AC high-frequency signal.

2. The power cable assembly according to claim 1, wherein: The second circuit system comprises: the light source; a switch biased to an open state; and Gate drivers, which are configured as: identifying reception of the HF signal; and An activation signal is provided to the switch based on the AC high frequency signal, wherein the activation signal is used to cause the switch to close, and wherein closing of the switch causes power to be provided to the light source.

3. The power cable assembly according to claim 1, wherein: The first signal is based on a user-provided input to the electronic device.

4. The power cable assembly according to claim 1, wherein: The first signal is a second HF signal having a frequency equal to or higher than 9 kilohertz (kHz).

5. The power cable assembly according to claim 1, wherein: The first signal is a digital signal according to an interconnect protocol.

6. The power cable assembly according to claim 5, wherein: The interconnection protocol is the Universal Serial Bus (USB) Type-C protocol.

7. The power cable assembly according to any one of claims 1 to 6, wherein: The HF signal has a frequency equal to or higher than 9 kilohertz (kHz).

8. The power cable assembly according to any one of claims 1 to 6, wherein: The first circuit system also includes an AC-to-DC converter configured to convert the AC power into the DC power.

9. The power cable assembly according to any one of claims 1 to 6, wherein: The first circuit system is an adapter of the power cable assembly.

10. The power cable assembly according to any one of claims 1 to 6, wherein: The second circuit system is a charger plug of the power cable assembly.

11. An adapter for a power cable assembly, wherein: The adapter comprises: An alternating current (AC) to direct current (DC) circuit system configured to: receiving AC power from an AC power source; and converting the AC power into DC power to be output to an electronic device; and A second circuit system is configured to: receiving a first signal from an electronic device, the first signal including an indication that a light source of a charger plug of the power cable assembly is to be activated; and An alternating current (AC) signal is output to the charger plug, wherein the AC signal is used to enable the light source to be activated.

12. The adapter according to claim 11, wherein: The first signal is based on a user-provided input to the electronic device.

13. The adapter according to claim 11, wherein: The first signal is based on identification of a system status by logic of the electronic device.

14. The adapter according to any one of claims 11 to 13, wherein: The first signal and the AC signal have a frequency equal to or higher than 9 kilohertz (kHz).

15. The adapter according to any one of claims 11 to 13, wherein: The first signal is a digital signal according to an interconnect protocol.

16. An electronic device comprising: a charging port for receiving power from a power source via a direct current (DC) VBus of a power cable assembly; as well as Circuitry is configured to output an indication via a signal line of the power cable assembly that a light source of a charger plug of the power cable assembly is to be activated.

17. The electronic device according to claim 16, wherein: The circuitry includes high frequency (HF) signal insertion circuitry, and wherein the indication is a HF DC signal having a frequency equal to or greater than 9 kilohertz (kHz).

18. The electronic device according to claim 16, wherein: The signal line is a configuration channel (CC) line, and wherein the indication is a digital signal in accordance with a universal serial bus (USB) protocol.

19. The electronic device according to any one of claims 16 to 18, wherein: The indication is based on input provided by a user of the electronic device.

20. The electronic device according to any one of claims 16 to 18, wherein: The indication is based on an identification of a system status of the electronic device.