Method for improving epitaxial filling through ion implantation and epitaxial structure
By ion implantation and forming notches on the side wall of the groove, the problem of early tightening of the top of the groove during epitaxial filling is solved, improving the filling effect and reducing costs.
Patent Information
- Application Number
- CN202510328924.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-19
- Publication Date
- 2025-06-24
AI Technical Summary
During epitaxial filling, the opening at the top of the groove is tightened in advance, resulting in difficulty in deposition in the center of the groove and increasing production costs.
Ion doping is performed on the side walls of the second trench by ion implantation, forming a region where the ion doping concentration decreases from the top of the side wall to the bottom, and a notch at the top of the second trench is formed in the third etch.
It effectively prevents the top of the groove from being tightened in advance, improves the effect of the groove epitaxial filling, and reduces the process difficulty and production cost of epitaxial filling.
Smart Images
Figure CN120201758A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and particularly to a method and an epitaxial structure for improving epitaxial filling by ion implantation. Background Art
[0002] During the process of epitaxial filling of trenches, a high-pressure deposition-etching-low-pressure deposition-etching cycle is usually adopted. However, there are some limitations in the existing trench epitaxial filling process. Since the filling rate at the opening of the trench is greater than that at its sidewalls and bottom during the epitaxial filling process, as the epitaxial filling process time continues, the width of the top opening of the trench continuously shrinks, which easily causes the problem of premature constriction of the top opening of the trench, making it difficult to deposit in the central part of the trench, increasing the difficulty of epitaxial filling of the trench, and increasing the production cost. Therefore, it is necessary to develop a method and an epitaxial structure for improving epitaxial filling to solve the above problems, overcome the problem of premature constriction of the top opening of the trench, and thus improve the effect of trench epitaxial filling. Summary of the Invention
[0003] The purpose of the present invention is to provide a method and an epitaxial structure for improving epitaxial filling by ion implantation, which overcome the problem of premature constriction of the top opening of the trench, improve the effect of trench epitaxial filling, reduce the process difficulty of epitaxial filling, and thus reduce the production cost of semiconductors.
[0004] To achieve the above purpose, the present invention provides a method for improving epitaxial filling by ion implantation, including:
[0005] Providing a semiconductor substrate covered with a mask layer;
[0006] Etching the trench area for the first time to form a first trench in the mask layer;
[0007] Forming a barrier layer on the sidewalls of the first trench;
[0008] Etching the semiconductor substrate at the bottom of the first trench for the second time to form a second trench;
[0009] Performing ion implantation on the sidewalls of the second trench so that the ion doping concentration gradually decreases from the top to the bottom of the sidewalls;
[0010] Etching the second trench implanted with ions for the third time so that a notch is exposed at the top of the second trench.
[0011] Optionally, the width of the second trench is smaller than that of the first trench.
[0012] Optionally, the barrier layer includes: a first barrier layer and a second barrier layer; the first barrier layer is formed on the sidewalls of the first trench; the second barrier layer is formed on the surface of the mask layer and the surface of the first barrier layer.
[0013] Optionally, the mask layer includes: a first oxide layer, a second nitride layer, and a third oxide layer that are sequentially formed on the surface of the semiconductor substrate;
[0014] Before ion implantation on the sidewalls of the second trench after the second etching, the third oxide layer and the second barrier layer are wet-etched.
[0015] Optionally, it further includes: before ion implantation on the sidewalls of the second trench after wet etching, the surface of the second trench is subjected to high-temperature oxidation to form a sacrificial oxide layer; then the sacrificial oxide layer is etched away.
[0016] Optionally, the thickness of the sacrificial oxide layer is less than the thickness of the second barrier layer.
[0017] Optionally, the direction of the ion implantation is symmetrically arranged with respect to the longitudinal center axis of the second trench, and the notch formed at the top of the second trench is symmetrically arranged with respect to the longitudinal center axis of the second trench.
[0018] Optionally, the direction of the ion implantation forms an angle θ with the plane of the semiconductor substrate;
[0019] θ ∈ (Arctan(x), π / 2) ∪ (π / 2, π / 2 + Arctan(x))
[0020] where x is the ratio of the depth to the width of the second trench after etching the second barrier layer.
[0021] Optionally, the type of ions in the ion implantation process is the same as the type of the epitaxial material.
[0022] Optionally, the ions used in the ion implantation process are ions generated from inert gases.
[0023] Optionally, the maximum horizontal etching amount X of the third etching is:
[0024] X = (a - b) / 2 - c
[0025] where a is the width of the first trench after the first etching, b is the width of the second trench after etching the second barrier layer, and c is the thickness of the first barrier layer.
[0026] Optionally, the maximum vertical etching amount Y of the third etching is X * tanθ.
[0027] Optionally, the first barrier layer is a nitride layer.
[0028] Optionally, it further includes:
[0029] Removing the second nitride layer and the first barrier layer;
[0030] Perform epitaxial filling on the second trench.
[0031] In addition, the present invention also provides an epitaxial structure on a semiconductor substrate, obtained by using the method for improving epitaxial filling through ion implantation as described above, including: forming a first trench and a second trench through a first etching and a second etching, an ion doping region is provided at the top of the second trench, a notch is formed in the ion doping region through a third etching, and the first trench and the second trench are filled with an epitaxial material.
[0032] Compared with the prior art, the technical solution of the present invention has at least the following beneficial effects:
[0033] In the method of the present invention, ion implantation is performed on the sidewall of the second trench at an inclined angle θ to increase the ion doping concentration on the sidewall at the top of the second trench, break the covalent bond of the semiconductor substrate located at the top of the second trench, make the semiconductor substrate at the top of the second trench more easily etched, and thus expose a notch at the top of the second trench after etching, preventing the filling rate at the top of the second trench from being greater than the etching rate at other positions of the second trench during the epitaxial filling process, so as to avoid premature constriction at the top of the second trench, improve the effect of trench epitaxial filling, reduce the process difficulty of epitaxial filling, and further reduce the production cost of the semiconductor.
[0034] In the method of the present invention, a first barrier layer is provided on the sidewall of the first trench to avoid lateral etching at the opening of the first trench during the etching process and prevent damage to the first oxide layer in the mask layer when performing ion implantation treatment on the second trench. At the same time, a second barrier layer is provided on the surface of the first barrier layer and the surface of the mask layer to define the width of the second trench during the second etching, so that the width of the second trench is smaller than the width of the first trench, providing conditions for etching a notch at the top of the second trench.
[0035] In the method of the present invention, when a notch is obtained by etching the top of the second trench for the third time, the width of the top of the second trench is less than or equal to the width of the first trench with the first barrier layer as the sidewall, preventing the sidewall at the top of the second trench from being located at the bottom of the first oxide layer, which may cause difficulties in epitaxial filling of the second trench. Description of the Drawings
[0036] Figure 1 Schematic diagram of an epitaxial structure obtained by using an existing epitaxial filling process.
[0037] Figure 2 Schematic diagram of forming a first trench by the first etching in the method for improving epitaxial filling through ion implantation according to the present invention.
[0038] Figure 3 Schematic diagram of forming a first barrier layer in the method for improving epitaxial filling through ion implantation according to the present invention.
[0039] Figure 4 Schematic diagram of forming a second barrier layer in the method for improving epitaxial filling by ion implantation according to the present invention.
[0040] Figure 5 Schematic diagram of forming a second trench by the second etching in the method for improving epitaxial filling by ion implantation according to the present invention.
[0041] Figure 6 Schematic diagram of etching the second barrier layer and the third oxide layer in the method for improving epitaxial filling by ion implantation according to the present invention.
[0042] Figure 7 Schematic diagram of forming a sacrificial oxide layer in the method for improving epitaxial filling by ion implantation according to the present invention.
[0043] Figure 8 Schematic diagram of removing the sacrificial oxide layer in the method for improving epitaxial filling by ion implantation according to the present invention.
[0044] Figure 9 Schematic diagram of ion implantation in the method for improving epitaxial filling by ion implantation according to the present invention.
[0045] Figure 10 Schematic diagram of forming a notch at the top of the second trench in the method for improving epitaxial filling by ion implantation according to the present invention.
[0046] Figure 11 Schematic diagram of removing the second nitride layer and the first barrier layer in the method for improving epitaxial filling by ion implantation according to the present invention.
[0047] Figure 12 Schematic diagram of obtaining an epitaxial structure by using the method for improving epitaxial filling by ion implantation according to the present invention.
[0048] In the figure, 1 - semiconductor substrate, 2 - first oxide layer, 3 - second nitride layer, 4 - third oxide layer, 5 - second barrier layer, 6 - sacrificial oxide layer, 1a - notch, 3a - first barrier layer, 101 - first trench, 102 - second trench, 103 - epitaxial material. Detailed implementation manners
[0049] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Apparently, the described embodiments are some but not all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.
[0050] In the description of the present invention, it should be noted that the orientation or positional relationship indicated by the terms "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present invention. In addition, the terms "first", "second", "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.
[0051] In the description of the present invention, it should be noted that unless otherwise clearly specified and defined, the terms "mounted", "connected", "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection; it may be directly connected, or indirectly connected through an intermediate medium, and it may be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0052] In the existing epitaxial filling process, by means of a high-pressure deposition-etching-low-pressure deposition-etching cycle, reaction gas and etching gas are cyclically introduced into the reaction chamber to achieve epitaxial filling of the trenches in the semiconductor substrate; please refer to Figure 1 , for epitaxial filling of the trenches in the semiconductor substrate 1. As the epitaxial filling time continues, since the filling rate at the top of the trench is greater than that at the side and bottom of the trench, it is easier to deposit the epitaxial material 103 at the top of the trench, thereby causing the top of the trench to shrink prematurely, increasing the difficulty of filling the inside of the trench and increasing the production cost.
[0053] To solve the above problems in the existing epitaxial filling process, the present invention provides a method for improving epitaxial filling by ion implantation. By etching a notch 1a at the top of the trench, the problem of premature shrinkage at the top of the trench during the epitaxial filling process can be effectively prevented.
[0054] Step 1, form a mask layer on the surface of the semiconductor substrate 1. The mask layer usually adopts a hard mask layer. Please refer to Figure 2 , define the area of the trench to be formed in the semiconductor substrate 1 by photolithography, and etch the trench area for the first time to form the first trench 101 in the mask layer.
[0055] Specifically, the mask layer has a three-layer structure, including: a first oxide layer 2, a second nitride layer 3, and a third oxide layer 4 that are sequentially formed on the surface of the semiconductor substrate 1. Among them, the first oxide layer 2 covers the surface of the semiconductor substrate 1 to protect the semiconductor substrate 1; the second nitride layer 3 and the third oxide layer 4 are used to optimize the etching process to achieve precise etching. During the first etching process, the mask layer in the trench region is etched through a dry etching process to form a first trench 101; at this time, the bottom of the first trench 101 is the semiconductor substrate 1, and the sidewall is the cross-section of the mask layer.
[0056] Furthermore, the second nitride layer 3 is silicon nitride.
[0057] Step 2: Form a barrier layer on the sidewall of the first trench.
[0058] The barrier layer includes: a first barrier layer 3a and a second barrier layer 5; the first barrier layer 3a is formed on the sidewall of the first trench 101 (i.e., the cross-section of the mask layer), and the second barrier layer 5 is formed on the surface of the mask layer and the surface of the first barrier layer 3a. The process of forming the barrier layer includes the following steps:
[0059] Step 2.1: Form a first barrier layer on the sidewall of the first trench.
[0060] Please refer to Figure 3 , the first barrier layer 3a adheres to the cross-section of the mask layer, reducing the width of the first trench 101 and protecting the sidewall of the first trench 101 to prevent lateral etching of the first trench 101. In a preferred embodiment, the first barrier layer 3a is a nitride layer.
[0061] Step 2.2: Form a second barrier layer on the sidewall of the first trench and the surface of the mask layer.
[0062] Please refer to Figure 4 , the second barrier layer 5 adheres to the first barrier layer 3a on the sidewall of the first trench 101, further reducing the width of the first trench 101; at the same time, the second barrier layer 5 also adheres to the surface of the third oxide layer 4 of the mask layer.
[0063] Specifically, the material of the second barrier layer 5 is different from that of the first barrier layer 3a to prevent the first barrier layer 3a from being removed when etching the second barrier layer 5. In a preferred embodiment, the second barrier layer 5 is an oxide layer.
[0064] Step 3: Secondarily etch the semiconductor substrate at the bottom of the first trench to form a second trench.
[0065] Please refer to Figure 5, the second etching uses the Bosch process. By utilizing the anisotropic etching and isotropic deposition characteristics of this process, an etching gas and a passivation gas are alternately introduced into the reaction chamber to etch the semiconductor substrate 1 at the bottom of the first trench 101, so as to form a second trench 102 in the semiconductor substrate 1 below the first trench 101. Due to the protection of the first barrier layer 3a and the second barrier layer 5, in this step, the semiconductor substrate 1 exposed at the bottom of the first trench 101 at this time will be etched, so that the width of the second trench 102 is the same as the width of the first trench 101 with the second barrier layer 5 on its sidewalls.
[0066] Step 4, etch the third oxide layer and the second barrier layer.
[0067] The second barrier layer 5 and the third oxide layer 4 are completely removed by wet etching. Please refer to Figure 6 , at this time, the sidewall surface of the first trench 101 is the first barrier layer 3a, and the surface of the mask layer is the second nitride layer 3. Since the width of the second trench 102 is the same as the width of the first trench 101 with the second barrier layer 5 on its sidewalls during the second etching process in step 3, the width of the second trench 102 is less than the width of the first trench 101 with the first barrier layer 3a on its sidewalls, and the difference between the width of the second trench 102 and the width of the first trench 101 with the first barrier layer 3a on its sidewalls is twice the thickness of the second barrier layer 5, that is, the width of the semiconductor substrate 1 at the bottom edge of the first trench 101 is the same as the thickness of the second barrier layer 5.
[0068] In the preferred embodiment, to improve the epitaxial filling quality of the second trench 102, after etching the third oxide layer 4 and the second barrier layer 5, the surface of the second trench 102 is smoothed by etching.
[0069] Specifically, a sacrificial oxide layer 6 is formed on the bottom and sidewalls of the second trench 102, and the sacrificial oxide layer 6 is etched.
[0070] Please refer to Figure 7 , the semiconductor substrate 1 at the bottom and sidewalls of the second trench 102 is oxidized by a high-temperature oxidation process to form a sacrificial oxide layer 6 on the surface of the second trench 102. Among them, the high-temperature oxidation process uses a dry oxygen thermal oxidation method at 900 - 1000 °C; and the thickness of the sacrificial oxide layer 6 is less than the thickness of the second barrier layer 5.
[0071] Please refer to Figure 8 , the sacrificial oxide layer 6 on the sidewalls and bottom of the second trench 102 is etched by wet etching to make the surface of the second trench 102 smoother. During wet etching, since the sidewalls of the first trench 101 are protected by the first barrier layer 3a, the sidewalls of the first trench 101 (i.e., the first oxide layer 2) cannot be etched laterally, that is, the width of the first trench 101 remains unchanged at this time.
[0072] Since the thickness of the sacrificial oxide layer 6 is less than that of the second barrier layer 5, the width of the second trench 102 after etching away the sacrificial oxide layer 6 is still less than the width of the first trench 101 with the first barrier layer 3a on its sidewalls, leaving the semiconductor substrate 1 at the bottom edge of the first trench 101.
[0073] Step 5: Perform ion implantation on the sidewalls of the second trench to make the ion doping concentration gradually decrease from the top to the bottom of the sidewalls.
[0074] Please refer to Figure 9 , perform ion implantation on the sidewalls of the second trench 102 to break the covalent bonds (e.g., Si - Si) in the semiconductor substrate 1, thereby increasing the reactive sites of the semiconductor substrate 1 and making the ion - implanted semiconductor substrate 1 more easily etched; and the greater the concentration of ions incorporated in the semiconductor substrate 1, the more easily the semiconductor substrate 1 is etched.
[0075] Specifically, the direction of the ion implantation forms an angle θ with the plane of the semiconductor substrate 1, so that more ions can be implanted into the top sidewalls of the semiconductor substrate 1. Among them, the direction of the ion implantation is symmetrically arranged with respect to the longitudinal center axis of the second trench 102 to ensure that the ion incorporation concentration on the top sidewalls of the semiconductor substrate 1 is consistent.
[0076] At the same time, since the sidewalls of the first trench 101 are the first barrier layer 3a, it prevents damage to the first oxide layer 2 in the mask layer during the ion implantation process.
[0077] Furthermore, to ensure that more ions can be deposited on the top of the second trench 102 during the ion implantation process, the angle θ formed by the direction of the ion implantation and the plane of the semiconductor substrate 1 can be expressed as:
[0078] θ ∈ (Arctan(x), π / 2) ∪ (π / 2, π / 2 + Arctan(x)) (Equation 1)
[0079] In the formula, x is the ratio of the depth of the second trench 102 to its width after etching the second barrier layer 5 in Step 4.
[0080] In one embodiment, the angle θ formed by the direction of the ion implantation and the plane of the semiconductor substrate 1 can be 53° and 127°.
[0081] In one embodiment, the type of ions during the ion implantation process is the same as the type of the epitaxial material, and n - type impurity ions, p - type impurity ions, and intrinsic ions can be selected. This is to prevent the electrical properties of the semiconductor from being affected due to the diffusion of the implanted ions inside the semiconductor substrate 1 when the type of ions used in the ion implantation is different from the type of doped ions in the epitaxial material.
[0082] In another embodiment, the ions used in the ion implantation process are ions generated from inert gases. The inert gases include helium and neon.
[0083] Step 6: Etch the second trench that has undergone ion implantation for the third time, so that a notch 1a is exposed at the top of the second trench.
[0084] Please refer to Figure 10 , and remove the semiconductor substrate 1 on the surface of the second trench 102 that has undergone ion implantation through the third etching. Among them, the third etching is wet etching or dry etching.
[0085] Since the sidewall of the first trench 101 is the first barrier layer 3a, it effectively prevents the lateral etching of the first trench 101 during the third etching; and since the surface of the mask layer is the second nitride layer 3, it can avoid the etching of the first oxide layer 2 in the mask layer.
[0086] Since the semiconductor substrate 1 after ion implantation is more easily etched, and the ion doping concentration on the top sidewall of the second trench 102 is greater, the etching rate of the top sidewall of the second trench 102 is greater than that of other positions in the second trench 102, so that a notch 1a is exposed at the top of the second trench 102. And since the ion doping concentration on the top sidewall of the semiconductor substrate 1 remains consistent, the notch formed at the top of the second trench 102 is symmetrically arranged with respect to the longitudinal center axis of the second trench 102.
[0087] Specifically, after the third etching, the width of the top of the second trench 102 is less than or equal to the width of the first trench 101 whose sidewall is the first barrier layer 3a, preventing the top sidewall of the second trench 102 from being located at the bottom of the first oxide layer 2 after the third etching, which causes difficulty in epitaxial filling. Therefore, the ion doping concentration at the top of the second trench 102 can be controlled by controlling the ion implantation energy, and then the horizontal etching amount of the third etching can be controlled. Among them, the maximum horizontal etching amount X of the third etching can be expressed as:
[0088] X = (a - b) / 2 - c (Equation 2)
[0089] Among them, a is the width of the first trench 101 after the first etching, b is the width of the second trench 102 after etching the second barrier layer 5, and c is the thickness of the first barrier layer 3a.
[0090] Furthermore, according to the angle θ between the direction of ion implantation and the plane of the semiconductor substrate 1, the deepest position where the ions are implanted into the sidewall of the second trench 102 (i.e., the maximum distance between the top of the second trench 102 and the position on the semiconductor substrate 1 where ion implantation occurs) can be calculated, and then the maximum vertical etching amount of the third etching can be controlled. The maximum vertical etching amount Y of the third etching can be expressed as:
[0091] Y = X * tanθ (Equation 3)
[0092] Furthermore, the notch 1a formed by the third etching extends from the top sidewall of the second trench 102 obliquely towards the bottom sidewall of the first trench 101, making the width of the top of the second trench 102 greater than the width of the bottom of the second trench 102, preventing the top of the second trench 102 from being prematurely constricted due to the too-fast filling rate at the top of the second trench 102 during the epitaxial filling process. Under ideal process conditions, the notch 1a can be a stepped notch; however, due to the shape of the notch 1a being restricted by the energy of ion implantation, the ion implantation angle, and the etching process conditions, the notch 1a can also be a notch with a topologically equivalent structure, for example: a linear ramp transition structure or a curved surface transition structure.
[0093] Step 7, remove the second nitride layer and the first barrier layer.
[0094] Please refer to Figure 11 , after completing the third etching, remove the first barrier layer 3a on the sidewall of the first trench 101 and the second nitride layer 3 on the surface of the mask layer. At this time, the sidewall of the first trench 101 is the first oxide layer 2 in the mask layer.
[0095] Step 8, perform epitaxial filling on the second trench.
[0096] Please refer to Figure 12 , use the epitaxial material 103 to perform epitaxial filling on the second trench. At this time, due to the presence of a notch at the top of the second trench, when the filling rate at the top of the second trench is greater than the filling rate at other positions in the second trench, the epitaxial material 103 preferentially fills the notch of the second trench, preventing the top of the second trench from being prematurely constricted, enabling the reaction gas to be deposited inside the second trench, and ensuring the filling quality of the second trench.
[0097] Specifically, during the epitaxial filling of the second trench, a reaction gas and an etching gas need to be introduced into the reaction chamber. Among them, the reaction gas includes but is not limited to silane (SiH4), dichlorosilane (DCS), trichlorosilane (TCS); the etching gas is usually selected as hydrogen chloride (HCl).
[0098] Furthermore, during the epitaxial filling of the second trench, a doping gas also needs to be introduced into the reaction chamber; the doping gas includes but is not limited to phosphine (PH3), diborane (B2H6), arsine (AsH3). At this time, the epitaxial material 103 grown in the second trench can be phosphorus silicon and its inorganic compounds, boron silicon and its inorganic compounds, or arsenic silicon and its inorganic compounds, etc.
[0099] The present invention also provides an epitaxial structure obtained by using the above method for improving epitaxial filling through ion implantation. Please refer to Figure 12. The epitaxial structure includes: a first trench formed by a first etching and a second trench formed by a second etching on a semiconductor substrate 1 covered with a mask layer. An ion doping region is provided at the top of the second trench, and a notch is formed in the ion doping region by a third etching. The first trench and the second trench are filled with an epitaxial material 103. Since the notch at the top of the second trench during the epitaxial filling process avoids premature constriction at the top of the second trench, the epitaxial filling quality of the trench is improved.
[0100] In summary, the present invention provides a method for improving epitaxial filling by ion implantation. By etching to expose a notch at the top of the second trench, it effectively prevents the problem of premature constriction at the top of the second trench due to too fast filling rate during the epitaxial filling process. At the same time, the present invention also provides an epitaxial structure. The epitaxial structure obtained by using the above method for improving epitaxial filling by ion implantation has good epitaxial filling quality.
[0101] Although the content of the present invention has been described in detail through the above preferred embodiments, it should be recognized that the above description should not be considered as a limitation of the present invention. After those skilled in the art have read the above content, various modifications and substitutions to the present invention will be obvious. Therefore, the protection scope of the present invention should be defined by the appended claims.
Claims
1. A method for improving epitaxial filling by ion implantation, characterized in that include: providing a semiconductor substrate covered with a mask layer; Etching the groove region for the first time to form a first groove in the mask layer; forming a barrier layer on the sidewall of the first trench; etching the semiconductor substrate at the bottom of the first trench for a second time to form a second trench; Performing ion implantation on the sidewall of the second trench so that the ion doping concentration gradually decreases from the top to the bottom of the sidewall; The second trench implanted with ions is etched for the third time, so that a notch is exposed at the top of the second trench.
2. The method for improving epitaxial filling by ion implantation according to claim 1, characterized in that: The width of the second trench is smaller than the width of the first trench.
3. The method for improving epitaxial filling by ion implantation according to claim 1, characterized in that: The barrier layer includes: a first barrier layer and a second barrier layer; the first barrier layer is formed on the sidewall of the first trench; and the second barrier layer is formed on the surface of the mask layer and the surface of the first barrier layer.
4. The method for improving epitaxial filling by ion implantation according to claim 3, characterized in that: The mask layer comprises: a first oxide layer, a second nitride layer, and a third oxide layer sequentially covering the surface of the semiconductor substrate; After the second etching and before the ion implantation on the sidewall of the second trench, the third oxide layer and the second barrier layer are wet-etched.
5. The method for improving epitaxial filling by ion implantation according to claim 4, characterized in that: Also includes: After wet etching and before ion implantation on the sidewall of the second trench, high temperature oxidation is performed on the surface of the second trench to form a sacrificial oxide layer; The sacrificial oxide layer is then removed by etching.
6. The method for improving epitaxial filling by ion implantation according to claim 5, characterized in that: The thickness of the sacrificial oxide layer is smaller than the thickness of the second barrier layer.
7. The method for improving epitaxial filling by ion implantation according to claim 1, characterized in that: The direction of the ion implantation is symmetrically arranged with respect to the longitudinal center axis of the second trench, and the notch formed at the top of the second trench is symmetrically arranged with respect to the longitudinal center axis of the second trench.
8. The method for improving epitaxial filling by ion implantation according to claim 7, characterized in that: The direction of the ion implantation forms an angle θ with the plane of the semiconductor substrate; θ∈(Arctan(x),π / 2)∪(π / 2,π / 2+Arctan(x)) Wherein, x is the ratio of the depth of the second trench to its width after etching the second barrier layer.
9. The method for improving epitaxial filling by ion implantation according to claim 1, characterized in that: The type of ions in the ion implantation process is the same as the type of epitaxial material.
10. The method for improving epitaxial filling by ion implantation according to claim 1, characterized in that: The ions used in the ion implantation process are ions generated from an inert gas.
11. The method for improving epitaxial filling by ion implantation according to claim 8, characterized in that: The maximum horizontal etching amount X of the third etching is: X=(ab) / 2-c Wherein, a is the width of the first trench after the first etching, b is the width of the second trench after etching the second barrier layer, and c is the thickness of the first barrier layer.
12. The method for improving epitaxial filling by ion implantation according to claim 11, characterized in that: The maximum vertical etching amount Y of the third etching is X*tanθ.
13. The method for improving epitaxial filling by ion implantation according to claim 3, characterized in that: The first barrier layer is a nitride layer.
14. The method for improving epitaxial filling by ion implantation according to claim 4, characterized in that: Also includes: removing the second nitride layer and the first barrier layer; The second trench is epitaxially filled.
15. An epitaxial structure on a semiconductor substrate, characterized in that: The method for improving epitaxial filling by ion implantation as described in any one of claims 1 to 14 is used, comprising: forming a first groove and a second groove by a first etching and a second etching, an ion doping region is provided at the top of the second groove, a notch is formed in the ion doping region by a third etching, and the first groove and the second groove are filled with epitaxial material.