Display substrate and display panel

Abstract

The invention relates to a display substrate and a display panel. The display substrate comprises a pixel limiting layer which at least partially covers a first electrode and is provided with a plurality of pixel openings and at least one containing opening, the pixel openings expose at least part of the first electrode, the containing opening is located between every two adjacent pixel openings, and the material of the pixel limiting layer comprises a shading material. The isolation structure is located between the layer where the light-emitting function layer is located and the driving circuit layer, the orthographic projection of the isolation structure on the substrate and the orthographic projection of the containing opening on the substrate are at least partially overlapped, and the isolation structure separates at least part of the light-emitting function layer. And the at least one packaging layer is positioned on one side, far away from the substrate, of the light-emitting device. The shading layer is located between the packaging layer farthest from the substrate and the driving circuit layer, and the orthographic projection of the shading layer on the substrate covers the orthographic projection of the accommodating opening on the substrate and is not overlapped with the orthographic projection of the pixel opening on the substrate.

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies, and particularly to a display substrate and a display panel. Background Art

[0002] Organic Light-Emitting Diodes (OLEDs) have the advantages of simple manufacturing process, low cost, high luminous efficiency, easy formation of flexible structures, low power consumption, high color saturation, and wide viewing angles. Display technologies using organic light-emitting diodes have become an important display technology and are currently widely used in display products in various fields. Summary of the Invention

[0003] The present disclosure aims to solve at least one of the technical problems existing in the prior art, and provides a display substrate and a display panel.

[0004] To achieve the above object, the present disclosure provides a display substrate, comprising:

[0005] a substrate;

[0006] a driving circuit layer located on one side of the substrate, the driving circuit layer including a plurality of thin film transistors;

[0007] a plurality of light-emitting devices located on the side of the thin film transistors away from the substrate, the light-emitting devices being electrically connected to the thin film transistors and including a first electrode and multiple light-emitting functional layers stacked in sequence along a direction away from the substrate;

[0008] a pixel defining layer at least partially covering the first electrode and having a plurality of pixel openings and at least one accommodation opening, at least part of the first electrode being exposed through the pixel openings, at least part of the light-emitting functional layers being located within the pixel openings, the accommodation opening being located between two adjacent pixel openings, and the material of the pixel defining layer including a light-shielding material;

[0009] an isolation structure located between the layer where the light-emitting functional layers are located and the driving circuit layer, a positive projection of the isolation structure on the substrate at least partially overlapping a positive projection of the accommodation opening on the substrate, the isolation structure disconnecting at least part of the light-emitting functional layers;

[0010] at least one encapsulation layer located on the side of the light-emitting devices away from the substrate;

[0011] a light-shielding layer located between the encapsulation layer farthest from the substrate and the driving circuit layer, a positive projection of the light-shielding layer on the substrate covering a positive projection of the accommodation opening on the substrate and having no overlap with a positive projection of the pixel opening on the substrate.

[0012] In some embodiments, the isolation structure includes an isolation layer located between the layer where the first electrode is located and the driving circuit layer;

[0013] The light-shielding layer is located between the isolation layer and the driving circuit layer;

[0014] The isolation structure further includes an isolation groove formed in the light-shielding layer. The isolation layer includes a first portion, at least a part of the first portion is located between the pixel defining layer and the light-shielding layer, and the orthographic projection of the first portion on the substrate does not overlap with the orthographic projection of the pixel opening on the substrate. The first portion is provided with a first opening respectively communicating with the accommodation opening and the isolation groove. The orthographic projection of the isolation groove on the substrate includes a first projection area and at least one second projection area. The orthographic projection of the first portion on the substrate covers the second projection area and does not overlap with the first projection area.

[0015] In some embodiments, the isolation layer further includes a second portion connected to the first portion, and the second portion is located between the first electrode and the driving circuit layer.

[0016] In some embodiments, the isolation structure includes an isolation column, at least a part of the isolation column is located in the accommodation opening, and the isolation column includes a first surface away from the substrate and a second surface facing the substrate. The orthographic projection of the first surface on the substrate covers and exceeds the orthographic projection of the second surface on the substrate;

[0017] The light-shielding layer is located between the layer where the first electrode is located and the driving circuit layer, and the isolation column is located between the layer where the first electrode is located and the layer where the light-emitting functional layer is located.

[0018] In some embodiments, at least a part of the light-shielding layer is exposed by the accommodation opening, and the isolation column is in contact with the light-shielding layer.

[0019] In some embodiments, the display substrate further includes an insulating layer located between the layer where the first electrode is located and the driving circuit layer;

[0020] The light-shielding layer is located between the layer where the insulating layer is located and the driving circuit layer;

[0021] The insulating layer includes a third portion, at least a part of the third portion is located between the pixel defining layer and the light-shielding layer, and the orthographic projection of the third portion on the substrate does not overlap with the orthographic projection of the pixel opening on the substrate;

[0022] Wherein, the isolation posts are located on the side of the layer where the third part is located away from the substrate.

[0023] In some embodiments, the accommodation opening exposes at least part of the third part, and the isolation posts are arranged in contact with the third part.

[0024] In some embodiments, the third part is provided with a second opening communicating with the accommodation opening, the second opening exposes at least part of the light-shielding layer, and the isolation posts are arranged in contact with the light-shielding layer.

[0025] In some embodiments, the insulating layer further includes a fourth part connected to the third part, and the fourth part is located between the first electrode and the driving circuit layer.

[0026] In some embodiments, the driving circuit layer further includes a planarization layer on the side of the thin-film transistor away from the substrate;

[0027] The isolation structure includes an isolation layer, and the isolation layer is located between the planarization layer and the layer where the first electrode is located;

[0028] The isolation structure further includes an isolation groove formed in the planarization layer. The isolation layer includes a first part located between the pixel defining layer and the light-shielding layer and having no overlap with the orthographic projection of the pixel opening on the substrate. The first part is provided with a first opening respectively communicating with the accommodation opening and the isolation groove. The orthographic projection of the isolation groove on the substrate includes a first projection area and at least one second projection area. The orthographic projection of the first part on the substrate covers the second projection area and has no overlap with the first projection area;

[0029] The light-shielding layer is located on the side of the light-emitting device away from the substrate.

[0030] In some embodiments, the encapsulation layer is multi-layered, and the light-shielding layer is located between two adjacent encapsulation layers.

[0031] In some embodiments, the light-shielding layer is located between two adjacent encapsulation layers closest to the substrate.

[0032] In some embodiments, the light-emitting device further includes a second electrode located between the light-emitting functional layer and the encapsulation layer, and the light-shielding layer is located between the layer where the second electrode is located and the encapsulation layer.

[0033] In some embodiments, the material of the light-shielding layer includes a conductive material, and the light-shielding layer is electrically connected to the second electrodes of two adjacent light-emitting devices respectively.

[0034] In some embodiments, the orthographic projection of the light-shielding layer on the substrate covers and extends beyond the orthographic projection of the accommodation opening on the substrate.

[0035] The present disclosure also provides a display panel, including the display substrate according to any one of the above. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following detailed description, they are used to explain the present disclosure, but do not constitute a limitation to the present disclosure. In the drawings:

[0037] Figure 1 is a schematic cross-sectional structure diagram of a display substrate in some embodiments of the present disclosure;

[0038] Figure 2 is a schematic cross-sectional structure diagram of a display substrate in some other embodiments of the present disclosure;

[0039] Figure 3 is a schematic cross-sectional structure diagram of a display substrate in some other embodiments of the present disclosure;

[0040] Figure 4 is a schematic cross-sectional structure diagram of a display substrate in some other embodiments of the present disclosure;

[0041] Figure 5 is a schematic cross-sectional structure diagram of a display substrate in some other embodiments of the present disclosure;

[0042] Figure 6 is a schematic cross-sectional structure diagram of a display substrate in some other embodiments of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0043] The following detailed description of the present disclosure is made with reference to the accompanying drawings. It should be understood that the detailed description herein is only for the purpose of illustration and explanation of the present disclosure, and is not used to limit the present disclosure.

[0044] To make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments obtained by those of ordinary skill in the art based on the described embodiments of the present disclosure without creative efforts shall fall within the scope of protection of the present disclosure.

[0045] Unless otherwise defined, technical terms or scientific terms used in the embodiments of the present disclosure shall have the ordinary meanings understood by those of ordinary skill in the art to which the present disclosure pertains. The "first", "second" and similar terms used in the present disclosure do not denote any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "comprising" or "including" mean that the elements or items appearing before the word cover the elements or items listed after the word and their equivalents, without excluding other elements or items. The terms "connected" or "coupled" and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The terms "upper", "lower", "left", "right", etc. are only used to indicate relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0046] As used herein, "parallel" and "perpendicular" include the stated situations and situations similar to the stated situations, and the range of the similar situations is within an acceptable deviation range, where the acceptable deviation range is determined by those of ordinary skill in the art considering the measurements being discussed and the errors associated with the measurements of specific quantities (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, where the acceptable deviation range for approximate parallelism may be, for example, within 5° deviation; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, where the acceptable deviation range for approximate perpendicularity may also be, for example, within 5° deviation.

[0047] It should be understood that when a layer or element is referred to as being on another layer or substrate, it may be that the layer or element is directly on the other layer or substrate, or there may be an intermediate layer between the layer or element and the other layer or substrate.

[0048] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and regions is exaggerated for clarity. Thus, variations in the shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances can be envisioned. Accordingly, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but include shape deviations caused, for example, by manufacturing. Thus, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shape of the regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0049] In the related art, an OLED display panel generally includes a substrate, a driving circuit layer on one side of the substrate, and a light-emitting device layer on the side of the driving circuit layer away from the substrate. Among them, the driving circuit layer includes a plurality of pixel driving circuits, the light-emitting device layer includes a plurality of light-emitting devices, the pixel driving circuits are electrically connected to the light-emitting devices, and the pixel driving circuits can provide driving signals for the light-emitting devices to make the light-emitting devices emit light.

[0050] A pixel driving circuit generally includes a plurality of transistors and at least one storage capacitor. For example, the plurality of transistors may include a reset transistor, a driving transistor, a compensation transistor, a light-emitting control transistor, etc. Among these transistors, some of the transistors may be low-temperature polycrystalline silicon thin-film transistors, and the other part may be oxide thin-film transistors. Further optionally, the active layer of the low-temperature polycrystalline silicon thin-film transistor uses low-temperature poly-silicon (abbreviated as LTPS), and the active layer of the oxide thin-film transistor uses an oxide semiconductor (Oxide). The low-temperature polycrystalline silicon thin-film transistor has advantages such as high mobility and fast charging, and the oxide thin-film transistor has advantages such as low leakage current. Integrating the low-temperature polycrystalline silicon thin-film transistor and the oxide thin-film transistor on a pixel circuit to form a low-temperature polycrystalline oxide (abbreviated as LTPO) display panel can switch the refresh frequency of the display panel to achieve low-frequency driving, which is beneficial to reducing power consumption and improving display quality. Even in some products, all the thin-film transistors use oxide thin-film transistors.

[0051] The aforementioned thin-film transistors are highly sensitive to light. For example, when light in the environment or light emitted by the light-emitting device enters the area where the thin-film transistor is located, it will affect the driving performance of the thin-film transistor for the light-emitting interval. Therefore, a light-shielding layer needs to be set in the area where the thin-film transistor is located to block light from entering the area where the thin-film transistor is located, so as to prevent the thin-film transistor from being interfered by light and affecting the display effect of the display panel.

[0052] A light-emitting device generally includes a first electrode, a light-emitting functional layer, and a second electrode that are sequentially stacked in a direction away from the substrate. Among them, the first electrode can be electrically connected to the thin-film transistor. And the first electrode can be an anode, for example, and the second electrode can be a cathode, for example.

[0053] The light-emitting functional layer includes at least one light-emitting material layer and charge transport material layers on opposite sides of the light-emitting material layer in its thickness direction. The charge transport material layer can be a hole transport layer, an electron transport layer, a hole blocking layer, an electron blocking layer, etc., for example.

[0054] The light emitted by multiple light-emitting devices can have multiple colors. The turn-on voltages of light-emitting devices of different colors are different. For example, the turn-on voltage of a light-emitting device that emits blue light is greater than that of a light-emitting device that emits green light, and is also greater than that of a light-emitting device that emits red light.

[0055] After the light-emitting device with a relatively large turn-on voltage is turned on, charges may flow laterally through the transport material layer into the light-emitting material layer that emits other colors of light, thereby causing other light-emitting devices to be turned on, resulting in problems such as color crosstalk. For example, when the light-emitting device that emits blue light is turned on, charges will flow laterally through the transport material layer into the light-emitting device that emits red light, thereby causing the light-emitting device that emits red light to be turned on, resulting in color crosstalk.

[0056] Moreover, with the development of OLED technology, tandem (stacked series) light-emitting devices have gradually attracted much attention and are increasingly used in display panels. A tandem light-emitting device refers to a high-efficiency light-emitting device formed by stacking multiple light-emitting material layers in series through a connection layer. Since the number of film layers in a tandem device increases and the tightness of stacking between each film layer increases, the color crosstalk problem in tandem light-emitting devices is more serious. Even in some tandem light-emitting devices, the light-emitting material layers of two adjacent light-emitting devices are connected as a whole or there is an overlap. After one light-emitting device with a relatively large turn-on voltage is turned on, the other light-emitting device is directly turned on.

[0057] In order to solve at least one of the above-mentioned technical problems, the present disclosure proposes a display substrate and a display device.

[0058] Figure 1 It is a schematic cross-sectional structure diagram of a display substrate in some embodiments of the present disclosure.

[0059] As Figure 1 shown, in some embodiments, a display substrate of the present disclosure includes a substrate 10 and a driving circuit layer 20, a light-emitting device 50 layer, and at least one encapsulation layer 80 that are sequentially stacked on one side of the substrate 10 along a direction away from the substrate 10. That is, the light-emitting device 50 layer is located on the side of the driving circuit layer 20 away from the substrate 10, and the encapsulation layer 80 is located on the side of the light-emitting device 50 layer away from the substrate 10. When the encapsulation layer 80 is multiple layers, the multiple encapsulation layers 80 are sequentially stacked along the direction away from the substrate 10.

[0060] The light-emitting device 50 layer includes multiple light-emitting devices 50. And the light-emitting device 50 includes a first electrode 51, a multiple-layer light-emitting functional layer 52, and a second electrode 53 that are sequentially stacked along the direction away from the substrate 10. (The light-emitting functional layer 52 and the second electrode 53 are not shown in Figure 1 this figure)

[0061] The display substrate further includes a pixel defining layer 60, an isolation structure a, and a light-shielding layer 30.

[0062] Among them, the pixel defining layer 60 is located on the side of the layer where the first electrode 51 is located away from the substrate 10. At least part of the pixel defining layer 60 covers the first electrode 51, and the pixel defining layer 60 is provided with a plurality of pixel openings and at least one accommodation opening. At least part of the first electrode 51 is exposed through the pixel openings, at least part of the light-emitting functional layer 52 is located within the pixel openings, the accommodation openings are located between two adjacent pixel openings, and the material of the pixel defining layer 60 includes a light-shielding material.

[0063] The isolation structure a is located between the layer where the light-emitting functional layer 52 is located and the driving circuit layer 20. The orthographic projection of the isolation structure a on the substrate 10 overlaps at least partially with the orthographic projection of the accommodation opening on the substrate 10. For example, the orthographic projection of the isolation structure a on the substrate 10 is located within the orthographic projection range of the accommodation opening on the substrate 10. Specifically, at least part of the isolation structure a can be located within the accommodation opening, or at least part of the isolation structure a is exposed through the accommodation opening. The isolation structure a disconnects at least part of the light-emitting functional layer 52. It can be understood that the light-emitting functional layer 52 is multilayered. Therefore, the isolation structure a disconnects at least part of the multilayer light-emitting functional layer 52. For example, in one example, the isolation structure a can disconnect all of the multilayer light-emitting functional layer 52.

[0064] Furthermore, for the same layer of the light-emitting functional layer 52, the isolation structure a disconnects at least the part of the light-emitting functional layer 52 located between two adjacent light-emitting devices 50.

[0065] For example, in one example, the isolation structure a can surround the light-emitting device 50 in a circle. In this case, those skilled in the art can understand that the isolation structure a disconnects all of the light-emitting functional layer 52 in the circumferential direction around the light-emitting device 50.

[0066] The isolation structure a in the embodiment of the present disclosure can disconnect all of the light-emitting functional layer 52 surrounding the light-emitting device 50. Therefore, to a great extent, it can alleviate or directly avoid the problem that the light-emitting device 50 with a larger turn-on voltage being lit causes the light-emitting device 50 with a smaller turn-on voltage to be lit.

[0067] Again, for example, in one example, the isolation structure a only disconnects the part of the light-emitting functional layer 52 located between two adjacent light-emitting devices 50. Specifically, the position where the light-emitting functional layer 52 is disconnected is located at the midpoint of the center connection line between two adjacent light-emitting devices 50 and its vicinity.

[0068] Specifically, there may be multiple isolation structures a, and at least one isolation structure a is provided between every two adjacent light-emitting devices 50 (or between every two adjacent pixel openings).

[0069] For example, in one example, one isolation structure a is provided between every two adjacent light-emitting devices 50, and the isolation structure a disconnects that part of the light-emitting functional layer 52 located between two adjacent pixel openings. Alternatively, multiple isolation structures a are arranged at intervals and surround the pixel opening, and the multiple isolation structures a disconnect part of the light-emitting functional layer 52.

[0070] Obviously, in the above example, a part of the same layer of the light-emitting functional layer 52 can be disconnected by the isolation structure a, and a part is not disconnected by the isolation structure a.

[0071] In the embodiments of the present disclosure, the isolation structure a disconnects at least part of the light-emitting functional layer 52 located between two adjacent light-emitting devices 50, which can, to a certain extent, alleviate the problem that the light-emitting device 50 with a relatively large turn-on voltage being lit causes the light-emitting device 50 with a relatively small turn-on voltage to be lit.

[0072] Specifically, when the disconnected position of the light-emitting functional layer 52 is only located at the midpoint of the center line connecting the centers of two adjacent light-emitting devices 50 and its nearby positions, when charges flow from the lit light-emitting device 50 to the unlit light-emitting device 50, the length of the non-disconnected light-emitting functional layer 52 to be passed through is relatively long and the resistance is relatively large. Therefore, in the case of a relatively large resistance, after the light-emitting device 50 with a relatively large turn-on voltage is lit, the adjacent light-emitting device 50 with a relatively small turn-on voltage may not be lit.

[0073] Therefore, the embodiments of the present disclosure can also avoid the problem that the light-emitting device 50 with a relatively large turn-on voltage being lit causes the light-emitting device 50 with a relatively small turn-on voltage to be lit.

[0074] The light-shielding layer 30 is located between the encapsulation layer 80 farthest from the substrate 10 and the driving circuit layer 20, and the orthographic projection of the light-shielding layer 30 on the substrate 10 covers the orthographic projection of the accommodation opening on the substrate 10, and the orthographic projection of the light-shielding layer 30 on the substrate 10 does not overlap with the orthographic projection of the pixel opening on the substrate 10.

[0075] Based on the partitioning effect of the aforementioned isolation structure a, an additional light-shielding layer 30 is added in the present disclosure embodiment between the farthest positions from the substrate 10 and the driving circuit layer 20 to shield the accommodating opening, thereby preventing light in the environment or light emitted by the light-emitting device 50 from entering the relevant film layers of the thin-film transistor, further preventing the driving of the light-emitting device 50 from being affected by the light on the thin-film transistor, and ultimately preventing the display effect of the display substrate from being affected. Of course, it can be understood that the light-shielding layer 30 of the present invention cannot cover the pixel opening, so as to avoid blocking the light to be emitted by the light-emitting device 50.

[0076] Optionally, as Figure 1 shown, the maximum thickness H1 of the pixel defining layer 60 is 1 μm to 3 μm, and further can be 1.5 μm to 2.5 μm.

[0077] Optionally, as Figure 1 shown, the maximum thickness H2 of the light-shielding layer 30 is 1 μm to 3 μm, and further can be 1.5 μm to 2.5 μm, for example, it can be 1.3 μm. To ensure the light-shielding effect of the light-shielding layer 30, the minimum thickness of the light-shielding layer 30 is not less than 0.8 μm, for example, it can be 1 μm.

[0078] Optionally, the materials of both the light-shielding layer 30 and the pixel defining layer 60 can include organic materials, for example, both can be polyimide (PI).

[0079] In some embodiments, as Figure 1 shown, the isolation structure a includes an isolation layer 40 located between the layer where the first electrode 51 is located and the driving circuit layer 20. The light-shielding layer 30 is located between the isolation layer 40 and the driving circuit layer 20.

[0080] As Figure 1 shown, the isolation structure a further includes an isolation groove formed in the light-shielding layer 30.

[0081] Optionally, the groove depth of the isolation groove can be 0.8 μm to 1.5 μm, for example, it can be 1 μm. The setting of the groove depth of the isolation groove can ensure the isolation effect of the isolation groove.

[0082] The isolation layer 40 includes a first portion 41, at least a part of the first portion 41 is located between the pixel defining layer 60 and the light-shielding layer 30, and the orthographic projection of the first portion 41 on the substrate 10 has no overlap with the orthographic projection of the pixel opening on the substrate 10. And the first portion 41 is provided with a first opening respectively communicating with the accommodating opening and the isolation groove.

[0083] As Figure 1As shown, the orthographic projection of the isolation groove on the substrate 10 includes a first projection area b and at least one second projection area c. The orthographic projection of the first part 41 on the substrate 10 covers the second projection area c and has no overlap with the first projection area b. It can be understood that the minimum distance from the groove wall of the isolation groove to the adjacent light-emitting device 50 is less than the minimum distance from the side wall of the first opening to the adjacent light-emitting device 50, that is, the isolation layer 40 and the isolation groove can achieve the function of separating the light-emitting functional layer 52.

[0084] Furthermore, as Figure 1 shown, the maximum distance d1 between the groove wall of the isolation groove and the central axis L of the isolation groove is greater than the maximum distance d2 between the side wall of the first opening and the central axis L of the isolation groove, thereby further improving the separation effect of the isolation structure 30.

[0085] Optionally, the width of the first opening in the arrangement direction of two adjacent light-emitting devices 50 is 2 μm to 8 μm, further it can be 3 μm to 6 μm, for example, it can be 5 μm. As Figure 1 shown, the width of the first opening in the arrangement direction of two adjacent light-emitting devices 50 is d2*2.

[0086] In the embodiments of the present disclosure, the first opening exposes the isolation groove. Therefore, the setting of the first opening is beneficial to form an isolation groove at the isolation layer 40, thereby ensuring the isolation effect of the isolation groove.

[0087] In some other embodiments, when only part of the light-emitting functional layer 52 between two adjacent light-emitting devices 50 needs to be separated, only the side wall of the isolation structure a facing the light-emitting device 50 can be designed.

[0088] Specifically, for example, as Figure 1 shown, in the arrangement direction of two adjacent light-emitting devices 50, the first opening has opposite side walls. Among them, the isolation groove has two opposite groove walls, and the maximum distance d1 from the groove wall to the central axis L of the isolation groove is greater than the distance d2 from the side wall to the central axis L of the isolation groove.

[0089] In a specific embodiment, along the direction away from the substrate 10, the distance from the first groove wall to the center of gravity axis of the isolation groove first gradually increases and then gradually decreases.

[0090] The isolation layer 40 and the isolation groove in the embodiments of the present disclosure can form an undercut structure. Therefore, the embodiments of the present disclosure can separate the light-emitting functional layer 52 between two adjacent light-emitting devices 50 through the isolation layer 40 and the isolation groove. In addition, it can be known that the redundant functional layer to be separated is located in the isolation groove.

[0091] In the embodiments of the present disclosure, the light-shielding layer 30 and the isolation structure a are both located on the side of the first electrode 51 close to the substrate 10, that is, both the light-shielding layer 30 and the isolation structure a need to be formed before the step of preparing the first electrode 51. Therefore, further, the isolation structure a further includes an isolation groove formed in the light-shielding layer 30, that is, the light-shielding layer 30 can be reused as a part of the isolation structure a, that is, it is equivalent to arranging a part of the light-shielding layer 30 and the isolation structure a on the same layer. It can be understood that during the formation of the isolation structure a, the light-shielding layer 30 can be formed together, that is, the light-shielding layer 30 can be formed simultaneously with the isolation structure a. Therefore, the embodiments of the present disclosure can simplify the manufacturing process and reduce the process difficulty.

[0092] In addition, it should be noted that in the embodiments of the present disclosure, since the isolation structure a is formed before the step of preparing the first electrode 51, the isolation structure a may also have a blocking effect on the first electrode 51.

[0093] If the isolation structure a surrounds the light-emitting device 50 for one week, the isolation structure a may also disconnect the first electrode 51 in the circumferential direction. In this case, in the embodiments of the present disclosure, it may not be possible to provide an auxiliary conductive wire electrically connected to the first electrode 51 in the layer where the first electrode 51 is located to realize electrical connection with the thin-film transistor in the lower film layer. Therefore, the embodiments of the present disclosure are more suitable for a display substrate that does not require laying an auxiliary conductive wire in the layer where the first electrode 51 is located. For example, the first electrode 51 can be directly electrically connected to the thin-film transistor through a via hole. Specifically, in one example, there is a planarization layer 21 between the first electrode 51 and the thin-film transistor, and the first electrode 51 is directly electrically connected to the thin-film transistor through a via hole penetrating the planarization layer 21, and no other auxiliary conductive wire is required to realize the electrical connection between the first electrode 51 and the thin-film transistor.

[0094] If the positive projection of the isolation structure a on the substrate 10 only covers a part of the region between two adjacent light-emitting devices 50 on the substrate 10, that is, in the embodiment where the isolation structure a disconnects a part of the light-emitting functional layer 52 located between two adjacent light-emitting devices 50 as mentioned above. In this case, only a part of the first electrode 51 is disconnected by the isolation structure a. Therefore, an auxiliary conductive wire can be provided in the region not disconnected by the isolation structure a to realize electrical connection with the thin-film transistor in the lower film layer.

[0095] In some embodiments, as Figure 1 shown, the isolation layer 40 further includes a second part 42 connected to the first part 41, and the second part 42 is located between the first electrode 51 and the driving circuit layer 20.

[0096] Specifically, for example, the driving circuit layer 20 includes a planarization layer 21 on the side of the thin film transistor away from the substrate 10, and the second portion 42 is located between the first electrode 51 and the planarization layer 21. Obviously, the orthographic projection of the second portion 42 on the substrate 10 overlaps.

[0097] In the embodiment of the present disclosure, since the isolation layer 40 needs to form an undercut structure, the hardness of the isolation layer 40 is relatively high. Therefore, placing the second portion 42 of the isolation layer 40 between the first electrode 51 and the driving circuit layer 20 can further isolate the driving circuit layer 20 from the light emitting device 50, and prevent the relative displacement between the planarization layer 21 and the light emitting device 50 due to impacts or other reasons, which may have an adverse effect on the display effect.

[0098] In addition, the present disclosure also provides Figure 1 a method for manufacturing the display substrate shown in the figure, and the steps of the manufacturing method include:

[0099] Step S1: Form a planarization layer 21 on one side of the substrate 10. Specifically, for example, form a thin film transistor and a planarization layer 21 on the side of the thin film transistor away from the substrate 10 on one side of the substrate 10.

[0100] Step S2: Form a patterned light-shielding material layer on the planarization layer 21, and the light-shielding material layer is located between the first electrodes 51 of two adjacent light emitting devices 50.

[0101] Step S3: Then sequentially fabricate a patterned isolation material layer, a first electrode 51, and a patterned pixel defining layer 60. The patterned isolation material layer is the isolation layer 40. And in this step, the light-shielding material layer also forms a light-shielding layer 30 with isolation grooves during the patterning of the inorganic material layer. That is, during the patterning of the isolation material layer, the isolation layer 40 forms an undercut structure.

[0102] Optionally, the material of the isolation material layer, that is, the material of the isolation layer 40, can be selected as an inorganic material, for example, specifically SiNx.

[0103] Furthermore, the minimum thickness of the light-shielding layer 30 should be maintained at a certain thickness to ensure the light-shielding effect and prevent light leakage. Specifically, the minimum thickness of the light-shielding layer 30 can be controlled by adjusting the film thickness of the inorganic material layer SiNx, the etching time, and the original thickness of the light-shielding material layer. For example, the minimum thickness of the light-shielding layer 30 is not less than 50 nm. Further, the thickness of the light-shielding layer 30 can be 50 nm to 250 μm.

[0104] During the subsequent formation of the pixel defining layer 60 in step S3, after the development and removal of the pixel defining layer 60, the undercut structure formed by the isolation layer 40 still exists.

[0105] Figure 2 It is a schematic cross-sectional structure diagram of a display substrate in some other embodiments of the present disclosure. Figure 3 It is a schematic cross-sectional structure diagram of a display substrate in some other embodiments of the present disclosure. Figure 4 It is a schematic cross-sectional structure diagram of a display substrate in some other embodiments of the present disclosure.

[0106] Such as Figure 2 、 Figure 3 and Figure 4 As shown, in some other embodiments, the isolation structure a includes isolation posts 70. At least a part of the isolation posts 70 is located in the accommodation openings, and the isolation posts 70 include a first surface away from the substrate 10 and a second surface facing the substrate 10. The orthographic projection of the first surface on the substrate 10 covers and exceeds the orthographic projection of the second surface on the substrate 10.

[0107] Optionally, the dimension d3 of the surface of the isolation post 70 away from the substrate 10 in the arrangement direction of two adjacent light-emitting devices 50 may be 5 μm to 15 μm, and further may be 8 μm to 10 μm. The dimension d4 of the surface of the isolation post 70 close to the substrate 10 in the arrangement direction of two adjacent light-emitting devices 50 may be 3 μm to 12 μm, and further may be 4 μm to 8 μm. In the embodiments of the present disclosure, the isolation posts 70 are made to achieve a partitioning effect by setting the dimensions of d3 and d4.

[0108] Optionally, the thickness H3 of the isolation post 70 may be 1 μm to 3 μm, for example, it may be 2 μm.

[0109] Further, in the direction away from the substrate 10, the area of the cross-section of the isolation post 70 perpendicular to the thickness direction of the display substrate becomes larger. For example, the overall longitudinal section of the isolation post 70 presents an "inverted trapezoid".

[0110] The embodiments of the present disclosure can achieve the partitioning effect on the light-emitting functional layer 52 through the "inverted trapezoid" isolation posts 70.

[0111] In some other embodiments, when only part of the light-emitting functional layer 52 between two adjacent light-emitting devices 50 needs to be partitioned, only the side walls of the isolation structure a facing the light-emitting devices 50 need to be designed. For example, in the arrangement direction of two adjacent light-emitting devices 50, the isolation post 70 includes two relatively arranged side walls, and in the direction away from the substrate 10, the distances from the side walls to the central axis of the isolation post 70 both gradually increase.

[0112] In addition, in the embodiments of the present disclosure, the light-shielding layer 30 is located between the layer where the first electrode 51 is located and the driving circuit layer 20, while the pixel defining layer 60 is located on the side of the layer where the first electrode 51 is located away from the substrate 10. That is, in the embodiments of the present disclosure, there are fewer film layers between the light-shielding layer 30 and the pixel defining layer 60, which can also be understood as the light-shielding layer 30 and the pixel defining layer 60 are relatively close.

[0113] Both the light-shielding layer 30 and the pixel defining layer 60 have a light-shielding function. Therefore, the light-shielding layer 30 and the pixel defining layer 60 can preferably block the vertically incident light. Further, since the light-shielding layer 30 and the pixel defining layer 60 are relatively close, the area between the light-shielding layer 30 and the pixel defining layer 60 that the obliquely incident light can pass through is very small. Therefore, the embodiments of the present disclosure can preferably avoid the obliquely incident light leaking from the film layer gap between the light-shielding layer 30 and the pixel defining layer 60. It should be noted that in the embodiments of the present disclosure, the vertically incident light refers to the incident direction of the light being parallel to the thickness direction of the display substrate, and the obliquely incident light refers to the incident direction of the light intersecting with the thickness direction of the display substrate.

[0114] The spacer 70 is located between the layer where the first electrode 51 is located and the layer where the light-emitting functional layer 52 is located. Specifically, there is a pixel defining layer 60 between the layer where the first electrode 51 is located and the layer where the light-emitting functional layer 52 is located. Therefore, the spacer 70 can be located between the first electrode layer 51 and the pixel defining layer 60, or the spacer 70 can also be located between the pixel defining layer 60 and the light-emitting functional layer 52. That is, the embodiments of the present disclosure do not limit the preparation sequence of the pixel defining layer 60 and the spacer 70.

[0115] In the embodiments of the present disclosure, the light-shielding layer 30 is disposed between the layer where the first electrode 51 is located and the driving circuit layer 20, which can prevent light from leaking through the film layer between the light-shielding layer 30 and the pixel defining layer 60 due to the presence of too many film layers between the light-shielding layer 30 and the pixel defining layer 60.

[0116] In some embodiments, as Figure 2 and Figure 3 shown, the display substrate further includes an insulating layer 90 located between the layer where the first electrode 51 is located and the driving circuit layer 20. The light-shielding layer 30 is located between the layer where the insulating layer 90 is located and the driving circuit layer 20. The insulating layer 90 includes a third portion 91. At least a part of the third portion 91 is located between the pixel defining layer 60 and the light-shielding layer 30, and the orthographic projection of the third portion 91 on the substrate 10 does not overlap with the orthographic projection of the pixel opening on the substrate 10.

[0117] Optionally, the material of the insulating layer 90 can be selected as an inorganic material, for example, specifically SiNx.

[0118] Obviously, in the embodiments of the present disclosure, there is only the third part 91 of the insulating layer 90 between the pixel defining layer 60 and the light shielding layer 30. Therefore, the area where the light incident obliquely can pass through between the pixel defining layer 60 and the light shielding layer 30 is very small. Therefore, the embodiments of the present disclosure can block the light incident vertically and obliquely, preventing light leakage.

[0119] Wherein, the spacer column 70 is located on the side of the third part 91 away from the substrate 10.

[0120] In the embodiments of the present disclosure, since the spacer column 70 needs to play a partitioning role, the cross-sectional area of the spacer column 70 perpendicular to the thickness direction of the display substrate becomes smaller and smaller in the direction close to the substrate 10. Therefore, some light may enter from the side of the spacer column 70. However, since the light shielding layer 30 of the embodiments of the present disclosure is located on the side of the third part 91 close to the substrate 10, the third part 91 can block the light near the spacer column 70, thereby avoiding light leakage and ensuring the protection of the thin film transistor.

[0121] In some embodiments, as Figure 2 shown, the accommodation opening exposes at least a part of the third part 91, and the isolation structure a is in contact with the third part 91.

[0122] For example, the accommodation opening formed in the pixel defining layer 60 exposes a part of the surface of the third part 91 away from the substrate 10. Therefore, in the embodiments of the present disclosure, when forming the spacer column 70, the spacer column 70 can be directly formed on the surface side of the third part 91 exposed by the accommodation opening, which is convenient for realizing that a part of the spacer column 70 is located in the accommodation opening, that is, convenient for controlling the formation position of the spacer column 70 and minimizing the difficulty of the manufacturing process.

[0123] In some embodiments, as Figure 3 shown, the third part 91 is provided with a second opening communicating with the accommodation opening, and the second opening exposes at least a part of the light shielding layer 30, and the spacer column 70 is in contact with the light shielding layer 30.

[0124] It can be understood that in the embodiments of the present disclosure, compared with the Figure 2 shown embodiments, there is one more process of patterning the insulating layer 90, and the spacer column 70 is formed on the upper side of the surface of the light shielding layer 30 exposed by the second opening. In this case, the space near the spacer column 70 is relatively larger than that in the Figure 2 shown embodiments, the designability of the shape structure of the spacer column 70 is increased, thereby improving the partitioning effect of the spacer column 70. Moreover, the accommodation space for the partitioned light-emitting functional layer 52 near the spacer column 70 will also become larger, which is beneficial to the overall design of the display substrate.

[0125] In the embodiments of the present disclosure, the isolation structure a is in contact with the surface of the light-shielding layer 30 exposed by the second opening, and the position of the isolation structure a can be controlled by the position of the opened second opening, so as to ensure that the isolation structure a is arranged at a preset position.

[0126] While Figure 2 In the embodiment shown, the insulating layer 90 can play a good supporting role for the isolation structure a, so as to ensure the position stability of the isolation structure a, and further ensure the isolation effect of the isolation structure a on the light-emitting functional layer 52 between two adjacent light-emitting devices 50.

[0127] In addition, the material of the insulating layer 90 can be the same as that of the isolation layer 40. Therefore, reference can be made to Figure 1 the structure shown, in the process step of patterning the insulating layer 90, Figure 3 the light-shielding layer 30 in Figure 1 may also form an isolation groove similar to that in

[0128] In some embodiments, as Figure 2 and Figure 3 shown, the insulating layer 90 further includes a fourth part 92 connected to the third part 91, and the fourth part 92 is located between the first electrode 51 and the driving circuit layer 20. Obviously, the orthographic projection of the fourth part 92 on the substrate 10 may overlap with the orthographic projection of the pixel opening on the substrate 10.

[0129] Similarly, the material of the insulating layer 90 can be selected as a material with a relatively large hardness. Therefore, by making the fourth part 92 of the insulating layer 90 located between the first electrode 51 and the driving circuit layer 20, the driving circuit layer 20 and the light-emitting device 50 can be further isolated, and the relative displacement between the planarization layer 21 and the light-emitting device 50 caused by reasons such as impact can be avoided, so as to prevent adverse effects on the display effect.

[0130] In some embodiments, as Figure 4 shown, the accommodation opening exposes at least a part of the light-shielding layer 30, and the isolation column 70 is arranged in contact with the light-shielding layer 30.

[0131] Compared with Figure 2 and Figure 3 the embodiments shown, the embodiments of the present disclosure do not need to additionally provide an insulating layer 90. Therefore, the embodiments of the present disclosure can reduce one preparation process, thereby simplifying the overall preparation process and reducing the overall process difficulty.

[0132] Moreover, in the embodiments of the present disclosure, the light-shielding layer 30 and the pixel defining layer 60 can be in direct contact, that is, there is no space between the light-shielding layer 30 and the pixel defining layer 60 to allow light to pass through. Therefore, the light-shielding layer 30 and the pixel defining layer 60 can block the light in the area between adjacent light-emitting devices 50. Therefore, the embodiments of the present disclosure can achieve a better light leakage prevention effect.

[0133] Correspondingly, the present disclosure also provides respectively Figures 2 to 4 A method for manufacturing a display substrate according to the embodiments shown. Among them, Figure 2 The method for manufacturing a display substrate in the embodiments shown includes the following steps:

[0134] Step S10: Form a planarization layer 21 on one side of the substrate 10.

[0135] Step S20: Form a patterned light-shielding layer 30 on the side of the planarization layer 21 away from the substrate 10, and the orthographic projection of the light-shielding layer 30 on the substrate 10 is located between the orthographic projections of the first electrodes 51 of two adjacent light-emitting devices 50 on the substrate 10.

[0136] Step S30: Then sequentially prepare an insulating material layer, a first electrode 51, a patterned pixel defining layer 60, and an isolation column 70, or sequentially prepare an insulating material layer, a first electrode 51, an isolation column 70, and a patterned pixel defining layer 60.

[0137] For Figure 3 The method for manufacturing a display substrate in the embodiments shown, in addition to including the above steps S10 to S30, further includes: patterning the insulating material layer after the inorganic material layer is prepared in step S30 and before the first electrode 51 is formed.

[0138] For Figure 4 The method for manufacturing a display substrate in the embodiments shown includes steps S10 and S20, and further includes: Step S40: Then sequentially prepare a first electrode 51, a patterned pixel defining layer 60, and an isolation structure a, or sequentially prepare a first electrode 51, an isolation column 70, and a patterned pixel defining layer 60.

[0139] Optionally, the isolation column 70 in the embodiments of the present disclosure can be made of an organic material.

[0140] Figure 5 It is a schematic cross-sectional structure diagram of a display substrate in other embodiments of the present disclosure. Figure 6 It is a schematic cross-sectional structure diagram of a display substrate in other embodiments of the present disclosure.

[0141] As Figure 5 and Figure 6As shown, in some other embodiments, the driving circuit layer 20 further includes a planarization layer 21 on the side of the thin-film transistor away from the substrate 10.

[0142] The isolation structure a includes an isolation layer 40, and the isolation layer 40 is located between the planarization layer 21 and the layer where the first electrode 51 is located.

[0143] The isolation structure a further includes an isolation groove formed on the planarization layer 21. The isolation layer 40 includes a first portion 41. The first portion 41 is located between the pixel defining layer 60 and the light shielding layer 30, and the first portion 41 is provided with first openings respectively communicating with the accommodation opening and the isolation groove. The positive projection of the isolation groove on the substrate 10 includes a first projection area and at least one second projection area. The positive projection of the first portion 41 on the substrate 10 covers the second projection area and has no overlap with the first projection area. The light shielding layer 30 is located on the side of the light-emitting device 50 away from the substrate 10.

[0144] Similar to Figure 1 the embodiment shown, the isolation groove formed by the isolation layer 40 and the planarization layer 21 can achieve the function of separating the light-emitting functional layer 52. In addition, compared with Figure 1 the embodiment shown, in the embodiment of the present disclosure, the light shielding layer 30 is disposed on the side of the light-emitting device 50 away from the substrate 10, increasing the distance between the light shielding layer 30 and the light-emitting device 50. Therefore, the light shielding layer 30 of the present disclosure can prevent crosstalk between different color lights emitted by adjacent two light-emitting devices 50.

[0145] In some embodiments, as Figure 5 shown, the encapsulation layer 80 is multilayered, and the light shielding layer 30 is located between adjacent two layers of the encapsulation layer 80.

[0146] For example, in one example, the multilayer encapsulation layer 80 includes a first inorganic layer 81, an organic layer 82, and a second inorganic layer 83 stacked in sequence along the direction away from the substrate 10. Among them, the light shielding layer 30 can be located between the first inorganic layer 81 and the organic layer 82, or the light shielding layer 30 can also be located between the organic layer 82 and the second inorganic layer 83.

[0147] In some embodiments, as Figure 5 shown, the light shielding layer 30 is located between the adjacent two layers of the encapsulation layer 80 closest to the substrate 10.

[0148] For example, the light-shielding layer 30 is located between the first inorganic layer 81 and the organic layer 82. Considering that the light-shielding layer 30 is located on the side of the light-emitting device 50 away from the substrate 10, that is, there will be other film layers between the light-shielding layer 30 and the light-emitting material layer. In order to prevent the light emitted by the light-emitting device 50 or the light in the environment from transmitting through the film layer between the light-shielding layer 30 and the light-emitting material layer and then incident on the surface of the film layer of the thin-film transistor in the area where the accommodation opening is located, the light-shielding layer 30 is made as close as possible to the light-emitting device 50, so as to reduce the distance between the light-shielding layer 30 and the light-emitting material layer and reduce the light that can be transmitted.

[0149] Obviously, in the embodiment of the present disclosure, the light-shielding layer 30 is disposed between the two adjacent encapsulation layers 80 closest to the substrate 10, mainly to prevent the obliquely incident light from transmitting through the area between the pixel defining layer 60 and the light-shielding layer 30, resulting in light leakage.

[0150] In some embodiments, as Figure 6 shown, the light-emitting device 50 further includes a second electrode 53 on the side of the light-emitting functional layer 52 away from the substrate 10, and the light-shielding layer 30 is located on the side of the layer where the second electrode 53 is located away from the substrate 10.

[0151] In the embodiment of the present disclosure, the second electrode 53 can be further formed after the formation of the second electrode 53 to shield the area between two adjacent light-emitting devices 50. Compared with Figure 5 the embodiment shown, it is closer to the pixel defining layer 60, and can further prevent the obliquely incident light from transmitting through the area between the pixel defining layer 60 and the light-shielding layer 30, resulting in light leakage. Moreover, the embodiment of the present disclosure is prepared between the light-emitting device 50 and the encapsulation layer 80. Therefore, it will not have any impact on the original manufacturing processes of the light-emitting device 50 and the encapsulation layer 80.

[0152] In some embodiments, as Figure 6 shown, the material of the light-shielding layer 30 includes a conductive material, and the light-shielding layer 30 is electrically connected to the second electrodes 53 of two adjacent light-emitting devices 50 respectively.

[0153] In the embodiment of the present disclosure, after the formation of the second electrode 53, a light-shielding layer 30 is directly formed on the side of the second electrode 53 away from the substrate 10 using a conductive material, and further, the light-shielding layer 30 can be overlapped with two adjacent second electrodes 53. Therefore, in the embodiment of the present disclosure, the two adjacent second electrodes 53 can be electrically connected through the light-shielding layer 30, thereby reducing the resistance of the second electrode 53.

[0154] It can be understood that in the embodiments of the present disclosure, the light-shielding layer 30 can not only function as a light shield, but also function as an auxiliary electrode, specifically to assist in reducing the resistance of the second electrode 53, thereby further reducing the power consumption of the entire display substrate.

[0155] For example, in one example, if the isolation structure a surrounds the light-emitting device 50 for one week, the isolation structure a may also disconnect the second electrode 53 in the circumferential direction, resulting in the disconnection of the second electrodes 53 of different light-emitting devices 53. In this case, the light-shielding layer 30 in the embodiments of the present disclosure can be used as an auxiliary electrode to electrically connect the second electrodes 53 of different light-emitting devices.

[0156] In addition, the present disclosure also provides Figure 5 and Figure 6 a method for manufacturing the display substrate shown, and the steps of the manufacturing method include:

[0157] Step S01: Form a planarization layer 21 on one side of the substrate 10. Specifically, for example, form a thin-film transistor on one side of the substrate 10 and a planarization layer 21 on the side of the thin-film transistor away from the substrate 10.

[0158] Step S02: Form a patterned insulating material layer on the side of the planarization layer 21 away from the substrate 10, and the insulating material layer is located between the first electrodes 51 of two adjacent light-emitting devices 50. After patterning the insulating material layer, an isolation layer 40 and a planarization layer 21 with isolation grooves can be obtained, and the isolation grooves and the isolation layer 40 form an isolation structure a.

[0159] Step S03: Then sequentially form a first electrode 51, a patterned pixel definition layer 60, a light-emitting functional layer 52, a second electrode 53, and a multi-layer encapsulation layer 80 on the side of the isolation layer 40 away from the substrate 10.

[0160] Among them, Figure 5 for the display substrate shown, the light-shielding layer 30 can be formed between the steps of forming two of the encapsulation layers 80 in step S03, Figure 6 for the display substrate shown, the light-shielding layer 30 can be formed after the step of forming the second electrode 53 in step S03.

[0161] In some embodiments, as Figures 1 to 6 shown, the orthographic projection of the light-shielding layer 30 on the substrate 10 covers and exceeds the orthographic projection of the accommodation opening on the substrate 10. That is, the orthographic projection of the light-shielding layer 30 on the substrate 10 overlaps with the orthographic projection of the pixel definition layer 60 on the substrate 10. In this case, since both the light-shielding layer 30 and the pixel definition layer 60 have a light-shielding function, therefore, the light-shielding layer 30 and the pixel definition layer 60 in the embodiments of the present disclosure can provide a better light leakage prevention function for the area between two light-emitting devices 50.

[0162] In addition, Figure 1 , Figure 2 and Figure 3 in the embodiments shown, there is only one film layer between the pixel defining layer 60 having a light-shielding function and the light-shielding layer 30. Specifically, in Figure 1 the embodiment shown, an isolation layer 40 is provided between the pixel defining layer 60 and the light-shielding layer 30. In Figure 2 and Figure 3 the embodiments shown, an insulating layer 90 is provided between the pixel defining layer 60 and the light-shielding layer 30. Therefore, the area that can leak light between the pixel defining layer 60 and the light-shielding layer 30 is relatively narrow and small. When the orthographic projection of the light-shielding layer 30 on the substrate 10 overlaps with the orthographic projection of the pixel defining layer 60 on the substrate 10, the pixel defining layer 60 and the light-shielding layer 30 can block light and prevent light from transmitting to the film layer where the thin-film transistor is located.

[0163] In Figure 4 and Figure 5 the embodiments shown, although the film layer between the pixel defining layer 60 and the light-shielding layer 30 is at least one more film layer than that in Figures 1 to 3 the embodiment shown, since the light-shielding layer 30 is located on the side of the light-emitting device 50 away from the substrate 10, the light-shielding layer 30 is formed after the light-emitting device 50. Therefore, in the manufacturing process, it will not have any impact on the formation of the light-emitting device 50. And, as can be clearly understood by those skilled in the art, the display panel further includes a black matrix layer (BM, black matrix) on the side of the encapsulation layer 80 away from the substrate 10. The black matrix layer is provided with a light-transmitting opening, and the orthographic projection of the light-transmitting opening on the substrate 10 can cover the orthographic projection of the pixel opening on the substrate 10. Therefore, in some products, the black matrix layer can also cover the orthographic projection of the accommodation opening on the substrate 10. In this case, when preparing the light-shielding layer 30, the manufacturing process for preparing the black matrix layer can be adopted to complete it, thereby minimizing the manufacturing difficulty of the display substrate in the embodiments of the present disclosure.

[0164] Those skilled in the art can set the isolation structure a and the light-shielding layer 30 according to actual needs.

[0165] In summary, the design solution of the present disclosure can not only satisfy the function of separating the light-emitting functional layers 52 between adjacent light-emitting devices 50, but also block light through the light-shielding layer 30 to prevent light from affecting the device characteristics of the thin-film transistor.

[0166] The present disclosure also provides a display device, including the display substrate according to any one of the embodiments of the present disclosure.

[0167] It is understandable that the above embodiments are merely exemplary embodiments adopted to illustrate the principles of the present disclosure. However, the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the present disclosure, and these modifications and improvements are also regarded as the protection scope of the present disclosure.

Claims

1. A display substrate, characterized in that: include: substrate substrate; A driving circuit layer, located on one side of the base substrate, the driving circuit layer comprising a plurality of thin film transistors; A plurality of light-emitting devices, located on a side of the thin film transistor away from the base substrate, the light-emitting devices are electrically connected to the thin film transistor, and include a first electrode and a plurality of light-emitting functional layers sequentially stacked in a direction away from the base substrate; a pixel defining layer, at least partially covering the first electrode, and having a plurality of pixel openings and at least one receiving opening, wherein the pixel openings expose at least a portion of the first electrode, at least a portion of the light-emitting functional layer is located within the pixel openings, and the receiving openings are located between two adjacent pixel openings, wherein the material of the pixel defining layer includes a light-shielding material; an isolation structure, located between the layer where the light-emitting functional layer is located and the driving circuit layer, wherein the orthographic projection of the isolation structure on the base substrate overlaps at least partially with the orthographic projection of the receiving opening on the base substrate, and the isolation structure isolates at least part of the light-emitting functional layer; At least one encapsulation layer is located on a side of the light emitting device away from the substrate; The shading layer is located between the encapsulation layer farthest from the base substrate and the driving circuit layer, and the orthographic projection of the shading layer on the base substrate covers the orthographic projection of the accommodating opening on the base substrate and has no overlap with the orthographic projection of the pixel opening on the base substrate.

2. The display substrate according to claim 1, characterized in that: The isolation structure comprises an isolation layer located between the layer where the first electrode is located and the driving circuit layer; The light shielding layer is located between the isolation layer and the driving circuit layer; The isolation structure also includes an isolation groove opened on the light-shielding layer, the isolation layer includes a first part, at least a part of the first part is located between the pixel defining layer and the light-shielding layer, and the orthographic projection of the first part on the substrate has no overlap with the orthographic projection of the pixel opening on the substrate, the first part is provided with a first opening respectively connected to the accommodating opening and the isolation groove, the orthographic projection of the isolation groove on the substrate includes a first projection area and at least one second projection area, the orthographic projection of the first part on the substrate covers the second projection area and has no overlap with the first projection area.

3. The display substrate according to claim 2, characterized in that: The isolation layer further includes a second portion connected to the first portion, and the second portion is located between the first electrode and the driving circuit layer.

4. The display substrate according to claim 1, characterized in that: The isolation structure comprises an isolation column, at least a portion of which is located in the receiving opening, and the isolation column comprises a first surface away from the base substrate and a second surface facing the base substrate, and an orthographic projection of the first surface on the base substrate covers and exceeds an orthographic projection of the second surface on the base substrate; The light shielding layer is located between the layer where the first electrode is located and the driving circuit layer, and the isolation column is located between the layer where the first electrode is located and the layer where the light-emitting functional layer is located.

5. The display substrate according to claim 4, characterized in that: The receiving opening exposes at least a portion of the light shielding layer, and the isolation column is disposed in contact with the light shielding layer.

6. The display substrate according to claim 4, characterized in that: The display substrate further comprises an insulating layer located between the layer where the first electrode is located and the driving circuit layer; The light shielding layer is located between the layer where the insulating layer is located and the driving circuit layer; The insulating layer includes a third portion, at least a portion of the third portion is located between the pixel defining layer and the light shielding layer, and an orthographic projection of the third portion on the base substrate does not overlap with an orthographic projection of the pixel opening on the base substrate; Wherein, the isolation column is located at a side of the layer where the third part is located away from the base substrate.

7. The display substrate according to claim 6, characterized in that: The receiving opening exposes at least a portion of the third portion, and the isolation column is disposed in contact with the third portion.

8. The display substrate according to claim 6, characterized in that: The third portion is provided with a second opening communicating with the accommodating opening, the second opening exposes at least a portion of the light shielding layer, and the isolation column is arranged in contact with the light shielding layer.

9. The display substrate according to claim 6, characterized in that: The insulating layer further includes a fourth portion connected to the third portion, and the fourth portion is located between the first electrode and the driving circuit layer.

10. The display substrate according to claim 1, characterized in that: The driving circuit layer further comprises a planarization layer located on a side of the thin film transistor away from the substrate; The isolation structure comprises an isolation layer, and the isolation layer is located between the planarization layer and the layer where the first electrode is located; The isolation structure further includes an isolation groove opened on the planarization layer, the isolation layer includes a first portion, the first portion is located between the pixel definition layer and the light shielding layer, and has no overlap with the orthographic projection of the pixel opening on the base substrate, the first portion is provided with a first opening respectively connected with the accommodating opening and the isolation groove, the orthographic projection of the isolation groove on the base substrate includes a first projection area and at least one second projection area, the orthographic projection of the first portion on the base substrate covers the second projection area, and has no overlap with the first projection area; The light shielding layer is located on a side of the light emitting device away from the base substrate.

11. The display substrate according to claim 10, characterized in that: The encapsulation layer is multi-layered, and the light shielding layer is located between two adjacent encapsulation layers.

12. The display substrate according to claim 11, characterized in that: The light shielding layer is located between two adjacent packaging layers closest to the substrate.

13. The display substrate according to claim 10, characterized in that: The light emitting device further comprises a second electrode located between the light emitting functional layer and the encapsulation layer, and the light shielding layer is located between the layer where the second electrode is located and the encapsulation layer.

14. The display substrate according to claim 13, characterized in that: The material of the light shielding layer includes a conductive material, and the light shielding layer is electrically connected to the second electrodes of two adjacent light emitting devices respectively.

15. The display substrate according to any one of claims 1 to 14, characterized in that: The orthographic projection of the light shielding layer on the base substrate covers and exceeds the orthographic projection of the receiving opening on the base substrate.

16. A display panel, characterized in that: The invention comprises the display substrate as claimed in any one of claims 1 to 15.

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