Test method for protection system card

Abstract

The invention relates to the field of nuclear power station protection systems, in particular to a test method for a protection system card. The test method comprises the following steps: carrying out indicator light test and logic function test on all protection system cards in sequence; the logic function test specifically comprises the step of testing each non-triggering condition and the lowest triggering condition in sequence; confirming the type of the protection system card; performing delay unit testing, self-holding unit testing and anti-interference testing on the logic card in sequence; response time testing is carried out on the signal cards in sequence; and carrying out self-holding unit testing and response time testing on the output card in sequence. The performance of the card is comprehensively tested, and the reliability is high.

Description

Technical Field

[0001] The present invention relates to the field of nuclear power plant protection systems, and particularly to a method for testing protection system cards. Background Art

[0002] The protection system of a nuclear power plant consists of a large number of analog cards, which are composed of a large number of CMOS devices, triodes, optocouplers, etc. Once the internal devices of the card are damaged, the resulting refusal to act or misoperation will directly affect the safety of the power plant.

[0003] For the cards to be replaced and put into use, they are generally continuously powered, and the appearance is observed for any abnormal conditions. At the same time, indicator light tests and logic function tests are carried out. The test steps are as follows: 1. Power on a single functional block to verify that the indicator light indicates normal function; 2. Power on the input that triggers the logical action to verify the normal logical function.

[0004] The following problems exist in this test method: 1. The logical combination is the main body of the test. During the logical combination test, the corresponding indicator lights will turn on and off accordingly. Observing the indicator lights while conducting the logical test greatly increases the test time, disrupts the thinking of the test personnel, and reduces the test efficiency.

[0005] 2. When verifying the logical function, only the correct triggering of the logical function is verified, but for the inputs that do not trigger an action, the non-triggering of the output is not verified.

[0006] 3. The test is not comprehensive. Summary of the Invention

[0007] The technical problem to be solved by the present invention is to provide a method for testing protection system cards, which comprehensively tests the performance of the cards and has high reliability.

[0008] The present invention provides a method for testing protection system cards, including the following steps: Step 1: Conduct indicator light tests and logical function tests on all protection system cards in sequence; The logical function test specifically involves testing each non-triggering condition and the lowest triggering condition in sequence; After both tests pass, proceed to the subsequent steps; Step 2: Confirm the type of the protection system card; The protection system cards include logic cards, signal cards, and output cards; Step 3: Conduct delay unit tests, self-holding unit tests, and anti-interference tests on the logic cards in sequence; Conduct response time tests on the signal cards in sequence; Conduct self-holding unit tests and response time tests on the output cards in sequence; The self - holding unit test verifies the reliability of the self - holding unit under different state transitions through cycles of setting, resetting, setting, and resetting. The anti - interference test specifically includes: Simulate the logical state closest to the triggering condition. Conduct forward and reverse tests respectively, record the voltage values when the output state changes, compare the flip voltage difference during the forward test, and the difference between the supply voltage and the flip voltage value during the reverse test. Take the relatively smaller value and compare it with the design reference value to judge the anti - interference performance.

[0009] In a specific embodiment of the present invention, a relay contact performance test is also carried out before the response time test.

[0010] In a specific embodiment of the present invention, the self - holding unit test is verified with a relay as the executing component, and specifically includes: When the initial state of the self - holding unit is unknown, first place it in the set position. Subsequently, change the input, input a reset signal, and verify whether the relay can normally release the self - holding state. Input the set signal again, re - apply the set signal to trigger the self - holding function, and verify whether the relay can be correctly set again. Finally, re - apply the reset signal to ensure that the relay is finally in the reset state.

[0011] In a specific embodiment of the present invention, the anti - interference test specifically includes: For m / n logic, set the initial state to the (m - 1) / n state to simulate the sensitivity to interference when closest to the triggering condition. Gradually increase the voltage of the un - triggered input signal until the system output state changes to triggered, and record the voltage value at this time as V1. Gradually decrease the voltage of the triggered input signal until the system output state returns to un - triggered, and record the voltage value at this time as V2. Anti - interference voltage V 抗 is min{V1, V DD - V2}; V DD is the supply voltage of the logic unit; The anti - interference ability is expressed as |V 抗 - V 参考 |; V 抗 and V 参考 are closer, the stronger the anti - interference ability is indicated; |V 抗 - V 参考If |≤0.5V, it is considered qualified.

[0012] In a specific embodiment of the present invention, the performance test of the relay contacts specifically includes: Contact resistance test; insulation resistance test; contact capacity test; actuation time and release time test; mechanical life and electrical life test; environmental adaptability test; dynamic contact resistance test; contact bounce test.

[0013] In a specific embodiment of the present invention, the response time test specifically includes: For m / n logic, the input signal sets it to the (m - 1) / n state. When the last logic - compliant signal is transmitted, it is recorded as the 0 - moment, and the moment when the output flips is recorded as T2. If T2 is less than the reference response time for the site, the function of the card is qualified; If T2 is greater than the reference response time, the function of the card is unqualified.

[0014] In a specific embodiment of the present invention, the on - site reference response time is the time difference between the flip of the logic - compliant signal and the flip of the output signal. The response times of different cards are different, and the reference response time is set to 20 ms.

[0015] In a specific embodiment of the present invention, the delay unit test specifically includes: Record the input moment of the delay unit of the protection system card as 0, record its output moment as T, and judge the difference between the output moment and the input moment to obtain the delay time T 延时 ; Judge whether the delay time meets the process requirements. If it meets, proceed with subsequent tests; if not, it is determined to be unqualified.

[0016] In a specific embodiment of the present invention, the qualified standard for the delay time is T 延时 ≤T 参考 ±10%.

[0017] In a specific embodiment of the present invention, the indicator light test specifically includes the following steps: Power on all protection system cards with signals at one time and observe the indicator light status of each protection system card; If the indicator light does not light up, the protection system card is unqualified; If the indicator light flashes, perform a logic function test.

[0018] Compared with the prior art, the test method for the protection system card of the present invention designs a complete test sequence and test method for different types of cards, realizing a comprehensive evaluation of the functions and performances of the cards; through the enhanced test method, the present invention not only verifies the correct triggering of the logic function, but also comprehensively covers various performance indicators of the protection system card, ensuring the comprehensiveness of the test, thereby timely discovering potential safety hazards of the card; it can more accurately simulate the actual working environment, improve the reliability of the test results, and effectively avoid serious consequences such as nuclear leakage caused by insufficient testing; it can timely discover potential problems of the nuclear safety card, providing the possibility for fault prevention and early intervention, and reducing the risk of nuclear safety accidents; by improving the comprehensiveness and reliability of the test, the present invention can effectively avoid serious consequences such as nuclear leakage caused by card failures, and ensure the safe operation of nuclear facilities. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It represents the flowchart of the test method for the protection system card; Figure 2 It represents the 2 / 4 logic schematic diagram; Figure 3 It represents the schematic diagram of the anti-interference test curve. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0020] To further understand the present invention, the implementation solutions of the present invention will be described below in conjunction with embodiments. However, it should be understood that these descriptions are only for further explaining the features and advantages of the present invention, rather than limiting the present invention.

[0021] An embodiment of the present invention discloses a test method for a protection system card, as Figure 1 shown, including the following steps: Step 1: Conduct indicator light tests and logic function tests on all protection system cards in sequence; The specific steps of the indicator light test include the following: Apply power to all protection system cards with signals at one time, and observe the indicator light states of each protection system card; If the indicator light does not light up, the protection system card is unqualified; If the indicator light flashes, conduct a logic function test; The logic function test adopts a non-repeating test method, and specifically includes the following steps: Verify each non-triggering condition; Verify the lowest triggering condition; If both tests pass, proceed to the subsequent steps; Step 2: Confirm the type of the protection system card; The protection system cards include logic cards, signal cards, and output cards; Step 3: For the logic card, perform delay unit test, self-holding unit test and anti-interference test in sequence; For signal cards, conduct relay contact performance test and response time test in sequence; For output cards, self-holding unit test, relay contact performance test and response time test are carried out in sequence; The delay unit test specifically includes: Record the input time of the delay unit of the protection system card as 0, record the output time as T, determine the difference between the output time and the input time, and obtain the delay time T 延时 ; Determine whether the delay time meets the process requirements, if so, conduct subsequent tests, if not, determine it as unqualified; The qualified standard of the delay time is T 延时 ≤T 参考 ±10%, T 参考 Specifically, 1 second, 5 seconds, 10 seconds, etc.

[0022] The self-holding unit test is verified by using the relay as the execution component, and specifically includes: When the initial state of the self-holding unit is unknown, it is first placed in the set position; The purpose is to eliminate the interference of uncertain initial state and ensure the consistency of the test starting point. Verify whether the relay can be set normally; for example, the relay contact is closed and maintains the action state.

[0023] Then change the input and input the reset signal to verify whether the relay can release the self-holding state normally; Input the set signal again, reapply the set signal, trigger the self-holding function, and verify whether the relay can be correctly set again; Finally, apply the reset signal again to ensure that the relay is finally in the reset state.

[0024] Through the cycle of "set → reset → set → reset", the reliability of the self-holding unit under different state switching is verified; Forced setting is used as the starting point to avoid misjudgment of test results due to unknown initial status.

[0025] Safety First: A forced reset is performed at the end of the test, in line with the "fail-safe" principle of nuclear power plants, ensuring that the system is restored to a risk-free state.

[0026] Through forced state switching and closed-loop verification, the uncertainty of the initial state is effectively eliminated, the functional boundaries of the self-maintaining unit are fully covered, and at the same time, the requirements for "final state safety" in nuclear safety are strictly complied with.

[0027] The purpose of the anti-interference test is to verify that the logic trigger module can still accurately judge the input signal in the presence of noise or voltage fluctuations, avoiding false triggering or failure.

[0028] Specifically, it includes: Initial state setting: For m / n logic, set the initial state to the (m - 1) / n state to simulate the sensitivity to interference when approaching the trigger condition most closely; Positive test: Gradually increase the voltage of the untriggered input signal until the system output state changes to triggered, and record the voltage value at this time as V1; The voltage value V1 represents the lower limit of interference that the trigger module can withstand during the rising process of the input signal; Negative test: Gradually decrease the voltage of the triggered input signal until the system output state returns to untriggered, and record the voltage value at this time as V2. The voltage value V2 represents the upper limit of interference that the trigger module can withstand during the falling process of the input signal.

[0029] Calculation of anti-interference ability: The anti-interference voltage V 抗 is min{V1, V DD - V2}; The anti-interference ability is expressed as |V 抗 - V 参考 |.

[0030] V DD is the supply voltage of the logic unit.

[0031] The standard for judging the anti-interference ability is: The closer V 抗 is to V 参考 , the stronger the anti-interference ability; |V 抗 - V 参考 | ≤ 0.5V is considered qualified.

[0032] By quantifying the noise tolerance of the logic module, ensure its reliable operation in an interference environment.

[0033] The response time test specifically includes: When a signal with logical compliance is transmitted, record it as the 0 moment, and record the moment when the output flips as T2. If T2 is less than the reference response time for the site, the function of the card is qualified; If T2 is greater than the reference response time, the function of the card is unqualified.

[0034] More specifically, for m / n logic, place the input signal in the (m - 1) / n state. When the last signal with logical compliance is transmitted, record it as the 0 moment, and record the moment when the output flips as T2. If T2 is less than the reference response time for the site, the function of the card is qualified; If T2 is greater than the reference response time, the function of the card is unqualified.

[0035] The on-site reference response time is the time difference between the logic compliance signal flip and the output signal flip. The response times of different cards are different, and the reference response time is set to 20 ms.

[0036] The performance of the relay contacts is an important performance index of the card output. The relay contact performance test is carried out after the logic function test. If the test fails, although the overall card can output and perform logic processing, it cannot form the linkage of multiple cards after being connected to the system. It must be completed after the logic test and before the response time test.

[0037] The relay contact performance test specifically includes: (1) Contact resistance test; The purpose is to verify the conductivity when the contacts are closed and avoid heating or signal attenuation caused by poor contact.

[0038] The specific steps are as follows: Energize the relay coil to ensure that the contacts are fully closed; Apply a constant current across the contacts; Measure the voltage difference across the contacts with a high-precision voltmeter; Calculate the contact resistance value by dividing the voltage difference by the constant current.

[0039] Judgment criterion: It is required to be ≤100 mΩ.

[0040] (2) Insulation resistance test; The purpose of this test is to ensure that there is no leakage current when the contacts are open and prevent misoperation.

[0041] The specific steps are as follows: Disconnect the power supply of the relay coil to ensure that the contacts are in the normally open state; Apply a 500 V DC voltage across the contacts for 1 minute; Record the insulation resistance value after stabilization.

[0042] Judgment criterion: The insulation resistance between the contacts ≥100 MΩ.

[0043] (3) Contact capacity test; The purpose of this test is to verify the switching ability of the contacts under the rated load and avoid ablation or adhesion.

[0044] The specific steps are as follows: Connect the rated load across the contacts, such as 250 V AC / 10 A; Repeat closing and opening the contacts at a frequency of 1 Hz for at least 1000 times; Record the voltage drop and current waveform when the contact closes; Monitor the temperature rise of the contact.

[0045] After the test, observe whether the contact surface is ablated, adhered or oxidized.

[0046] Judgment criteria: The contact has no physical damage, the change in contact resistance ≤ 10%, and the temperature rise does not exceed the allowable value.

[0047] An extended test can also be added, that is, apply 120% of the rated load for a short time to verify the transient tolerance ability.

[0048] (4) Actuation time and release time test; The purpose of this test is to ensure that the relay responds quickly to commands and avoid system delays.

[0049] Specifically, it includes the following steps: Send a step pulse signal to the coil and start the oscilloscope timing at the same time; Record the time from when the coil is energized to when the contact closes; Record the time from when the coil is de-energized to when the contact opens.

[0050] Judgment criteria: Actuation time ≤ 10 ms, release time ≤ 5 ms.

[0051] (5) Mechanical life and electrical life test; The purpose of this test is to evaluate the durability of the contact during long-term use.

[0052] Specifically, it includes the following steps: Mechanical life test: Switch the contact on and off cyclically at the rated frequency (such as 10 Hz) until failure; Record the number of operations, and the number of operations ≥ 10 7 times.

[0053] Electrical life test: Switch the contact on and off cyclically under the rated load until failure. Record the number of operations, and the number of operations ≥ 10 5 times.

[0054] The judgment criteria for passing are that after the end of the life, the change in contact resistance ≤ 20%, and there is no adhesion or fracture.

[0055] (6) Environmental adaptability test; The purpose of this test is to verify the reliability of the contact in extreme environments.

[0056] The test includes: Temperature cycle test: Place the relay in an environment of -40°C to 85°C and cycle 100 times.

[0057] After the test, measure the contact resistance and insulation resistance.

[0058] Humidity and heat test: Place it at a temperature of 40°C and a humidity of 95%RH for 96 hours.

[0059] Check the oxidation or corrosion condition of the contacts.

[0060] Salt spray test: Expose it to 5% NaCl salt spray for 48 hours.

[0061] The change in contact resistance after the test should be ≤15%.

[0062] (7) Dynamic contact resistance test (DCR); The purpose of this test is to monitor the stability of the contacts under small current and detect microscopic defects.

[0063] Specifically, it includes the following steps: Pass a tiny current (such as 10mA) between the contacts and continuously monitor the contact resistance; Analyze the resistance fluctuations and identify instantaneous open circuits or sudden increases in resistance; The criterion for passing the test is: the resistance fluctuation range ≤±5%.

[0064] (8) Contact bounce test; The purpose of this test is to detect the instantaneous disconnection caused by mechanical vibration when the contacts close.

[0065] Specifically, it includes the following steps: Energize the trigger coil and capture the voltage waveform at the moment when the contacts close; Analyze the number of jitters and the duration in the waveform.

[0066] The criterion for passing the test is: the bounce time ≤1ms and the number of bounces ≤3 times.

[0067] The present invention fully considers various functions of the card unit and designs a reasonable test sequence. On the basis of comprehensive and reliable testing, it reduces the test time as much as possible and simplifies the operation of personnel.

[0068] The logic function test is the main part. If the logic function test cannot pass and be completed, the subsequent anti-interference test becomes meaningless, and the delay unit, self-holding circuit, relay contact performance, response time, etc. will not be able to be carried out. The delay unit and the self-holding circuit are part of the logic component and are important supplements to the logic function. If they cannot pass smoothly, the anti-interference level test becomes meaningless. The relay contact performance is an important performance indicator of the card output. It is executed after the logic combination test is completed. If the test fails, although the overall card can output and logic processing, it cannot form a multi-card linkage after connecting to the system. It must be completed after the logic test is completed and before the response time test. Response time is another performance indicator of the card, which is an important supplement to the performance indicator. The importance of the protection system requires that the response time of the card is within a certain range. If the performance exceeds, there will be no timely response when the unit needs to be shut down or a special action is required, which is of great significance.

[0069] In order to further understand the present invention, the testing method of the protection system card provided by the present invention is described in detail below in conjunction with the embodiments. The protection scope of the present invention is not limited by the following embodiments.

[0070] Example 1 Step 1: Perform indicator light test and logic function test on all protection system cards in turn; Input signals to all protection system cards at once and observe the indicator light status of each protection system card; If the indicator light is off, the protection system card is unqualified; If the indicator light flashes, perform a logic function test; The specific logic function test is as follows: Take the logic of four out of two as an example, as shown in the attached Figure 2 As shown, combine all the possibilities of 0 / 4, 1 / 4, and 2 / 4 and check the output. Figure 2 The effective value shown is high level. Take 1 as an example. When the four inputs of A, B, C, and D are all low level, check whether the output Y is low level; when any one of A, B, C, and D is high level, check whether the output Y is low level; when any two of A, B, C, and D are high level, check whether the output Y is high level. Among them, 0 / 4 Y detection is high level, 1 / 4 Y detection is low level, and 2 / 4 Y detection is low level, which indicates that the logic combination function test of the card is qualified, and the logic combinations of 3 / 4 and 4 / 4 are not tested, so as to realize comprehensive and concise logic test.

[0071] Step 2: Confirm the type of protection system card; The protection system card components include logic card components, signal card components and output card components; Step 3: Conduct delay unit tests, self - holding unit tests, and anti - interference tests on the logic card components in sequence; The delay unit test specifically includes: Record the input time of the delay unit of the protection system card component as 0, record its output time as T, judge the difference between the output time and the input time, and obtain the delay time; Judge whether the delay time meets the process requirements. If it meets, conduct subsequent tests; if not, determine it as unqualified; During the specific test of the self - holding unit: First, set the S terminal to be valid and the R terminal to be invalid, test the state of the contact K, and confirm that the current state is the set state. Set the S terminal to be invalid and the R terminal to be valid, test the state of the contact K, and confirm successful reset. Set the S terminal to be valid and the R terminal to be invalid, test the state of the contact K, and confirm successful setting. Finally, set the S terminal to be invalid and the R terminal to be valid, test the state of the contact K, and confirm successful reset.

[0072] The anti - interference test includes: Taking the logic two - out - of - four as an example, as shown in the appendix Figure 2 Set A to high level, and B, C, and D to low level. At this time, the logic degrades to 1 / 3. Gradually increase the voltage at point B starting from 0V, measure the state of Y. When the state of Y just flips, record the voltage applied at point B as V1; Set A and B to high level, gradually decrease the voltage at point B starting from V DD Start, measure the state of Y. When the state of Y flips, record the voltage of B as V2. The anti - interference voltage V_anti takes the smaller value of V1 and V DD -V2. The value of the anti - interference voltage represents, to a certain extent, the anti - misoperation and anti - refusal - to - operate capabilities of the card component. The closer its value is to the reference voltage, the better the performance. For different card component supply voltages, the reference voltage values are different. For a 12V logic component, the anti - interference voltage is about 5.8V. In the anti - interference voltage test of the card component, if |V 抗 -V 参考 |≤0.5V, it is considered qualified.

[0073] The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be noted that for those of ordinary skill in the art in this technical field, without departing from the principle of the present invention, several improvements and modifications can still be made to the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

[0074] The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for testing a protection system card, characterized in that: The following steps are involved: Step 1: Perform indicator light test and logic function test on all protection system cards in turn; The logic function test specifically tests each non-triggering condition and the minimum triggering condition in sequence; After both tests pass, proceed to the next steps; Step 2: Confirm the type of protection system card; The protection system card components include logic card components, signal card components and output card components; Step 3: For the logic card, perform delay unit test, self-holding unit test and anti-interference test in sequence; Conduct response time tests on signal cards one by one; For the output cards, the self-holding unit test and the response time test are carried out in sequence; The self-holding unit test verifies the reliability of the self-holding unit under different state switching by a cycle of setting, resetting, setting and resetting; The anti-interference test specifically includes: Simulate the logic state closest to the trigger condition; Carry out forward test and reverse test respectively, record the voltage value when the output state changes respectively, compare the flip voltage difference during the forward test, and the difference between the supply voltage and the flip voltage value during the reverse test; Take a relatively small value and compare it with the design reference value to judge the anti-interference performance.

2. The method for testing a protection system card according to claim 1, characterized in that: A relay contact performance test is also performed before the response time test.

3. The method for testing a protection system card according to claim 1, characterized in that: The self-holding unit test is verified by using the relay as the execution component, and specifically includes: When the initial state of the self-holding unit is unknown, it is first placed in the set position; Then change the input and input the reset signal to verify whether the relay can release the self-holding state normally; Input the set signal again, reapply the set signal, trigger the self-holding function, and verify whether the relay can be correctly set again; Finally, apply the reset signal again to ensure that the relay is finally in the reset state.

4. The method for testing a protection system card according to claim 1, characterized in that: The anti-interference test specifically includes: For m / n logic, the initial state is set to (m-1) / n state to simulate the sensitivity to interference when closest to the trigger condition; The untriggered input signal gradually increases its voltage until the system output state changes to triggered, and the voltage value at this time is recorded as V1; The triggered input signal gradually reduces the voltage until the system output state returns to the untriggered state, and the voltage value at this time is recorded as V2; Anti-interference voltage V 抗 is min{V1,V DD -V2}; V DD It is the supply voltage of the logic unit; The anti-interference capability is expressed as |V 抗 -V 参考 |; V 抗 With V 参考 The closer it is, the stronger the anti-interference ability is; |V 抗 -V 参考 |≤0.5V is considered qualified.

5. The method for testing a protection system card according to claim 2, characterized in that: The relay contact performance test specifically includes: Contact resistance test; insulation resistance test; contact capacity test; action time and release time test; mechanical life and electrical life test; environmental adaptability test; dynamic contact resistance test; contact bounce test.

6. The method for testing a protection system card according to claim 1, characterized in that: The response time test specifically includes: For m / n logic, the input signal puts it in the (m-1) / n state. When the last logical signal is transmitted, it is recorded as time 0, and the time of output flip is recorded as T2. If T2 is less than the reference response time for the site, the function of the card is qualified. If T2 is greater than the reference response time, the function of the card fails.

7. The method for testing a protection system card according to claim 6, characterized in that: The on-site reference response time is the time difference between the flipping of the logic coincidence signal and the flipping of the output signal. The response time of different cards is different, and the reference response time is set to 20ms.

8. The method for testing a protection system card according to claim 1, characterized in that: The delay unit test specifically includes: Record the input time of the delay unit of the protection system card as 0, record the output time as T, determine the difference between the output time and the input time, and obtain the delay time T 延时 ; Determine whether the delay time meets the process requirements. If so, perform subsequent tests. If not, determine that it is unqualified.

9. The method for testing a protection system card according to claim 8, characterized in that: The qualified standard of the delay time is T 延时 ≤T 参考 ±10%.

10. The method for testing a protection system card according to claim 1, characterized in that: The indicator light test specifically includes the following steps: Input signals to all protection system cards at once and observe the indicator light status of each protection system card; If the indicator light is off, the protection system card is unqualified; If the indicator light flashes, perform a logic function test.

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