Voltage acquisition circuit

Abstract

The invention discloses a voltage acquisition circuit, which comprises a differential amplifier, a comparator, a subtracter, a first triode, a second triode, a first diode and a second diode, and is characterized in that the reference voltage of the differential amplifier is changed through the comparator, so that the voltage acquisition range of the differential amplifier is changed; and the output voltage of the differential amplifier is converted through the subtracter, and the output of the comparator controls the conduction or cut-off of the first triode and the second triode, so that the output of the differential amplifier or the subtracter is controlled as the final output, and positive and negative voltages can be collected.

Description

Technical Field

[0001] The present invention relates to the technical field of data acquisition, and particularly relates to a voltage acquisition circuit. Background Art

[0002] The existing voltage acquisition circuit is usually composed of a differential amplifier, as Figure 1 shown. The differential amplifier mainly includes an operational amplifier U and resistors R1'-R4'. The non-inverting input terminal of the operational amplifier U is connected to the resistor R2', the inverting input terminal is connected to the resistor R1', the non-inverting input terminal of the operational amplifier U is also connected to the reference voltage Uref through the resistor R4', the inverting input terminal is connected to the output terminal through the resistor R3', the positive power supply terminal is connected to the power supply VDD, and the negative power supply terminal is grounded. The two poles V1 and V2 of the measured voltage are respectively input to the non-inverting input terminal and the inverting input terminal of the differential amplifier. The difference between V1 and V2 is compared and amplified by the differential amplifier and then output to achieve voltage acquisition.

[0003] However, the above voltage acquisition circuit can only acquire one of positive voltage or negative voltage, and has poor practicability. Summary of the Invention

[0004] In view of the above deficiencies of the prior art, the technical problem to be solved by the present invention is: to provide a voltage acquisition circuit that can acquire both positive voltage and negative voltage.

[0005] To solve the above technical problem, the technical solution adopted by the present invention is:

[0006] A voltage acquisition circuit includes a differential amplifier. The non-inverting input terminal of the differential amplifier is used to connect to the first pole of the measured voltage, the inverting input terminal of the differential amplifier is used to connect to the second pole of the measured voltage, and the non-inverting input terminal of the differential amplifier is also connected to the reference voltage. The circuit further includes a comparator, a subtractor, a first triode, a second triode, a first diode, and a second diode. The non-inverting input terminal of the comparator is used to connect to the second pole of the measured voltage, the inverting input terminal of the comparator is used to connect to the first pole of the measured voltage, the output terminal of the comparator is respectively connected to the reference voltage, the inverting input terminal of the subtractor, the base of the first triode, and the base of the second triode. The output terminal of the differential amplifier is respectively connected to the non-inverting input terminal of the subtractor, the collector of the first triode, and the anode of the first diode. The output terminal of the subtractor is respectively connected to the collector of the second triode and the anode of the second diode. The emitters of the first triode and the second triode are grounded, and the cathodes of the first diode and the second diode are used as the output terminal of the voltage acquisition circuit.

[0007] The beneficial effects of the present invention are as follows: By changing the reference voltage of the differential amplifier through a comparator, the voltage acquisition range of the differential amplifier is changed. Then, the output voltage of the differential amplifier is transformed by a subtractor, and the conduction or cut-off of the first triode and the second triode is controlled by the output of the comparator, so as to control the output of the differential amplifier or the subtractor as the final output, realizing the acquisition of both positive and negative voltages. Description of the Drawings

[0008] Figure 1 The figure shows a schematic diagram of a voltage acquisition circuit of the prior art;

[0009] Figure 2 The figure shows a schematic diagram of a voltage acquisition circuit according to an embodiment of the present invention.

[0010] Reference Numeral Description:

[0011] 1. Differential amplifier; 2. Comparator; 3. Subtractor; 4. First follower; 5. Second follower. Detailed Embodiments

[0012] In order to more clearly understand the technical content, the achieved purpose and the effects of the present invention, the present invention will be described in detail below in combination with specific embodiments and with reference to the accompanying drawings. It should be noted that, without conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. Many specific details are set forth in the following description in order to fully understand the present invention. The described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention.

[0013] Please refer to Figure 2 as shown in the figure, the technical solution provided by the present invention:

[0014] A voltage acquisition circuit includes a differential amplifier. The non-inverting input terminal of the differential amplifier is used to connect to the first pole of the voltage to be measured, and the inverting input terminal of the differential amplifier is used to connect to the second pole of the voltage to be measured. It further includes a comparator, a subtractor, a first triode, a second triode, a first diode, and a second diode. The first triode is an NPN-type triode, and the second triode is a PNP-type triode. The non-inverting input terminal of the comparator is used to connect to the second pole of the voltage to be measured, the inverting input terminal of the comparator is used to connect to the first pole of the voltage to be measured, and the output terminal of the comparator is respectively connected to the non-inverting input terminal of the differential amplifier, the inverting input terminal of the subtractor, the base of the first triode, and the base of the second triode. The output terminal of the differential amplifier is respectively connected to the non-inverting input terminal of the subtractor, the collector of the first triode, and the anode of the first diode. The output terminal of the subtractor is respectively connected to the emitter of the second triode and the anode of the second diode. The emitter of the first triode and the collector of the second triode are grounded, and the cathodes of the first diode and the second diode are used as the output terminal of the voltage acquisition circuit.

[0015] Further, the differential amplifier includes a first operational amplifier, a first resistor, a second resistor, a third resistor, and a fourth resistor. The inverting input terminal of the first operational amplifier is respectively connected to one end of the first resistor and connected to the output terminal of the first operational amplifier through the third resistor. The non-inverting input terminal of the first operational amplifier is respectively connected to one end of the second resistor and connected to the output terminal of the comparator through the fourth resistor. The output terminal of the first operational amplifier is respectively connected to the non-inverting input terminal of the subtractor, the collector of the first triode, and the anode of the first diode. The other end of the first resistor is used to connect to the second pole of the voltage to be measured, and the other end of the second resistor is used to connect to the first pole of the voltage to be measured.

[0016] Further, the comparator includes a second operational amplifier and a fifth resistor. The positive power supply terminal of the second operational amplifier is connected to the output terminal of the second operational amplifier through the fifth resistor. The non-inverting input terminal of the second operational amplifier is used to connect to the second pole of the voltage to be measured, the inverting input terminal is used to connect to the first pole of the voltage to be measured, and the output terminal of the second operational amplifier is respectively connected to the fourth resistor, the inverting input terminal of the subtractor, the base of the first triode, and the base of the second triode.

[0017] Further, the subtractor includes a third operational amplifier, a sixth resistor, a seventh resistor, an eighth resistor, and a ninth resistor. The inverting input terminal of the third operational amplifier is respectively connected to one end of the sixth resistor and connected to the output terminal of the third operational amplifier through the eighth resistor. The non-inverting input terminal of the third operational amplifier is respectively connected to one end of the seventh resistor and grounded through the ninth resistor. The output terminal of the third operational amplifier is respectively connected to the emitter of the second triode and the anode of the second diode. The other end of the sixth resistor is connected to the output terminal of the second operational amplifier, and the other end of the seventh resistor is connected to the output terminal of the first operational amplifier.

[0018] Further, it further includes a first follower, the first follower includes a fourth operational amplifier, the inverting input terminal of the fourth operational amplifier is connected to the output terminal of the fourth operational amplifier, the non-inverting input terminal of the fourth operational amplifier is connected to the output terminal of the first operational amplifier, and the output terminal of the fourth operational amplifier is respectively connected to the other end of the seventh resistor, the collector of the first triode, and the anode of the first diode.

[0019] As can be seen from the above description, by arranging a follower after the differential amplifier, the output of the differential amplifier enters the next stage after passing through the follower, improving the stability and reliability of the signal.

[0020] Further, it further includes a tenth resistor, an eleventh resistor, and a twelfth resistor. The tenth resistor is connected between the output terminal of the first operational amplifier and the non-inverting input terminal of the fourth operational amplifier. One end of the eleventh resistor is connected to the output terminal of the fourth operational amplifier, and the other end of the eleventh resistor is respectively connected to one end of the twelfth resistor, the other end of the seventh resistor, the collector of the first triode, and the anode of the first diode. The other end of the twelfth resistor is grounded.

[0021] Further, it further includes a second follower, the second follower includes a fifth operational amplifier, the inverting input terminal of the fifth operational amplifier is connected to the output terminal of the fifth operational amplifier, the non-inverting input terminal of the fifth operational amplifier is connected to the output terminal of the second operational amplifier, and the output terminal of the fifth operational amplifier is respectively connected to the other end of the sixth resistor, the base of the first triode, and the base of the second triode.

[0022] As can be seen from the above description, by arranging a follower after the comparator, the output of the comparator enters the next stage after passing through the follower, improving the stability and reliability of the signal.

[0023] Further, it further includes a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, and a sixteenth resistor. The thirteenth resistor is connected between the output terminal of the second operational amplifier and the non-inverting input terminal of the fifth operational amplifier. One end of the fourteenth resistor is connected to the non-inverting input terminal of the fifth operational amplifier, and the other end of the fourteenth resistor is grounded. One end of the fifteenth resistor is connected to the output terminal of the fifth operational amplifier, and the other end of the fifteenth resistor is respectively connected to one end of the sixteenth resistor, the other end of the sixth resistor, the base of the first triode, and the base of the second triode. The other end of the sixteenth resistor is grounded.

[0024] Further, it further includes a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a first capacitor, and a second capacitor. The seventeenth resistor and the first capacitor are connected in parallel between the base and the emitter of the first triode. The eighteenth resistor is connected between the output end of the differential amplifier and the collector of the first triode. The nineteenth resistor and the second capacitor are connected in parallel between the base and the collector of the second triode. The twentieth resistor is connected between the output end of the subtractor and the emitter of the second triode.

[0025] Please refer to Figure 2 , Embodiment 1 of the present invention is as follows:

[0026] A voltage acquisition circuit includes a differential amplifier 1, a comparator 2, a subtractor 3, a first follower 4, a second follower 4, a first triode Q1, a second triode Q2, a first diode D1, and a second diode D2. It further includes a tenth resistor R10 to a twentieth resistor R20, a first capacitor C1, and a second capacitor C2.

[0027] The differential amplifier 1 includes a first operational amplifier U1, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. The inverting input terminal of the first operational amplifier U1 is connected to one end of the first resistor R1. The inverting input terminal of the first operational amplifier U1 is also connected to the output terminal of the first operational amplifier U1 through the third resistor R3. The non-inverting input terminal of the first operational amplifier U1 is respectively connected to one end of the second resistor R2 and one end of the fourth resistor R4. The other end of the first resistor R1 is used to connect to the second pole V2 of the voltage to be measured. The other end of the second resistor R2 is used to connect to the first pole V1 of the voltage to be measured. The resistance values of the first resistor R1 and the second resistor R2 are the same, and the resistance values of the third resistor R3 and the fourth resistor R4 are the same.

[0028] The first follower 4 includes a fourth operational amplifier U4. The inverting input terminal of the fourth operational amplifier U4 is connected to the output terminal of the fourth operational amplifier U4. The non-inverting input terminal of the fourth operational amplifier U4 is connected to the output terminal of the first operational amplifier U1 through the tenth resistor R10. The output terminal of the fourth operational amplifier U4 is connected to one end of the eleventh resistor R11. The other end of the eleventh resistor R11 is grounded through the twelfth resistor R12.

[0029] The comparator 2 includes a second operational amplifier U2 and a fifth resistor R5. The positive power supply terminal of the second operational amplifier U2 is connected to the output terminal of the second operational amplifier U2 through the fifth resistor R5. The non-inverting input terminal of the second operational amplifier U2 is used to connect to the second pole V2 of the voltage to be measured. The inverting input terminal of the second operational amplifier U2 is used to connect to the first pole V1 of the voltage to be measured. The output terminal of the second operational amplifier U2 is connected to the other end of the fourth resistor R4.

[0030] The second follower 5 includes a fifth operational amplifier U5. The inverting input terminal of the fifth operational amplifier U5 is connected to the output terminal of the fifth operational amplifier U5. The non-inverting input terminal of the fifth operational amplifier U5 is connected to the output terminal of the second operational amplifier U5 through a thirteenth resistor R13. The non-inverting input terminal of the fifth operational amplifier U5 is also grounded through a fourteenth resistor R14. The output terminal of the fifth operational amplifier U5 is connected to one end of a fifteenth resistor R15, and the other end of the fifteenth resistor R15 is grounded through a sixteenth resistor R16.

[0031] The subtractor 3 includes a third operational amplifier U3, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9. The inverting input terminal of the third operational amplifier U3 is connected to one end of the sixth resistor R6. The inverting input terminal of the third operational amplifier U3 is connected to the output terminal of the third operational amplifier U3 through an eighth resistor R8. The non-inverting input terminal of the third operational amplifier U3 is connected to one end of the seventh resistor R7. The non-inverting input terminal of the third operational amplifier U3 is grounded through a ninth resistor R9. The other end of the sixth resistor R6 is connected to the other end of the fifteenth resistor R15. The other end of the seventh resistor R7 is connected to the other end of the eleventh resistor R11.

[0032] The first triode Q1 is an NPN-type triode, and the second triode Q2 is a PNP-type triode. The bases of the first triode Q1 and the second triode Q2 are connected to the other end of the fifteenth resistor R15. The collector of the first triode Q1 is connected to the anode of the first diode D1. The collector of the first triode Q1 is also connected to the other end of the eleventh resistor R11 through an eighteenth resistor R18. A seventeenth resistor R17 and a first capacitor C1 are connected in parallel between the base and the emitter of the first triode Q1, and the emitter of the first triode Q1 is grounded. The emitter of the second triode Q2 is connected to the anode of the second diode D2. The emitter of the second triode Q2 is also connected to the output terminal of the third operational amplifier U3 through a twentieth resistor R20. A nineteenth resistor R19 and a second capacitor C2 are connected in parallel between the base and the collector of the second triode Q2, and the collector of the second triode Q2 is grounded.

[0033] The cathodes of the first diode D1 and the second diode D2 serve as the output terminals of the voltage acquisition circuit and are used to connect to a processor for digital acquisition.

[0034] It should be noted that for the above-mentioned first operational amplifier U1, second operational amplifier U2, third operational amplifier U3, fourth operational amplifier U4, and fifth operational amplifier U5, their positive power supply terminals are all connected to the power supply VDD, and their negative power supply terminals are grounded to GND.

[0035] Using the voltage acquisition circuit described in the background art, assuming Uref = 0, when V1 > V2, the output of the differential amplifier is (V1 - V2)R3' / R1', and when V1 < V2, the output of the differential amplifier is 0. Therefore, it is impossible to collect when V1 < V2 (i.e., negative voltage). Assuming Uref = VDD, when V1 < V2, the output of the differential amplifier is VDD + (V1 - V2)R3' / R1', and when V1 > V2, the output of the differential amplifier is VDD. Therefore, it is impossible to collect when V1 > V2 (i.e., positive voltage).

[0036] Using the voltage acquisition circuit of the above embodiment, the output of the comparator is used as the reference voltage Uref of the differential amplifier. The output ADC_U1 of the first follower is the same as the output of the differential amplifier, the output ADC_U2 of the second follower is the same as the output of the comparator, and the output ADC_U3 of the subtractor is ADC_U2 - ADC_U1.

[0037] When V1 > V2, the output of the comparator is 0, that is, Uref = 0, ADC_U1 = (V1 - V2)R3 / R1, ADC_U2 = Uref = 0, the first triode Q1 is cut off, the second triode Q2 is turned on, and the output ADC_U of the voltage acquisition circuit is ADC_U1 = (V1 - V2)R3 / R1.

[0038] When V1 < V2, the output of the comparator is VDD, that is, Uref = VDD, ADC_U1 = VDD + (V1 - V2)R3 / R1, ADC_U2 = Uref = VDD, the first triode Q1 is turned on, the second triode Q2 is cut off, and the output ADC_U of the voltage acquisition circuit is ADC_U3 = (V2 - V1)R3 / R1.

[0039] By changing the reference voltage Uref of the differential amplifier through the comparator, the differential amplifier can be normally collected when V1 > V2 and V1 < V2 (i.e., positive voltage and negative voltage). By setting the subtractor, when V1 < V2 and the acquisition result is negative, the acquisition result is taken as positive to avoid acquisition errors caused by the processor being unable to recognize negative signals. And the conduction or cut-off of the first triode and the second triode is controlled by the output of the comparator. Thus, when V1 > V2, the output of the differential amplifier is used as the final output of the voltage acquisition circuit, and when V1 < V2, the output of the subtractor is used as the final output of the voltage acquisition circuit, realizing the acquisition of both positive and negative voltages.

[0040] The above are only the embodiments of the present invention, and do not limit the patent scope of the present invention. Therefore, any modifications, equivalent changes and decorations made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still belong to the scope of the technical solution of the present invention.

Claims

1. A voltage acquisition circuit, comprising a differential amplifier, wherein the non-inverting input terminal of the differential amplifier is used to connect to the first pole of the voltage to be measured, and the inverting input terminal of the differential amplifier is used to connect to the second pole of the voltage to be measured, characterized in that, It further includes a comparator, a subtractor, a first triode, a second triode, a first diode, and a second diode. The first triode is an NPN-type triode, and the second triode is a PNP-type triode. The non-inverting input terminal of the comparator is used to connect to the second pole of the voltage to be measured, the inverting input terminal of the comparator is used to connect to the first pole of the voltage to be measured, and the output terminal of the comparator is respectively connected to the non-inverting input terminal of the differential amplifier, the inverting input terminal of the subtractor, the base of the first triode, and the base of the second triode. The output terminal of the differential amplifier is respectively connected to the non-inverting input terminal of the subtractor, the collector of the first triode, and the anode of the first diode. The output terminal of the subtractor is respectively connected to the emitter of the second triode and the anode of the second diode. The emitter of the first triode and the collector of the second triode are grounded, and the cathodes of the first diode and the second diode serve as the output terminal of the voltage acquisition circuit.

2. The voltage acquisition circuit according to claim 1, wherein The differential amplifier includes a first operational amplifier, a first resistor, a second resistor, a third resistor, and a fourth resistor. The inverting input terminal of the first operational amplifier is respectively connected to one end of the first resistor and the output terminal of the first operational amplifier through the third resistor. The non-inverting input terminal of the first operational amplifier is respectively connected to one end of the second resistor and the output terminal of the comparator through the fourth resistor. The output terminal of the first operational amplifier is respectively connected to the non-inverting input terminal of the subtractor, the collector of the first triode, and the anode of the first diode. The other end of the first resistor is used to connect to the second pole of the voltage to be measured, and the other end of the second resistor is used to connect to the first pole of the voltage to be measured.

3. The voltage acquisition circuit according to claim 2, wherein The comparator includes a second operational amplifier and a fifth resistor. The positive power supply terminal of the second operational amplifier is connected to the output terminal of the second operational amplifier through the fifth resistor. The non-inverting input terminal of the second operational amplifier is used to connect to the second pole of the voltage to be measured, the inverting input terminal is used to connect to the first pole of the voltage to be measured, and the output terminal of the second operational amplifier is respectively connected to the fourth resistor, the inverting input terminal of the subtractor, the base of the first triode, and the base of the second triode.

4. The voltage acquisition circuit according to claim 3, characterized in that, The subtractor includes a third operational amplifier, a sixth resistor, a seventh resistor, an eighth resistor, and a ninth resistor. The inverting input terminal of the third operational amplifier is respectively connected to one end of the sixth resistor and the output terminal of the third operational amplifier through the eighth resistor. The non-inverting input terminal of the third operational amplifier is respectively connected to one end of the seventh resistor and grounded through the ninth resistor. The output terminal of the third operational amplifier is respectively connected to the emitter of the second triode and the anode of the second diode. The other end of the sixth resistor is connected to the output terminal of the second operational amplifier, and the other end of the seventh resistor is connected to the output terminal of the first operational amplifier.

5. The voltage acquisition circuit according to claim 4, wherein It further includes a first follower, and the first follower includes a fourth operational amplifier. The inverting input terminal of the fourth operational amplifier is connected to the output terminal of the fourth operational amplifier, the non-inverting input terminal of the fourth operational amplifier is connected to the output terminal of the first operational amplifier, and the output terminal of the fourth operational amplifier is respectively connected to the other end of the seventh resistor, the collector of the first triode, and the anode of the first diode.

6. The voltage acquisition circuit according to claim 5, characterized in that It further includes a tenth resistor, an eleventh resistor, and a twelfth resistor. The tenth resistor is connected between the output terminal of the first operational amplifier and the non-inverting input terminal of the fourth operational amplifier. One end of the eleventh resistor is connected to the output terminal of the fourth operational amplifier, and the other end of the eleventh resistor is respectively connected to one end of the twelfth resistor, the other end of the seventh resistor, the collector of the first triode, and the anode of the first diode. The other end of the twelfth resistor is grounded.

7. The voltage acquisition circuit according to claim 4, characterized in that It further includes a second follower, and the second follower includes a fifth operational amplifier. The inverting input terminal of the fifth operational amplifier is connected to the output terminal of the fifth operational amplifier, the non-inverting input terminal of the fifth operational amplifier is connected to the output terminal of the second operational amplifier, and the output terminal of the fifth operational amplifier is respectively connected to the other end of the sixth resistor, the base of the first triode, and the base of the second triode.

8. The voltage acquisition circuit according to claim 7, wherein It further includes a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, and a sixteenth resistor. The thirteenth resistor is connected between the output terminal of the second operational amplifier and the non-inverting input terminal of the fifth operational amplifier. One end of the fourteenth resistor is connected to the non-inverting input terminal of the fifth operational amplifier, and the other end of the fourteenth resistor is grounded. One end of the fifteenth resistor is connected to the output terminal of the fifth operational amplifier, and the other end of the fifteenth resistor is respectively connected to one end of the sixteenth resistor, the other end of the sixth resistor, the base of the first triode, and the base of the second triode. The other end of the sixteenth resistor is grounded.

9. The voltage acquisition circuit according to claim 4, wherein It further includes a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a first capacitor, and a second capacitor. The seventeenth resistor and the first capacitor are connected in parallel and then connected between the base and the emitter of the first triode. The eighteenth resistor is connected between the output terminal of the differential amplifier and the collector of the first triode. The nineteenth resistor and the second capacitor are connected in parallel and then connected between the base and the collector of the second triode. The twentieth resistor is connected between the output terminal of the subtractor and the emitter of the second triode.

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