Capacitor

Abstract

An aspect of the present disclosure provides a capacitor including: a substrate; and a plurality of unit capacitor cells disposed on the substrate, in which each of the plurality of unit capacitor cells includes: a lower electrode; and an upper electrode disposed on the lower electrode, the lower electrode included in a first unit capacitor cell among the plurality of unit capacitor cells being connected to the upper electrode included in a second unit capacitor cell among the plurality of unit capacitor cells.

Description

Technical Field

[0001] The present disclosure relates to a capacitor. Background Art

[0002] Electronic components used in electronic devices include capacitors, inductors, piezoelectric elements, varistors, or thermistors. Among these ceramic electronic components, multilayer capacitors can be used in various electronic devices due to their small size, high capacitance, and easy installation.

[0003] For example, a multilayer capacitor can be used as a chip capacitor mounted in a board of various electronic products, including imaging devices (such as liquid crystal displays (LCDs), plasma display panels (PDPs), and organic light-emitting diode (OLED) displays), computers, personal portable terminals, and smartphones, for charging or discharging.

[0004] According to the recent trend of miniaturization and thinning of electronic products, the demand for multilayer capacitors with a capacitance higher than that of existing multilayer capacitors is increasing. Summary of the Invention

[0005] At least one embodiment aims to provide a capacitor with a high capacitance by forming internal electrodes at a high density in a small space.

[0006] However, the problems to be solved by the embodiments of the present disclosure are not limited to the above problems, and various extensions can be made within the scope of the technical spirit included in the present disclosure.

[0007] One aspect of the present disclosure provides a capacitor including: a substrate; and a plurality of unit capacitor units disposed on the substrate, wherein each of the plurality of unit capacitor units includes: a lower electrode; and an upper electrode disposed on the lower electrode, and the lower electrode included in a first unit capacitor unit among the plurality of unit capacitor units is connected to the upper electrode included in a second unit capacitor unit among the plurality of unit capacitor units.

[0008] The capacitor may further include: a first external electrode; and a second external electrode disposed to be spaced apart from the first external electrode in the length direction of the capacitor, the first external electrode may be connected to the lower electrode included in a first connection capacitor unit disposed at a first end in the length direction among the plurality of unit capacitor units, and the second external electrode may be connected to the upper electrode included in a second connection capacitor unit disposed at a second end in the length direction among the plurality of unit capacitor units.

[0009] The capacitor may further include: a first external connection layer configured to connect the first external electrode to the lower electrode included in the first connection capacitor unit; and a second external connection layer configured to connect the second external electrode to the upper electrode included in the second connection capacitor unit.

[0010] The capacitor may further include: a first pad portion disposed between the first external connection layer and the first external electrode; and a second pad portion disposed between the second external connection layer and the second external electrode.

[0011] In addition, the first external electrode and the second external electrode may have a bump structure.

[0012] In addition, a plurality of first external electrodes and a plurality of second external electrodes may be provided.

[0013] The capacitor may further include: a first external electrode; and a second external electrode disposed to be spaced apart from the first external electrode in the length direction of the capacitor, the first external electrode may be connected to the lower electrode in the first connection capacitor unit provided at the first end in the length direction included in the plurality of unit capacitor units, and the second external electrode may be connected to the lower electrode in the second connection capacitor unit provided at the second end in the length direction included in the plurality of unit capacitor units.

[0014] The capacitor may further include: a first external electrode; and a second external electrode disposed to be spaced apart from the first external electrode in the length direction of the capacitor, wherein the first external electrode is connected to the upper electrode in the first connection capacitor unit provided at the first end in the length direction included in the plurality of unit capacitor units, and the second external electrode is connected to the upper electrode in the second connection capacitor unit provided at the second end in the length direction included in the plurality of unit capacitor units.

[0015] The capacitor may further include: an internal connection layer configured to have a via structure and connect the lower electrode included in the first unit capacitor unit to the upper electrode included in the second unit capacitor unit.

[0016] In addition, the lower electrode included in the first unit capacitor unit includes a lower exposed portion without the upper electrode on the upper side, and the upper electrode included in the second unit capacitor unit includes an upper protruding portion protruding toward the lower exposed portion, and the internal connection layer may be disposed between the lower exposed portion and the upper protruding portion.

[0017] In addition, the internal connection layer may include: a first internal connection layer connected to the lower electrode of the first unit capacitor unit; a second internal connection layer connected to the upper electrode of the second unit capacitor unit; and a third internal connection layer configured to connect the first internal connection layer and the second internal connection layer.

[0018] In addition, the third internal connection layer may have a plate-like structure.

[0019] Another aspect of the present disclosure provides a capacitor, the capacitor including: a substrate; and a plurality of unit capacitor units disposed on the substrate, wherein each of the plurality of unit capacitor units includes: a lower electrode; and an upper electrode disposed on the lower electrode, wherein the lower electrodes included in each of the plurality of unit capacitor units are separated from each other, the upper electrodes included in each of the plurality of unit capacitor units are separated from each other, and the plurality of unit capacitor units are connected in series with each other.

[0020] In addition, a plurality of electrode embedding spaces having a groove structure may be formed in the substrate, and a region where the plurality of electrode embedding spaces are formed is divided into a plurality of unit cell regions, and one unit capacitor unit of the plurality of unit capacitor units may be disposed on one unit cell region of the plurality of unit cell regions.

[0021] In addition, the plurality of unit capacitor units may be connected along a unit cell connection direction, and the unit cell connection direction passes through each of the plurality of unit cell regions once.

[0022] In addition, the plurality of unit cell regions may include: a plurality of first unit cell regions; and a plurality of second unit cell regions, the plurality of unit capacitor units disposed on the plurality of first unit cell regions may be connected along a first unit cell connection direction, the first unit cell connection direction passes through each of the plurality of first unit cell regions once, and the plurality of unit capacitor units disposed on the plurality of second unit cell regions may be connected along a second unit cell connection direction, the second unit cell connection direction passes through each of the plurality of second unit cell regions once.

[0023] Another aspect of the present disclosure provides a capacitor, which includes: a substrate; and a plurality of unit capacitor cells disposed on the substrate, wherein each of the plurality of unit capacitor cells includes: a lower electrode; and an upper electrode disposed on the lower electrode, and the lower electrode includes a portion where the upper electrode is not disposed thereon, and two adjacent unit capacitor cells among the plurality of unit capacitor cells are connected to each other through the portion of the lower electrode of the first unit capacitor cell where the upper electrode is not disposed thereon and the portion of the upper electrode of the second unit capacitor cell where the lower electrode is not disposed thereunder.

[0024] Another aspect of the present disclosure provides a capacitor, which includes: a substrate; and a plurality of unit capacitor cells disposed on the substrate, wherein each of the plurality of unit capacitor cells includes: a lower electrode; and an upper electrode disposed on the lower electrode, wherein the lower electrode includes a portion where the upper electrode is not disposed thereon, and the portion of the lower electrode of the first unit capacitor cell where the upper electrode is not disposed thereon among two adjacent unit capacitor cells among the plurality of unit capacitor cells and the upper electrode of the second unit capacitor cell are connected to each other through an internal connection layer having a via structure.

[0025] According to at least one embodiment, a capacitor with a high capacitance can be provided by forming internal electrodes at a high density in a small space. Description of the Drawings

[0026] Figure 1 A capacitor according to an embodiment is shown.

[0027] Figure 2 It shows along Figure 1 a longitudinal sectional view taken along line A-A'.

[0028] Figure 3 A structure in which unit cell regions are arranged on a substrate is shown.

[0029] Figure 4 It shows Figure 2 a view of region B of

[0030] Figure 5 A structure of an external electrode is shown.

[0031] Figure 6 A structure of an external electrode according to another embodiment is shown.

[0032] Figure 7 A longitudinal sectional view of a capacitor according to another embodiment is shown.

[0033] Figure 8 Shows a longitudinal sectional view of a capacitor according to another embodiment.

[0034] Figure 9 Shows a longitudinal sectional view of a capacitor according to another embodiment.

[0035] Figure 10 Shows Figure 9 A top plan view showing the positions of the internal connection layer, pad portion, and external electrodes of the capacitor.

[0036] Figure 11 Shows a capacitor according to another embodiment.

[0037] Figure 12 Shows along Figure 11 The longitudinal sectional view taken along line B - B'.

[0038] Figure 13 Shows a longitudinal sectional view of a capacitor according to another embodiment.

[0039] Figure 14 Shows a capacitor according to another embodiment.

[0040] Figure 15 Shows a capacitor according to another embodiment.

[0041] Figure 16 Shows a top plan view of a capacitor according to another embodiment.

[0042] Figure 17 Shows the setting structure of a unit cell region according to another embodiment.

[0043] Figure 18 Shows a sectional view of a substrate according to another embodiment.

[0044] Figure 19 Shows a substrate according to another embodiment.

[0045] <Description of Reference Numerals> 2: Substrate 5: Support layer 6: Substrate insulating layer 8: Electrode embedding space 10: Lower electrode 20: Upper electrode 30: Dielectric layer 40: Internal connection layer 46: First external connection layer 47: Second external connection layer 50: Insulating layer 61: First external electrode 62: Second external electrode 110: Lower exposed portion 210: Upper protruding portion. Detailed implementation manners

[0046] The present disclosure will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the present disclosure are shown. As those skilled in the art will recognize, the described embodiments can be modified in various different ways without departing from the spirit or scope of the present disclosure.

[0047] To describe the present disclosure clearly, parts irrelevant to the description are omitted, and throughout the specification, the same reference numerals denote the same or similar components.

[0048] In addition, since the dimensions (e.g., thickness) of the constituent elements shown in the drawings are arbitrarily given for better understanding and description, the present disclosure is not limited to the dimensions (e.g., thickness) shown. In the drawings, the thicknesses of layers, films, panels, regions, etc. are exaggerated for clarity.

[0049] It should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or there can also be an intermediate element. In contrast, when an element is referred to as being "directly on" another element, there is no intermediate element. In addition, in the specification, the term "on" or "above" means being disposed on or below the object part, and does not necessarily mean being disposed on the upper side of the object part based on the direction of gravity.

[0050] In addition, unless explicitly described to the contrary, the term "comprises" and variations such as "comprising" or "containing" should be understood to imply the inclusion of the stated elements without excluding any other elements.

[0051] In addition, throughout the specification, the phrase "in the plan view" means observing the object part from above, and the phrase "in the cross-sectional view" means observing the cross-section taken by vertically cutting the object part from the side.

[0052] Figure 1 The capacitor 1 according to an embodiment is shown, Figure 2 is shown along Figure 1 a longitudinal sectional view taken along line A - A', Figure 3 shows a structure in which the unit cell area UCA is arranged on the substrate 2, and Figure 4 shows Figure 2 a view of region B of

[0053] Referring to Figures 1 to 4, the capacitor 1 according to an embodiment may include a substrate 2, a lower electrode 10, an upper electrode 20, a dielectric layer 30, a first external electrode 61, and a second external electrode 62.

[0054] The substrate 2 may include a first surface 3 and a second surface 4 that are disposed opposite to each other. In Figure 2 this, the first surface 3 is shown facing upward, and the second surface 4 is shown facing downward. Accordingly, the first surface 3 may be defined as the upper surface, and the second surface 4 may be defined as the lower surface. Additionally, the direction in which the first surface 3 and the second surface 4 are spaced apart from each other may be defined as the thickness direction T. Further, the direction in which the upper surface 3 is disposed with respect to the lower surface 4 may be defined as upward, and the direction in which the lower surface 4 is disposed with respect to the upper surface 3 may be defined as downward.

[0055] The substrate 2 may have a predetermined width in a width direction W that intersects the thickness direction T. The width direction W may be perpendicular to the thickness direction T. The substrate 2 may have a predetermined length in a length direction L that intersects the thickness direction T and the width direction W. The length direction L may be perpendicular to the thickness direction T and the width direction W. In this case, the length direction L is the direction in which the first external electrode 61 and the second external electrode 62 (to be described later) are spaced apart from each other. Additionally, in the length direction L, the direction (or position) where the first external electrode 61 is disposed is referred to as the first end of the length direction L, and the direction (or position) where the second external electrode 62 is disposed is referred to as the second end of the length direction L. The length of the substrate 2 may be greater than the width of the substrate 2. Additionally, the length of the substrate 2 may be equal to the width of the substrate 2, or may be less than the width of the substrate 2.

[0056] The substrate 2 may include a support layer 5 and a substrate insulating layer 6. The substrate insulating layer 6 may be disposed on the support layer 5. According to some embodiments of the present disclosure, the support layer 5 may include a silicon material or the like. Additionally, the substrate insulating layer 6 may be disposed on the support layer 5 and have a predetermined thickness. The substrate insulating layer 6 may include silicon oxide (e.g., SiO2). According to some embodiments of the present disclosure, the substrate insulating layer 6 may be formed on the support layer 5 with a predetermined thickness by a deposition process, and the support layer 5 may be a wafer. The deposition process may include chemical vapor deposition (CVD), plasma-enhanced CVD, atomic layer deposition, etc., but the present disclosure is not limited thereto.

[0057] A plurality of electrode embedding spaces 8 are formed on the substrate 2. The electrode embedding space 8 may have a groove structure recessed from the first surface 3 toward the second surface 4. For example, the electrode embedding space 8 may have a trench structure extending from the first surface 3 toward the second surface 4. When the electrode embedding space 8 has a trench structure, the electrode embedding space 8 may have a structure extending in the width direction W of the substrate 2. Additionally, the electrode embedding space 8 may be a columnar space recessed from the first surface 3 of the substrate 2 toward the second surface 4. The electrode embedding space 8 may be provided in the substrate insulating layer 6. That is, the depth of the electrode embedding space 8 in the thickness direction T may be less than the thickness of the substrate insulating layer 6.

[0058] The region where the electrode embedding space 8 is formed may be divided into a plurality of unit cell regions UCA. According to some embodiments of the present disclosure, the region where the electrode embedding space 8 is formed may be divided into a plurality of unit cell regions UCA along the length direction L. That is, the region where the electrode embedding space 8 is formed along the length direction L may be divided into at least two unit cell regions UCA. Figure 2 and Figure 3 FIG. shows that the region where the electrode embedding space 8 is formed along the length direction L is divided into 4 unit cell regions UCA.

[0059] One or more electrode embedding spaces 8 may be provided in each unit cell region UCA based on the length direction L. In Figure 2 , one electrode embedding space 8 is provided in each unit cell region UCA based on the length direction L. However, this is an example, and two or more electrode embedding spaces 8 may also be provided in each unit cell region UCA based on the length direction L. Additionally, the number of electrode embedding spaces 8 provided in each unit cell region UCA based on the length direction L may be the same or different.

[0060] The capacitor 1 according to some embodiments includes a plurality of unit capacitor units UC. That is, the unit capacitor units UC are provided on the substrate 2. The unit capacitor units UC are respectively provided on the unit cell regions UCA. That is, one unit capacitor unit UC is provided on one unit cell region UCA. Each unit capacitor unit UC may include a lower electrode 10, an upper electrode 20, and a dielectric layer 30 provided on the unit cell region UCA.

[0061] A plurality of lower electrodes 10 may be provided on the substrate 2. The lower electrodes 10 may be provided on the electrode embedding space 8. That is, the lower electrodes 10 may be provided on the inner surface of the electrode embedding space 8. Further, when a plurality of electrode embedding spaces 8 are provided in one unit cell area UCA, the lower electrodes 10 are provided in a portion between adjacent electrode embedding spaces 8 included in the one unit cell area UCA on the first surface 3 of the substrate 2. Therefore, when a plurality of electrode embedding spaces 8 are provided in one unit cell area UCA, on the one unit cell area UCA, in the lower electrodes 10, portions provided on the inner surfaces of the plurality of electrode embedding spaces 8 may be connected to each other through the portion provided on the first surface 3 of the substrate 2. That is, one lower electrode 10 having portions connected to each other may be provided on the one unit cell area UCA.

[0062] The lower electrodes 10 may not exist between adjacent unit cell areas UCA. Further, an insulating layer 50 may be provided between the lower electrodes 10 provided in adjacent unit cell areas UCA. That is, one lower electrode 10 is provided on each unit cell area UCA, and the lower electrodes 10 provided on different unit cell areas UCA are separated from each other by the insulating layer 50.

[0063] A plurality of upper electrodes 20 are provided on the substrate 2. The upper electrodes 20 may be provided on the lower electrodes 10. The upper electrodes 20 may be provided on the electrode embedding space 8. That is, the upper electrodes 20 may be provided on the inner surface of the electrode embedding space 8. Further, when a plurality of electrode embedding spaces 8 are provided in one unit cell area UCA, the upper electrodes 20 are provided in a portion between adjacent electrode embedding spaces 8 included in the one unit cell area UCA on the first surface 3 of the substrate 2. Therefore, when a plurality of electrode embedding spaces 8 are provided in one unit cell area UCA, on the one unit cell area UCA, in the upper electrodes 20, portions provided on the inner surfaces of the plurality of electrode embedding spaces 8 may be connected to each other through the portion provided on the first surface 3 of the substrate 2. That is, one upper electrode 20 having portions connected to each other may be provided on the one unit cell area UCA.

[0064] The upper electrodes 20 may not be provided between adjacent unit cell areas UCA. Further, an insulating layer 50 may be provided between the upper electrodes 20 provided in adjacent unit cell areas UCA. That is, the upper electrodes 20 provided on different unit cell areas UCA may be separated from each other by the insulating layer 50.

[0065] The upper electrode 20 may not exist on at least a portion of the lower electrode 10. Accordingly, the lower electrode 10 may include a lower exposed portion 110, above which there is no upper electrode 20. The unit cell connection direction CD is oriented to pass through each unit cell area UCA once. That is, the unit cell connection direction CD is oriented to pass through each unit capacitor cell UC once. On one of the two lower electrodes 10 adjacent to each other along the unit cell connection direction CD, the lower exposed portion 110 may be provided at a first side of the unit cell connection direction CD. Additionally, in an area where the unit cell areas UCA are adjacent to each other, the lower exposed portions 110 of the lower electrodes 10 provided on each unit cell area UCA may be oriented in the same direction along the unit cell connection direction CD. For example, the lower exposed portion 110 may face a first end of the length direction L of the substrate 2 along the unit cell connection direction CD. Accordingly, one lower exposed portion 110 may be provided in a direction in which two adjacent unit cell areas UCA face each other along the unit cell connection direction CD. Additionally, in the lower electrode 10 provided on the unit cell area UCA provided at the first end of the length direction L, the lower exposed portion 110 may be provided in a direction other than the direction facing the adjacent unit cell area UCA. For example, in the lower electrode 10 provided on the unit cell area UCA provided at the first end of the length direction L, the lower exposed portion 110 may be provided in a direction toward the first end of the length direction L.

[0066] The upper electrode 20 may include an upper protruding portion 210 protruding toward an adjacent unit cell area UCA. The upper protruding portion 210 may be provided on a side opposite to the direction in which the lower exposed portion 110 is provided along the unit cell connection direction CD. Accordingly, on the same unit cell area UCA, the lower electrode 10 may not be provided below the upper protruding portion 210. The upper protruding portion 210 may protrude toward the lower exposed portion 110 of the lower electrode 10 provided on an adjacent unit cell area UCA. The upper protruding portion 210 may face the lower exposed portion 110 of the lower electrode 10 provided on an adjacent unit cell area UCA in the thickness direction T. Accordingly, the upper electrode 20 and the lower electrode 10 respectively provided in two adjacent unit cell areas UCA may be connected by an internal connection layer 40. The internal connection layer 40 may connect the upper protruding portion 210 of the upper electrode 20 and the lower exposed portion 110 of the lower electrode 10 respectively provided in two adjacent unit cell areas UCA. Opposite ends of the internal connection layer 40 may directly contact and be connected to the upper protruding portion 210 and the lower exposed portion 110 respectively provided on two adjacent unit cell areas UCA. According to some embodiments of the present disclosure, the internal connection layer 40 may be a via structure provided between the upper protruding portion 210 and the lower exposed portion 110 respectively positioned on two adjacent unit cell areas UCA.

[0067] The dielectric layer 30 may be disposed between the lower electrode 10 and the upper electrode 20. The dielectric layer 30 may not be located on the lower exposed portion 110.

[0068] The first external electrode 61 is connected to the lower electrode 10 on the unit cell area UCA provided at the first end in the longitudinal direction L. The first external electrode 61 may be disposed on the first surface 3 of the substrate 2. The insulating layer 50 may be disposed on the substrate 2 such that the lower electrode 10, the dielectric layer 30, and the upper electrode 20 may be covered. Additionally, the first external electrode 61 may be disposed on the first surface 3 of the substrate 2 to be at least partially exposed outside the insulating layer 50 on the first surface 3 of the substrate 2. The first external electrode 61 may be connected to the lower exposed portion 110 of the lower electrode 10 provided at the first end in the longitudinal direction L. The first external electrode 61 and the lower exposed portion 110 of the lower electrode 10 may be connected through the first external connection layer 46. The opposite ends of the first external connection layer 46 may directly contact the first external electrode 61 and the lower exposed portion 110 of the lower electrode 10, respectively. For example, the first external electrode 61 and the lower exposed portion 110 of the lower electrode 10 provided at the first end in the longitudinal direction L may face each other in the thickness direction T. The first external connection layer 46 may be a via structure provided between the first external electrode 61 and the lower exposed portion 110 of the lower electrode 10.

[0069] The second external electrode 62 may be disposed at an interval from the first external electrode 61 along the longitudinal direction L. The second external electrode 62 is connected to the upper electrode 20 on the unit cell area UCA provided at the second end in the longitudinal direction L. The second external electrode 62 may be disposed on the first surface 3 of the substrate 2. The second external electrode 62 may be disposed on the first surface 3 of the substrate 2 to be at least partially exposed outside the insulating layer 50 on the first surface 3 of the substrate 2. The second external electrode 62 may be connected to the upper electrode 20 provided at the opposite end of the first external electrode 61 along the longitudinal direction L. The second external electrode 62 and the upper electrode 20 may be connected through the second external connection layer 47. The opposite ends of the second external connection layer 47 may directly contact the second external electrode 62 and the upper electrode 20, respectively. For example, the second external electrode 62 and the upper electrode 20 provided at the second end in the longitudinal direction L may face each other in the thickness direction T. The second external connection layer 47 may be a via structure provided between the second external electrode 62 and the upper electrode 20.

[0070] The external electrode 60 may have a bump structure. Additionally, a plurality of first external electrodes 61 may be provided, and the first external electrodes 61 may be arranged at intervals from each other in the width direction W. If the first external electrodes 61 are arranged at intervals from each other, when current flows through the first external electrodes 61, the magnetic fields generated in each of the first external electrodes 61 are in opposite directions between the two first external electrodes 61. Therefore, the magnetic fluxes generated from the first external electrodes 61 cancel each other out, and the magnetic field generated around the first external electrodes 61 is reduced, thereby reducing the equivalent series resistance and the equivalent series inductance.

[0071] In addition, a plurality of second external electrodes 62 may be provided, and the second external electrodes 62 may be arranged to be spaced apart from each other in the width direction W. Therefore, when current flows through the second external electrodes 62, the magnetic field formed around the second external electrodes 62 may be reduced, thereby reducing the equivalent series resistance and the equivalent series inductance.

[0072] Figure 5 The structure of the external electrode 60 is shown.

[0073] Referring Figure 5 , the external electrode 60 may include an under bump metal (UBM) 610, a pillar 620, and a solder 630.

[0074] The UBM 610 may be provided such that at least a part thereof is exposed to the outside of the insulating layer 50. The UBM 610 may be connected to the external connection layers 46 and 47. The UBM 610 may include a conductive material. The UBM 610 may be made of a metal material. According to some embodiments of the present disclosure, the UBM 610 may include at least one selected from the group consisting of copper, nickel, nickel alloy, and copper alloy. In addition, the UBM 610 may have a single-layer structure or a multi-layer structure. If the UBM 610 has a multi-layer structure, the materials of each layer may be the same or different.

[0075] The pillar 620 is disposed on the UBM 610. The pillar 620 may be connected to the UBM 610 by directly contacting the UBM 610. The pillar 620 may include a conductive material. The pillar 620 may include a metal material. According to some embodiments of the present disclosure, the pillar 620 may include copper or the like.

[0076] The solder 630 may be disposed on the pillar 620. The solder 630 may include a conductive material. The solder 630 may include a metal material. According to some embodiments of the present disclosure, the solder 630 may include at least one selected from the group consisting of copper, gold, and a tin alloy (e.g., SnAg).

[0077] A bonding layer 640 may be disposed between the solder 630 and the pillar 620. The bonding layer 640 may include a conductive material. The bonding layer 640 may include a metal material. According to some embodiments of the present disclosure, the bonding layer 640 may include nickel or the like. In addition, the bonding layer 640 may be omitted, and the solder 630 may be directly connected to the pillar 620.

[0078] According to some embodiments, the capacitor 1 may have the following structure: The lower electrode 10 included in one unit capacitor unit UC (i.e., the first unit capacitor unit) among two unit capacitor units UC adjacent to each other in the unit cell connection direction CD and the upper electrode 20 included in the other unit capacitor unit UC (i.e., the second unit capacitor unit) among two unit capacitor units UC adjacent to each other in the unit cell connection direction CD may be connected through the internal connection layer 40, and a plurality of unit capacitor units UC may be connected to each other. The lower exposure part 110 may be provided in the first unit capacitor unit UC among two unit capacitor units UC adjacent to each other in the unit cell connection direction CD, and the upper protrusion part 210 may be provided in the second unit capacitor unit UC among two unit capacitor units UC adjacent to each other in the unit cell connection direction CD. In this case, the lower exposure part 110 may be provided to face the first side of the unit cell connection direction CD, and the upper protrusion part 210 may be provided to face the second side of the unit cell connection direction CD. Accordingly, two unit capacitor units UC adjacent to each other in the unit cell connection direction CD may be connected to each other through the upper protrusion part 210, the lower exposure part 110, and the internal connection layer 40. That is, a plurality of unit capacitor units UC may be connected in series with each other in the unit cell connection direction CD. In addition, the first external electrode 61 may be connected to the lower electrode 10 of the unit capacitor unit UC provided at the first end in the length direction L. In addition, the second external electrode 62 may be connected to the upper electrode 20 of the unit capacitor unit UC provided at the second end in the length direction L. The lower electrode 10 connected to the first external electrode 61 may become the first internal electrode. The upper electrode 20 connected to the second external electrode 62 may become the second internal electrode. In addition, the upper electrode 20 and the lower electrode 10 provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40 may become floating electrodes. Accordingly, the magnitude of the breakdown voltage of the capacitor 1 according to the embodiment may be increased, thereby greatly reducing the risk of occurrence of a breakdown phenomenon.

[0079] In addition, according to some embodiments, the capacitor 1 may control the number of floating electrodes by adjusting the number of unit capacitor units UC connected in series.

[0080] In addition, in the capacitor 1 according to some embodiments, the internal electrodes of the unit capacitor unit UC may be formed at a high density in a small space through a deposition process. According to some embodiments of the present disclosure, the unit capacitor unit UC may be formed through chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (plasma-enhanced CVD), or atomic layer deposition, but the present disclosure is not limited thereto. Accordingly, a high capacitance may be formed in a relatively small area.

[0081] Figure 6 The structure of the external electrode 60a according to another embodiment is shown.

[0082] Referring to Figure 6 , the external electrode 60a may include a UBM 610a and a solder 630a.

[0083] The UBM 610a may be arranged such that at least a part thereof is exposed to the outside of the insulating layer 50. The UBM 610a may be connected to the external connection layers 46 and 47. The UBM 610a may include a conductive material. The UBM 610a may include a metallic material. According to some embodiments of the present disclosure, the UBM 610a may include at least one selected from the group consisting of copper, nickel, nickel alloys, and copper alloys. Additionally, the UBM 610a may have a single-layer structure or a multi-layer structure. If the UBM 610a may have a multi-layer structure, the materials of each layer may be the same or different.

[0084] The solder 630a is disposed on the UBM 610a. The solder 630a may include a conductive material. The solder 630a may include a metallic material. According to some embodiments of the present disclosure, the solder 630a may include at least one selected from the group consisting of copper, gold, and tin alloys (e.g., SnAg).

[0085] Figure 7 A longitudinal cross-sectional view of a capacitor 1b according to another embodiment is shown.

[0086] Referring to Figure 7 , a capacitor 1b according to another embodiment may include a substrate 2b, a lower electrode 10b, an upper electrode 20b, a dielectric layer 30b, a first external electrode 61b, and a second external electrode 62b.

[0087] An electrode embedding space 8b is formed on the substrate 2b. The region where the electrode embedding space 8b is formed may be divided into a plurality of unit cell regions.

[0088] The structure of the substrate 2b and the structure in which the region where the electrode embedding space 8b is formed is divided into a plurality of unit cell regions are the same as or similar to the above-described structure in Figures 1 to 4 , and thus repeated descriptions will be omitted.

[0089] A capacitor 1b according to another embodiment includes a plurality of unit capacitor units UCb. The unit capacitor units UCb are respectively disposed on the unit cell regions. That is, one unit capacitor unit UCb is disposed on one unit cell region. Each unit capacitor unit UCb includes a lower electrode 10b, an upper electrode 20b, and a dielectric layer 30b disposed on the unit cell region. Two unit capacitor units UCb adjacent to each other along the unit cell connection direction are connected to each other.

[0090] A plurality of lower electrodes 10b are provided on the substrate 2b. The lower electrodes 10b may be provided on the electrode embedding space 8b. That is, the lower electrodes 10b may be provided on the inner surface of the electrode embedding space 8b. In addition, when a plurality of electrode embedding spaces 8b are provided in one unit cell region, the lower electrodes 10b are provided in a portion between adjacent electrode embedding spaces 8b included in the first surface of the substrate 2b in one unit cell region. Therefore, when a plurality of electrode embedding spaces 8b are provided in one unit cell region, on one unit cell region, in the lower electrodes 10b, the portions provided on the inner surfaces of the plurality of electrode embedding spaces 8b can be connected to each other through the portions provided on the first surface of the substrate 2b. That is, one lower electrode 10b having connected portions can be provided on one unit cell region.

[0091] The lower electrodes 10b may not be provided between adjacent unit cell regions. In addition, an insulating layer 50b may be provided between the lower electrodes 10b provided in adjacent unit cell regions. That is, one lower electrode 10b can be provided on each unit cell region, and the lower electrodes 10b provided on different unit cell regions can be separated from each other by the insulating layer 50b.

[0092] A plurality of upper electrodes 20b are provided on the substrate 2b. The upper electrodes 20b may be provided on the lower electrodes 10b. The upper electrodes 20b may be provided on the electrode embedding space 8b. That is, the upper electrodes 20b may be provided on the inner surface of the electrode embedding space 8b. In addition, when a plurality of electrode embedding spaces 8b are provided in one unit cell region, the upper electrodes 20b are provided in a portion between adjacent electrode embedding spaces 8b included in the first surface of the substrate 2b in one unit cell region. Therefore, when a plurality of electrode embedding spaces 8b are provided in one unit cell region, on one unit cell region, in the upper electrodes 20b, the portions provided on the inner surfaces of the plurality of electrode embedding spaces 8b can be connected to each other through the portions provided on the first surface of the substrate 2b. That is, one upper electrode 20b having connected portions can be provided on one unit cell region.

[0093] The upper electrodes 20b may not be provided between adjacent unit cell regions. In addition, an insulating layer 50b may be provided between the upper electrodes 20b provided in adjacent unit cell regions. That is, the upper electrodes 20b provided on different unit cell regions are separated from each other by the insulating layer 50b.

[0094] The upper electrode 20b may not exist on at least a portion of the lower electrode 10b. Accordingly, the lower electrode 10b may include a lower exposed portion 110b, above which there is no upper electrode 20b. On one of two lower electrodes 10b adjacent to each other in the unit cell connection direction, the lower exposed portion 110b may be disposed at a first side in the unit cell connection direction. Additionally, in regions adjacent to the unit cell regions, the lower exposed portions 110b of the lower electrodes 10b disposed on each unit cell region may be oriented in the same direction along the unit cell connection direction. According to some embodiments of the present disclosure, the lower exposed portion 110b may face a first end of the length direction L of the substrate 2b along the unit cell connection direction. Accordingly, one lower exposed portion 110b may be disposed in a direction in which two adjacent unit cell regions face each other along the unit cell connection direction. Additionally, among the lower electrodes 10b disposed on the unit cell region disposed at the first end of the length direction L, the lower exposed portion 110b may be disposed in a direction other than the direction facing the adjacent unit cell region. According to some embodiments of the present disclosure, among the lower electrodes 10b disposed on the unit cell region disposed at the first end of the length direction L, the lower exposed portion 110b may be disposed in a direction toward the first end of the length direction L. Additionally, among the lower electrodes 10b disposed on the unit cell region disposed at the second end of the length direction L, the lower exposed portion 110b may be disposed in a direction other than the direction facing the adjacent unit cell region. According to some embodiments of the present disclosure, among the lower electrodes 10b disposed on the unit cell region disposed at the second end of the length direction L, the lower exposed portion 110b may be disposed in a direction toward the second end of the length direction L. Accordingly, among the lower electrodes 10b disposed on the unit cell region disposed at the second end of the length direction L, the lower exposed portions 110b may be respectively disposed at opposite sides of the length direction L.

[0095] The upper electrode 20b may include an upper protrusion 210b that protrudes toward an adjacent unit cell region. The upper protrusion 210b may be disposed on the opposite side of the direction in which the lower exposure portion 110b is provided along the unit cell connection direction. Accordingly, the lower electrode 10b is not disposed below the upper protrusion 210b in the same unit cell region. The upper protrusion 210b may protrude toward the lower exposure portion 110b of the lower electrode 10b provided in an adjacent unit cell region. The upper protrusion 210b may face the lower exposure portion 110b of the lower electrode 10b provided in an adjacent unit cell region in the thickness direction T. Accordingly, the upper electrode 20b and the lower electrode 10b provided in two adjacent unit cell regions may be connected by an internal connection layer 40b. The internal connection layer 40b may connect the upper protrusion 210b of the upper electrode 20b and the lower exposure portion 110b of the lower electrode 10b provided in two adjacent unit cell regions, respectively. Opposite ends of the internal connection layer 40b may be directly in contact with and connected to the upper protrusion 210b and the lower exposure portion 110b provided on two adjacent unit cell regions, respectively. As an example, the internal connection layer 40b may be a via structure provided between the upper protrusion 210b and the lower exposure portion 110b respectively positioned on two adjacent unit cell regions.

[0096] The dielectric layer 30b may be provided between the lower electrode 10b and the upper electrode 20b. The dielectric layer 30b may not be located on the lower exposure portion 110b.

[0097] The first external electrode 61b is connected to the lower electrode 10b provided on the unit cell region at the first end in the length direction L. The first external electrode 61b may be provided on the first surface of the substrate 2b. The insulating layer 50b may be provided on the substrate 2b such that the lower electrode 10b, the dielectric layer 30b, and the upper electrode 20b are buried. In addition, the first external electrode 61b may be provided to be at least partially exposed outside the insulating layer 50b on the first surface of the substrate 2b. The first external electrode 61b may be connected to the lower exposure portion 110b of the lower electrode 10b provided at the first end in the length direction L. The first external electrode 61b and the lower exposure portion 110b of the lower electrode 10b may be connected by a first external connection layer 46b. Opposite ends of the first external connection layer 46b may be directly in contact with and connected to the first external electrode 61b and the lower exposure portion 110b of the lower electrode 10b, respectively. According to some embodiments of the present disclosure, the first external electrode 61b and the lower exposure portion 110b of the lower electrode 10b provided at the first end in the length direction L may face each other in the thickness direction T. The first external connection layer 46b may be a via structure provided between the first external electrode 61b and the lower exposure portion 110b of the lower electrode 10b.

[0098] The second external electrode 62b may be arranged to be spaced apart from the first external electrode 61b in the longitudinal direction L. The second external electrode 62b is connected to the lower electrode 10b on the unit cell region provided at the second end in the longitudinal direction L. The second external electrode 62b may be provided on the first surface of the substrate 2b. The second external electrode 62b may be arranged to be at least partially exposed outside the insulating layer 50b on the first surface of the substrate 2b. The second external electrode 62b may be connected to the lower electrode 10b provided at the opposite end of the first external electrode 61b in the longitudinal direction L. That is, the lower electrode 10b on the unit cell region provided on the opposite side of the first external electrode 61b in the longitudinal direction L may have a lower exposed portion 110b provided at the opposite side. Accordingly, the first lower exposed portion 110b of the two lower exposed portions 110b may face an adjacent unit cell region, and the second lower exposed portion 110b of the two lower exposed portions 110b may face the end portion (second end) of the substrate 2b in the longitudinal direction L. The second external electrode 62b and the lower electrode 10b provided at the opposite end of the first external electrode 61b in the longitudinal direction L may be connected by a second external connection layer 47b. Opposite ends of the second external connection layer 47b may directly contact and be connected to the second external electrode 62b and the lower exposed portion 110b, respectively. According to some embodiments of the present disclosure, the second external electrode 62b and the lower exposed portion 110 of the lower electrode 10b provided at the second end in the longitudinal direction L may face each other in the thickness direction T. The second external connection layer 47b may be a via structure provided between the second external electrode 62b and the lower exposed portion 110 of the lower electrode 10b.

[0099] The external electrodes 61b and 62b are the same as or similar to Figure 5 the above-mentioned external electrode 60 in Figure 6 or the above-mentioned external electrode 60a in

[0100] The capacitor 1b according to another embodiment has the following structure: the lower electrode 10b included in one unit capacitor unit UCb (i.e., the first unit capacitor unit) among two unit capacitor units UCb adjacent to each other in the unit cell connection direction and the upper electrode 20b included in the other unit capacitor unit UCb (i.e., the second unit capacitor unit) among two unit capacitor units UCb adjacent to each other in the unit cell connection direction are connected through the internal connection layer 40b, and a plurality of unit capacitor units UCb are connected to each other. The lower exposure part 110b may be provided in the first unit capacitor unit UCb among two unit capacitor units UCb adjacent to each other in the unit cell connection direction, and the upper protrusion part 210b may be provided in the second unit capacitor unit UCb among two unit capacitor units UCb adjacent to each other in the unit cell connection direction. In this case, the lower exposure part 110b may be provided to face the first side of the unit cell connection direction, and the upper protrusion part 210b may be provided to face the second side of the unit cell connection direction. Therefore, two unit capacitor units UCb adjacent to each other in the unit cell connection direction may be connected to each other through the upper protrusion part 210b, the lower exposure part 110b, and the internal connection layer 40b. That is, a plurality of unit capacitor units UCb are connected in series with each other in the unit cell connection direction. In addition, the first external electrode 61b may be connected to the lower electrode 10b of the unit capacitor unit UCb provided at the first end in the length direction L. In addition, the second external electrode 62b may be connected to the lower electrode 10b of the unit capacitor unit UCb provided at the second end in the length direction L. The lower electrode 10b connected to the first external electrode 61b becomes the first internal electrode. The lower electrode 10b connected to the second external electrode 62b and the upper electrode 20b connected to the lower electrode 10b become the second internal electrode. In addition, the upper electrode 20b and the lower electrode 10b provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40b become floating electrodes.

[0101] Figure 8 A longitudinal cross-sectional view of a capacitor 1c according to another embodiment of the present disclosure is shown.

[0102] Referring to Figure 8 , the capacitor 1c according to another embodiment may include a substrate 2c, a lower electrode 10c, an upper electrode 20c, a dielectric layer 30c, a first external electrode 61c, and a second external electrode 62c.

[0103] An electrode embedding space 8c is formed on the substrate 2c. The region where the electrode embedding space 8c is formed may be divided into a plurality of unit cell regions.

[0104] The structure of the substrate 2c and the structure in which the region where the electrode embedding space 8c is formed is divided into a plurality of unit cell regions are the same as Figures 1 to 4The above structures are the same or similar, so repeated descriptions will be omitted.

[0105] The capacitor 1c according to another embodiment includes a plurality of unit capacitor units UCc. The unit capacitor units UCc are respectively disposed on unit cell regions. That is, one unit capacitor unit UCc is disposed on one unit cell region. Each unit capacitor unit UCc includes a lower electrode 10c, an upper electrode 20c, and a dielectric layer 30c disposed on the unit cell region.

[0106] A plurality of lower electrodes 10c are disposed on the substrate 2c. The lower electrode 10c may be disposed on the electrode embedding space 8c. That is, the lower electrode 10c may be disposed on the inner surface of the electrode embedding space 8c. In addition, when a plurality of electrode embedding spaces 8c are disposed in one unit cell region, the lower electrode 10c is disposed in a portion between adjacent electrode embedding spaces 8c included in one unit cell region on the first surface of the substrate 2c. Therefore, when a plurality of electrode embedding spaces 8c are disposed in one unit cell region, on one unit cell region, in the lower electrode 10c, portions disposed on the inner surfaces of the plurality of electrode embedding spaces 8c may be connected to each other through a portion disposed on the first surface of the substrate 2c. That is, one lower electrode 10c having connected portions may be disposed on one unit cell region.

[0107] The lower electrode 10c may not be disposed between adjacent unit cell regions. In addition, an insulating layer 50c may be disposed between two adjacent lower electrodes 10c and on the exposed region of the substrate 2c. That is, one lower electrode 10c is disposed on each unit cell region, and the lower electrodes 10c disposed on different unit cell regions are separated from each other by the insulating layer 50c.

[0108] A plurality of upper electrodes 20c may be disposed on the lower electrode 10c. The upper electrode 20c may be disposed on the electrode embedding space 8c. That is, the upper electrode 20c may be disposed on the inner surface of the electrode embedding space 8c. In addition, when a plurality of electrode embedding spaces 8c are disposed in one unit cell region, the upper electrode 20c is disposed in a portion between adjacent electrode embedding spaces 8c included in one unit cell region on the first surface of the substrate 2c. Therefore, when a plurality of electrode embedding spaces 8c are disposed in one unit cell region, on one unit cell region, in the upper electrode 20c, portions disposed on the inner surfaces of the plurality of electrode embedding spaces 8c may be connected to each other through a portion disposed on the first surface of the substrate 2c. That is, adjacent upper electrodes 20c may be connected to each other through a portion of the upper electrode 20c disposed on the first surface of the substrate 2c.

[0109] According to some embodiments of the present disclosure, the upper electrode 20c may not be present between adjacent unit cell regions. In addition, the insulating layer 50c may be disposed between the upper electrodes 20c provided in adjacent unit cell regions. That is, the upper electrodes 20c provided on different unit cell regions may be separated from each other by the insulating layer 50c.

[0110] According to some embodiments of the present disclosure, the upper electrode 20c may not be present on at least a part of the lower electrode 10c. Accordingly, the lower electrode 10c may include a lower exposed portion 110c, above which there is no upper electrode 20c. On one of the two lower electrodes 10c adjacent in the unit cell connection direction, the lower exposed portion 110c may be present at a first side in the unit cell connection direction. Additionally, in a region where unit cell regions are adjacent, the lower exposed portions 110c of the lower electrodes 10c provided on each unit cell region may be oriented in the same direction along the unit cell connection direction. According to some embodiments of the present disclosure, the lower exposed portion 110c may face a first end of the length direction L of the substrate 2c along the unit cell connection direction. Accordingly, one lower exposed portion 110c may be present in a direction in which two adjacent unit cell regions face each other along the unit cell connection direction.

[0111] The upper electrode 20c may include an upper protruding portion 210c protruding toward an adjacent unit cell region. The upper protruding portion 210c may be disposed on a side opposite to the direction in which the lower exposed portion 110c is provided along the unit cell connection direction. Accordingly, on the same unit cell region, there is no lower electrode 10c below the upper protruding portion 210c. In addition, the upper protruding portion 210c may extend above the lower exposed portion 110c of the lower electrode 10c on an adjacent unit cell region. Accordingly, the upper electrode 20c and the lower electrode 10c provided in two adjacent unit cell regions, respectively, may be connected by an internal connection layer 40c. The internal connection layer 40c may connect the upper protruding portion 210c of the upper electrode 20c and the lower exposed portion 110c of the lower electrode 10c provided in two adjacent unit cell regions, respectively. Opposite ends of the internal connection layer 40c may directly contact and connect to the upper protruding portion 210c and the lower exposed portion 110c provided on two adjacent unit cell regions, respectively. According to some embodiments of the present disclosure, the internal connection layer 40c may be a via structure provided between the upper protruding portion 210c and the lower exposed portion 110c respectively located on two adjacent unit cell regions.

[0112] The dielectric layer 30c may be disposed between the lower electrode 10c and the upper electrode 20c. The dielectric layer 30c may not be located on the lower exposed portion 110c.

[0113] The first external electrode 61c is connected to the upper electrode 20c disposed on the unit cell region at the first end in the longitudinal direction L. The first external electrode 61c may be disposed on the first surface of the substrate 2c. The insulating layer 50c may be disposed on the substrate 2c such that the lower electrode 10c, the dielectric layer 30c, and the upper electrode 20c are covered by the insulating layer 50c. In addition, the first external electrode 61c may be disposed to be at least partially exposed outside the insulating layer 50c on the first surface of the substrate 2c. The first external electrode 61c may be connected to the upper electrode 20c disposed at the first end in the longitudinal direction L. The first external electrode 61c and the upper electrode 20c may be connected through the first external connection layer 46c. One surface of the first external connection layer 46c may directly contact the first external electrode 61c, and the other surface of the first external connection layer 46c opposite to the one surface may directly contact the upper electrode 20c. According to some embodiments of the present disclosure, the first external electrode 61c and the upper electrode 20c disposed at the first end in the longitudinal direction L may face each other in the thickness direction T. The first external connection layer 46c may be a via structure disposed between the first external electrode 61c and the upper electrode 20c.

[0114] The second external electrode 62c may be disposed to be spaced apart from the first external electrode 61c along the longitudinal direction L. The second external electrode 62c may be connected to the upper electrode 20c disposed on the unit cell region at the second end in the longitudinal direction L. The second external electrode 62c may be disposed on the first surface of the substrate 2c. The second external electrode 62c may be disposed to be at least partially exposed outside the insulating layer 50c on the first surface of the substrate 2c. The second external electrode 62c may be connected to the upper electrode 20c disposed at the opposite end of the first external electrode 61c along the longitudinal direction L. The second external electrode 62c and the upper electrode 20c may be connected through the second external connection layer 47c. One surface of the second external connection layer 47c may directly contact the second external electrode 62c, and the other surface of the second external connection layer 47c opposite to the one surface may directly contact the upper electrode 20c. According to some embodiments of the present disclosure, the second external electrode 62c and the upper electrode 20c disposed at the second end in the longitudinal direction L may face each other in the thickness direction T. The second external connection layer 47c may be a via structure disposed between the second external electrode 62c and the upper electrode 20c.

[0115] The external electrodes 61c and 62c and Figure 5 the above-mentioned external electrode 60 in Figure 6 or the above-mentioned external electrode 60a in

[0116] The capacitor 1c according to another embodiment has the following structure: the lower electrode 10c included in one unit capacitor unit UCc (i.e., the first unit capacitor unit) among two unit capacitor units UCc adjacent to each other in the unit cell connection direction and the upper electrode 20c included in the other unit capacitor unit UCc (i.e., the second unit capacitor unit) among two unit capacitor units UCc adjacent to each other in the unit cell connection direction are connected through the internal connection layer 40c, and a plurality of unit capacitor units UCc are connected to each other. The lower exposure part 110c may exist in the first unit capacitor unit UCc among two unit capacitor units UCc adjacent to each other in the unit cell connection direction, and the upper protrusion part 210c of the upper electrode 20c may be provided in the second unit capacitor unit UCc among two unit capacitor units UCc adjacent to each other in the unit cell connection direction. In this case, the lower exposure part 110c may be provided to face the first side of the unit cell connection direction, and the upper protrusion part 210c may be provided to face the second side of the unit cell connection direction. Therefore, two unit capacitor units UCc adjacent to each other in the unit cell connection direction may be connected to each other through the upper protrusion part 210c, the lower exposure part 110c, and the internal connection layer 40c. That is, a plurality of unit capacitor units UCc are connected in series with each other in the unit cell connection direction. In addition, the first external electrode 61c may be connected to the upper electrode 20c of the unit capacitor unit provided at the first end in the length direction L. In addition, the second external electrode 62c may be connected to the upper electrode 20c of the unit capacitor unit provided at the second end in the length direction L. The upper electrode 20c connected to the first external electrode 61c and the lower electrode 10c connected to the upper electrode 20c become the first internal electrode. The upper electrode 20c connected to the second external electrode 62c becomes the second internal electrode. In addition, the upper electrode 20c and the lower electrode 10c provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40c become floating electrodes.

[0117] According to at least one of the above embodiments, the first external electrode may be connected to the lower electrode or the upper electrode of the unit capacitor unit provided at the first end in the length direction L through the first external connection layer, and the second external electrode may be connected to the lower electrode or the upper electrode of the unit capacitor unit provided at the second end in the length direction L through the second external connection layer. In this case, the unit capacitor unit including the lower electrode or the upper electrode connected to the first external electrode may be referred to as the first connected capacitor unit, and the unit capacitor unit including the lower electrode or the upper electrode connected to the second external electrode may be referred to as the second connected capacitor unit.

[0118] Figure 9 A longitudinal sectional view of a capacitor 1d according to another embodiment is shown, and Figure 10 Shows the showing Figure 9A plan view showing the positions of the internal connection layer 40d, the first pad portion 48d, the second pad portion 49d, the first external electrode 61d, and the second external electrode 62d of the capacitor 1d shown.

[0119] Referring to Figure 9 and Figure 10 According to another embodiment, the capacitor 1d may include a substrate 2d, a lower electrode 10d, an upper electrode 20d, a dielectric layer 30d, a first external electrode 61d, and a second external electrode 62d.

[0120] An electrode embedding space 8d is formed on the substrate 2d. The region where the electrode embedding space 8d is formed may be divided into a plurality of unit cell regions.

[0121] The structure of the substrate 2d and the structure in which the region where the electrode embedding space 8d is formed is divided into a plurality of unit cell regions may be the same as or similar to the above structure in Figures 1 to 4 and thus repeated descriptions will be omitted.

[0122] According to another embodiment, the capacitor 1d includes a plurality of unit capacitor units UCd. The unit capacitor units UCd are respectively disposed on the unit cell regions. That is, one unit capacitor unit UCd is disposed on one unit cell region. Each unit capacitor unit UCd may include a lower electrode 10d, an upper electrode 20d, and a dielectric layer 30d disposed on the unit cell region.

[0123] A plurality of lower electrodes 10d may be disposed on the substrate 2d. The lower electrode 10d may be disposed on the electrode embedding space 8d. That is, the lower electrode 10d may be disposed on the inner surface of the electrode embedding space 8d. In addition, when a plurality of electrode embedding spaces 8d are disposed in one unit cell region, the lower electrode 10d may be disposed in a portion between adjacent electrode embedding spaces 8d included in one unit cell region on the first surface of the substrate 2d. Therefore, when a plurality of electrode embedding spaces 8d are disposed in one unit cell region, on one unit cell region, in the lower electrode 10d, the portions disposed on the inner surfaces of the plurality of electrode embedding spaces 8d may be connected to each other through the portion disposed on the first surface of the substrate 2d. That is, two adjacent lower electrodes 10d may be connected to each other through the portion of the lower electrode 10d disposed on the first surface of the substrate 2d.

[0124] The lower electrode 10d may not be disposed between adjacent unit cell regions. In addition, an insulating layer 50d may be disposed between the lower electrodes 10d disposed in adjacent unit cell regions. That is, one lower electrode 10d is disposed on each unit cell region, and the lower electrodes 10d disposed on different unit cell regions are separated from each other by the insulating layer 50d.

[0125] A plurality of upper electrodes 20d are provided on a substrate 2d. The upper electrode 20d may be provided on the lower electrode 10d. The upper electrode 20d may be provided on the electrode embedding space 8d. That is, the upper electrode 20d may be provided on the inner surface of the electrode embedding space 8d. In addition, when a plurality of electrode embedding spaces 8d are provided in one unit cell region, the upper electrode 20d may be provided in a portion between adjacent electrode embedding spaces 8d included in the first surface of the substrate 2d in one unit cell region. Therefore, when a plurality of electrode embedding spaces 8d are provided in one unit cell region, on one unit cell region, in the upper electrode 20d, portions provided on the inner surfaces of the plurality of electrode embedding spaces 8d may be connected to each other through a portion provided on the first surface of the substrate 2d. That is, one upper electrode 20d having connected portions may be provided on one unit cell region.

[0126] The upper electrode 20d may not be provided between adjacent unit cell regions. In addition, an insulating layer 50d may be provided between the upper electrodes 20d provided in adjacent unit cell regions. That is, the upper electrodes 20d provided on different unit cell regions are separated from each other by the insulating layer 50d.

[0127] The upper electrode 20d may not exist on at least a part of the lower electrode 10d. Therefore, the lower electrode 10d may include a lower exposed portion 110d, and there is no upper electrode 20d above the lower exposed portion 110d. On one of the two lower electrodes 10d adjacent in the unit cell connection direction, the lower exposed portion 110d may be provided at a first side in the unit cell connection direction. In addition, in a region adjacent to the unit cell region, the lower exposed portions 110d of the lower electrodes 10d provided on each unit cell region may be oriented in the same direction along the unit cell connection direction. According to some embodiments of the present disclosure, the lower exposed portion 110d may face the first end of the length direction L of the substrate 2d along the unit cell connection direction. Therefore, one lower exposed portion 110d may be provided in a direction in which two adjacent unit cell regions face each other along the unit cell connection direction.

[0128] The upper electrode 20d and the lower electrode 10d disposed in two adjacent unit cell regions can be connected through the internal connection layer 40d. The internal connection layer 40d may include a first internal connection layer 41d, a second internal connection layer 42d, and a third internal connection layer 43d. The first internal connection layer 41d can be connected to the lower electrode 10d among the upper electrode 20d and the lower electrode 10d disposed in two adjacent unit cell regions. The first internal connection layer 41d may have a via structure, and the lower end of the first internal connection layer 41d can be connected to the lower exposed portion 110d of the lower electrode 10d. The lower end of the first internal connection layer 41d can directly contact the lower exposed portion 110d of the lower electrode 10d. One or more first internal connection layers 41d can be connected to one lower exposed portion 110d.

[0129] The second internal connection layer 42d is connected to the upper electrode 20d among the upper electrode 20d and the lower electrode 10d disposed in two adjacent unit cell regions. The second internal connection layer 42d may have a via structure, and the lower end of the second internal connection layer 42d can be connected to the upper electrode 20d. The lower end of the second internal connection layer 42d can directly contact the upper electrode 20d. One or more second internal connection layers 42d can be connected to one upper electrode 20d.

[0130] The third internal connection layer 43d can connect the first internal connection layer 41d and the second internal connection layer 42d. The first internal connection layer 41d is connected to the lower electrode 10d of one unit cell region among two adjacent unit cell regions, and the second internal connection layer 42d is connected to the upper electrode 20d of the other unit cell region among two adjacent unit cell regions. The third internal connection layer 43d can extend along the unit cell connection direction to be disposed on two adjacent unit cell regions. According to some embodiments of the present disclosure, the third internal connection layer 43d may have a plate-like structure.

[0131] The upper electrode 20d and the lower electrode 10d disposed in two adjacent unit cell regions can be connected through a plurality of internal connection layers 40d arranged in parallel. The internal connection layers 40d can be arranged to be spaced apart in a direction intersecting the unit cell connection direction.

[0132] The dielectric layer 30d can be disposed between the lower electrode 10d and the upper electrode 20d. The dielectric layer 30d may not be located on the lower exposed portion 110d.

[0133] The first external electrode 61d may be connected to the lower electrode 10d provided on the unit cell region at the first end in the longitudinal direction L. The first external electrode 61d may be provided on the first surface of the substrate 2d. The insulating layer 50d may be provided on the substrate 2d so that the lower electrode 10d, the dielectric layer 30d, and the upper electrode 20d may be covered. Additionally, the first external electrode 61d may be provided to be at least partially exposed outside the insulating layer 50d on the first surface of the substrate 2d. The first external electrode 61d may be connected to the lower exposed portion 110d of the lower electrode 10d provided at the first end in the longitudinal direction L. The first external electrode 61d and the lower exposed portion 110d of the lower electrode 10d may be connected through the first external connection layer 46d. According to some embodiments of the present disclosure, the first external electrode 61d and the lower exposed portion 110d of the lower electrode 10d provided at the first end in the longitudinal direction L may face each other in the thickness direction T. The first external connection layer 46d may be a via structure provided between the first external electrode 61d and the lower exposed portion 110d of the lower electrode 10d. The lower end of the first external connection layer 46d may directly contact and be connected to the lower exposed portion 110d of the lower electrode 10d. The first external connection layer 46d may be connected to the first external electrode 61d through the first pad portion 48d. That is, the upper end of the first external connection layer 46d may be connected to the first pad portion 48d, and the first external electrode 61d may be connected to the first pad portion 48d. The first pad portion 48d may have a plate-like structure. Thus, when a plurality of first external electrodes 61d are provided, the first external electrodes 61d may be connected to each other through the first pad portion 48d. One or more first external connection layers 46d may be connected to one lower exposed portion 110d.

[0134] The second outer electrode 62d may be set to be spaced apart from the first outer electrode 61d in the length direction L. The second outer electrode 62d may be connected to the upper electrode 20d on the unit cell region provided at the second end in the length direction L. The second outer electrode 62d may be provided on the first surface of the substrate 2d. The second outer electrode 62d may be set to be at least partially exposed outside the insulating layer 50d on the first surface of the substrate 2d. The second outer electrode 62d may be connected to the upper electrode 20d provided at the opposite end of the first outer electrode 61d in the length direction L. The second outer electrode 62d and the upper electrode 20d may be connected through the second external connection layer 47d. According to some embodiments of the present disclosure, the second outer electrode 62d and the upper electrode 20d provided at the second end in the length direction L may face each other in the thickness direction T. The second external connection layer 47d may be a via structure provided between the second outer electrode 62d and the upper electrode 20d. The lower end of the second external connection layer 47d may directly contact the upper electrode 20d. The second external connection layer 47d may be connected to the second outer electrode 62d through the second pad portion 49d. That is, the upper end of the second external connection layer 47d may be connected to the second pad portion 49d, and the second outer electrode 62d may be connected to the second pad portion 49d. The second pad portion 49d may have a plate-like structure. Therefore, when a plurality of second outer electrodes 62d are provided, the second outer electrodes 62d may be connected to each other through the second pad portion 49d. One or more second external connection layers 47d may be connected to one upper electrode 20d.

[0135] The outer electrodes 61d and 62d may be the same as or similar to Figure 5 the above-mentioned outer electrode 60 in Figure 6 or the above-mentioned outer electrode 60a in

[0136] The capacitor 1d according to another embodiment has the following structure: the lower electrode 10d included in one unit capacitor unit UCd (i.e., the first unit capacitor unit) among two unit capacitor units UCd adjacent to each other in the unit cell connection direction and the upper electrode 20d included in the other unit capacitor unit UCd (i.e., the second unit capacitor unit) among two unit capacitor units UCd adjacent to each other in the unit cell connection direction are connected through the internal connection layer 40d, and a plurality of unit capacitor units UCd are connected to each other. The lower exposed portion 110d may be provided in one unit capacitor unit UCd among two unit capacitor units UCd adjacent to each other in the unit cell connection direction. In this case, the lower exposed portion 110d may be provided to face the first side in the unit cell connection direction. Therefore, two unit capacitor units UCd adjacent to each other in the unit cell connection direction may be connected to each other through the lower exposed portion 110d, the internal connection layer 40d, and the upper electrode 20d. That is, a plurality of unit capacitor units UCd are connected in series with each other in the unit cell connection direction. In addition, the first external electrode 61d may be connected to the lower electrode 10d of the unit capacitor unit UCd provided at the first end in the length direction L. In addition, the second external electrode 62d may be connected to the upper electrode 20d of the unit capacitor unit UCd provided at the second end in the length direction L. The lower electrode 10d connected to the first external electrode 61d becomes the first internal electrode. The upper electrode 20d connected to the second external electrode 62d becomes the second internal electrode. In addition, the upper electrode 20d and the lower electrode 10d provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40d become floating electrodes.

[0137] In addition, similar to Figure 7 the above description, the first external electrode 61d may be connected to the lower electrode 10d of the unit capacitor unit UCd provided at the first end in the length direction L. In addition, the second external electrode 62d may be connected to the lower electrode 10d of the unit capacitor unit UCd provided at the second end in the length direction L. The lower electrode 10d connected to the first external electrode 61d becomes the first internal electrode. The lower electrode 10d connected to the second external electrode 62d and the upper electrode 20d connected to the lower electrode 10d become the second internal electrode. In addition, the upper electrode 20d and the lower electrode 10d provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40d become floating electrodes. For this purpose, the lower electrode 10d of the unit capacitor unit UCd provided at the second end in the length direction L may have the lower exposed portion 110d provided at the opposite side. Therefore, the first lower exposed portion 110d among the two lower exposed portions 110d may face the adjacent unit cell region, and the second lower exposed portion 110d among the two lower exposed portions 110d may face the end portion (second end) of the substrate 2d in the length direction L.

[0138] In addition, similar toFigure 8 Similar to the above description in [reference], the first external electrode 61d can be connected to the upper electrode 20d of the unit capacitor unit UCd provided at the first end in the longitudinal direction L. Additionally, the second external electrode 62d can be connected to the upper electrode 20d of the unit capacitor unit UCd provided at the second end in the longitudinal direction L. The upper electrode 20d connected to the first external electrode 61d and the lower electrode 10d connected to this upper electrode 20d form the first internal electrode. The upper electrode 20d connected to the second external electrode 62d forms the second internal electrode. Additionally, the upper electrode 20d and the lower electrode 10d provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40d form the floating electrode.

[0139] In this case, the unit capacitor unit UCd provided at the first end in the longitudinal direction L and including the lower electrode 10d or the upper electrode 20d connected to the first external electrode 61d can be referred to as the first connection capacitor unit. Additionally, the unit capacitor unit UCd provided at the second end in the longitudinal direction L and including the lower electrode 10d or the upper electrode 20d connected to the second external electrode 62d can be referred to as the second connection capacitor unit.

[0140] Figure 11 FIG. 1e shows a capacitor 1e according to another embodiment, and Figure 12 shows a longitudinal cross-sectional view taken along Figure 11 line B - B'.

[0141] Referring to Figure 11 and Figure 12 FIGS. [reference], the capacitor 1e according to another embodiment may include a substrate 2e, a lower electrode 10e, an upper electrode 20e, a dielectric layer 30e, a first external electrode 61e, and a second external electrode 62e.

[0142] The substrate 2e may include a support layer 5e and a substrate insulating layer 6e. An electrode embedding space 8e is formed on the substrate 2e. The region where the electrode embedding space 8e is formed may be divided into a plurality of unit cell regions.

[0143] The structure of the substrate 2e and the structure in which the region where the electrode embedding space 8e is formed is divided into a plurality of unit cell regions are the same as or similar to the above structure in Figures 1 to 4 FIGS. [reference], so the repeated description will be omitted.

[0144] The capacitor 1e according to another embodiment includes a plurality of unit capacitor units UCe. The unit capacitor units UCe are respectively provided on the unit cell regions. That is, one unit capacitor unit UCe is provided on one unit cell region. Each unit capacitor unit UCe includes a lower electrode 10e, an upper electrode 20e, and a dielectric layer 30e provided on the unit cell region.

[0145] The structures of the lower electrode 10e, the upper electrode 20e, the dielectric layer 30e, and the insulating layer 50e may be the same as or similar to those of the lower electrode 10d, the upper electrode 20d, the dielectric layer 30d, and the insulating layer 50d of the above-described capacitor 1d in Figure 9 and Figure 10 , and thus the repetitive description will be omitted.

[0146] The upper electrode 20e and the lower electrode 10e respectively disposed in two adjacent unit cell regions may be connected by an internal connection layer 40e. The structure of the internal connection layer 40e is the same as or similar to that of the internal connection layer 40d of the above-described capacitor 1d in Figure 9 and Figure 10 , and the repetitive description will be omitted.

[0147] The first external electrode 61e is connected to the lower electrode 10e disposed on the unit cell region at the first end in the length direction L. The first external electrode 61e may be disposed on the first surface of the substrate 2e. The insulating layer 50e may be disposed on the substrate 2e such that the lower electrode 10e, the dielectric layer 30e, and the upper electrode 20e may be covered. Additionally, the first external electrode 61e may be disposed to be at least partially exposed outside the insulating layer 50e on the first surface of the substrate 2e. The first external electrode 61e may be connected to the lower exposed portion 110e of the lower electrode 10e disposed at the first end in the length direction L. The first external electrode 61e may be connected to the lower exposed portion 110e of the lower electrode 10e through a first external connection layer 41e, a first pad portion 42e, a first extended connection layer 43e, and a first extended pad portion 44e.

[0148] The first external connection layer 41e may have a via structure, and the lower end of the first external connection layer 41e may directly contact the lower exposed portion 110e of the lower electrode 10e. One or more first external connection layers 41e may be connected to one lower exposed portion 110e. The first pad portion 42e may directly contact the upper end of the first external connection layer 41e. The first pad portion 42e may have a plate-like structure. The first extended connection layer 43e may have a via structure, and the lower end of the first extended connection layer 43e may directly contact and be connected to the first pad portion 42e. One or more first extended connection layers 43e may be connected to the first pad portion 42e. The first extended pad portion 44e may directly contact and be connected to the upper end of the first extended connection layer 43e. The first extended pad portion 44e may have a plate-like structure. A part of the first extended pad portion 44e may face the internal connection layer 40e in the thickness direction T. The area of the first extended pad portion 44e (e.g., the projected area in the thickness direction) may be larger than the area of one unit cell region. That is, the area of the first extended pad portion 44e may be larger than the area of one unit capacitor cell UCe. The first external electrode 61e may be connected to the first extended pad portion 44e. A plurality of first external electrodes 61e may be provided, and the first external electrodes 61e may be arranged to be spaced apart from each other in the width direction W. Additionally, the first external electrodes 61e may be arranged to be spaced apart from each other in the length direction L.

[0149] The second external electrode 62e may be connected to the upper electrode 20e provided on the unit cell region at the second end in the length direction L. The second external electrode 62e may be provided on the first surface of the substrate 2e. The second external electrode 62e may be provided to be at least partially exposed outside the insulating layer 50e on the first surface of the substrate 2e. The second external electrode 62e may be connected to the upper electrode 20e provided at the second end in the length direction L. The second external electrode 62e may be connected to the upper electrode 20e through the second external connection layer 45e, the second pad portion 46e, the second extended connection layer 47e, and the second extended pad portion 48e.

[0150] The second external connection layer 45e may have a via structure, and the lower end of the second external connection layer 45e may directly contact and be connected to the upper electrode 20e. One or more second external connection layers 45e may be connected to one upper electrode 20e. The second pad portion 46e may directly contact and be connected to the upper end of the second external connection layer 45e. The second pad portion 46e may have a plate-like structure. The second extended connection layer 47e may have a via structure, and the lower end of the second extended connection layer 47e may directly contact and be connected to the second pad portion 46e. One or more second extended connection layers 47e may be connected to the second pad portion 46e. The second extended pad portion 48e may directly contact and be connected to the upper end of the second extended connection layer 47e. The second extended pad portion 48e may have a plate-like structure. A part of the second extended pad portion 48e may face the internal connection layer 40e in the thickness direction T. The area of the second extended pad portion 48e may be larger than the area of one unit cell region. That is, the area of the second extended pad portion 48e may be larger than the area of one unit capacitor cell UCe. The second external electrode 62e may be connected to the second extended pad portion 48e. A plurality of second external electrodes 62e may be provided, and the second external electrodes 62e may be arranged to be spaced apart from each other in the width direction W. Additionally, the second external electrodes 62e may be arranged to be spaced apart from each other in the length direction L.

[0151] The external electrodes 61e and 62e are the same as or similar to Figure 5 the above-described external electrode 60 in Figure 6 or the above-described external electrode 60a in

[0152] The capacitor 1e according to another embodiment has the following structure: the lower electrode 10e included in one unit capacitor unit UCe (i.e., the first unit capacitor unit) among two unit capacitor units UCe adjacent to each other in the unit cell connection direction and the upper electrode 20e included in the other unit capacitor unit UCe (i.e., the second unit capacitor unit) among two unit capacitor units UCe adjacent to each other in the unit cell connection direction are connected through the internal connection layer 40e, and a plurality of unit capacitor units UCe are connected to each other. The lower exposure part 110e may be provided in one unit capacitor unit UCe among two unit capacitor units UCe adjacent to each other in the unit cell connection direction. In this case, the lower exposure part 110e may be provided to face the first side in the unit cell connection direction. Therefore, two unit capacitor units UCe adjacent to each other in the unit cell connection direction may be connected to each other through the lower exposure part 110e, the internal connection layer 40e, and the upper electrode 20e. That is, a plurality of unit capacitor units UCe are connected in series with each other in the unit cell connection direction. In addition, the first external electrode 61e may be connected to the lower electrode 10e of the unit capacitor unit UCe provided at the first end in the length direction L. In addition, the second external electrode 62e may be connected to the upper electrode 20e of the unit capacitor unit UCe provided at the second end in the length direction L. The lower electrode 10e connected to the first external electrode 61e becomes the first internal electrode. The upper electrode 20e connected to the second external electrode 62e becomes the second internal electrode. In addition, the upper electrode 20e and the lower electrode 10e provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40e become floating electrodes.

[0153] In addition, similar to Figure 7 the above description, the first external electrode 61e may be connected to the lower electrode 10e of the unit capacitor unit UCe provided at the first end in the length direction L. In addition, the second external electrode 62e may be connected to the lower electrode 10e of the unit capacitor unit UCe provided at the second end in the length direction L. The lower electrode 10e connected to the first external electrode 61e becomes the first internal electrode. The lower electrode 10e connected to the second external electrode 62e and the upper electrode 20e connected to the lower electrode 10e become the second internal electrode. In addition, the upper electrode 20e and the lower electrode 10e provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40e become floating electrodes. For this purpose, the lower electrode 10e of the unit capacitor unit UCe provided at the second end in the length direction L may have the lower exposure part 110e provided at the opposite side. Therefore, the first lower exposure part 110e among the two lower exposure parts 110e may face the adjacent unit cell region, and the second lower exposure part 110e among the two lower exposure parts 110e may face the end (second end) of the substrate 2e in the length direction L.

[0154] In addition, similar toFigure 8 Similar to the above description in [reference], the first external electrode 61e can be connected to the upper electrode 20e of the unit capacitor unit UCe provided at the first end in the longitudinal direction L. Additionally, the second external electrode 62e can be connected to the upper electrode 20e of the unit capacitor unit UCe provided at the second end in the longitudinal direction L. The upper electrode 20e connected to the first external electrode 61e and the lower electrode 10e connected to this upper electrode 20e form the first internal electrode. The upper electrode 20e connected to the second external electrode 62e forms the second internal electrode. Additionally, the upper electrode 20e and the lower electrode 10e provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40e form the floating electrode.

[0155] In this case, the unit capacitor unit UCe provided at the first end in the longitudinal direction L and including the lower electrode 10e or the upper electrode 20e connected to the first external electrode 61e can be referred to as the first connection capacitor unit. Additionally, the unit capacitor unit UCe provided at the second end in the longitudinal direction L and including the lower electrode 10e or the upper electrode 20e connected to the second external electrode 62e can be referred to as the second connection capacitor unit.

[0156] Figure 13 A longitudinal cross-sectional view of the capacitor 1f according to another embodiment is shown.

[0157] Referring to Figure 13 , the capacitor 1f according to another embodiment may include a substrate 2f, a lower electrode 10f, an upper electrode 20f, a dielectric layer 30f, a first external electrode 61f, and a second external electrode 62f.

[0158] An electrode embedding space 8f is formed on the substrate 2f. The region where the electrode embedding space 8f is formed can be divided into a plurality of unit cell regions.

[0159] The structure of the substrate 2f and the structure in which the region where the electrode embedding space 8f is formed is divided into a plurality of unit cell regions can be the same as or similar to the above structure in Figures 1 to 4 , so the repeated description will be omitted.

[0160] The capacitor 1f according to another embodiment includes a plurality of unit capacitor units UCf. The unit capacitor units UCf are respectively provided on the unit cell regions. That is, one unit capacitor unit UCf is provided on one unit cell region. Each unit capacitor unit UCf includes a lower electrode 10f, an upper electrode 20f, and a dielectric layer 30f provided on the unit cell region.

[0161] The structures of the lower electrode 10f, the upper electrode 20f, the dielectric layer 30f, and the insulating layer 50f can be the same as those in Figure 9 and Figure 10The structures of the lower electrode 10d, upper electrode 20d, dielectric layer 30d, and insulating layer 50d of the above-mentioned capacitor 1d are the same or similar, so the repeated description will be omitted.

[0162] The upper electrode 20f and the lower electrode 10f respectively disposed in two adjacent unit cell regions can be connected through the internal connection layer 40f. The structure of the internal connection layer 40f can be the same or similar to Figure 9 and Figure 10 the structure of the internal connection layer 40d of the above-mentioned capacitor 1d, and the repeated description will be omitted.

[0163] The first external electrode 61f is connected to the lower electrode 10f disposed on the unit cell region at the first end in the length direction L. The first external electrode 61f can be disposed on the first surface of the substrate 2f. The insulating layer 50f can be disposed on the substrate 2f such that the lower electrode 10f, dielectric layer 30f, and upper electrode 20f can be covered by the insulating layer 50f. In addition, the first external electrode 61f can be disposed to be at least partially exposed outside the insulating layer 50f on the first surface of the substrate 2f. The first external electrode 61f can be connected to the lower exposed portion 110f of the lower electrode 10f disposed at the first end in the length direction L. The first external electrode 61f can be connected to the lower exposed portion 110f of the lower electrode 10f through the first external connection layer 41f and the first pad portion 44f.

[0164] The first external connection layer 41f can have a via structure, and the lower end of the first external connection layer 41f can directly contact the lower exposed portion 110f of the lower electrode 10f. One or more first external connection layers 41f can be connected to one lower exposed portion 110f. The first pad portion 44f can directly contact the upper end of the first external connection layer 41f. The first pad portion 44f can have a plate-like structure. The first pad portion 44f can extend in the length direction L such that a part of the lower surface of the first pad portion 44f can face the upper surface of the internal connection layer 40f in the thickness direction T. The area of the first pad portion 44f (e.g., the projected area in the thickness direction) can be larger than the area of one unit cell region. That is, the area of the first pad portion 44f can be larger than the area of one unit capacitor cell UCf. The first external electrode 61f can be connected to the first pad portion 44f. A plurality of first external electrodes 61f can be provided, and the first external electrodes 61f can be arranged to be spaced apart from each other in the width direction W. In addition, the first external electrodes 61f can be arranged to be spaced apart from each other in the length direction L.

[0165] The second external electrode 62f is connected to the upper electrode 20f disposed on the unit cell region at the second end in the longitudinal direction L. The second external electrode 62f may be disposed on the first surface of the substrate 2f. The second external electrode 62f may be disposed so as to be at least partially exposed outside the insulating layer 50f on the first surface of the substrate 2f. The second external electrode 62f may be connected to the upper electrode 20f disposed at the second end in the longitudinal direction L. The second external electrode 62f may be connected to the upper electrode 20f through the second external connection layer 45f and the second pad portion 48f.

[0166] The second external connection layer 45f may have a via structure, and the lower end of the second external connection layer 45f may directly contact the upper electrode 20f. One or more second external connection layers 45f may be connected to one upper electrode 20f. The second pad portion 48f may directly contact and be connected to the upper end of the second external connection layer 45f. The second pad portion 48f may have a plate-like structure. The second pad portion 48f may extend in the longitudinal direction L such that a part of the lower surface of the second pad portion 48f may face the upper surface of the internal connection layer 40f in the thickness direction T. The area of the second pad portion 48f (e.g., the projected area in the thickness direction) may be larger than the area of one unit cell region. That is, the area of the second pad portion 48f may be larger than the area of one unit capacitor cell UCf. The second external electrode 62f may be connected to the second pad portion 48f. A plurality of second external electrodes 62f may be provided, and the second external electrodes 62f may be arranged to be spaced apart from each other in the width direction W. In addition, the second external electrodes 62f may be arranged to be spaced apart from each other in the longitudinal direction L.

[0167] The external electrodes 61f and 62f may be the same as or similar to the above-described external electrode 60 in Figure 5 or the above-described external electrode 60a in Figure 6 and a repeated description thereof will be omitted.

[0168] According to another embodiment, the capacitor 1f may have the following structure: The lower electrode 10f included in one unit capacitor unit UCf (i.e., the first unit capacitor unit) among two unit capacitor units UCf adjacent to each other in the unit cell connection direction and the upper electrode 20f included in the other unit capacitor unit UCf (i.e., the second unit capacitor unit) among two unit capacitor units UCf adjacent to each other in the unit cell connection direction may be connected through the internal connection layer 40f, and a plurality of unit capacitor units UCf may be connected to each other. The lower exposure portion 110f may be provided in one unit capacitor unit UCf among two unit capacitor units UCf adjacent to each other in the unit cell connection direction. In this case, the lower exposure portion 110f may be provided to face the first side of the unit cell connection direction. Accordingly, two unit capacitor units UCf adjacent to each other in the unit cell connection direction may be connected to each other through the lower exposure portion 110f, the internal connection layer 40f, and the upper electrode 20f. That is, a plurality of unit capacitor units UCf are connected in series with each other in the unit cell connection direction. In addition, the first external electrode 61f may be connected to the lower electrode 10f of the unit capacitor unit UCf provided at the first end in the length direction L. Further, the second external electrode 62f may be connected to the upper electrode 20f of the unit capacitor unit UCf provided at the second end in the length direction L. The lower electrode 10f connected to the first external electrode 61f may become the first internal electrode. The upper electrode 20f connected to the second external electrode 62f becomes the second internal electrode. In addition, the upper electrode 20f and the lower electrode 10f provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40f become floating electrodes.

[0169] In addition, similar to the above description in Figure 7 the first external electrode 61f may be connected to the lower electrode 10f of the unit capacitor unit UCf provided at the first end in the length direction L. Further, the second external electrode 62f may be connected to the lower electrode 10f of the unit capacitor unit UCf provided at the second end in the length direction L. The lower electrode 10f connected to the first external electrode 61f becomes the first internal electrode. The lower electrode 10f connected to the second external electrode 62f and the upper electrode 20f connected to the lower electrode 10f become the second internal electrode. In addition, the upper electrode 20f and the lower electrode 10f provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40f become floating electrodes. For this purpose, the lower electrode 10f of the unit capacitor unit UCf provided at the second end in the length direction L may have the lower exposure portion 110f provided at the opposite side. Accordingly, the first lower exposure portion 110f among the two lower exposure portions 110f may face the adjacent unit cell region, and the second lower exposure portion 110f among the two lower exposure portions 110f may face the end portion (second end) of the substrate 2f in the length direction L.

[0170] In addition, similar toFigure 8 Similar to the above description in [reference], the first external electrode 61f can be connected to the upper electrode 20f of the unit capacitor unit UCf provided at the first end in the longitudinal direction L. In addition, the second external electrode 62f can be connected to the upper electrode 20f of the unit capacitor unit UCf provided at the second end in the longitudinal direction L. The upper electrode 20f connected to the first external electrode 61f and the lower electrode 10f connected to the upper electrode 20f form the first internal electrode. The upper electrode 20f connected to the second external electrode 62f forms the second internal electrode. In addition, the upper electrode 20f and the lower electrode 10f provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40f form the floating electrode.

[0171] In this case, the unit capacitor unit UCf provided at the first end in the longitudinal direction L and including the lower electrode 10f or the upper electrode 20f connected to the first external electrode 61f can be referred to as the first connected capacitor unit. In addition, the unit capacitor unit UCf provided at the second end in the longitudinal direction L and including the lower electrode 10f or the upper electrode 20f connected to the second external electrode 62f can be referred to as the second connected capacitor unit.

[0172] Figure 14 Fig. 1g shows a capacitor 1g according to another embodiment.

[0173] Referring to Figure 14 , the capacitor 1g according to another embodiment may include a substrate 2g, a lower electrode 10g, an upper electrode 20g, a dielectric layer 30g, a first external electrode 61g, and a second external electrode 62g.

[0174] An electrode embedding space 8g is formed on the substrate 2g. The region where the electrode embedding space 8g is formed can be divided into a plurality of unit cell regions.

[0175] The structure of the substrate 2g and the structure of the region where the electrode embedding space 8g is formed can be divided into a plurality of unit cell regions, which is the same as or similar to the above structure in Figures 1 to 4 , so the repeated description will be omitted.

[0176] The capacitor 1g according to another embodiment includes a plurality of unit capacitor units UCg. The unit capacitor units UCg are respectively provided on the unit cell regions. That is, one unit capacitor unit UCg is provided on one unit cell region. Each unit capacitor unit UCg includes a lower electrode 10g, an upper electrode 20g, and a dielectric layer 30g provided on the unit cell region.

[0177] The structures of the lower electrode 10g, the upper electrode 20g, the dielectric layer 30g, and the insulating layer 50g can be the same as those in Figure 9 and Figure 10The structures of the lower electrode 10d, the upper electrode 20d, the dielectric layer 30d, and the insulating layer 50d of the above-mentioned capacitor 1d are the same or similar, so the repeated description will be omitted.

[0178] The upper electrode 20g and the lower electrode 10g respectively disposed in two adjacent unit cell regions can be connected through an internal connection layer 40g. The internal connection layer 40g may include a first internal connection layer 41g, a second internal connection layer 42g, and a third internal connection layer 43g. The structure of the internal connection layer 40g can be the same or similar to Figure 9 and Figure 10 the structure of the internal connection layer 40d of the above-mentioned capacitor 1d in

[0179] The first external electrode 61g can be connected to the lower electrode 10g on the unit cell region disposed at the first end in the length direction L. The first external electrode 61g can be connected to the lower electrode 10g through a first external connection layer 46g.

[0180] The second external electrode 62g can be disposed at an interval from the first external electrode 61g along the length direction L. The second external electrode 62g can be connected to the upper electrode 20g on the unit cell region disposed at the second end in the length direction L. The second external electrode 62g can be connected to the upper electrode 20g through a second external connection layer 47g.

[0181] The connection structure of the first external electrode 61g, the first external connection layer 46g, the second external electrode 62g, and the second external connection layer 47g can be the same or similar to Figures 1 to 4 the connection structure of the above-mentioned first external electrode 61, the first external connection layer 46, the second external electrode 62, and the second external connection layer 47 in

[0182] The external electrodes 61g and 62g can be the same or similar to Figure 5 the above-mentioned external electrode 60 in Figure 6 or the above-mentioned external electrode 60a in

[0183] A capacitor 1g according to another embodiment has the following structure: a lower electrode 10g included in one unit capacitor unit UCg (i.e., the first unit capacitor unit) among two unit capacitor units UCg adjacent to each other in the unit cell connection direction and an upper electrode 20g included in the other unit capacitor unit UCg (i.e., the second unit capacitor unit) among two unit capacitor units UCg adjacent to each other in the unit cell connection direction are connected through an internal connection layer 40g, and a plurality of unit capacitor units UCg are connected to each other. A lower exposed portion 110g may be provided in one unit capacitor unit UCg among two unit capacitor units UCg adjacent to each other in the unit cell connection direction. In this case, the lower exposed portion 110g may be provided to face the first side of the unit cell connection direction. Accordingly, two unit capacitor units UCg adjacent to each other in the unit cell connection direction may be connected to each other through the lower exposed portion 110g, the internal connection layer 40g, and the upper electrode 20g. That is, a plurality of unit capacitor units UCg are connected in series with each other in the unit cell connection direction. In addition, a first external electrode 61g may be connected to the lower electrode 10g of the unit capacitor unit UCg provided at the first end in the length direction L. Further, a second external electrode 62g may be connected to the upper electrode 20g of the unit capacitor unit UCg provided at the second end in the length direction L. The lower electrode 10g connected to the first external electrode 61g becomes a first internal electrode. The upper electrode 20g connected to the second external electrode 62g becomes a second internal electrode. In addition, the upper electrode 20g and the lower electrode 10g provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40g become floating electrodes.

[0184] In addition, similar to the above description in Figure 7 a first external electrode 61g may be connected to the lower electrode 10g of the unit capacitor unit UCg provided at the first end in the length direction L. Further, a second external electrode 62g may be connected to the lower electrode 10g of the unit capacitor unit UCg provided at the second end in the length direction L. The lower electrode 10g connected to the first external electrode 61g becomes a first internal electrode. The lower electrode 10g connected to the second external electrode 62g and the upper electrode 20g connected to the lower electrode 10g become a second internal electrode. In addition, the upper electrode 20g and the lower electrode 10g provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40g become floating electrodes. For this purpose, the lower electrode 10g of the unit capacitor unit UCg provided at the second end in the length direction L may have a lower exposed portion 110g provided at the opposite side. Accordingly, the first lower exposed portion 110g among the two lower exposed portions 110g may face an adjacent unit cell region, and the second lower exposed portion 110g among the two lower exposed portions 110g may face an end portion (second end) of the substrate 2g in the length direction L.

[0185] In addition, similar toFigure 8 Similar to the above description in [reference], the first external electrode 61g can be connected to the upper electrode 20g of the unit capacitor unit UCg provided at the first end in the longitudinal direction L. In addition, the second external electrode 62g can be connected to the upper electrode 20g of the unit capacitor unit UCg provided at the second end in the longitudinal direction L. The upper electrode 20g connected to the first external electrode 61g and the lower electrode 10g connected to the upper electrode 20g form the first internal electrode. The upper electrode 20g connected to the second external electrode 62g forms the second internal electrode. In addition, the upper electrode 20g and the lower electrode 10g provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40g form the floating electrode.

[0186] In this case, the unit capacitor unit UCg provided at the first end in the longitudinal direction L and including the lower electrode 10g or the upper electrode 20g connected to the first external electrode 61g can be referred to as the first connection capacitor unit. In addition, the unit capacitor unit UCg provided at the second end in the longitudinal direction L and including the lower electrode 10g or the upper electrode 20g connected to the second external electrode 62g can be referred to as the second connection capacitor unit.

[0187] Figure 15 FIG. shows a capacitor 1h according to another embodiment.

[0188] Referring to Figure 15 , the capacitor 1h according to another embodiment may include a substrate 2h, a lower electrode 10h, an upper electrode 20h, a dielectric layer 30h, a first external electrode 61h, and a second external electrode 62h.

[0189] An electrode embedding space 8h is formed on the substrate 2h. The region where the electrode embedding space 8h is formed can be divided into a plurality of unit cell regions.

[0190] The structure of the substrate 2h and the structure of the region where the electrode embedding space 8h is formed can be divided into a plurality of unit cell regions may be the same as or similar to the above structure in Figures 1 to 4 , so the repeated description will be omitted.

[0191] The capacitor 1h according to another embodiment includes a plurality of unit capacitor units UCh. The unit capacitor units UCh are respectively provided on the unit cell regions. That is, one unit capacitor unit UCh is provided on one unit cell region. Each unit capacitor unit UCh includes a lower electrode 10h, an upper electrode 20h, and a dielectric layer 30h provided on the unit cell region.

[0192] The structures of the lower electrode 10h, the upper electrode 20h, the dielectric layer 30h, and the insulating layer 50h can be the same as those in Figure 1 and Figure 4The structures of the lower electrode 10, upper electrode 20, dielectric layer 30, and insulating layer 50 of the above capacitor 1 are the same or similar, so the repeated descriptions will be omitted.

[0193] The upper electrode 20h and the lower electrode 10h respectively disposed in two adjacent unit cell regions can be connected through the internal connection layer 40h. The structure of the internal connection layer 40h is the same as or similar to Figure 1 and Figure 4 the structure of the internal connection layer 40 of the above capacitor 1 in

[0194] The first external electrode 61h is connected to the lower electrode 10h on the unit cell region disposed at the first end in the length direction L. The first external electrode 61h is connected to the lower electrode 10h through the first external connection layer 46h. The first pad portion 48h can be disposed between the first external connection layer 46h and the first external electrode 61h.

[0195] The second external electrode 62h can be disposed at an interval from the first external electrode 61h along the length direction L. The second external electrode 62h is connected to the upper electrode 20h on the unit cell region disposed at the second end in the length direction L. The second external electrode 62h is connected to the upper electrode 20h through the second external connection layer 47h. The second pad portion 49h can be disposed between the second external connection layer 47h and the second external electrode 62h.

[0196] The connection structures of the first external electrode 61h, the first external connection layer 46h, the second external electrode 62h, the second external connection layer 47h, the first pad portion 48h, and the second pad portion 49h are the same as or similar to Figure 9 and Figure 10 the connection structures of the above first external electrode 61d, first external connection layer 46d, second external electrode 62d, second external connection layer 47d, first pad portion 48d, and second pad portion 49d in

[0197] In addition, similar to the above first pad portion 44f and second pad portion 48f in Figure 13 some portions of the first pad portion 48h and the second pad portion 49h can be disposed in the region facing the internal connection layer 40h along the thickness direction T. In addition, the first external electrode 61h and the second external electrode 62h can be provided in plurality and arranged at intervals in the width direction W and the length direction L.

[0198] The external electrodes 61h and 62h are the same as or similar to Figure 5 the above external electrode 60 in Figure 6 or the above external electrode 60a in

[0199] The capacitor 1h according to another embodiment has the following structure: The lower electrode 10h included in one unit capacitor unit UCh (i.e., the first unit capacitor unit) among two unit capacitor units UCh adjacent to each other in the unit cell connection direction and the upper electrode 20h included in the other unit capacitor unit UCh (i.e., the second unit capacitor unit) among two unit capacitor units UCh adjacent to each other in the unit cell connection direction are connected through the internal connection layer 40h, and a plurality of unit capacitor units UCh are connected to each other. The lower exposure portion 110h may be provided in the first unit capacitor unit UCh among two unit capacitor units UCh adjacent to each other in the unit cell connection direction, and the upper protrusion portion 210h may be provided in the second unit capacitor unit UCh among two unit capacitor units UCh adjacent to each other in the unit cell connection direction. In this case, the lower exposure portion 110h may be provided to face the first side of the unit cell connection direction, and the upper protrusion portion 210h may be provided to face the second side of the unit cell connection direction. Accordingly, two unit capacitor units UCh adjacent to each other in the unit cell connection direction may be connected to each other through the lower exposure portion 110h, the upper protrusion portion 210h, and the internal connection layer 40h. That is, a plurality of unit capacitor units UCh are connected in series with each other in the unit cell connection direction. In addition, the first external electrode 61h may be connected to the lower electrode 10h of the unit capacitor unit UCh provided at the first end in the length direction L. In addition, the second external electrode 62h may be connected to the upper electrode 20h of the unit capacitor unit UCh provided at the second end in the length direction L. The lower electrode 10h connected to the first external electrode 61h becomes the first internal electrode. The upper electrode 20h connected to the second external electrode 62h becomes the second internal electrode. In addition, the upper electrode 20h and the lower electrode 10h provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40h become floating electrodes.

[0200] In addition, with Figure 7Similar to the above description in [reference], the first external electrode 61h can be connected to the lower electrode 10h of the unit capacitor unit UCh provided at the first end in the longitudinal direction L. Additionally, the second external electrode 62h can be connected to the lower electrode 10h of the unit capacitor unit UCh provided at the second end in the longitudinal direction L. The lower electrode 10h connected to the first external electrode 61h becomes the first internal electrode. The lower electrode 10h connected to the second external electrode 62h and the upper electrode 20h connected to this lower electrode 10h become the second internal electrode. Additionally, the upper electrode 20h and the lower electrode 10h provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40h become the floating electrode. For this purpose, the lower electrode 10h of the unit capacitor unit UCh provided at the second end in the longitudinal direction L can have a lower exposed portion 110h provided on the opposite side. Therefore, the first lower exposed portion 110h of the two lower exposed portions 110h can face the adjacent unit cell region, and the second lower exposed portion 110h of the two lower exposed portions 110h can face the end portion (second end) of the substrate 2h in the longitudinal direction L.

[0201] Additionally, similar to Figure 8 the above description in [reference], the first external electrode 61h can be connected to the upper electrode 20h of the unit capacitor unit UCh provided at the first end in the longitudinal direction L. Additionally, the second external electrode 62h can be connected to the upper electrode 20h of the unit capacitor unit UCh provided at the second end in the longitudinal direction L. The upper electrode 20h connected to the first external electrode 61h and the lower electrode 10h connected to this upper electrode 20h become the first internal electrode. The upper electrode 20h connected to the second external electrode 62h becomes the second internal electrode. Additionally, the upper electrode 20h and the lower electrode 10h provided between the first internal electrode and the second internal electrode and connected to the internal connection layer 40h become the floating electrode.

[0202] In this case, the unit capacitor unit UCh provided at the first end in the longitudinal direction L and including the lower electrode 10h or the upper electrode 20h connected to the first external electrode 61h can be referred to as the first connection capacitor unit. Additionally, the unit capacitor unit UCh provided at the second end in the longitudinal direction L and including the lower electrode 10h or the upper electrode 20h connected to the second external electrode 62h can be referred to as the second connection capacitor unit.

[0203] Figure 16 A top plan view of the capacitor 1i according to another embodiment is shown.

[0204] Referring to Figure 16, the outer electrode 60i may have a plate-like structure. The outer electrode 60i may include a first outer electrode 61i and a second outer electrode 62i. The first outer electrode 61i may be disposed to be at least partially exposed outside the insulating layer 50i on the first surface of the substrate. The second outer electrode 62i may be disposed to be at least partially exposed outside the insulating layer 50i on the first surface of the substrate.

[0205] The structure of the capacitor 1i other than the outer electrode 60i is the same as or similar to one of the above-mentioned capacitors 1 in Figures 1 to 4 the above-mentioned capacitor 1b in Figure 7 the above-mentioned capacitor 1c in Figure 8 the above-mentioned capacitor 1d in Figure 9 and Figure 10 the above-mentioned capacitor 1e in Figure 11 and Figure 12 the above-mentioned capacitor 1f in Figure 13 the above-mentioned capacitor 1g in Figure 14 and one of the above-mentioned capacitors 1h in Figure 15 and a repeated description will be omitted.

[0206] Figure 17 The setup structure of the unit cell regions UCA1 and UCA2 according to another embodiment is shown.

[0207] Refer to Figure 17, at least two unit cell regions UCA1 and UCA2 can be arranged along the length direction L. Additionally, at least two unit cell regions UCA1 and UCA2 can be arranged along the width direction W. Additionally, there can be multiple unit cell connection directions CD1 and CD2. Additionally, one unit cell connection direction CD1 or CD2 can pass through each unit cell region UCA1 or UCA2 respectively. The unit capacitor cells provided on the unit cell regions UCA1 and UCA2 are connected to each other along the unit cell connection directions CD1 and CD2. Therefore, the regions connected according to each of the unit cell connection directions CD1 and CD2 have a parallel structure. As an example, the unit cell regions UCA1 and UCA2 can include a first unit cell region UCA1 and a second unit cell region UCA2. The first unit cell region UCA1 and the second unit cell region UCA2 can be arranged along the width direction W. Additionally, the unit cell connection directions CD1 and CD2 can include a first unit cell connection direction CD1 and a second unit cell connection direction CD2. The first unit cell connection direction CD1 extends through a plurality of first unit cell regions UCA1. That is, the first unit cell connection direction CD1 extends through each of the first unit cell regions UCA1 once. The second unit cell connection direction CD2 extends through a plurality of second unit cell regions UCA2. That is, the second unit cell connection direction CD2 extends through each of the second unit cell regions UCA2 once. Additionally, the first unit cell connection direction CD1 and the second unit cell connection direction CD2 do not intersect each other. Therefore, the unit capacitor cells provided on the first unit cell region UCA1 and connected along the first unit cell connection direction CD1 and the unit capacitor cells provided on the second unit cell region UCA2 and connected along the second unit cell connection direction CD2 have a parallel structure.

[0208] The structure of the unit capacitor cell, the structure of the connection of the unit capacitor cells, the structure of the external electrode connected to the unit capacitor cell, and the structure of the external electrode are the same as or similar to the above structures in Figures 1 to 16 and the repeated description will be omitted.

[0209] Figure 18 A cross-sectional view of a substrate 2j according to another embodiment is shown.

[0210] Referring to Figure 18 , an electrode embedding space 8j is formed on the substrate 2j. As an example, the electrode embedding space 8j can be formed on a silicon wafer by an etching process. Therefore, the first surface and the second surface of the substrate 2j can be made of silicon. The structure of the electrode embedding space 8j is the same as or similar to the above electrode embedding space 8 of the substrate 2 in Figures 1 to 4 and the repeated description will be omitted.

[0211] Figures 1 to 17The above structure in

[0212] Figure 19 A substrate 2k according to another embodiment is shown.

[0213] Referring to Figure 19 , the substrate 2k may include an insulating material. A plurality of electrode embedding spaces 8k may be formed on a first surface of the substrate 2k. The electrode embedding space 8k may be a columnar space extending from the first surface of the substrate 2k toward a second surface of the substrate 2k opposite to the first surface. According to some embodiments of the present disclosure, the substrate 2k may be made of porous anodized aluminum oxide (AAO), and the electrode embedding space 8k may be formed by micropores formed in the anodized aluminum oxide. The aspect ratio of the micropores may be from 2000 to 3000. The substrate 2k may have a structure in which the bottom of the micropores is blocked.

[0214] Figures 1 to 17 The above structure in

[0215] Although the present disclosure has been described in connection with what are presently considered to be practical embodiments, it is to be understood that the disclosure is not limited to the disclosed embodiments, but on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

1. A capacitor, comprising: substrate; as well as A plurality of unit capacitor units are arranged on the substrate, Wherein, each of the plurality of unit capacitor units comprises: a lower electrode; and an upper electrode disposed on the lower electrode, and The lower electrode included in a first unit capacitor cell among the plurality of unit capacitor cells is connected to the upper electrode included in a second unit capacitor cell among the plurality of unit capacitor cells.

2. The capacitor according to claim 1, further comprising: a first outer electrode; as well as a second external electrode arranged to be spaced apart from the first external electrode in a length direction of the capacitor, wherein the first external electrode is connected to the lower electrode in a first connection capacitor unit disposed at a first end in the length direction among the plurality of unit capacitor units, and The second external electrode is connected to the upper electrode in a second connection capacitor unit provided at a second end in the length direction, included in the plurality of unit capacitor units.

3. The capacitor according to claim 2, further comprising: a first external connection layer connecting the first external electrode and the lower electrode included in the first connection capacitor unit; as well as A second external connection layer connects the second external electrode and the upper electrode included in the second connection capacitor unit.

4. The capacitor according to claim 3, further comprising: a first pad portion, disposed between the first external connection layer and the first external electrode; as well as The second pad is arranged between the second external connection layer and the second external electrode.

5. The capacitor according to claim 2, wherein: The first external electrode and the second external electrode have a bump structure.

6. The capacitor according to claim 5, wherein: The capacitor includes a plurality of first external electrodes and a plurality of second external electrodes.

7. The capacitor according to claim 1, further comprising: a first outer electrode; as well as a second external electrode arranged to be spaced apart from the first external electrode in a length direction of the capacitor, wherein the first external electrode is connected to the lower electrode in a first connection capacitor unit disposed at a first end in the length direction among the plurality of unit capacitor units, and The second external electrode is connected to the lower electrode in a second connection capacitor unit provided at a second end in the length direction, included in the plurality of unit capacitor units.

8. The capacitor according to claim 1, further comprising: a first outer electrode; as well as a second external electrode arranged to be spaced apart from the first external electrode in a length direction of the capacitor, wherein the first external electrode is connected to the upper electrode in a first connection capacitor unit provided at a first end in the length direction, included in the plurality of unit capacitor units, and The second external electrode is connected to the upper electrode in a second connection capacitor unit provided at a second end in the length direction, included in the plurality of unit capacitor units.

9. The capacitor according to claim 1, further comprising: An internal connection layer is configured to have a via structure and connects the lower electrode included in the first unit capacitor cell with the upper electrode included in the second unit capacitor cell.

10. The capacitor according to claim 9, wherein The lower electrode included in the first unit capacitor cell includes a lower exposed portion having no upper electrode on an upper side, and the upper electrode included in the second unit capacitor cell includes an upper protrusion protruding toward the lower exposed portion, and The internal connection layer is disposed between the lower exposed portion and the upper protrusion.

11. The capacitor according to claim 9, wherein The internal connection layer comprises: a first internal connection layer connected to the lower electrode of the first unit capacitor cell; a second internal connection layer connected to the upper electrode of the second unit capacitor cell, and The third internal connection layer connects the first internal connection layer and the second internal connection layer.

12. The capacitor according to claim 11, wherein The third internal connecting layer has a plate-like structure.

13. A capacitor, comprising: substrate; as well as A plurality of unit capacitor units are arranged on the substrate, Wherein, each of the plurality of unit capacitor units comprises: a lower electrode; and an upper electrode, disposed on the lower electrode, wherein the lower electrodes included in each of the plurality of unit capacitor units are separated from each other, The upper electrodes included in each of the plurality of unit capacitor cells are separated from each other, and The plurality of unit capacitor cells are connected in series to one another.

14. The capacitor according to claim 13, wherein: A plurality of electrode embedding spaces having a groove structure are formed in the substrate, and A region where the plurality of electrode buried spaces are formed is divided into a plurality of unit cell regions, and one unit capacitor cell among the plurality of unit capacitor cells is disposed on one unit cell region among the plurality of unit cell regions.

15. The capacitor according to claim 14, wherein: The plurality of unit capacitor cells are connected along a unit cell connection direction that passes through each of the plurality of unit cell regions once.

16. The capacitor according to claim 14, wherein: The plurality of unit cell regions include: a plurality of first unit cell regions; and a plurality of second unit cell regions, A plurality of unit capacitor cells disposed on the plurality of first unit cell regions are connected along a first unit cell connection direction that passes through each of the plurality of first unit cell regions once, and The plurality of unit capacitor cells disposed on the plurality of second unit cell regions are connected along a second unit cell connection direction that passes through each of the plurality of second unit cell regions once.

17. A capacitor, comprising: substrate; as well as A plurality of unit capacitor units are arranged on the substrate, Wherein, each of the plurality of unit capacitor units comprises: a lower electrode; and an upper electrode, disposed on the lower electrode, The lower electrode includes a portion on which the upper electrode is not disposed, Two adjacent unit capacitor cells among the plurality of unit capacitor cells are connected to each other through the portion of the lower electrode of a first unit capacitor cell among the two unit capacitor cells on which the upper electrode is not disposed and the portion of the upper electrode of a second unit capacitor cell among the two unit capacitor cells on which the lower electrode is not disposed.

18. The capacitor of claim 17, further comprising: a first outer electrode; as well as a second external electrode arranged to be spaced apart from the first external electrode in a length direction of the capacitor, wherein the first external electrode is connected to the lower electrode in a first connection capacitor unit provided at a first end in the length direction, included in the plurality of unit capacitor units, The second external electrode is connected to the upper electrode in a second connection capacitor unit provided at a second end in the length direction, included in the plurality of unit capacitor units.

19. The capacitor of claim 18, further comprising: a first external connection layer connecting the first external electrode to the portion of the lower electrode in the first connection capacitor unit on which the upper electrode is not disposed; as well as A second external connection layer connects the second external electrode to the upper electrode in the second connection capacitor unit.

20. The capacitor of claim 19, further comprising: a first pad portion, disposed between the first external connection layer and the first external electrode; as well as The second pad is disposed between the second external connection layer and the second external electrode.

21. A capacitor, comprising: substrate; as well as A plurality of unit capacitor units are arranged on the substrate, Wherein, each of the plurality of unit capacitor units comprises: a lower electrode; and an upper electrode, disposed on the lower electrode, In which, the lower electrode includes a portion on which the upper electrode is not arranged, and the portion on which the upper electrode is not arranged of the lower electrode of the first unit capacitor unit of two adjacent unit capacitor units among the multiple unit capacitor units and the upper electrode of the second unit capacitor unit among the two unit capacitor units are connected to each other through an internal connection layer having a via structure.

22. The capacitor according to claim 21, wherein A plurality of electrode buried spaces having a groove structure are formed in the substrate, the upper electrode and the lower electrode of each of the plurality of unit capacitor cells are arranged in the electrode buried space, and the lower electrode of each of the plurality of unit capacitor cells extends to the outside of the electrode buried space.

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