Circuit system for testing photovoltaic output characteristics of satellite solar cell

By designing circuit systems for satellite solar cells, including power resistance RF, load segmentation circuits and latch driving circuits, the problem that traditional test systems cannot fully cover the photovoltaic characteristic curve of solar cells is solved, and a comprehensive test and analysis of the photovoltaic output characteristics of new solar cells is achieved.

CN120238056APending Publication Date: 2025-07-01HARBIN GONGDA SATELLITE TECH CO LTD
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Patent Information

Application Number
CN202510360555.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-26
Publication Date
2025-07-01

AI Technical Summary

Technical Problem

The test system for the on-orbit photovoltaic output characteristics of traditional solar cells cannot fully cover the photovoltaic characteristic curve of the entire solar cell because the circuit is limited by the upper and lower limits of the whole satellite primary bus or battery voltage.

Method used

A circuit system including power resistor RF, load segmentation circuit and latch driving circuit is designed. The load segmentation circuit is connected in series with the power resistor RF, and the latch driving circuit is used to adjust the conduction of the switch MOS tube to realize the load grading superposition of the new solar cell.

Benefits of technology

This circuit system can fully traverse the solar cell I-V curve independent of the power controller in the satellite, ensuring the comprehensive collection and analysis of the new solar cell on-orbit data.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a circuit system for testing photovoltaic output characteristics of a satellite solar cell, belongs to the field of spaceflight, and particularly relates to a circuit system for testing the photovoltaic output characteristics of a satellite on-orbit solar cell. The problem that the collection area of the on-orbit photovoltaic output characteristics of the solar cell cannot completely cover the photovoltaic characteristic curve of the whole solar cell due to the fact that the circuit of the solar cell is limited by the upper limit and the lower limit of the voltage of a primary bus or a storage battery of the whole satellite in a traditional test system for the on-orbit photovoltaic output characteristics of the solar cell is solved. The circuit system comprises a power resistor RF, a load segmentation circuit and a latch drive circuit. And the latch drive circuit is used for controlling the conduction of a switch MOS tube of the load segmentation circuit by adjusting the high and low levels of the TTL signal output by each output channel so as to realize the load grading superposition of the novel solar cell SAS. The circuit system for testing the photovoltaic output characteristics of the satellite solar cell is suitable for collecting the on-orbit photovoltaic output characteristics of the solar cell.
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Description

Technical Field

[0001] The present invention relates to the field of aerospace, and particularly to the test of the on-orbit photovoltaic output characteristics of satellite solar cells. Background Art

[0002] The energy supply of satellites mainly uses triple-junction gallium arsenide solar cells, which makes the cost of satellite development relatively high. In order to reduce the cost of satellite development, those skilled in the art have begun to seek new types of solar cells to replace the original triple-junction gallium arsenide solar cells.

[0003] For newly developed new types of solar cells (referred to as new type of solar cell SAS), those skilled in the art do not understand their on-orbit (photovoltaic) output characteristics, do not know whether they meet the requirements of satellite energy supply, and cannot directly replace the original triple-junction gallium arsenide solar cells with them. Therefore, before using new types of solar cells to replace the original triple-junction gallium arsenide solar cells, those skilled in the art need to first comprehensively collect, test, and analyze the on-orbit photovoltaic output characteristics of the new types of solar cells.

[0004] Traditional acquisition and test systems for the on-orbit photovoltaic output characteristics of solar cells mainly rely on the in-satellite power controller to execute the acquisition of the on-orbit photovoltaic output characteristics of solar cells. Since the circuit of the solar cell is limited by the upper and lower limits of the voltage of the primary bus or the battery of the entire satellite, the acquisition area of the on-orbit photovoltaic output characteristics of the solar cell cannot fully cover the entire photovoltaic characteristic curve of the solar cell. Taking DET (Direct Energy Transfer) in traditional aerospace as an example, the operating range of the solar cell is clamped due to the bus voltage, and the collectable (testable) area of the on-orbit photovoltaic output characteristics cannot fully cover the I-V curve of the solar cell. Summary of the Invention

[0005] The present invention provides a circuit system for testing the photovoltaic output characteristics of satellite solar cells, which solves the problem that the acquisition area of the on-orbit photovoltaic output characteristics of traditional solar cells cannot fully cover the entire photovoltaic characteristic curve of the solar cell due to the circuit of the solar cell being limited by the upper and lower limits of the voltage of the primary bus or the battery of the entire satellite.

[0006] The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to the present invention includes a power resistor RF, a load segmentation circuit, and a latch driving circuit;

[0007] The load segmentation circuit is connected in series with the power resistor RF in the output loop between the positive voltage pole and the negative voltage pole of the new type of solar cell SAS; the negative voltage pole of the new type of solar cell SAS is grounded;

[0008] The shown load segmentation circuit is composed of N segmentation units connected in parallel; each segmentation unit is composed of a power consumption resistor and a switching MOS transistor connected in series;

[0009] The latch driving circuit includes M latches as driving units; the M latches as driving units have N output channels, and each output channel is correspondingly connected to the gate of the switching MOS transistor of each segmentation unit one by one;

[0010] The latch driving circuit is used to control the conduction of the switching MOS transistors of the load segmentation circuit by adjusting the high and low levels of the TTL signals output by each output channel, so as to realize the load hierarchical superposition of the new solar cell SAS;

[0011] The signal conversion circuit includes a temperature conversion unit, a voltage conversion unit and a current conversion unit;

[0012] The temperature conversion unit is used to remotely collect the temperature of the new solar cell SAS, convert it into an analog parameter linearly proportional to the temperature of the new solar cell SAS, and send it to the temperature acquisition channel of the analog acquisition circuit;

[0013] The voltage conversion unit is used to remotely collect the voltage across the two ends of the new solar cell SAS, convert it into an analog parameter linearly proportional to the voltage across the two ends of the new solar cell SAS, and send it to the voltage acquisition channel of the analog acquisition circuit;

[0014] The current conversion unit is used to collect the output current of the new solar cell SAS and convert it into an analog parameter linearly proportional to the output current of the new solar cell SAS; the current conversion unit includes a differential amplifier; the input terminals of the differential amplifier of the current conversion unit are connected across both ends of the power resistor RF, and the output terminal is connected to the current acquisition channel of the analog acquisition circuit;

[0015] The analog acquisition circuit is used to convert the analog parameters collected by the signal conversion circuit into digital quantities, including the temperature data, voltage data and current data of the new solar cell SAS.

[0016] Further, a preferred embodiment is provided. The temperature conversion unit includes a voltage dividing resistor R7, an NTC thermistor R8 and a differential amplifier;

[0017] The NTC thermistor R8 is attached to the surface of the new solar cell SAS, and its resistance value decreases as the surface temperature of the new solar cell SAS increases;

[0018] The NTC thermistor R8 and the voltage-dividing resistor R7 are connected in series to form a voltage-dividing circuit. The voltage-dividing circuit generates a voltage-dividing signal, which is converted into a linear voltage inversely proportional to the surface temperature of the new solar cell SAS by a differential amplifier. The output end of the differential amplifier is connected to the temperature acquisition channel of the analog quantity acquisition circuit.

[0019] Further, a preferred embodiment is provided. The voltage conversion unit includes a voltage-dividing resistor and a (voltage-converting) differential amplifier. A voltage-dividing resistor network is connected in parallel across the two ends of the new solar cell SAS, and the voltage-dividing point is led out to the differential amplifier. The output end of the differential amplifier is connected to the voltage acquisition channel of the analog quantity acquisition circuit.

[0020] Further, a preferred embodiment is provided. When the TTL signal output by the corresponding output channel is at a high level, the switching MOS transistor of the segmentation unit is turned on.

[0021] When the TTL signal output by the corresponding output channel is at a low level, the switching MOS transistor of the segmentation unit is turned off.

[0022] Further, a preferred embodiment is provided. The high level of the TTL signal output by the output channel is 5V, and the low level is 0V.

[0023] The present invention also proposes a method for testing the photovoltaic output characteristics of satellite solar cells. The testing method is implemented by using the circuit system for testing the photovoltaic output characteristics of satellite solar cells described in any one of the above.

[0024] The testing method includes the following steps:

[0025] Step S1: According to the hierarchical load scanning strategy, generate a corresponding scanning control signal. The scanning control signal is used to input to the circuit system for testing the photovoltaic output characteristics of satellite solar cells, control the latch driving circuit to send a corresponding TTL signal to the load segmentation circuit, and sequentially turn on the switching MOS transistors of N segmentation units to realize the traversal of the I-V curve at N discrete data points.

[0026] Step S2: Obtain the temperature data, voltage data, and current data of the new solar cell SAS corresponding to each discrete data point.

[0027] Step S3: According to the voltage data and current data of the new solar cell SAS corresponding to each discrete data point, perform interpolation or polynomial fitting to generate a continuous and complete I-V curve.

[0028] The present invention also proposes a testing device for the photovoltaic output characteristics of satellite solar cells. The testing device is implemented by using the circuit system for testing the photovoltaic output characteristics of satellite solar cells described in any one of the above.

[0029] The testing device includes the following modules:

[0030] Module S1: Generate corresponding scan control signals according to the hierarchical load scanning strategy; the scan control signals are used to input into the circuit system for testing the photovoltaic output characteristics of satellite solar cells, control the latch driving circuit to send corresponding TTL signals to the load segmentation circuit, and sequentially turn on the switching MOS transistors of N segmentation units to realize the traversal of the I-V curve at N discrete data points;

[0031] Module S2: Obtain the temperature data, voltage data, and current data of the new type of solar cell SAS corresponding to each discrete data point;

[0032] Module S3: Interpolate or perform polynomial fitting according to the voltage data and current data of the new type of solar cell SAS corresponding to each discrete data point to generate a continuous and complete I-V curve.

[0033] The present invention also provides a computer device, including: a processor and a memory, the memory is used to store the executable instructions of the processor, and the processor is configured to execute the above-mentioned method for testing the photovoltaic output characteristics of satellite solar cells by executing the executable instructions.

[0034] The present invention also provides a computer storage medium, in which a computer program is stored, and when the computer program runs, it executes the above-mentioned method for testing the photovoltaic output characteristics of satellite solar cells.

[0035] The present invention also provides a computer program product, including computer programs / instructions, and when the computer programs / instructions are executed by a processor, the steps of the above-mentioned method for testing the photovoltaic output characteristics of satellite solar cells are implemented.

[0036] The present invention has the following beneficial effects:

[0037] The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to the present invention can independently traverse the entire I-V curve of the solar cell in the acquisition area of the on-orbit photovoltaic output characteristics independent of the in-satellite power controller, which is of great significance for mastering and analyzing the on-orbit data of new types of solar cells.

[0038] The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to the present invention is applicable to the acquisition of the on-orbit photovoltaic output characteristics of solar cells. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0040] Figure 1 In an embodiment of the present invention, it is a schematic structural diagram of a circuit system for testing the photovoltaic output characteristics of satellite solar cells;

[0041] Figure 2 In an embodiment of the present invention, it is a schematic structural diagram of a collection system for the on-orbit photovoltaic output characteristics of traditional solar cells;

[0042] Figure 3 In an embodiment of the present invention, it is a schematic diagram of the position of the collectable area of the on-orbit photovoltaic output characteristics of a collection system for the on-orbit photovoltaic output characteristics of traditional solar cells in the I-V curve of a solar cell; wherein, the shaded area represents the collectable area of the on-orbit photovoltaic output characteristics of the collection system for the on-orbit photovoltaic output characteristics of traditional solar cells. It can be seen therefrom that the collectable area cannot completely cover the entire photovoltaic characteristic curve (i.e., the I-V curve) of the solar cell. Detailed Embodiments

[0043] To make the technical solutions and advantages of the present invention more clearly described, the following will further describe in detail and completely the specific embodiments of the present invention with reference to the accompanying drawings. The following described embodiments are only some preferred embodiments of the present invention, rather than all the implementation embodiments; the following described embodiments are intended to explain the present invention and should not be construed as a limitation to the present invention; the reasonable combination of the technical features defined in each embodiment of the present invention, and all other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts, fall within the scope of protection of the present invention.

[0044] In one embodiment, a circuit system for testing the photovoltaic output characteristics of satellite solar cells is provided:

[0045] The circuit system includes a power resistor RF, a load segmentation circuit, and a latch driving circuit;

[0046] The load segmentation circuit is connected in series with the power resistor RF in the output loop between the positive voltage pole and the negative voltage pole of the new solar cell SAS; the negative voltage pole of the new solar cell SAS is grounded;

[0047] The shown load segmentation circuit is composed of N segmentation units connected in parallel; each segmentation unit is composed of a power consumption resistor and a switching MOS transistor connected in series;

[0048] The latch driving circuit includes M latches as driving units; the M latches as driving units have N output channels, and each output channel is connected to the gate of the switching MOS transistor of each segmentation unit in one-to-one correspondence;

[0049] The latch driving circuit is used to control the conduction of the switching MOS transistors of the load segmentation circuit by adjusting the high and low levels of the TTL signals output by each output channel, so as to achieve the load grading superposition of the new type of solar cell SAS.

[0050] The signal conversion circuit includes a temperature conversion unit, a voltage conversion unit, and a current conversion unit.

[0051] The temperature conversion unit is used to remotely collect the temperature of the new type of solar cell SAS, convert it into an analog parameter that is linearly proportional to the temperature of the new type of solar cell SAS, and send it to the temperature acquisition channel of the analog acquisition circuit.

[0052] The voltage conversion unit is used to remotely collect the voltage across the two ends of the new type of solar cell SAS, convert it into an analog parameter that is linearly proportional to the voltage across the two ends of the new type of solar cell SAS, and send it to the voltage acquisition channel of the analog acquisition circuit.

[0053] The current conversion unit is used to collect the output current of the new type of solar cell SAS and convert it into an analog parameter that is linearly proportional to the output current of the new type of solar cell SAS; the current conversion unit includes a differential amplifier; the input terminals of the differential amplifier of the current conversion unit are connected across both ends of the power resistor RF, and the output terminal is connected to the current acquisition channel of the analog acquisition circuit.

[0054] The analog acquisition circuit is used to convert the analog parameters collected by the signal conversion circuit into digital quantities, including the temperature data, voltage data, and current data of the new type of solar cell SAS.

[0055] In this embodiment, the circuit system is used to test the photovoltaic output characteristics of the new type of solar cell SAS in orbit of a satellite.

[0056] It should be noted that currently, the acquisition of the in-orbit photovoltaic output characteristics of solar cells is performed by the power controller inside the satellite. Since the solar cell circuit is limited by the upper and lower limits of the primary bus or battery voltage of the entire satellite, it cannot fully cover the entire photovoltaic characteristic curve of the solar cell. The circuit system can independently achieve a comprehensive traversal of the I-V curve of the solar cell without relying on the power controller. Specifically:

[0057] The circuit system adjusts the conduction degree of each switching MOS transistor step by step through the latch driving circuit to achieve a step-by-step scan of the SAS voltage and current; the latch driving circuit directly adjusts the load impedance of the load segmentation circuit rather than relying on the bus voltage; the voltage at the output end of the SAS is determined by its own characteristics and the load, and is not affected by the clamping of the satellite primary bus or battery voltage.

[0058] The circuit system is essentially different from the traditional power controller:

[0059] No voltage following limitation: Satellite power controllers usually perform MPPT tracking based on the bus voltage (such as locking the SAS voltage near the bus voltage), while the circuit system can freely cross the bus voltage range by actively changing the load impedance to make the SAS voltage.

[0060] Full-range scanning ability: Traditional controllers only optimize the power point within the operating voltage range (such as ±10% of the bus voltage), while this solution can traverse the complete range from 0V (short circuit) to Voc.

[0061] In this embodiment, the input terminals of the differential amplifier of the current conversion unit are connected across both ends of the power resistor RF, and are used to convert the output current of the new type of solar cell SAS into a voltage drop signal for sampling by the analog acquisition circuit.

[0062] In this embodiment, the voltage difference across both ends of the power resistor RF of the current conversion unit is amplified by the differential amplifier to achieve current-voltage conversion, and then can be converted into a digital quantity by the analog acquisition circuit.

[0063] In this embodiment, the analog acquisition circuit includes a multi-channel serial interface analog-to-digital converter and a voltage reference; the multi-channel serial interface analog-to-digital converter at least includes a temperature acquisition channel, a voltage acquisition channel, and a current acquisition channel; the analog acquisition circuit is used to convert analog quantity parameters of voltage, current, and temperature into hexadecimal digital quantities.

[0064] In this embodiment, the analog acquisition circuit is used to convert the analog quantity parameters collected by the signal conversion circuit into digital quantities, including the temperature data, voltage data, and current data of the new type of solar cell SAS, for forming the I-V curve of the new type of solar cell SAS.

[0065] In this embodiment, each segmentation unit is composed of a power consumption resistor and a switching MOS transistor connected in series. For example:

[0066] Segmentation unit 1 is composed of a power consumption resistor R1-1 and a switching MOS transistor Q1-1, segmentation unit 2 is composed of a power consumption resistor R1-2 and a switching MOS transistor Q1-2, and segmentation unit N is composed of a power consumption resistor R1-N and a switching MOS transistor Q1-N.

[0067] In this embodiment, each output channel is connected to the gate of the switching MOS transistor of each segmentation unit in one-to-one correspondence. For example: TTL1 corresponds to Q1-1, TTL2 corresponds to Q1-2, and TTLN corresponds to Q1-N.

[0068] In this embodiment, the latching drive circuit is used to control the conduction of the switching MOS transistors of the load segmentation circuit by adjusting the high and low levels of the TTL signals output by each output channel, so as to achieve the load hierarchical superposition of the novel solar cell SAS:

[0069] The high level of the TTL signal is "5V", that is, "1", corresponding to the conduction of the switching MOS transistor, and the load is superimposed on the output loop of the novel solar cell SAS.

[0070] The low level of the TTL signal is "0V", that is, "0", corresponding to the turn-off of the switching MOS transistor, and the load is not superimposed.

[0071] In this embodiment, the gate of the switching MOS transistor Q1-x is driven by the latch TTLx signal:

[0072] When the TTL signal output by the corresponding output channel is at a high level, the switching MOS transistor of the segmentation unit conducts;

[0073] When the TTL signal output by the corresponding output channel is at a low level, the switching MOS transistor of the segmentation unit turns off.

[0074] Conduction logic:

[0075] TTLx = 5V → Q1-x conducts → R1-x is connected to the load loop → the output current of SAS increases by ΔI_x = Vm / (R1-x + R_F); when TTLx = 0V, Q1-x turns off.

[0076] Parallel topology:

[0077] All segmentation units are connected in parallel between the positive and negative poles of SAS, and the conduction branches are selected through TTL signals to achieve load hierarchical superposition.

[0078] In this embodiment, M latches (U1 to UM): such as 74HC573, each latch provides 8-way TTL outputs (Q1 to Q8), and a total of latches cover N segmentation units.

[0079] In this embodiment, the load is loaded in a hierarchical manner, the data acquisition points are spaced far apart, and the number and positions of the test points are fixed after the design is completed. It is necessary to perform fitting and complement processing on the collected data to form a complete test curve.

[0080] In addition, in one embodiment, the temperature conversion unit includes a voltage dividing resistor R7, an NTC thermistor R8 and a differential amplifier;

[0081] The NTC thermistor R8 is attached to the surface of the novel solar cell SAS, and its resistance value decreases as the surface temperature of the novel solar cell SAS increases;

[0082] The NTC thermistor R8 and the voltage-dividing resistor R7 are connected in series to form a voltage-dividing circuit. The voltage-dividing circuit generates a voltage-dividing signal, which is converted into a linear voltage inversely proportional to the surface temperature of the new type of solar cell SAS by a (temperature-converting) differential amplifier. The output end of the differential amplifier is connected to the temperature acquisition channel of the analog quantity acquisition circuit.

[0083] In addition, in an embodiment, the voltage conversion unit includes a voltage-dividing resistor and a (voltage-converting) differential amplifier. A voltage-dividing resistor network is connected in parallel across both ends of the new type of solar cell SAS, and the voltage-dividing point is led out to the differential amplifier. The output end of the differential amplifier is connected to the voltage acquisition channel of the analog quantity acquisition circuit.

[0084] Through the cascade connection of the voltage-dividing network and the differential amplifier, the synchronous elimination of high-voltage isolation and cable voltage drop error is achieved.

[0085] In addition, in an embodiment, the collected SAS voltage / current / temperature is described as follows:

[0086] (1) Voltage (Vm) data:

[0087] It reflects the real-time output voltage characteristics of the solar cell and is used to calculate key parameters such as the open-circuit voltage (Voc) and the maximum power point voltage (Vmp) of SAS.

[0088] In closed-loop control, the voltage signal eliminates the cable voltage drop error through remote differential sampling to ensure the voltage measurement accuracy of the high-voltage bus (such as the satellite primary bus).

[0089] Application scenarios:

[0090] When the switching MOS transistor conducts and adjusts, the load change of SAS causes voltage fluctuations, and the voltage data is used to verify the accuracy of load adjustment.

[0091] In the I-V curve traversal, it is combined with the current data to draw the voltage-current relationship curve.

[0092] (2) Current (I_actual) data:

[0093] It characterizes the output current capacity of the solar cell and is used to calculate the short-circuit current (Isc) and the maximum power point current (Imp).

[0094] (3) Temperature (R7-R8) data:

[0095] It monitors the working temperature of the solar cell and is used to correct the influence of temperature on the photovoltaic characteristics.

[0096] In an extreme space temperature difference environment (-150°C to +120°C), it ensures the temperature adaptability of the I-V curve test.

[0097] Implementation method:

[0098] A voltage dividing circuit is formed by the NTC thermistor R8 (attached to the surface of the SAS) and the voltage dividing resistor R7. The change in temperature causes a change in the voltage division ratio, which is linearly processed by the differential amplifier.

[0099] The temperature signal is calibrated and used to compensate the theoretical values of Voc and Isc, improving the test accuracy.

[0100] In addition, in one embodiment, a method for testing the photovoltaic output characteristics of satellite solar cells is provided:

[0101] The test method is implemented by using the above circuit system for testing the photovoltaic output characteristics of satellite solar cells;

[0102] The test method includes the following steps:

[0103] Step S1: According to the hierarchical load scanning strategy, generate corresponding scanning control signals; the scanning control signals are used to input into the circuit system for testing the photovoltaic output characteristics of satellite solar cells, control the latch drive circuit to send corresponding TTL signals to the load segmentation circuit, and sequentially turn on the switching MOS transistors of N segmentation units to realize the traversal of the I-V curve at N discrete data points;

[0104] Step S2: Obtain the temperature data, voltage data, and current data of the new type of solar cell SAS corresponding to each discrete data point;

[0105] Step S3: According to the voltage data and current data of the new type of solar cell SAS corresponding to each discrete data point, perform interpolation or polynomial fitting to generate a continuous and complete I-V curve.

[0106] In this embodiment, there are a total of N segmentation units. When gradually accumulating the load of the new type of solar cell SAS, one segmentation unit is added to the output loop of the new type of solar cell SAS at each level. Therefore, the N segmentation units correspond to N discrete data points.

[0107] In this embodiment, at the beginning, the latch can be cleared and all TTLx outputs can be turned off (Q1-x is all turned off).

[0108] In this embodiment, a resistor pre-calibration step can also be performed:

[0109] According to the target I-V curve range, set the resistance value distribution of R1-x (such as linear or logarithmic distribution) to ensure that the load step covers the Voc to Isc interval of the SAS.

[0110] In this embodiment, for each latch, the latch enable signal (LE) can be used as the global control signal. When the rising edge of LE occurs, the input data is latched to the output terminal.

[0111] In this embodiment, the scan control signal can:

[0112] Write an N-bit control word to the latch through the data bus (D0 - D7) (for example, 0x01 turns on TTL1, 0x02 turns on TTL2, etc.); Latch trigger: At the rising edge of the LE signal, the data is latched to the output terminals of U1 to UM, and the levels of TTL1 to TTLN are updated.

[0113] In addition, in one embodiment, in the test method, the following steps are further included:

[0114] Temperature compensation and characteristic correction:

[0115] Dynamically correct the theoretical open-circuit voltage value of the new solar cell SAS according to the temperature data;

[0116] In the I-V scan, combine the open-circuit voltage and short-circuit current of the new solar cell SAS after temperature compensation, calculate the theoretical maximum power point, and verify the deviation between the actual output and the theory.

[0117] In addition, in one embodiment, a satellite solar cell photovoltaic output characteristic test device is provided, and the test device is implemented by using the above-mentioned circuit system for testing the photovoltaic output characteristics of satellite solar cells;

[0118] The test device includes the following modules:

[0119] Module S1: Generate corresponding scan control signals according to the hierarchical load scan strategy; the scan control signals are used to input into the circuit system for testing the photovoltaic output characteristics of satellite solar cells, control the latch drive circuit to send corresponding TTL signals to the load segmentation circuit, and sequentially turn on the switching MOS transistors of N segmentation units to realize the traversal of the I-V curve at N discrete data points;

[0120] Module S2: Obtain the temperature data, voltage data, and current data of the new solar cell SAS corresponding to each discrete data point;

[0121] Module S3: Perform interpolation or polynomial fitting according to the voltage data and current data of the new solar cell SAS corresponding to each discrete data point to generate a continuous and complete I-V curve.

[0122] In addition, in one embodiment, a computer device is provided, including: a processor and a memory, the memory is used to store the executable instructions of the processor, and the processor is configured to execute the above-mentioned satellite solar cell photovoltaic output characteristic test method by executing the executable instructions.

[0123] In addition, in one embodiment, a computer storage medium is provided. A computer program is stored in the storage medium. When the computer program runs, the above-mentioned satellite solar cell photovoltaic output characteristic testing method is executed.

[0124] In addition, in one embodiment, a computer program product is provided, including a computer program / instructions. When the computer program / instructions are executed by a processor, the steps of the above-mentioned satellite solar cell photovoltaic output characteristic testing method are implemented.

[0125] For the computer device or system provided in this embodiment, the hardware device in this part is of a general model and is not shown in the form of a diagram. The system includes a processor and a memory. The processor and the memory can be connected through a bus or other means. The memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer-executable programs, and modules, as well as corresponding program instructions / modules. The processor runs the non-transitory software programs, instructions, and modules stored in the memory, thereby executing various functional applications and data processing of the processor to implement the data space entity parsing data quality enhancement method in the above method embodiments.

[0126] The memory may include a program storage area and a data storage area. Among them, the program storage area can store an operating system and application programs required for at least one function; the data storage area can store data created by the processor and the like. In addition, the memory may include a high-speed random access memory, and may also include a non-transitory memory, such as at least one disk storage device, a flash memory device, or other non-transitory solid-state storage devices. In some embodiments, the memory may optionally include a memory remotely set relative to the processor, and these remote memories can be connected to the processor through a network. Examples of the above network include but are not limited to the Internet, an enterprise intranet, an enterprise internal network, a mobile communication network, and combinations thereof.

[0127] One or more modules are stored in the memory. When the processor executes, the method steps in the embodiment are executed. In this way, through the method, device, and process of the present invention, the invention purpose of the present invention can be achieved. The specific details of the above computer device can be understood by referring to the corresponding relevant descriptions and effects in the embodiments, and will not be elaborated here.

[0128] Those skilled in the art can understand that to implement all or part of the processes in the above method embodiments, it can be completed by instructing relevant hardware through a computer program. The program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the above method embodiments. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only memory (ROM), a random access memory (RAM), a flash memory, a hard disk drive (HDD), or a solid-state drive (SSD), etc.; the storage medium can also include a combination of the above types of memories.

[0129] The above further describes the technical solutions provided by the present invention in several specific implementation manners to highlight the advantages and beneficial effects of the technical solutions provided by the present invention. However, the above several specific implementation manners are not used as limitations on the present invention. Any reasonable changes and improvements to the present invention, reasonable combinations of implementation manners, equivalent replacements, etc. within the spirit and principle of the present invention should be included within the protection scope of the present invention.

Claims

1. A circuit system for testing the photovoltaic output characteristics of satellite solar cells, characterized in that: The circuit system includes a power resistor RF, a load segmentation circuit and a latch drive circuit; The load segmentation circuit and the power resistor RF are connected in series in an output loop between the positive voltage pole and the negative voltage pole of the novel solar cell SAS; the negative voltage pole of the novel solar cell SAS is grounded; The load segmentation circuit shown is composed of N segmentation units connected in parallel; each segmentation unit is composed of a power consumption resistor and a switch MOS tube connected in series; The latch driving circuit includes M latches as driving units; the M latches as driving units have N output channels, and each output channel is connected to the gate of the switch MOS tube of each segment unit in a one-to-one correspondence; The latch drive circuit is used to control the conduction of the switch MOS tube of the load segmentation circuit by adjusting the high and low levels of the TTL signal output by each output channel, so as to realize the load grading superposition of the new solar cell SAS; The signal conversion circuit includes a temperature conversion unit, a voltage conversion unit and a current conversion unit; The temperature conversion unit is used to remotely collect the temperature of the new solar cell SAS, convert it into an analog parameter that is linearly proportional to the temperature of the new solar cell SAS, and send it to the temperature collection channel of the analog collection circuit; The voltage conversion unit is used to remotely collect the voltage at both ends of the new solar cell SAS, convert it into an analog parameter that is linearly proportional to the voltage at both ends of the new solar cell SAS, and send it to the voltage collection channel of the analog collection circuit; The current conversion unit is used to collect the output current of the new solar cell SAS and convert it into an analog parameter that is linearly proportional to the output current of the new solar cell SAS; the current conversion unit includes a differential amplifier; the input terminal of the differential amplifier of the current conversion unit is connected across the power resistor RF, and the output terminal is connected to the current collection channel of the analog collection circuit; The analog quantity acquisition circuit is used to convert the analog quantity parameters acquired by the signal conversion circuit into digital quantities, including temperature data, voltage data and current data of the new solar cell SAS.

2. The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to claim 1, characterized in that: The temperature conversion unit includes a voltage-dividing resistor R7, an NTC thermistor R8 and a differential amplifier; The NTC thermistor R8 is attached to the surface of the new solar cell SAS, and its resistance value decreases as the surface temperature of the new solar cell SAS increases; The NTC thermistor R8 and the voltage-dividing resistor R7 are connected in series to form a voltage-dividing circuit. The voltage-dividing circuit generates a voltage-dividing signal which is converted into a linear voltage inversely proportional to the surface temperature of the new solar cell SAS through a differential amplifier; the output end of the differential amplifier is connected to the temperature acquisition channel of the analog quantity acquisition circuit.

3. The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to claim 1, characterized in that: The voltage conversion unit includes a voltage-dividing resistor and a differential amplifier (for voltage conversion). A voltage-dividing resistor network is connected in parallel at both ends of the novel solar cell SAS, and the voltage-dividing point is led to the differential amplifier; the output end of the differential amplifier is connected to the voltage collection channel of the analog quantity collection circuit.

4. The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to claim 1, characterized in that: When the TTL signal output by the corresponding output channel is at a high level, the switch MOS tube of the segment unit is turned on; When the TTL signal output by the corresponding output channel is at a low level, the switch MOS tube of the segment unit is turned off.

5. The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to claim 1, characterized in that: The high level of the TTL signal output by the output channel is 5V, and the low level is 0V.

6. A method for testing the photovoltaic output characteristics of satellite solar cells, characterized in that: The test method is implemented by using the circuit system for testing the photovoltaic output characteristics of satellite solar cells as described in any one of claims 1 to 5; The test method comprises the following steps: Step S1: Generate a corresponding scanning control signal according to a hierarchical load scanning strategy; the scanning control signal is used to input a circuit system for testing the photovoltaic output characteristics of satellite solar cells, control a latch drive circuit to send a corresponding TTL signal to a load segmentation circuit, and sequentially turn on the switch MOS tubes of N segmentation units to achieve traversal of the IV curve at N discrete data points; Step S2: obtaining temperature data, voltage data and current data of the new solar cell SAS corresponding to each discrete data point; Step S3: interpolation or polynomial fitting is performed according to the voltage data and current data of the novel solar cell SAS corresponding to each discrete data point to generate a continuous and complete IV curve.

7. Satellite solar cell photovoltaic output characteristics test device, characterized in that: The test device is implemented by the circuit system for testing the photovoltaic output characteristics of satellite solar cells as described in any one of claims 1 to 5; The test device comprises the following modules: Module S1: Generate a corresponding scanning control signal according to the hierarchical load scanning strategy; the scanning control signal is used to input the circuit system for testing the photovoltaic output characteristics of satellite solar cells, control the latch drive circuit to send the corresponding TTL signal to the load segmentation circuit, and sequentially turn on the switch MOS tubes of N segment units to realize the traversal of the IV curve at N discrete data points; Module S2: obtain temperature data, voltage data and current data of the new solar cell SAS corresponding to each discrete data point; Module S3: interpolation or polynomial fitting is performed according to the voltage data and current data of the new solar cell SAS corresponding to each discrete data point to generate a continuous and complete IV curve.

8. A computer device comprising: A processor and a memory, characterized in that the memory is used to store executable instructions of the processor, and the processor is configured to execute the satellite solar cell photovoltaic output characteristics testing method of claim 6 by executing the executable instructions.

9. A computer storage medium, characterized in that The storage medium stores a computer program, and when the computer program is run, the method for testing the photovoltaic output characteristics of a satellite solar cell as claimed in claim 6 is executed.

10. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the method for testing the photovoltaic output characteristics of satellite solar cells described in claim 6 are implemented.