Image sensor, method for acquiring image, chip system and electronic equipment

Abstract

The embodiment of the invention provides an image sensor, an image acquisition method, a chip system and electronic equipment, relates to the technical field of chips, and improves the dynamic range of the image sensor and reduces the reading power consumption of the image sensor. According to the specific scheme, the image sensor comprises a first vertical signal line, a second vertical signal line and a plurality of pixel circuits, the pixel circuits are arranged in an array mode, each pixel circuit comprises a first switch tube and a floating diffusion region, and the first end of the first switch tube is coupled with the floating diffusion region. The pixel circuits comprise the first pixel circuit and the second pixel circuit, the second end of the first switch tube of the first pixel circuit is coupled with the second end of the first switch tube of the second pixel circuit, the output end of the first pixel circuit is coupled with the first vertical signal line, and the output end of the second pixel circuit is coupled with the second vertical signal line. The embodiment of the invention is used for the process of acquiring the image by the image sensor.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of chip technology, and in particular, to an image sensor, a method for acquiring an image, a chip system, and an electronic device. Background Art

[0002] The dynamic range (DR) is one of the important parameters of an image sensor. The dynamic range determines the range of light intensity distribution from the darkest shadow part to the brightest highlight part that the image sensor can receive at most, and also determines the details and levels of the image. The current image sensors have a dynamic range of about 60 dB to 70 dB or even lower, while the dynamic range in the real world from a moonless dark night to direct sunlight is about 180 dB. In order to capture the highlight part and the shadow part in the scene as much as possible, the image sensor needs to use high dynamic range (HDR) technology to increase its dynamic range.

[0003] One of the common techniques for increasing the dynamic range is to fuse the images captured by a standard and low-dynamic-range image sensor at multiple exposure times to obtain an image with a much larger dynamic range than the images at a single exposure time. For example, two different exposure times can be used to capture images respectively. The image captured with a long exposure time is used to record the shadow part in the scene, and the image captured with a short exposure time is used to record the highlight part in the scene. By fusing the two images, an image with both the highlight part and the shadow part well maintained can be obtained. However, although the high dynamic range technology increases the dynamic range, reading out the two images separately increases the readout power consumption of the image sensor.

[0004] Therefore, how to improve the dynamic range of the image sensor and reduce the readout power consumption is a problem that needs to be solved. Summary of the Invention

[0005] The embodiments of the present application provide an image sensor, a method for acquiring an image, a chip system, and an electronic device, which improve the dynamic range of the image sensor and reduce the readout power consumption of the image sensor.

[0006] To achieve the above object, the embodiments of the present application adopt the following technical solutions.

[0007] In a first aspect, an embodiment of the present application provides an image sensor, which includes: a first vertical signal line, a second vertical signal line, and a plurality of pixel circuits. The plurality of pixel circuits are arranged in an array form, and each pixel circuit includes a first switching transistor and a floating diffusion region. The first end of the first switching transistor is coupled to the floating diffusion region. The plurality of pixel circuits include a first pixel circuit and a second pixel circuit. The second end of the first switching transistor of the first pixel circuit is coupled to the second end of the first switching transistor of the second pixel circuit. The output end of the first pixel circuit is coupled to the first vertical signal line, and the output end of the second pixel circuit is coupled to the second vertical signal line.

[0008] Thus, for the image sensor provided by the embodiment of the present application, when the first switching transistors of the first pixel circuit and the second pixel circuit are both turned on, an image with a low conversion gain can be obtained, and when the first switching transistors of the first pixel circuit and the second pixel circuit are both turned off, an image with a high conversion gain can be achieved. Thus, the dynamic range of the image sensor can be improved. In addition, when the first switching transistors of the first pixel circuit and the second pixel circuit are both turned on, the first pixel circuit and the second pixel circuit output through the first vertical signal line or the second vertical signal line, that is, the two pixel circuits only output one pixel signal, thereby reducing the readout power consumption of the image sensor.

[0009] In a possible design, when the first switching transistors of the first pixel circuit and the second pixel circuit are both turned on, the first pixel circuit and the second pixel circuit output pixel signals through the first vertical signal line or the second vertical signal line.

[0010] In a possible design, when the first switching transistors of the first pixel circuit and the second pixel circuit are both turned off, the first pixel circuit outputs pixel signals through the first vertical signal line, and the second pixel circuit outputs pixel signals through the second vertical signal line.

[0011] In this design, the image sensor can read pixel signals with low and high conversion gains respectively, obtain images with low and high conversion gains respectively, and improve the dynamic range of the image sensor. In addition, the first pixel circuit and the second pixel circuit only output one pixel signal at low conversion gain, reducing the readout power consumption of the image sensor.

[0012] In a possible design, the image sensor further includes: a signal processing module; the signal processing module is configured to obtain pixel signals output by the first pixel circuit and the second pixel circuit through the same vertical signal line to obtain a first image, and the signal processing module is further configured to obtain pixel signals output by the first pixel circuit and the second pixel circuit through different vertical signal lines to obtain a second image, the resolution of the second image being greater than that of the first image, the signal processing module is further configured to perform image processing on the first image to obtain a third image, the resolution of the third image being the same as that of the second image, and the signal processing module is further configured to fuse the second image and the third image to obtain a fused image.

[0013] In this design, the signal processing module can obtain the first image with a low conversion gain and the second image with a high conversion gain, that is, the dynamic range of the image sensor can be increased, and the display effect of the final image can be improved. In addition, the resolution of the first image is small, reducing the readout power consumption of the image sensor.

[0014] In a possible design, the plurality of pixel circuits further include a third pixel circuit and a fourth pixel circuit. The second end of the first switching transistor of the third pixel circuit is coupled to the second end of the first switching transistor of the fourth pixel circuit. The output end of the third pixel circuit is coupled to the second vertical signal line, and the output end of the fourth pixel circuit is coupled to the first vertical signal line. The first pixel circuit further includes a second switching transistor. The second end of the first switching transistor of the first pixel circuit is further coupled to the first end of the second switching transistor of the first pixel circuit. The fourth pixel circuit further includes a second switching transistor. The second end of the first switching transistor of the fourth pixel circuit is further coupled to the first end of the second switching transistor of the fourth pixel circuit. The second end of the second switching transistor of the first pixel circuit is coupled to the second end of the second switching transistor of the fourth pixel circuit.

[0015] In this design, the image sensor can achieve more conversion gain levels to increase the dynamic range of the image sensor and improve the display effect of the final image. In addition, the image sensor can also control the connection state of the first switching transistor and the second switching transistor to control at least two pixel circuits to output one pixel signal, thereby reducing the readout power consumption of the image sensor.

[0016] In a possible design, when the first switching transistor of the first pixel circuit, the first switching transistor of the second pixel circuit, the first switching transistor of the third pixel circuit, the first switching transistor of the fourth pixel circuit, the second switching transistor of the first pixel circuit, and the second switching transistor of the fourth pixel circuit are all turned off, the first pixel circuit outputs a pixel signal through the first vertical signal line, the second pixel circuit outputs a pixel signal through the second vertical signal line, the third pixel circuit outputs a pixel signal through the second vertical signal line, and the fourth pixel circuit outputs a pixel signal through the first vertical signal line.

[0017] In a possible design, when the first switching transistors of the first pixel circuit, the second pixel circuit, the third pixel circuit, and the fourth pixel circuit are simultaneously turned on, and the second switching transistors of the first pixel circuit and the fourth pixel circuit are simultaneously turned off, the first pixel circuit and the second pixel circuit output pixel signals through the first vertical signal line or the second vertical signal line, and the third pixel circuit and the fourth pixel circuit output pixel signals through the first vertical signal line or the second vertical signal line.

[0018] In a possible design, when the first switching transistors of the first pixel circuit, the second pixel circuit, the third pixel circuit, the fourth pixel circuit, the second switching transistors of the first pixel circuit, and the second switching transistors of the fourth pixel circuit are simultaneously turned on, the first pixel circuit, the second pixel circuit, the third pixel circuit, and the fourth pixel circuit output pixel signals through the first vertical signal line or the second vertical signal line.

[0019] In this design, the image sensor can read pixel signals with high conversion gain, medium conversion gain, and low conversion gain respectively to obtain images with high conversion gain, medium conversion gain, and low conversion gain, further improving the dynamic range of the image sensor. In addition, the method of outputting one pixel signal by at least two pixel circuits is adopted to obtain images with medium conversion gain and low conversion gain, reducing the readout power consumption of the image sensor.

[0020] In a possible design, the image sensor further includes a third vertical signal line and a fourth vertical signal line. The plurality of pixel circuits further includes a fifth pixel circuit and a sixth pixel circuit. The output end of the fifth pixel circuit is coupled to the third vertical signal line, and the output end of the sixth pixel circuit is coupled to the fourth vertical signal line. The second end of the first switching transistor of the first pixel circuit is further coupled to the second end of the first switching transistor of the fifth pixel circuit, and the second end of the first switching transistor of the second pixel circuit is further coupled to the second end of the first switching transistor of the sixth pixel circuit.

[0021] In this design, the image sensor can achieve more conversion gain levels to improve the dynamic range of the image sensor and the display effect of the final image. In addition, the image sensor can also control the connection state of the first switching transistors to control at least two pixel circuits to output one pixel signal, reducing the readout power consumption of the image sensor.

[0022] In a possible design, when the first switching transistors of the first pixel circuit, the first pixel circuit, the first switching transistors of the fifth pixel circuit, and the first switching transistors of the sixth pixel circuit are turned off simultaneously, the first pixel circuit outputs a pixel signal through the first vertical signal line, the second pixel circuit outputs a pixel signal through the second vertical signal line, the fifth pixel circuit outputs a pixel signal through the third vertical signal line, and the sixth pixel circuit outputs a pixel signal through the fourth vertical signal line.

[0023] In a possible design, when the first switching transistors of the first pixel circuit and the first pixel circuit are turned on simultaneously, and the first switching transistors of the fifth pixel circuit and the first switching transistors of the sixth pixel circuit are turned off simultaneously, the first pixel circuit and the second pixel circuit output a pixel signal through the first vertical signal line or the second vertical signal line, the fifth pixel circuit outputs a pixel signal through the third vertical signal line, and the sixth pixel circuit outputs a pixel signal through the fourth vertical signal line.

[0024] In a possible design, when the first switching transistors of the first pixel circuit, the first pixel circuit, and the first switching transistors of the fifth pixel circuit are turned on simultaneously, and the first switching transistor of the sixth pixel circuit is turned off, the first pixel circuit, the second pixel circuit, and the fifth pixel circuit output a pixel signal through the first vertical signal line, the second vertical signal line, or the third vertical signal line, and the sixth pixel circuit outputs a pixel signal through the fourth vertical signal line.

[0025] In a possible design, when the first switching transistors of the first pixel circuit, the first pixel circuit, the first switching transistors of the fifth pixel circuit, and the first switching transistors of the sixth pixel circuit are turned on simultaneously, the first pixel circuit, the second pixel circuit, the fifth pixel circuit, and the sixth pixel circuit output a pixel signal through the first vertical signal line, the second vertical signal line, the third vertical signal line, or the fourth vertical signal line.

[0026] In this design, the image sensor can read the pixel signals in the first conversion gain gear, the second conversion gain gear, the third conversion gain gear, and the fourth conversion gain gear respectively, and obtain images in the first conversion gain gear, the second conversion gain gear, the third conversion gain gear, and the fourth conversion gain gear respectively, further improving the dynamic range of the image sensor. In addition, the method of outputting one pixel signal by at least two pixel circuits is adopted to obtain images in the second conversion gain gear, the third conversion gain gear, and the fourth conversion gain gear, reducing the readout power consumption of the image sensor.

[0027] In a possible design, the first switching transistor has a first equivalent capacitance, the second switching transistor has a second equivalent capacitance, and different numbers of the first switching transistors and the second switching transistors being turned on correspond to different conversion gains of the image sensor.

[0028] In a second aspect, an embodiment of the present application provides an image sensor, which includes: a first analog-to-digital converter, a switch array, and a plurality of pixel circuits. The plurality of pixel circuits are arranged in an array form, and each pixel circuit includes a first switching transistor. When the first switching transistors of the plurality of pixel circuits are turned on, pixel signals of at least two pixel circuits among the plurality of pixel circuits are transmitted to the first analog-to-digital converter through the switch array. The first analog-to-digital converter is configured to obtain a first digital signal based on the transmitted pixel signals.

[0029] In a possible design, the image sensor further includes a second analog-to-digital converter. When the first switching transistors of the plurality of pixel circuits are turned off, pixel signals of at least two pixel circuits among the plurality of pixel circuits are respectively transmitted to the first analog-to-digital converter and the second analog-to-digital converter through the switch array. The first analog-to-digital converter or the second analog-to-digital converter is further configured to: obtain a second digital signal based on the transmitted pixel signals.

[0030] In a possible design, the image sensor further includes: a signal processing module. The signal processing module is configured to: obtain a first image based on the first digital signal, and obtain a second image based on the second digital signal, where the resolution of the second image is greater than the resolution of the first image. The signal processing module is further configured to: perform image processing on the first image to obtain a third image, where the resolution of the third image is the same as the resolution of the second image. The signal processing module is further configured to: fuse the second image and the third image to obtain a fused image.

[0031] In a third aspect, an embodiment of the present application provides a method for obtaining an image, which includes: obtaining pixel signals output by a first pixel circuit and a second pixel circuit through the same vertical signal line to obtain a first image. Obtaining pixel signals output by the first pixel circuit and the second pixel circuit through different vertical signal lines to obtain a second image, where the resolution of the second image is greater than the resolution of the first image. Performing image processing on the first image to obtain a third image, where the resolution of the third image is the same as the resolution of the second image. Fusing the second image and the third image to obtain a fused image.

[0032] In a possible design, obtaining the first image of the first pixel circuit and the second pixel circuit output through the same vertical signal line includes: controlling the first switching transistor of the first pixel circuit and the second switching transistor of the second pixel circuit to be in an on state. Obtaining pixel signals output by the first pixel circuit and the second pixel circuit through the first vertical signal line or the second vertical signal line to obtain a first image.

[0033] In a possible design, obtaining the second images respectively output by the first pixel circuit and the second pixel circuit through corresponding vertical signal lines includes: controlling the first switching transistor of the first pixel circuit and the second switching transistor of the second pixel circuit to be in an off state. Obtaining the pixel signals output by the first pixel circuit through the first vertical signal line and the second pixel circuit through the second vertical signal line to obtain the second images.

[0034] For the beneficial effects of the third aspect, reference can be made to the description of the first aspect.

[0035] In a fourth aspect, an embodiment of the present application provides a chip system, which includes a processor and an image sensor. The image sensor includes: a first vertical signal line, a second vertical signal line, and a plurality of pixel circuits. The plurality of pixel circuits are arranged in an array form, and each pixel circuit includes a first switching transistor and a floating diffusion region, and the first end of the first switching transistor is coupled to the floating diffusion region. The plurality of pixel circuits include a first pixel circuit and a second pixel circuit, and the second end of the first switching transistor of the first pixel circuit is coupled to the second end of the first switching transistor of the second pixel circuit. The output end of the first pixel circuit is coupled to the first vertical signal line, and the output end of the second pixel circuit is coupled to the second vertical signal line. The processor is configured to obtain the pixel signals output by the first pixel circuit and the second pixel circuit through the same vertical signal line to obtain a first image. The processor is further configured to obtain the pixel signals output by the first pixel circuit and the second pixel circuit respectively through corresponding vertical signal lines to obtain a second image, and the resolution of the second image is greater than the resolution of the first image. The processor is further configured to perform image processing on the first image to obtain a third image, and the resolution of the third image is the same as the resolution of the second image. The processor is further configured to fuse the second image and the third image to obtain a fused image.

[0036] In a fifth aspect, an embodiment of the present application provides an electronic device, which includes a printed circuit board and the image sensor of the first aspect or the second aspect, and the image sensor is electrically connected to the printed circuit board.

[0037] In a sixth aspect, an embodiment of the present application provides a computer-readable storage medium, which includes computer instructions. When the computer instructions run on an electronic device, the electronic device is caused to execute the method for obtaining an image in the possible implementation manners of the third aspect described above.

[0038] In a seventh aspect, an embodiment of the present application provides a computer program product. When the computer program product runs on a computer or a processor, the computer or the processor is caused to execute the method for obtaining an image in the possible implementation manners of the third aspect described above.

[0039] It can be understood that any of the above-provided image sensors, chip systems, electronic devices, computer-readable storage media, or computer program products, etc., can be applied to the corresponding methods provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding image sensors, and will not be elaborated here.

[0040] These aspects or other aspects of the present application will be more clearly understood in the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 Schematic structural diagram of an image sensor provided by an embodiment of the present application;

[0042] Figure 2 Schematic diagram of a pixel array provided by an embodiment of the present application;

[0043] Figure 3 Structural diagram of a pixel circuit provided by an embodiment of the present application;

[0044] Figure 4 Structural diagram of another pixel circuit provided by an embodiment of the present application;

[0045] Figure 5 Structural diagram of yet another pixel circuit provided by an embodiment of the present application;

[0046] Figure 6 Schematic diagram of the fusion process of a high-dynamic-range image provided by an embodiment of the present application;

[0047] Figure 7 Structural diagram of yet another pixel circuit provided by an embodiment of the present application;

[0048] Figure 8 Structural diagram of yet another pixel circuit provided by an embodiment of the present application;

[0049] Figure 9 Schematic structural diagram of a first image sensor provided by an embodiment of the present application;

[0050] Figure 10 Flowchart of a signal processing module provided by an embodiment of the present application;

[0051] Figure 11 Schematic structural diagram of another first image sensor provided by an embodiment of the present application;

[0052] Figure 12 Schematic structural diagram of yet another first image sensor provided by an embodiment of the present application;

[0053] Figure 13 Schematic structural diagram of a second image sensor provided by an embodiment of the present application;

[0054] Figure 14 Schematic diagram of another second image sensor provided by an embodiment of the present application;

[0055] Figure 15 Flowchart of a method for acquiring an image provided by an embodiment of the present application. Detailed implementation manners

[0056] For ease of understanding, some explanations of concepts related to the embodiments of the present application are given as examples for reference. As follows:

[0057] 1. Image sensor

[0058] As Figure 1 shown, the image sensor may include a pixel array and peripheral circuits. Among them, the pixel array is composed of a plurality of pixel circuits arranged in a two-dimensional row and column layout. Each pixel circuit includes at least one photosensitive device, and the photosensitive device may be a photodiode (PD). The peripheral circuits may include a vertical scanning circuit, a horizontal scanning circuit, and a control circuit.

[0059] Figure 1 In the x direction shown in is the row direction, and the y direction is the column direction. The pixel signal lines are connected to the pixel circuits along the row direction, and one end of the pixel signal lines is connected to the vertical scanning circuit. The vertical signal lines are connected to the pixel circuits along the column direction, and one end of the vertical signal lines is connected to the horizontal scanning circuit. The horizontal scanning circuit includes an analog-to-digital (AD) converter, and the AD converter is used to perform quantization and correlated double sampling processing. Under the control of the control circuit, the horizontal scanning circuit sequentially scans each ADC on the vertical signal lines one by one, so as to output the digital code values temporarily stored in the ADC to the signal processing module in sequence.

[0060] The control circuit is used to perform drive control of the vertical scanning circuit and the horizontal scanning circuit, and the control circuit generates various drive signals for the operation of the vertical scanning circuit and the horizontal scanning circuit. The control circuit generates a control signal based on the vertical synchronization signal or external trigger signal and horizontal synchronization signal provided from the outside, and the control circuit provides the generated control signal to the vertical scanning circuit. Based on the control signal provided by the control circuit, the vertical scanning circuit provides various signals including drive pulses to each pixel circuit row by row through the selected pixel signal lines, and enables each pixel circuit to output a pixel signal to the vertical signal line.

[0061] 2. Pixel array

[0062] Figure 1Each pixel circuit in [it] may include a filter that sets the light in a preset wavelength region. The pixel circuits in common image sensors have three different filters. The pixel containing the filter that sets the light with a red wavelength is called an R pixel, the pixel containing the filter that sets the light with a green wavelength is called a G pixel, and the pixel containing the filter that sets the light with a blue wavelength is called a B pixel. According to the different arrangement positions of R pixels, G pixels, and B pixels on the pixel array, different color filter array (CFA) patterns can be formed. The entire pixel array is repeatedly arranged with the basic CFA pattern as the minimum repeating unit until it fills the entire pixel array. As Figure 2 shown, Figure 2 two different color filter arrays are shown in [it], where Figure 2 (a) in [it] is a basic Bayer array, Figure 2 (b) in [it] is a 4-segment (quad) Bayer array.

[0063] 3. Pixel Circuit

[0064] Figure 1 The basic structure of each pixel circuit in [it] is as shown in Figure 3 . The pixel circuit includes a photosensitive device ( Figure 3 denoted as PD in [it]), a transfer transistor ( Figure 3 denoted as Tx in [it]), a floating diffusion region ( Figure 3 denoted as FD in [it]), a floating diffusion region capacitor ( Figure 3 denoted as C FD ) and a reset transistor ( Figure 3 denoted as RST in [it]). The photosensitive device can be a photosensitive diode with a photosensitive function, which generates photo-generated charges when receiving light. The transfer transistor transfers the photo-generated charges from the photosensitive device to the floating diffusion region. The floating diffusion region has an equivalent floating diffusion region capacitor. The reset transistor is used to introduce a reset voltage into the floating diffusion region through the power supply voltage ( Figure 3 denoted as AVDD in [it]) to reset the voltage of the floating diffusion region. The pixel circuit also includes a source follower transistor ( Figure 3 denoted as SF in [it]) and a row selection transistor ( Figure 3 denoted as SEL in [it]). Among them, the source follower transistor is used to receive the voltage of the floating diffusion region and provide an amplified voltage. The row selection transistor is used to receive the amplified voltage and output the amplified voltage to the vertical signal line.

[0065] In addition, the gates of the transfer transistor, the reset transistor, and the row selection transistor are all connected to the corresponding control circuit. The control circuit controls the gate voltage of the corresponding functional transistor to turn on or off the corresponding functional transistor.

[0066] The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application. Among them, in the description of the embodiments of the present application, unless otherwise specified, " / " means "or". For example, A / B may mean A or B. The "and / or" herein is only a description of the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B may mean: A exists alone, A and B exist simultaneously, and B exists alone. In addition, in the description of the embodiments of the present application, "a plurality of" means two or more than two.

[0067] Hereinafter, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of this embodiment, unless otherwise specified, the meaning of "a plurality of" is two or more.

[0068] Currently, in order to improve the dynamic range of an image sensor, a dual conversion gain (DCG) technology is provided. The structure of a pixel circuit adopting the dual conversion gain technology is as Figure 4 shown. The pixel circuit includes a photosensitive device ( Figure 4 denoted as PD in Figure 4 ), a transfer transistor ( Figure 4 denoted as Tx in Figure 4 ), a switching transistor ( Figure 4 denoted as DCG in Figure 4 ), a reset transistor ( FD denoted as RST in Figure 4 ), a floating diffusion region ( denoted as FD in Figure 4 ), a floating diffusion region capacitance ( Figure 4 denoted as C FD ), and a switching transistor capacitance ( Figure 4 denoted as C1). Among them, the floating diffusion region capacitance is the equivalent capacitance of the floating diffusion region, and the switching transistor capacitance is the equivalent capacitance of the switching transistor. The output end of the photosensitive device is coupled to the first source-drain region of the transfer transistor, the second source-drain region of the transfer transistor is coupled to the first source-drain region of the switching transistor, the second source-drain region of the transfer transistor is also coupled to one end of the floating diffusion region capacitance, the other end of the floating diffusion region capacitance is grounded, the second source-drain region of the switching transistor is coupled to the first source-drain region of the reset transistor, the second source-drain region of the switching transistor is also coupled to one end of the switching transistor capacitance, and the other end of the switching transistor capacitance is grounded.

[0069] Specifically, the switching transistor is used to control the parallel relationship between the floating diffusion region capacitor and the switching transistor capacitor. Under high illumination conditions, the switching transistor is turned on, and the switching transistor capacitor and the floating diffusion region capacitor are in parallel. At this time, the conversion gain of the floating diffusion region is the low conversion gain, thereby avoiding overexposure of the image under high illumination conditions. In addition, under low illumination conditions, the switching transistor is turned off, and the switching transistor capacitor and the floating diffusion region capacitor are disconnected. At this time, the conversion gain of the floating diffusion region is the high conversion gain, so that the details of the dark area of the image can be retained as much as possible under low illumination conditions. The reset transistor is used to introduce the reset voltage into the floating diffusion region through the power supply voltage to reset the voltage of the floating diffusion region. Among them, when the reset transistor resets the floating diffusion region, the switching transistor is turned on and the transfer transistor is turned on.

[0070] The pixel circuit may further include a source follower transistor ( Figure 4 denoted as SF in Figure 4 ) and a row selection transistor ( denoted as SEL in

[0071]

[0072] It can be understood that Figure 4 the pixel circuit shown in Figure 5 is a readout circuit structure exclusive to one pixel. Another pixel circuit structure is as shown in Figure 5 , which is a structural diagram of another pixel circuit provided by an embodiment of the present application. Figure 5 A 4-pixel shared readout structure is shown in Figure 5 . Among them, in this structure, 4 photosensitive devices (for example, PD0 to PD3) share the same floating diffusion region, switching transistor, reset transistor, source follower transistor, and row selection transistor, but each photosensitive device has its own exclusive transfer transistor. It can be understood that

[0073] The 4-pixel shared readout structure in Figure 5In the pixel circuit, the process of the image sensor reading out an image is as follows: After one exposure, the image sensor first turns off the switching transistor through the control circuit. At this time, the image sensor reads the pixel signal with a high conversion gain to obtain an image with a high conversion gain (HCG). Subsequently, the switching transistor is turned on through the control circuit. At this time, the image sensor reads the pixel signal with a low conversion gain to obtain an image with a low conversion gain (LCG). The signal processing module of the image sensor performs HDR fusion on the obtained high conversion gain image and low conversion gain image to obtain the final HDR image.

[0074] It can be understood that, as Figure 6 shown, Figure 6 is a schematic diagram of the fusion process of the existing technology DCG HDR. Among them, when the image sensor reads out the high conversion gain image and the low conversion gain image, the resolution of the read image is the same. Taking the readout of a 4K image as an example, when the image sensor reads out the high conversion gain image, the image resolution is 4096*3072. When the image sensor reads out the low conversion gain image, the image resolution is also 4096*3072. After HDR fusion by the signal processing module, the resolution of the obtained high dynamic range image is also 4096*3072.

[0075] Among them, for the image sensor based on the dual conversion gain technology, its ability to improve the dynamic range depends on the ratio of the high conversion gain to the low conversion gain. For every 2-fold increase in the ratio of the high conversion gain to the low conversion gain, the dynamic range ability is increased by 6 dB. In a possible example, the ratio of the high conversion gain to the low conversion gain can be 4:1, and the dynamic range is increased by 12 dB. However, if you want to increase the dynamic range more, the dual conversion gain technology cannot achieve it. In addition, the readout power consumption of the image sensor is related to the resolution of the read image. Specifically, if the image sensor only reads out one frame of 4K image, the power consumed by the image sensor is P. When the image sensor needs to read out two frames of 4K images (one frame of high conversion gain image and one frame of low conversion gain image), the power consumed by the image sensor is 2P. Thus, although the dual conversion gain technology increases the dynamic range of the image sensor, it also increases the readout power consumption of the image sensor.

[0076] In addition to this, a triple conversion gain (TCG) technology is also proposed. The triple conversion gain technology adds a conversion gain level compared to the dual conversion gain technology, that is, the triple conversion gain technology includes a high conversion gain, a middle conversion gain (MCG), and a low conversion gain. AsFigure 7 As shown Figure 7 This is another structural diagram of a pixel circuit provided by an embodiment of the present application. Specifically, when DCG_01, DCG_00, DCG_10, DCG_21, DCG_20, and DCG_30 are all turned off simultaneously, the image sensor reads the pixel signal with a high conversion gain to obtain an image with a high conversion gain. When DCG_00, DCG_10, DCG_20, and DCG_30 are all turned on simultaneously, and DCG_01 and DCG_21 are both turned off, the image sensor reads the pixel signal with a medium conversion gain to obtain an image with a medium conversion gain. When DCG_01, DCG_00, DCG_10, DCG_21, DCG_20, and DCG_30 are all turned on simultaneously, the image sensor reads the pixel signal with a low conversion gain to obtain an image with a low conversion gain. Among them, similar to the readout process of the dual conversion gain technology, when the image sensor reads an image with a high conversion gain, an image with a medium conversion gain, and an image with a low conversion gain, the resolution of the read image is also the same. Continuing to take the readout of a 4K image as an example, when the image sensor reads an image with a high conversion gain, the image resolution size is 4096*3072. When the image sensor reads an image with a medium conversion gain, the image resolution size is also 4096*3072. When the image sensor reads an image with a low conversion gain, the image resolution size is also 4096*3072. After HDR fusion by the signal processing module, the resolution of the obtained HDR image is also 4096*3072.

[0077] However, although the triple conversion gain technology further increases the dynamic range of the image sensor, it also further increases the readout power consumption of the image sensor.

[0078] In addition, a multiple conversion gain (MCG) is also proposed. The multiple conversion gain technology adds more conversion gain levels on the basis of the triple conversion gain technology. As Figure 8 shown Figure 8 This is another structural diagram of a pixel circuit of the prior art. Among them, Figure 8 multiple blocks are shown, such as block0, block1, block2, and block3. Specifically, the structural schematic diagram of block0 is shown, and the internal structures of the remaining blocks are the same as that of block0. Each block internally includes 8 pixel circuits, and the 8 pixel circuits share the readout circuit structure. Each block contains a switching transistor ( Figure 8 represented by FDG in Figure 8Coupled with (denoted as FD in the middle), the other end of each switching transistor is connected to the same metal wire. Every 4 blocks share the same metal wire. FD_0 of block0 is connected to the metal wire through FDG_0, FD_1 of block1 is connected to the metal wire through FDG_1, FD_2 of block2 is connected to the metal wire through FDG_2, and FD_3 of block3 is connected to the metal wire through FDG_3.

[0079] The pixel circuit controls the number of blocks connected to the metal wire by independently controlling the connection states (on or off) of the switching transistors of each block, thereby changing the number of floating diffusion region capacitors connected in parallel, and further changing the conversion gain effect. As an example, the pixel circuit can achieve multiple different levels of conversion gain according to the connection states of the switching transistors shown in Table 1, so as to read out images with multiple conversion gains.

[0080] Table 1

[0081] FDG_0 FDG_1 FDG_2 FDG_3 First conversion gain gear Off Off Off Off Second conversion gain gear On On Off Off Third conversion gain gear On On On Off Fourth conversion gain gear On On On On

[0082] However, although the multi-conversion gain technology further increases the dynamic range of the image sensor, it also further increases the readout power consumption of the image sensor.

[0083] Therefore, an embodiment of the present application provides an image sensor. When the first switching transistors of the first pixel circuit and the second pixel circuit are simultaneously turned on, an image with a low conversion gain can be obtained, and when the first switching transistors of the first pixel circuit and the second pixel circuit are simultaneously turned off, an image with a high conversion gain can be realized. Therefore, the image sensor provided by the embodiment of the present application can improve the dynamic range. In addition, when the first switching transistors of the first pixel circuit and the second pixel circuit are simultaneously turned on, the first pixel circuit and the second pixel circuit are output through the first vertical signal line or the second vertical signal line, that is, only one pixel signal is output by the two pixel circuits, thereby reducing the readout power consumption of the image sensor.

[0084] The following further introduces the image sensor provided by the embodiment of the present application.

[0085] Among them, an embodiment of the present application provides a first image sensor 90. The first image sensor 90 includes a first vertical signal line 91, a second vertical signal line 92, and a plurality of pixel circuits 93. Among them, the plurality of pixel circuits 93 are arranged in an array form, and each pixel circuit 93 includes a first switching transistor 931 and a floating diffusion region 932 ( Figure 9In the figure (denoted by FD), the first end of the first switching transistor 931 is coupled to the floating diffusion region 932. The plurality of pixel circuits 93 include a first pixel circuit 93_1 and a second pixel circuit 93_2. The second end of the first switching transistor 931_1 of the first pixel circuit 93_1 is coupled to the second end of the first switching transistor 931_2 of the second pixel circuit 93_2. The output end of the first pixel circuit 93_1 is coupled to the first vertical signal line 91, and the output end of the second pixel circuit 93_2 is coupled to the second vertical signal line 92.

[0086] As Figure 9 shown, Figure 9 FIG. is a schematic structural diagram of a first image sensor provided by an embodiment of the present application. Figure 9 The first vertical signal line 91 ( Figure 9 denoted as Vout0 in the figure), the second vertical signal line 92 ( Figure 9 denoted as Vout1 in the figure), and two sets of first pixel circuits 93_1 and second pixel circuits 93_2 are shown. Hereinafter, a set of first pixel circuits 93_1 and second pixel circuits 93_2 will be described. Among them, the first end of the first switching transistor 931_1 ( Figure 9 denoted as DCG_0 in the figure) of the first pixel circuit 93_1 is coupled to the floating diffusion region 932_1 ( Figure 9 denoted as FD_0 in the figure) of the first pixel circuit 93_1, and the first end of the first switching transistor 931_2 ( Figure 9 denoted as DCG_2 in the figure) of the second pixel circuit 93_2 is coupled to the floating diffusion region 932_2 ( Figure 9 denoted as FD_2 in the figure) of the second pixel circuit 93_2. The second end of the first switching transistor 931_1 of the first pixel circuit 93_1 is coupled to the second end of the first switching transistor 931_2 of the second pixel circuit 93_2. Figure 9 The reset transistors (such as RST_0, RST_1, RST_2, and RST_3), source follower transistors (such as SF_0, SF_1, SF_2, and SF_3), and row selection transistors (such as SEL_0, SEL_1, SEL_2, and SEL_3) of each pixel circuit 93 are also shown. It can be understood that Figure 9 the structure shown in the figure is a 4-pixel shared readout structure, and a readout circuit can also be shared by a larger number of pixels. The present application does not limit this. In addition, the equivalent capacitance of the floating diffusion region 932 and the equivalent capacitance of the first switching transistor 931 are not shown in Figure 9 the figure.

[0087] Exemplarily, the first pixel circuit 93_1 can be the pixel circuit of the Nth row, and the second pixel circuit 93_2 can be the pixel circuit of the (N + i)th row, where N is an integer greater than or equal to 1, and i is an integer greater than or equal to 1. Figure 9The second pixel circuit 93_2 shown is the pixel circuit of the (N + 2)-th row. The second ends of the first switching transistors 931_1 of the first pixel circuit 93_1 and the first switching transistors 931_2 of the second pixel circuit 93_2 can be coupled through a metal wire. In addition, the second ends of the first switching transistors 931 of other pixel circuits 93 can also be respectively coupled to the second ends of the first switching transistors 931 of the pixel circuits 93 across rows through metal wires.

[0088] Among them, the first switching transistor 931 has a first equivalent capacitance. Different numbers of the first switching transistors 931 being turned on correspond to different conversion gains of the first image sensor 90. That is to say, the first image sensor 90 can change the conversion gain of the floating diffusion region of the pixel circuit 93 by controlling the connection state (on state or off state) of the first switching transistor 931 of the pixel circuit 93.

[0089] Among them, when the first switching transistors 931_1 of the first pixel circuit 93_1 and the first switching transistors 931_2 of the second pixel circuit 93_2 are turned on simultaneously, the first pixel circuit 93_1 and the second pixel circuit 93_2 output pixel signals through the first vertical signal line 91 or the second vertical signal line 92. When the first switching transistors 931_1 of the first pixel circuit 93_1 and the first switching transistors 931_2 of the second pixel circuit 93_2 are turned off simultaneously, the first pixel circuit 93_1 outputs a pixel signal through the first vertical signal line 91, and the second pixel circuit 93_2 outputs a pixel signal through the second vertical signal line 92.

[0090] Exemplarily, when the first switching transistors 931_1 of the first pixel circuit 93_1 and the first switching transistors 931_2 of the second pixel circuit 93_2 are turned on simultaneously, the first image sensor 90 reads the pixel signals with a low conversion gain to obtain an image with a low conversion gain. Specifically, when the transfer transistors of the 4 pixels of the first pixel circuit 93_1 and the transfer transistors of the 4 pixels of the second pixel circuit 93_2 are turned on simultaneously, the charges stored in the pixels are all transferred to the floating diffusion region. Since the first switching transistors 931_1 of the first pixel circuit 93_1 and the first switching transistors 931_2 of the second pixel circuit 93_2 are turned on, that is, the floating diffusion regions 932_1 of the first pixel circuit 93_1 and the floating diffusion regions 932_2 of the second pixel circuit 93_2 are connected in parallel through a metal wire, the charges stored in the 4 pixels of the first pixel circuit 93_1 and the charges stored in the 4 pixels of the second pixel circuit 93_2 are all converged in the same floating diffusion region 932. At this time, only one source follower transistor and a row selection transistor are needed to read the signal of the floating diffusion region.

[0091] Exemplarily, when the first switching transistor 931_1 of the first pixel circuit 93_1 and the first switching transistor 931_2 of the second pixel circuit 93_2 are turned off, the first image sensor 90 reads the pixel signals with a high conversion gain to obtain an image with a high conversion gain.

[0092] Specifically, continue to refer to Figure 9 , when DCG_0 and DCG_2 are both turned off, the pixel signals of the first pixel circuit 93_1 are output through Vout0, and the pixel signals of the second pixel circuit 93_2 are output through Vout1. At this time, the first image sensor 90 reads the pixel signals with a high conversion gain to obtain an image with a high conversion gain. When DCG_0 and DCG_2 are both turned on, FD_0 and FD_2 are connected through a metal wire, and the four transfer transistors of the first pixel circuit 93_1 and the four transfer transistors of the second pixel circuit 93_2 are all turned on. The charges generated by the four pixels of the first pixel circuit 93_1 and the four pixels of the second pixel circuit 93_2 are all transferred to the common floating diffusion region 932. At this time, the charges at the floating diffusion region 932 can be read out through SF_0 and SEL_0 of the first pixel circuit 93_1, or can be read out through SF_2 and SEL_2 of the second pixel circuit 93_2, that is, only one pixel signal is generated by the first pixel circuit 93_1 and the second pixel circuit 93_2. Thus, compared with two pixel circuits generating two pixel signals, the embodiment of the present application adopts the pixel binning method to reduce the resolution of the image with a low conversion gain while implementing the dual conversion gain technology.

[0093] Optionally, the first image sensor 90 may further include a signal processing module 94. Wherein, the signal processing module 94 is used to obtain the pixel signals output by the first pixel circuit 93_1 and the second pixel circuit 93_2 through the same vertical signal line to obtain a first image. The signal processing module 94 is further used to obtain the pixel signals output by the first pixel circuit 93_1 and the second pixel circuit 93_2 through different vertical signal lines to obtain a second image, and the resolution of the second image is greater than that of the first image. The signal processing module 94 is further used to perform image processing on the first image to obtain a third image, and the resolution of the third image is the same as that of the second image. The signal processing module 94 is further used to fuse the second image and the third image to obtain a fused image.

[0094] Exemplarily, as Figure 10 shown, Figure 10The flowchart of a signal processing module provided by an embodiment of the present application. Among them, the first image is also the image with low conversion gain, and the second image is also the image with high conversion gain. Since the embodiment of the present application adopts the pixel binning method, the number of rows of the first image is halved compared with the second image. The signal processing module 94 can perform image processing on the first image to obtain a third image with the same number of rows as the image with high conversion gain, and then fuse the second image and the third image with the same resolution to obtain the final high-dynamic-range image.

[0095] For example, continuing with the example of reading out a 4K image, the resolution of the second image can be 4096*3072, and the resolution of the first image can be 4096*1536. The signal processing module 94 can perform image processing on the first image to obtain a third image with a resolution of 4096*3072. The signal processing module 94 can also fuse the second image with a resolution of 4096*3072 and the third image with a resolution of 4096*3072 to obtain a high-dynamic-range image with a resolution of 4096*3072.

[0096] Optionally, the multiple pixel circuits 93 further include a third pixel circuit 93_3 and a fourth pixel circuit 93_4. The second end of the first switching transistor 931_3 of the third pixel circuit 93_3 is coupled to the second end of the first switching transistor 931_4 of the fourth pixel circuit 93_4. The output end of the third pixel circuit 93_3 is coupled to the second vertical signal line 92, and the output end of the fourth pixel circuit 93_4 is coupled to the first vertical signal line 91. The first pixel circuit 93_1 further includes a second switching transistor 933_1. The second end of the first switching transistor 931_1 of the first pixel circuit 93_1 is coupled to the first end of the second switching transistor 933_1 of the first pixel circuit 93_1. The fourth pixel circuit 93_4 further includes a second switching transistor 933_2. The second end of the first switching transistor 931_4 of the fourth pixel circuit 93_4 is further coupled to the first end of the second switching transistor 933_2 of the fourth pixel circuit 93_4. The second end of the second switching transistor 933_1 of the first pixel circuit 93_1 is coupled to the second end of the second switching transistor 933_2 of the fourth pixel circuit 93_4.

[0097] Exemplarily, as Figure 11 shown, Figure 11 The structural schematic diagram of another first image sensor provided by an embodiment of the present application. Figure 11The first pixel circuit 93_1, the second pixel circuit 93_2, the third pixel circuit 93_3, and the fourth pixel circuit 93_4 are shown. The first switching transistor 931_1 of the first pixel circuit 93_1 is represented by DCG_00, the second switching transistor 933_1 of the first pixel circuit 93_1 is represented by DCG_01, the first switching transistor 931_2 of the second pixel circuit 93_2 is represented by DCG_20, the first switching transistor 931_3 of the third pixel circuit 93_3 is represented by DCG_10, the first switching transistor 931_4 of the fourth pixel circuit 93_4 is represented by DCG_40, and the second switching transistor 933_2 of the fourth pixel circuit 93_4 is represented by DCG_31. Figure 11 The identification of other devices in Figure 9 is the same as that of the devices in, which will not be elaborated here. Specifically, the pixel circuit 93 in the second row is the third pixel circuit 93_3, and the pixel circuit 93 in the fourth row is the fourth pixel circuit 93_4.

[0098] Based on Figure 9 the embodiment of Figure 11 In the first pixel circuit 93_1 and the fourth pixel circuit 93_4 of the first image sensor 90 shown in, a second switching transistor 933 is respectively added, and the second ends of the second switching transistor 933_1 of the first pixel circuit 93_1 and the second switching transistor 933_2 of the fourth pixel circuit 93_4 are coupled. Among them, the second switching transistor 933 also has a second equivalent capacitance. Different numbers of the first switching transistors 931 and the second switching transistors 933 being turned on correspond to different conversion gains of the first image sensor 90. Thus, the first image sensor 90 can change the conversion gain of the floating diffusion region 932 by controlling the connection states of the first switching transistor 931 and the second switching transistor 933.

[0099] Among them, when the first switching transistor 931_1 of the first pixel circuit 93_1, the first switching transistor 931_2 of the second pixel circuit 93_2, the first switching transistor 931_3 of the third pixel circuit 93_3, the first switching transistor 931_4 of the fourth pixel circuit 93_4, the second switching transistor 933_1 of the first pixel circuit 93_1, and the second switching transistor 933_2 of the fourth pixel circuit 93_4 are simultaneously turned off, the first pixel circuit 93_1 outputs a pixel signal through the first vertical signal line 91, the second pixel circuit 93_2 outputs a pixel signal through the second vertical signal line 92, the third pixel circuit 93_3 outputs a pixel signal through the second vertical signal line 92, and the fourth pixel circuit 93_4 outputs a pixel signal through the first vertical signal line 91.

[0100] Exemplarily, when the first switching transistors 931 and the second switching transistors 933 of the first pixel circuit 93_1, the second pixel circuit 93_2, the third pixel circuit 93_3, and the fourth pixel circuit 93_4 are all turned off, at this time, the first image sensor 90 reads the pixel signals with a high conversion gain to obtain an image with a high conversion gain.

[0101] Among them, when the first switching transistors 931_1 of the first pixel circuit 93_1, the first switching transistors 931_2 of the second pixel circuit 93_2, the first switching transistors 931_3 of the third pixel circuit 93_3, and the first switching transistors 931_4 of the fourth pixel circuit 93_4 are simultaneously turned on, and when the second switching transistors 933_1 of the first pixel circuit 93_1 and the second switching transistors 933_2 of the fourth pixel circuit 93_4 are simultaneously turned off, the first pixel circuit 93_1 and the second pixel circuit 93_2 output pixel signals through the first vertical signal line 91 or the second vertical signal line 92, and the third pixel circuit 93_3 and the fourth pixel circuit 93_4 output pixel signals through the first vertical signal line 91 or the second vertical signal line 92.

[0102] Exemplarily, when the first switching transistors 931 of the first pixel circuit 93_1, the second pixel circuit 93_2, the third pixel circuit 93_3, and the fourth pixel circuit 93_4 are all turned on, and the second switching transistors 933 of the first pixel circuit 93_1 and the fourth pixel circuit 93_4 are all turned off, at this time, the first image sensor 90 reads the pixel signals with a medium conversion gain to obtain an image with a medium conversion gain.

[0103] Among them, when the first switching transistors 931_1 of the first pixel circuit 93_1, the first switching transistors 931_2 of the second pixel circuit 93_2, the first switching transistors 931_3 of the third pixel circuit 93_3, the first switching transistors 931_4 of the fourth pixel circuit 93_4, the second switching transistors 933_1 of the first pixel circuit 93_1, and the second switching transistors 933_2 of the fourth pixel circuit 93_4 are simultaneously turned on, the first pixel circuit 93_1, the second pixel circuit 93_2, the third pixel circuit 93_3, and the fourth pixel circuit 93_4 output pixel signals through the first vertical signal line 91 or the second vertical signal line 92.

[0104] Exemplarily, when the first switching transistors 931 and the second switching transistors 933 of the first pixel circuit 93_1, the second pixel circuit 93_2, the third pixel circuit 93_3, and the fourth pixel circuit 93_4 are all turned on, at this time, the first image sensor 90 reads the pixel signals with a low conversion gain to obtain an image with a low conversion gain.

[0105] Specifically, because Figure 11 the first image sensor shown in Figure 9In the first image sensor shown in [reference], two second switching transistors 933 are added, so that the first image sensor 90 can achieve parallel connection of the floating diffusion regions of two pixel circuits 93, that is, corresponding to medium conversion gain, and can also achieve parallel connection of the floating diffusion regions of four pixel circuits 93, that is, corresponding to low conversion gain. At this time, the first image sensor 90 does not perform pixel binning on the image with high conversion gain, and performs pixel binning on the images with medium conversion gain and low conversion gain, so as to reduce the resolution of the images with medium conversion gain and low conversion gain and reduce the readout power consumption of the first image sensor 90.

[0106] Continue to refer to Figure 11 , the 4 photosensitive devices of each pixel circuit share a floating diffusion region and a readout circuit. Among them, PD00 to PD03 share FD_0, DCG_00, DCG_01, SF_0 and SEL_0, PD10 to PD13 share FD_1, DCG_10, RST_10, SF_1 and SEL_1, PD20 to PD23 share FD_2, DCG_20, DCG_21, SF_2 and SEL_2, and PD30 to PD33 share FD_3, DCG_30, RST_30, SF_3 and SEL_3. It can be understood that the equivalent capacitance of the floating diffusion region 932, the equivalent capacitance of the first switching transistor 931 and the equivalent capacitance of the second switching transistor 933 are not shown in Figure 11 the [reference].

[0107] Exemplarily, the third pixel circuit 93_3 can be the pixel circuit 93 in the (N + 1)-th row, and the fourth pixel circuit 93_4 can be the pixel circuit 93 in the (N + 3)-th row. Among them, the second ends of the first switching transistors 931 of the pixel circuits 93 in the N-th row and the second ends of the first switching transistors 931 of the pixel circuits 93 in the (N + 2)-th row are coupled by a metal wire, and the second ends of the second switching transistors 933 of the pixel circuits 93 in the N-th row and the second ends of the second switching transistors 933 of the pixel circuits 93 in the (N + 3)-th row are coupled by a metal wire. In addition, the output ends of the pixel circuits 93 in the N-th row and the output ends of the pixel circuits 93 in the (N + 2)-th row are coupled to different vertical signal lines, and the output ends of the pixel circuits 93 in the (N + 1)-th row and the output ends of the pixel circuits 93 in the (N + 3)-th row are coupled to different vertical signal lines. In a possible example, SEL_0 and SEL_3 are connected to Vout0, and SEL_1 and SEL_2 are connected to Vout1.

[0108] Exemplarily, the readout process of the first image sensor 90 may include: First, after one exposure, the first image sensor 90 controls all the first switching transistors 931 and the second switching transistors 932 (i.e., DCG_01, DCG_00, DCG_10, DCG_20, DCG_31, and DCG_30) to be in the off state through the control circuit. At this time, the first image sensor 90 reads the pixel signals with a high conversion gain to obtain an image with a high conversion gain.

[0109] Second, the first image sensor 90 controls all the first switching transistors 931 (i.e., DCG_00, DCG_10, DCG_20, and DCG_30) to be in the on state through the control circuit, and controls all the second switching transistors 933 (i.e., DCG_01 and DCG_31) to be in the off state. At this time, the floating diffusion regions of the first pixel circuit 93_1 and the second pixel circuit 93_2 are connected in parallel through a metal wire, that is, FD_0 and FD_2 are connected in parallel through a metal wire, and the floating diffusion regions of the third pixel circuit 93_3 and the fourth pixel circuit 93_4 are connected in parallel through a metal wire, that is, FD_1 and FD_3 are connected in parallel through a metal wire. At this time, the first image sensor 90 reads the signal with a medium conversion gain to obtain an image with a medium conversion gain. Specifically, the transfer transistors of the 4 pixels of the first pixel circuit 93_1 and the transfer transistors of the 4 pixels of the second pixel circuit 93_2 are simultaneously turned on, and the charges stored in the photosensitive device are all transferred to the FD. Since the FDs of the first pixel circuit 93_1 and the second pixel circuit 93_2 are connected in parallel through a metal wire, the charges stored in the 4 pixels of the first pixel circuit 93_1 and the charges stored in the 4 pixels of the second pixel circuit 93_3 are all converged to the same FD. At this time, only one source follower transistor and a row selection transistor are needed to read the signal of the FD. Continuing to refer to Figure 11 , when DCG_00, DCG_10, DCG_20, and DCG_30 are in the on state, FD_0 and FD_2 are connected by a metal wire, and the 4 transfer transistors of the first pixel circuit 93_1 and the 4 transfer transistors of the second pixel circuit 93_2 are all in the on state. The charges generated by the 4 pixels of the first pixel circuit 93_1 and the 4 pixels of the second pixel circuit 93_2 are all transferred to the common FD. At this time, the charges at the FD can be read out through SF_0 and SEL_0 of the first pixel circuit 93_1, or can be read out through SF_2 and SEL_2 of the second pixel circuit 93_2, that is, only one pixel signal is generated by the first pixel circuit 93_1 and the second pixel circuit 93_2. Thus, compared with two pixel circuits generating two pixel signals, the embodiment of the present application adopts the pixel binning method, while reading the image with a medium conversion gain, reducing the resolution size of the image with a medium conversion gain.

[0110] Finally, the first image sensor 90 controls all the first switching transistors 931 and the second switching transistors 933 (i.e., DCG_01, DCG_00, DCG_10, DCG_20, DCG_31, and DCG_30) to be in the conducting state. At this time, the FDs of the 4 pixel circuits are connected through metal wires, that is, FD_0, FD_1, FD_2, and FD_3 are connected through metal wires. At this time, the first image sensor 90 reads the signal with a low conversion gain to obtain an image with a low conversion gain. Among them, the number of rows of the image with a low conversion gain is also half of the number of rows of the image with a high conversion gain. The reading process of the image with a low conversion gain is similar to the reading process of the image with a medium conversion gain, and will not be elaborated here.

[0111] Exemplarily, the signal processing module 94 can also perform image processing on the image with a medium conversion gain to make the resolution of the image with a medium conversion gain the same as the resolution of the image with a high conversion gain. The signal processing module 94 can also perform image processing on the image with a low conversion gain to make the resolution of the image with a low conversion gain the same as the resolution of the image with a high conversion gain. The signal processing module 94 can also fuse the images with a high conversion gain, a medium conversion gain, and a low conversion gain to obtain a final high-dynamic-range image.

[0112] For example, continuing with the example of reading a 4K image, the resolution of the image with a high conversion gain read by the first image sensor 90 can be 4096*3072, and the resolutions of the images with a medium conversion gain and a low conversion gain read by the first image sensor 90 are both 4096*1536. The signal processing module 94 can perform image processing on the images with a medium conversion gain and a low conversion gain respectively to obtain an image with a medium conversion gain with a resolution of 4096*1536 and an image with a medium conversion gain with a resolution of 4096*1536. At this time, the resolutions of the images with a high conversion gain, a medium conversion gain, and a low conversion gain are all 4096*3072. The signal processing module 94 is also used to fuse the images with a high conversion gain, a medium conversion gain, and a low conversion gain to obtain a high-dynamic-range image with a resolution of 4096*3072.

[0113] Optionally, as Figure 12 shown, Figure 12 is a schematic structural diagram of another first image sensor provided by the embodiment of the present application. The first image sensor 90 may further include a third vertical signal line ( Figure 12 not shown in Figure 12(not shown in the figure), the plurality of pixel circuits 93 may further include a fifth pixel circuit 93_5 and a sixth pixel circuit 93_6. The output terminal of the fifth pixel circuit 93_5 is coupled to the third vertical signal line, and the output terminal of the sixth pixel circuit 93_6 is coupled to the fourth vertical signal line. The second terminal of the first switching transistor 931_1 ( Figure 12 represented as FDG_0 in the figure) of the first pixel circuit 93_1 is further coupled to the second terminal of the first switching transistor 931_5 ( Figure 12 represented as FDG_4 in the figure) of the fifth pixel circuit 93_5, and the second terminal of the first switching transistor 931_2 ( Figure 12 represented as FDG_2 in the figure) of the second pixel circuit 93_2 is further coupled to the second terminal of the first switching transistor 931_6 ( Figure 12 represented as FDG_6 in the figure) of the sixth pixel circuit 93_6.

[0114] In a possible example, the first pixel circuit 93_1 may be the pixel circuit at the Nth row and Nth column, the second pixel circuit 93_2 may be the pixel circuit at the (N + 2)th row and Nth column, the third pixel circuit 93_3 may be the pixel circuit at the (N + 1)th row and Nth column, the fourth pixel circuit 93_4 may be the pixel circuit at the (N + 3)th row and Nth column, the fifth pixel circuit 93_5 may be the pixel circuit at the Nth row and (N + 2)th column, and the sixth pixel circuit 93_6 may be the pixel circuit at the (N + 2)th row and (N + 2)th column.

[0115] Wherein, when the first switching transistors 931_1 of the first pixel circuit 93_1, the first switching transistors 931_2 of the second pixel circuit 93_2, the first switching transistors 931_5 of the fifth pixel circuit 93_5, and the first switching transistors 931_6 of the sixth pixel circuit 93_6 are simultaneously turned off, the first pixel circuit 93_1 outputs a pixel signal through the first vertical signal line 91, the second pixel circuit 93_2 outputs a pixel signal through the second vertical signal line 92, the fifth pixel circuit 93_5 outputs a pixel signal through the third vertical signal line, and the sixth pixel circuit 93_6 outputs a pixel signal through the fourth vertical signal line.

[0116] Exemplarily, when the first switching transistors 931_1 of the first pixel circuit 93_1, the first switching transistors 931_2 of the second pixel circuit 93_2, the first switching transistors 931_5 of the fifth pixel circuit 93_5, and the first switching transistors 931_6 of the sixth pixel circuit 93_6 are simultaneously turned off, the first image sensor 90 reads the pixel signal in the first conversion gain gear to obtain an image in the first conversion gain gear.

[0117] Among them, when the first switching transistor 931_1 of the first pixel circuit 93_1 and the first switching transistor 931_2 of the second pixel circuit 93_2 are simultaneously turned on, and the first switching transistor 931_5 of the fifth pixel circuit 93_5 and the first switching transistor 931_6 of the sixth pixel circuit 93_6 are simultaneously turned off, the first pixel circuit 93_1 and the second pixel circuit 93_2 output pixel signals through the first vertical signal line 91 or the second vertical signal line 92, the fifth pixel circuit 93_5 outputs pixel signals through the third vertical signal line, and the sixth pixel circuit 93_6 outputs pixel signals through the fourth vertical signal line.

[0118] Exemplarily, when any two of the first switching transistors 931_1 of the first pixel circuit 93_1, the first switching transistors 931_2 of the second pixel circuit 93_2, the first switching transistors 931_5 of the fifth pixel circuit 93_5, and the first switching transistors 931_6 of the sixth pixel circuit 93_6 are simultaneously turned on, and any two of the first switching transistors 931 are simultaneously turned off, the first image sensor 90 reads the pixel signals in the second conversion gain gear to obtain an image in the second conversion gain gear.

[0119] Among them, when the first switching transistor 931_1 of the first pixel circuit 93_1, the first switching transistor 931_2 of the second pixel circuit 93_2, and the first switching transistor 931_5 of the fifth pixel circuit 93_5 are simultaneously turned on, and the first switching transistor 931_6 of the sixth pixel circuit 93_6 is turned off, the first pixel circuit 93_1, the second pixel circuit 93_2, and the fifth pixel circuit 93_5 output pixel signals through the first vertical signal line 91, the second vertical signal line 92, or the third vertical signal line, and the sixth pixel circuit 93_6 outputs pixel signals through the fourth vertical signal line.

[0120] Exemplarily, when any three of the first switching transistors 931_1 of the first pixel circuit 93_1, the first switching transistors 931_2 of the second pixel circuit 93_2, the first switching transistors 931_5 of the fifth pixel circuit 93_5, and the first switching transistors 931_6 of the sixth pixel circuit 93_6 are simultaneously turned on, and the remaining one first switching transistor 931 is turned off, the first image sensor 90 reads the pixel signals in the third conversion gain gear to obtain an image in the third conversion gain gear.

[0121] Exemplarily, the connection states of the first switching transistors 931 corresponding to the third conversion gain gear may include: (1) The first switching transistors 931_1 of the first pixel circuit 93_1, the first switching transistors 931_2 of the second pixel circuit 93_2, and the first switching transistors 931_5 of the fifth pixel circuit 93_5 are simultaneously turned on, and the first switching transistors 931_6 of the sixth pixel circuit 93_6 are turned off. (2) The first switching transistors 931_1 of the first pixel circuit 93_1, the first switching transistors 931_2 of the second pixel circuit 93_2, and the first switching transistors 931_6 of the sixth pixel circuit 93_6 are simultaneously turned on, and the first switching transistors 931_5 of the fifth pixel circuit 93_5 are turned off. (3) The first switching transistors 931_2 of the second pixel circuit 93_2, the first switching transistors 931_5 of the fifth pixel circuit 93_5, and the first switching transistors 931_6 of the sixth pixel circuit 93_6 are simultaneously turned on, and the first switching transistors 931_1 of the first pixel circuit 93_1 are turned off. (4) The first switching transistors 931_1 of the first pixel circuit 93_1, the first switching transistors 931_5 of the fifth pixel circuit 93_5, and the first switching transistors 931_6 of the sixth pixel circuit 93_6 are simultaneously turned on, and the first switching transistors 931_2 of the second pixel circuit 93_2 are turned off.

[0122] Wherein, when the first switching transistors 931_1 of the first pixel circuit 93_1, the first switching transistors 931_2 of the second pixel circuit 93_2, the first switching transistors 931_5 of the fifth pixel circuit 93_5, and the first switching transistors 931_6 of the sixth pixel circuit 93_6 are simultaneously turned on, the first pixel circuit 93_1, the second pixel circuit 93_2, the fifth pixel circuit 93_5, and the sixth pixel circuit 93_6 output pixel signals through the first vertical signal line 91, the second vertical signal line 92, the third vertical signal line, or the fourth vertical signal line.

[0123] Exemplarily, when the first switching transistors 931_1 of the first pixel circuit 93_1, the first switching transistors 931_2 of the second pixel circuit 93_2, the first switching transistors 931_5 of the fifth pixel circuit 93_5, and the first switching transistors 931_6 of the sixth pixel circuit 93_6 are simultaneously turned on, the first image sensor 90 reads the signal at the fourth conversion gain gear to obtain the first image at the fourth conversion gain gear.

[0124] Specifically, the second ends of the first switching transistors 931 of each pixel circuit 93 are coupled to the second ends of the first switching transistors 931 of another pixel circuit 93 through metal wires. For example, FD_0 of the first pixel circuit 93_1 in the Nth row and Nth column is connected to the metal wire through FDG_0, FD_2 of the second pixel circuit 93_2 in the (N + 2)th row and Nth column is connected to the metal wire through FDG_2, FD_4 of the fifth pixel circuit 93_5 in the Nth row and (N + 2)th column is connected to the metal wire through FDG_4, and FD_6 of the sixth pixel circuit 93_6 in the (N + 2)th row and (N + 2)th column is connected to the metal wire through FDG_6.

[0125] Among them, the first image sensor 90 can control the connection state of each first switching transistor through a control circuit to control the number of pixel circuits connected to the metal wire, so as to change the number of equivalent capacitances in parallel, and further change the conversion gain. The first image sensor 90 can achieve multiple different levels of conversion gain according to the connection state of the first switching transistors shown in Table 2, so as to read out images with multiple conversion gains.

[0126] Table 2

[0127] FDG_0 FDG_2 FDG_4 FDG_6 First conversion gain gear Off Off Off Off Second conversion gain gear On On Off Off Third conversion gain gear On On On Off Fourth conversion gain gear On On On On

[0128] It can be understood that Table 2 is only an example, and the connection state of the first switching transistor 931 corresponding to each conversion gain level can vary flexibly.

[0129] Compared with the multiple conversion gain levels in Table 1, corresponding to the second, third, and fourth conversion gain levels in Table 2, the first image sensor 90 uses the pixel binning method for reading to reduce the number of rows (and / or columns) of the read image, thereby reducing the readout power consumption.

[0130] Taking the fourth conversion gain level as an example, the first image sensor 90 conducts FDG_0, FDG_2, FDG_4, and FDG_6 through the control circuit. At this time, the FDs (i.e., FD_0, FD_2, FD_4, and FD_6) of 4 pixel circuits 93 are connected through the metal wire. When the transfer transistors of the 4 pixel circuits 93 are turned on simultaneously, the charges stored in the 16 photosensitive devices are all transferred to the common FD. At this time, only one source follower transistor and row selection transistor are needed to read the signal of FD. Please continue to refer to Figure 12, the charge of the common FD can be read out through SF_0 and SEL_0, the charge of the common FD can also be read out through SF_2 and SEL_2, the charge of the common FD can also be read out through SF_4 and SEL_4, or the charge of the common FD can also be read out through SF_6 and SEL_6. That is, the pixel circuit 93 of two rows and two columns generates only one readout signal. Compared with the four pixel circuits generating four readout signals, the first image sensor provided by the embodiment of the present application reduces the readout power consumption of the first image sensor 90 through the pixel binning method.

[0131] It can be understood that the readout process of the first image sensor corresponding to the second conversion gain gear and the third conversion gain gear is similar to that of the fourth conversion gain gear, and will not be elaborated here.

[0132] Optionally, the embodiment of the present application further provides a second image sensor 1300, which includes a first analog-to-digital converter 1301, a switch array 1302, and a plurality of pixel circuits 1303. The plurality of pixel circuits 1303 are arranged in an array form, and each pixel circuit 1303 includes a first switching transistor ( Figure 13 not shown in the figure). The switch array 1302 is configured to: when the first switching transistors of the plurality of pixel circuits 1303 are turned on, the pixel signals of at least two pixel circuits 1303 among the plurality of pixel circuits 1303 are transmitted to the first analog-to-digital converter 1301 through the switch array 1302. The first analog-to-digital converter 1301 is configured to obtain a first digital signal based on the transmitted pixel signals.

[0133] Exemplarily, as Figure 13 shown, Figure 13 is a schematic structural diagram of a second image sensor provided by the embodiment of the present application. Figure 13 Sixteen pixel circuits 1303 are shown in the figure. It is assumed that the sixteen pixel circuits include a first pixel circuit 1303_1, a second pixel circuit 1303_2, a third pixel circuit 1303_3, and a fourth pixel circuit 1303_4. Among them, the pixel circuit 1303 in the first row and the first column is the first pixel circuit 1303_1, the pixel circuit 1303 in the third row and the first column is the second pixel circuit, the pixel circuit 1303 in the first row and the third column is the third pixel circuit 1303_3, and the pixel circuit 1303 in the third row and the third column is the fourth pixel circuit 1303_4. The distribution of the pixel circuits in Figure 14 below is the same as the distribution of the pixel circuits in Figure 13 above.

[0134] Exemplarily, when the first switching transistors of the first pixel circuit 1303_1, the first switching transistors of the second pixel circuit 1303_2, the first switching transistors of the third pixel circuit 1303_3, and the first switching transistors of the fourth pixel circuit 1303_4 are simultaneously turned on, that is, when the second image sensor 1300 reads out an image with a low conversion gain, at the first moment, the pixel signals of the first pixel circuit 1303_1 and the third pixel circuit 1303_3 are transmitted to the first analog-to-digital converter 1301 through the switch array 1302, that is, the pixel signals of the first pixel circuit 1303_1 and the third pixel circuit 1303_3 are simultaneously quantized and read out by the first analog-to-digital converter 1301. At the second moment, the pixel signals of the second pixel circuit 1303_2 and the fourth pixel circuit 1303_4 are transmitted to the first analog-to-digital converter 1301, that is, the pixel signals of the second pixel circuit 1303_2 and the fourth pixel circuit 1303_4 are simultaneously quantized and read out by the first analog-to-digital converter 1301.

[0135] Exemplarily, when the first switching transistors of the first pixel circuit 1303_1, the first switching transistors of the second pixel circuit 1303_2, the first switching transistors of the third pixel circuit 1303_3, and the first switching transistors of the fourth pixel circuit 1303_4 are simultaneously turned on, at the first moment, the pixel signals of the first pixel circuit 1303_1 and the second pixel circuit 1303_2 are transmitted to the first analog-to-digital converter 1301 through the switch array 1302, that is, the pixel signals of the first pixel circuit 1303_1 and the second pixel circuit 1303_2 are simultaneously quantized and read out by the first analog-to-digital converter 1301. At the second moment, the pixel signals of the third pixel circuit 1303_3 and the fourth pixel circuit 1303_4 are transmitted to the first analog-to-digital converter 1301, that is, the pixel signals of the third pixel circuit 1303_3 and the fourth pixel circuit 1303_4 are simultaneously quantized and read out by the first analog-to-digital converter 1301.

[0136] Exemplarily, when the first switching transistors of the first pixel circuit 1303_1, the first pixel circuit 1303_2, the first pixel circuit 1303_3, and the first pixel circuit 1303_4 are turned on simultaneously, the pixel signals of the first pixel circuit 1303_1, the second pixel circuit 1303_2, the third pixel circuit 1303_3, and the fourth pixel circuit 1303_4 are transmitted to the first analog-to-digital converter 1301 through the switch array 1302. That is, the pixel signals of the first pixel circuit 1303_1, the second pixel circuit 1303_2, the third pixel circuit 1303_3, and the fourth pixel circuit 1303_4 are quantized and read out by the first analog-to-digital converter 1301 simultaneously. At the second moment, the pixel signals of the second pixel circuit 1303_2 and the fourth pixel circuit 1303_4 are transmitted to the first analog-to-digital converter 1301. That is, the pixel signals of the second pixel circuit 1303_2 and the fourth pixel circuit 1303_4 are quantized and read out by the first analog-to-digital converter 1301 simultaneously.

[0137] Wherein, the image sensor further includes a second analog-to-digital converter 1304. When the first switching transistors of the multiple pixel circuits 1303 are turned off, the pixel signals of at least two of the multiple pixel circuits 1303 are transmitted to the first analog-to-digital converter 1301 and the second analog-to-digital converter 1304 respectively through the switch array 1302. The first analog-to-digital converter 1301 or the second analog-to-digital converter 1304 is further configured to obtain a second digital signal based on the transmitted pixel signals.

[0138] Exemplarily, as Figure 14 shown, Figure 14Schematic diagram of another second image sensor provided by an embodiment of the present application. Exemplarily, when the first switching transistor of the first pixel circuit 1303_1, the first switching transistor of the second pixel circuit 1303_2, the third pixel circuit 1303_3, and the fourth pixel circuit 1303_4 are simultaneously turned off, that is, when the second image sensor 1300 reads an image with a high conversion gain, the pixel signals of the first pixel circuit 1303_1, the second pixel circuit 1303_2, the third pixel circuit 1303_3, and the fourth pixel circuit 1303_4 can be read out separately 4 times. For example, when the first row of pixel circuits is read out, the first analog-to-digital converter 1301 quantifies and reads out the voltage signal of the first pixel circuit 1303_1, and the second analog-to-digital converter 1304 quantifies and reads out the voltage signal of the third pixel circuit 1303_3. When the third row of pixel circuits is read out, the first analog-to-digital converter 1301 quantifies and reads out the voltage signal of the second pixel circuit 1303_2, and the second analog-to-digital converter 1304 quantifies and reads out the voltage signal of the fourth pixel circuit 1303_4. Thus, the first analog-to-digital converter 1301 or the second analog-to-digital converter 1304 obtains a second digital signal based on four pixel circuits.

[0139] Wherein, the second image sensor 1300 further includes: a signal processing module. The signal processing module is used to obtain a first image based on the first digital signal, and obtain a second image based on the second digital signal, and the resolution of the second image is greater than the resolution of the first image. The signal processing module is further used for: performing image processing on the first image to obtain a third image, and the resolution of the third image is the same as the resolution of the second image. The signal processing module is further used for: fusing the second image and the third image to obtain a fused image.

[0140] Thus, the second image sensor 1300 can adopt the voltage binning method to reduce the resolution of the read-out image so as to reduce the read-out power consumption.

[0141] In the above scenario, the image sensor of the embodiment of the present application can be applied to different systems or devices, such as applied to an execution device, and the execution device can be a terminal, such as a mobile phone terminal, a tablet computer, a notebook, an augmented reality (AR) device, a virtual reality (VR) device, and a vehicle-mounted terminal, etc. The execution device can acquire a display image through the image sensor, process the image, and display it.

[0142] Applied to the above first image sensor or second image sensor, the method for acquiring an image provided by the embodiment of the present application will be introduced below.

[0143] As Figure 15 shown, Figure 15Flowchart of a method for obtaining an image provided by an embodiment of the present application. The method includes the following S1501 to S1504.

[0144] S1501. Obtain pixel signals output by a first pixel circuit and a second pixel circuit through the same vertical signal line to obtain a first image.

[0145] Exemplarily, the first image is an image using pixel binning, that is, two pixel circuits only output one signal. The first image can be an image with a low conversion gain, and the resolution of the first image can be only half of that of the second image. The specific implementation manner of S1501 can refer to the description of the signal processing module above.

[0146] S1502. Obtain pixel signals output by the first pixel circuit and the second pixel circuit through different vertical signal lines respectively to obtain a second image.

[0147] Among them, the resolution of the second image is greater than that of the first image.

[0148] Exemplarily, the second image can be an image with a high conversion gain.

[0149] S1503. Perform image processing on the first image to obtain a third image.

[0150] Among them, the resolution of the third image is the same as that of the second image.

[0151] S1504. Fuse the second image and the third image to obtain a fused image.

[0152] Exemplarily, the embodiment of the present application adopts the pixel binning method. The obtained first image has half the number of rows compared to the second image. The signal processing module can perform image processing on the first image to obtain a third image with the same number of rows as the second image, and then fuse the second image and the third image with the same resolution to obtain the final high-dynamic-range image. Thus, while improving the dynamic range of the image sensor, the readout power consumption of the image sensor is also reduced.

[0153] Optionally, S1501 may include: controlling a first switching transistor of the first pixel circuit and a second switching transistor of the second pixel circuit to be in an on state, and obtaining pixel signals output by the first pixel circuit and the second pixel circuit through a first vertical signal line or a second vertical signal line to obtain a first image.

[0154] Optionally, S1502 may include: controlling the first switching transistor of the first pixel circuit and the second switching transistor of the second pixel circuit to be in an off state, and obtaining pixel signals output by the first pixel circuit through a first vertical signal line and the second pixel circuit through a second vertical signal line to obtain a second image.

[0155] An embodiment of the present application provides a chip system, which includes a processor and an image sensor. The image sensor includes: a first vertical signal line, a second vertical signal line, and a plurality of pixel circuits. The plurality of pixel circuits are arranged in an array form, and each pixel circuit includes a first switching transistor and a floating diffusion region. The first end of the first switching transistor is coupled to the floating diffusion region. The plurality of pixel circuits include a first pixel circuit and a second pixel circuit, and the second end of the first switching transistor of the first pixel circuit is coupled to the second end of the first switching transistor of the second pixel circuit. The output end of the first pixel circuit is coupled to the first vertical signal line, and the output end of the second pixel circuit is coupled to the second vertical signal line. The processor is configured to obtain pixel signals output by the first pixel circuit and the second pixel circuit through the same vertical signal line to obtain a first image. The processor is further configured to obtain pixel signals output by the first pixel circuit and the second pixel circuit through their respective corresponding vertical signal lines to obtain a second image, and the resolution of the second image is greater than that of the first image. The processor is further configured to perform image processing on the first image to obtain a third image, and the resolution of the third image is the same as that of the second image. The processor is further configured to fuse the second image and the third image to obtain a fused image.

[0156] Exemplarily, the processor may be integrated inside the image sensor, that is, a signal processing module, to perform various processes on the first image and the second image. Additionally, the processor may exist independently of the image sensor, and the processor may obtain the signals transmitted by the image sensor to perform various processes on the first image and the second image.

[0157] An embodiment of the present application provides an electronic device, which includes a printed circuit board and a first image sensor or a second image sensor, and the first image sensor or the second image sensor is electrically connected to the printed circuit board.

[0158] An embodiment of the present application further provides a computer storage medium, in which computer instructions are stored. When the computer instructions run on an electronic device, the electronic device is caused to execute the above-related method steps to implement the method for obtaining an image in the above embodiment.

[0159] An embodiment of the present application further provides a computer program product. When the computer program product runs on a computer, the computer is caused to execute the above-related steps to implement the method for obtaining an image executed by the electronic device in the above embodiment.

[0160] In addition, an embodiment of the present application further provides a device, which may specifically be a chip, a component or a module. The device may include a processor and a memory connected to each other. The memory is used to store computer-executable instructions. When the device runs, the processor may execute the computer-executable instructions stored in the memory, so that the chip executes the method for acquiring an image executed by the electronic device in each of the above method embodiments.

[0161] Among them, the first image sensor, the second image sensor, the chip system, the electronic device, the computer storage medium, the computer program product or the chip provided in this embodiment are all used to execute the corresponding method provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding method provided above, and will not be elaborated here.

[0162] Through the description of the above embodiments, those skilled in the art can understand that for the convenience and conciseness of description, only the above division of each functional module is used as an example. In actual applications, the above functions can be allocated to different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above.

[0163] In several embodiments provided in the present application, it should be understood that the disclosed device and method can be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of the modules or units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling or direct coupling or communication connection between each other can be through some interfaces. The indirect coupling or communication connection of the device or unit can be in an electrical, mechanical or other form.

[0164] The unit described as a separated component may or may not be physically separated. The component displayed as a unit may be a physical unit or multiple physical units, that is, it may be located in one place, or may be distributed to multiple different places. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0165] In addition, each functional unit in each embodiment of the present application may be integrated in a processing unit, or each unit may exist physically alone, or two or more units may be integrated in one unit. The above integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

[0166] When the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiments of the present application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions for causing a device (which can be a single-chip microcomputer, a chip, etc.) or a processor to execute all or part of the steps of the methods described in the embodiments of the present application. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, read only memory (ROM), random access memory (RAM), magnetic disks, or optical discs.

[0167] The above content is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An image sensor, characterized in that, It includes a first vertical signal line, a second vertical signal line, and a plurality of pixel circuits; The plurality of pixel circuits are arranged in an array form, and each pixel circuit includes a first switching transistor and a floating diffusion region, and a first end of the first switching transistor is coupled to the floating diffusion region; The plurality of pixel circuits include a first pixel circuit and a second pixel circuit, and a second end of the first switching transistor of the first pixel circuit is coupled to a second end of the first switching transistor of the second pixel circuit; An output end of the first pixel circuit is coupled to the first vertical signal line, and an output end of the second pixel circuit is coupled to the second vertical signal line.

2. The image sensor according to claim 1, wherein When the first switching transistors of the first pixel circuit and the second pixel circuit are turned on simultaneously, the first pixel circuit and the second pixel circuit output pixel signals through the first vertical signal line or the second vertical signal line.

3. The image sensor according to claim 1, wherein When the first switching transistors of the first pixel circuit and the second pixel circuit are turned off simultaneously, the first pixel circuit outputs a pixel signal through the first vertical signal line, and the second pixel circuit outputs a pixel signal through the second vertical signal line.

4. The image sensor according to any one of claims 1 to 3, characterized in that, The image sensor further includes: a signal processing module; The signal processing module is configured to: acquire the pixel signals output by the first pixel circuit and the second pixel circuit through the same vertical signal line to obtain a first image; The signal processing module is further configured to: acquire the pixel signals output by the first pixel circuit and the second pixel circuit through different vertical signal lines respectively to obtain a second image, and a resolution of the second image is greater than a resolution of the first image; The signal processing module is further configured to: perform image processing on the first image to obtain a third image, and a resolution of the third image is the same as a resolution of the second image; The signal processing module is further configured to: fuse the second image and the third image to obtain a fused image.

5. The image sensor according to claim 1, wherein The plurality of pixel circuits further include a third pixel circuit and a fourth pixel circuit, a second end of the first switching transistor of the third pixel circuit is coupled to a second end of the first switching transistor of the fourth pixel circuit, an output end of the third pixel circuit is coupled to the second vertical signal line, and an output end of the fourth pixel circuit is coupled to the first vertical signal line; The first pixel circuit further includes a second switching transistor, and a second end of the first switching transistor of the first pixel circuit is further coupled to a first end of the second switching transistor of the first pixel circuit; The fourth pixel circuit further includes a second switching transistor, and a second end of the first switching transistor of the fourth pixel circuit is further coupled to a first end of the second switching transistor of the fourth pixel circuit; A second end of the second switching transistor of the first pixel circuit is coupled to a second end of the second switching transistor of the fourth pixel circuit.

6. The image sensor according to claim 5, wherein When the first switching transistors of the first pixel circuit, the first switching transistors of the second pixel circuit, the first switching transistors of the third pixel circuit, the first switching transistors of the fourth pixel circuit, the second switching transistors of the first pixel circuit, and the second switching transistors of the fourth pixel circuit are all turned off simultaneously, the first pixel circuit outputs a pixel signal through the first vertical signal line, the second pixel circuit outputs a pixel signal through the second vertical signal line, the third pixel circuit outputs a pixel signal through the second vertical signal line, and the fourth pixel circuit outputs a pixel signal through the first vertical signal line.

7. The image sensor according to claim 5, wherein When the first switching transistors of the first pixel circuit, the first switching transistors of the second pixel circuit, the first switching transistors of the third pixel circuit, and the first switching transistors of the fourth pixel circuit are all turned on simultaneously, and the second switching transistors of the first pixel circuit and the second switching transistors of the fourth pixel circuit are all turned off simultaneously, the first pixel circuit and the second pixel circuit output pixel signals through the first vertical signal line or the second vertical signal line, and the third pixel circuit and the fourth pixel circuit output pixel signals through the first vertical signal line or the second vertical signal line.

8. The image sensor according to claim 5, wherein When the first switching transistors of the first pixel circuit, the first switching transistors of the second pixel circuit, the first switching transistors of the third pixel circuit, the first switching transistors of the fourth pixel circuit, the second switching transistors of the first pixel circuit, and the second switching transistors of the fourth pixel circuit are all turned on simultaneously, the first pixel circuit, the second pixel circuit, the third pixel circuit, and the fourth pixel circuit output pixel signals through the first vertical signal line or the second vertical signal line.

9. The image sensor according to claim 1, wherein The image sensor further includes a third vertical signal line and a fourth vertical signal line; The plurality of pixel circuits further includes a fifth pixel circuit and a sixth pixel circuit. The output end of the fifth pixel circuit is coupled to the third vertical signal line, and the output end of the sixth pixel circuit is coupled to the fourth vertical signal line; The second ends of the first switching transistors of the first pixel circuit are further coupled to the second ends of the first switching transistors of the fifth pixel circuit, and the second ends of the first switching transistors of the second pixel circuit are further coupled to the second ends of the first switching transistors of the sixth pixel circuit.

10. The image sensor according to claim 9, wherein When the first switching transistors of the first pixel circuit, the first switching transistors of the second pixel circuit, the first switching transistors of the fifth pixel circuit, and the first switching transistors of the sixth pixel circuit are all turned off simultaneously, the first pixel circuit outputs a pixel signal through the first vertical signal line, the second pixel circuit outputs a pixel signal through the second vertical signal line, the fifth pixel circuit outputs a pixel signal through the third vertical signal line, and the sixth pixel circuit outputs a pixel signal through the fourth vertical signal line.

11. The image sensor according to claim 9, wherein When the first switching transistors of the first pixel circuit and the second pixel circuit are simultaneously turned on, and the first switching transistors of the fifth pixel circuit and the sixth pixel circuit are simultaneously turned off, the first pixel circuit and the second pixel circuit output pixel signals through the first vertical signal line or the second vertical signal line, the fifth pixel circuit outputs pixel signals through the third vertical signal line, and the sixth pixel circuit outputs pixel signals through the fourth vertical signal line.

12. The image sensor according to claim 9, wherein When the first switching transistors of the first pixel circuit, the second pixel circuit, and the fifth pixel circuit are simultaneously turned on, and the first switching transistor of the sixth pixel circuit is turned off, the first pixel circuit, the second pixel circuit, and the fifth pixel circuit output pixel signals through the first vertical signal line, the second vertical signal line, or the third vertical signal line, and the sixth pixel circuit outputs pixel signals through the fourth vertical signal line.

13. The image sensor according to claim 9, wherein When the first switching transistors of the first pixel circuit, the second pixel circuit, the fifth pixel circuit, and the sixth pixel circuit are simultaneously turned on, the first pixel circuit, the second pixel circuit, the fifth pixel circuit, and the sixth pixel circuit output pixel signals through the first vertical signal line, the second vertical signal line, the third vertical signal line, or the fourth vertical signal line.

14. The image sensor according to any one of claims 1-13, characterized in that, The first switching transistor has a first equivalent capacitance, and the second switching transistor has a second equivalent capacitance. Different numbers of the first switching transistors and the second switching transistors being turned on correspond to different conversion gains of the image sensor.

15. An image sensor, characterized in that, Comprising: A first analog-to-digital converter, a switch array, and a plurality of pixel circuits; The plurality of pixel circuits are arranged in an array form, and each pixel circuit includes a first switching transistor; When the first switching transistors of the plurality of pixel circuits are turned on, pixel signals of at least two pixel circuits among the plurality of pixel circuits are transmitted to the first analog-to-digital converter through the switch array; The first analog-to-digital converter is configured to: obtain a first digital signal based on the transmitted pixel signals.

16. The image sensor according to claim 15, characterized in that, The image sensor further includes a second analog-to-digital converter; When the first switching transistors of the plurality of pixel circuits are turned off, pixel signals of at least two pixel circuits among the plurality of pixel circuits are respectively transmitted to the first analog-to-digital converter and the second analog-to-digital converter through the switch array; The first analog-to-digital converter or the second analog-to-digital converter is further configured to: obtain a second digital signal based on the transmitted pixel signals.

17. The image sensor according to claim 16, wherein, The image sensor further includes: a signal processing module; The signal processing module is configured to: obtain a first image based on the first digital signal, and obtain a second image based on the second digital signal, and the resolution of the second image is greater than the resolution of the first image; The signal processing module is further configured to: perform image processing on the first image to obtain a third image, where the resolution of the third image is the same as that of the second image; The signal processing module is further configured to: fuse the second image and the third image to obtain a fused image.

18. A method for obtaining an image, characterized in that, The method includes: Obtaining pixel signals output by a first pixel circuit and a second pixel circuit through the same vertical signal line to obtain a first image; Obtaining pixel signals output by the first pixel circuit and the second pixel circuit through different vertical signal lines respectively to obtain a second image, where the resolution of the second image is greater than that of the first image; Performing image processing on the first image to obtain a third image, where the resolution of the third image is the same as that of the second image; Fusing the second image and the third image to obtain a fused image.

19. The method according to claim 18, wherein The obtaining of the first image of the first pixel circuit and the second pixel circuit output through the same vertical signal line includes: controlling a first switching transistor of the first pixel circuit and a second switching transistor of the second pixel circuit to be in an on state; Obtaining pixel signals output by the first pixel circuit and the second pixel circuit through a first vertical signal line or a second vertical signal line to obtain the first image.

20. The method according to claim 18, wherein The obtaining of the second image of the first pixel circuit and the second pixel circuit output through corresponding vertical signal lines respectively includes: Controlling a first switching transistor of the first pixel circuit and a second switching transistor of the second pixel circuit to be in an off state; Obtaining pixel signals output by the first pixel circuit through a first vertical signal line and the second pixel circuit through the second vertical signal line to obtain the second image.

21. A chip system, characterized in that, Including a processor and an image sensor, where the image sensor includes: a first vertical signal line, a second vertical signal line, and a plurality of pixel circuits; the plurality of pixel circuits are arranged in an array form, and each pixel circuit includes a first switching transistor and a floating diffusion region, and a first end of the first switching transistor is coupled to the floating diffusion region; the plurality of pixel circuits include a first pixel circuit and a second pixel circuit, a second end of the first switching transistor of the first pixel circuit is coupled to a second end of the first switching transistor of the second pixel circuit, an output end of the first pixel circuit is coupled to the first vertical signal line, and an output end of the second pixel circuit is coupled to the second vertical signal line; The processor is configured to: obtain pixel signals output by the first pixel circuit and the second pixel circuit through the same vertical signal line to obtain a first image; The processor is further configured to: obtain pixel signals output by the first pixel circuit and the second pixel circuit through corresponding vertical signal lines respectively to obtain a second image, where the resolution of the second image is greater than that of the first image; The processor is further configured to: perform image processing on the first image to obtain a third image, where the resolution of the third image is the same as that of the second image; The processor is further configured to: fuse the second image and the third image to obtain a fused image.

22. An electronic device, characterized in that, The electronic device includes a printed circuit board and an image sensor according to any one of claims 1-14 or any one of claims 15-17, and the image sensor is electrically connected to the printed circuit board.

Images