Method for manufacturing high-density circuit board with same-bonding-pad double-surface treatment

Abstract

The invention discloses a method for manufacturing a high-density circuit board with same-pad double-surface treatment, and the method comprises the steps: manufacturing an inner-layer core board with an inner-layer circuit, forming a multi-layer board after the processing of an intermediate process, manufacturing a surface circuit for the multi-layer board, including manufacturing a pad pattern which comprises a first region and a second region, and then manufacturing a solder mask, the whole board forms a surface circuit board; a dry film pattern is manufactured on the surface circuit board, a window of the dry film pattern corresponds to the first area, then electrogilding is carried out, and the whole board forms an electrogilding board; removing the dry film pattern, carrying out OSP surface treatment on the second area, and carrying out post-process processing to form the circuit board; the same bonding pad pattern is subjected to partitioned different surface treatment through design, and an effective manufacturing method is formed, so that the problems that the occupied area is large due to the fact that a supporting bonding pad and a contact bonding pad are separately designed into a separated bonding pad structure, and the processing cost is high and the environmental protection pressure is large due to the fact that a gold plating means is used in batch processing are solved.

Description

Technical Field

[0001] The present invention relates to the field of printed circuit board manufacturing, and particularly to a method for manufacturing a high-density circuit board with double surface treatment of the same pad. Background Art

[0002] For high-density circuit boards applied in some precision control devices, in order to form an effect that multiple components can be soldered on the surface of the circuit board and the soldering is intensive, contact devices usually need to be soldered on the surface of the circuit board.

[0003] In the traditional technology for manufacturing such circuit boards, a separate pad structure with a support pad and a contact pad designed separately is usually adopted. That is, the support pad is used for soldering to form a stable base, while the contact pad is applied corresponding to the contact end. However, the separate pad structure undoubtedly occupies more surface area of the circuit board, conflicting with the current trend of miniaturization and integration of electronic devices.

[0004] The above defect is further improved as follows: the support pad and the contact pad are designed on the same pad, forming a way of soldering in one part of the area and contacting in the other part, and then the entire pad is subjected to electroplated gold surface treatment.

[0005] However, for mass production, the electroplated gold area of such pads is relatively large. Although the electroplated gold surface treatment effect is better, since the material for electroplated gold (mainly gold salt solution) is relatively expensive, the cost of electroplated gold is much higher than that of other surface treatments. Moreover, the electroplated gold process causes relatively large pollution. Therefore, from the perspective of processing cost and sewage treatment, the manufacturing method of electroplating gold on the entire pad for mass production will generate relatively large cost and environmental protection pressure.

[0006] Therefore, in order to solve the above-mentioned problems, a method for manufacturing a high-density circuit board with double surface treatment of the same pad is needed. Summary of the Invention

[0007] The present invention aims to solve the problems of high cost and large pollution existing in the electroplated gold surface treatment for the design of mass production of a pad surface with both a support pad and a contact pad distributed thereon, and proposes a method for manufacturing a high-density circuit board with double surface treatment of the same pad. The circuit board is manufactured according to a design pattern, and the design pattern includes a pad pattern on the surface of the circuit board. The manufacturing method includes the following steps: S10: Manufacture an inner core board with inner layer circuits. After intermediate process processing, form a multilayer board. Manufacture surface circuits on the multilayer board, including manufacturing the pad pattern. The pad pattern includes a first area and a second area. Then manufacture a solder mask layer, and the whole board forms a surface circuit board; S20: Make a dry film pattern on the surface circuit board. The opening of the dry film pattern corresponds to the first region, and then perform electroplating with gold. The whole board forms an electroplated gold board; S30: Remove the dry film pattern, perform OSP surface treatment on the second region, and through subsequent process machining, form the circuit board.

[0008] Further, before making the surface circuit, make blind vias on the multilayer board to connect the inner layer circuit and the pad pattern; the circuit board includes an effective area and an ineffective area, and conductive copper foils are distributed in the ineffective area. Make vias within the range of the conductive copper foils, and the vias connect the inner layer circuit.

[0009] Further, the opening size of the dry film pattern is pre - larger than the size of the first region on each side.

[0010] Further, the opening of the dry film pattern also includes a chuck clamping position during electroplating with gold.

[0011] Further, before performing the OSP surface treatment, perform micro - etching treatment.

[0012] Further, the inner layer circuit and the surface circuit are misaligned.

[0013] Further, after the electroplating with gold and before the OSP surface treatment, cut the inner layer circuit.

[0014] Further, the subsequent process machining includes cutting the inner layer circuit.

[0015] Further, the manufacturing method for cutting the inner layer circuit is: make a depth - controlled hole corresponding to the inner layer circuit, and the depth of the depth - controlled hole is from the surface of the circuit board to the inner layer circuit.

[0016] Further, the manufacturing method for cutting the inner layer circuit is: make a through - hole corresponding to the inner layer circuit.

[0017] The beneficial effects of the technical solution of the present invention include: (1) By designing the same pad pattern for partition - differentiated surface treatment and forming an effective manufacturing method, it solves the problems that the separate pad structure with the support pad and the contact pad designed separately leads to a large occupied area, and the manufacturing method of using electroplated gold surface treatment for all the same pads during batch processing in the prior art, resulting in high cost and large environmental pollution; (2) By conducting multiple groups of experiments with controlled variables, taking advantage of the characteristics of the electroplated gold layer with high density and smooth surface, and at the same time using the characteristic that the OSP layer cannot form effective adhesion on its surface, it is ensured that the electroplated gold layer and the OSP layer can form a surface different from the pad, and they do not affect each other, enhancing the reliability of the pad pattern and the welding quality. (3) Further, by opening the window of the pre-large dry film pattern, it can not only provide a greater allowable error for making the dry film pattern, but also is equivalent to pre-large the area of the electroplated gold layer in the first region, covering the area that originally needed to be treated with OSP to a certain extent, reducing the risk of copper surface oxidation caused by OSP failure. (4) By designing and fabricating the inner layer circuit to form an electroplated gold lead, and connecting the inner layer circuit with the pad pattern through blind vias, combined with the subsequent process of cutting off the inner layer circuit, the inner layer circuit and the surface circuit are arranged in a staggered distribution, providing an effective processing basis for the electroplated gold processing of the first region of the pad. (5) Through the synergistic effect of the above-mentioned pad sub-region treatment and process processing in the whole technical solution, the effect of surface treatment with different pads is achieved, and an overall associated and synergistic effect is formed. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on the structures shown in these drawings.

[0019] Figure 1 It is a schematic process flow diagram of the embodiment of the present invention; Figure 2 It is a plane schematic diagram of the inner core board of the embodiment of the present invention; Figure 3 It is for Figure 2 the A-A cross-sectional schematic diagram of; Figure 4 It is a plane schematic diagram of the electroplated gold board of the embodiment of the present invention; Figure 5 It is for Figure 4 the B-B cross-sectional schematic diagram of; Figure 6 It is for Figure 5 the schematic diagram of the FD partial enlarged area of; Figure 7 It is a plane schematic diagram of the OSP board of the embodiment of the present invention; Figure 8 It is for Figure 7 the C-C cross-sectional schematic diagram of; Figure 9 Schematic plan view of an OSP board with controlled-depth holes according to an embodiment of the present invention; Figure 10 is Figure 9 Schematic D-D cross-sectional view; Figure 11 Schematic plan view of the controlled-depth hole design data according to an embodiment of the present invention; Figure 12 Schematic plan view of the circuit board according to an embodiment of the present invention; Figure 13 Schematic plan view of a circuit board pad pattern design data according to an embodiment of the present invention; Figure 14 Metallurgical microscope observation diagram of a circuit board pad pattern according to an embodiment of the present invention; Figure 15 Metallurgical microscope observation diagram of another circuit board pad pattern according to an embodiment of the present invention.

[0020] Explanation of the reference numerals in the drawings: 100, effective area; 200, invalid area; 300, conducting copper foil; 400, via hole; 500, chuck clamping position; 10, inner core board; 1010, inner layer circuit; 1020, blind hole; 1030, pad pattern; 1040, upper surface circuit; 1050, lower surface circuit; 20, electroplated gold board; 2010, dry film pattern; 2020, electroplated gold layer; 2030, upper surface solder mask layer; 2040, lower surface solder mask layer; FD, locally enlarged area; SC, design dimension; YC, pre-enlarged dimension; 30, OSP board; 3010, OSP layer; 3020, controlled-depth hole; 40, circuit board.

[0021] The realization of the object, functional features and advantages of the present invention will be further described with reference to the embodiments and the accompanying drawings. Specific embodiments

[0022] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0023] It should be noted that all the directional indications (such as up, down, left, right, front, back, inside, outside, etc.) in the embodiments of the present invention are only used to explain the relative position relationship and movement conditions between components in a specific posture (as shown in the drawings). If the specific posture changes, the directional indications will also change accordingly.

[0024] In addition, in the present invention, descriptions such as "first", "second", etc. are only for descriptive purposes and should not be construed as indicating or implying their relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically defined.

[0025] In addition, the technical solutions between various embodiments of the present invention can be combined with each other, but it must be based on the ability of those of ordinary skill in the art to implement. When the combination of technical solutions results in contradictions or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0026] Please refer to Figure 1 , Figure 1 which is a schematic process flow diagram of an embodiment of the present invention.

[0027] The manufacturing process of the embodiment of the present invention includes implementing each step process in Figure 1 . The following will further illustrate each step process in Figure 1 step by step.

[0028] Please first refer to Figure 2 , Figure 3 , Figure 2 which is a plan view of the inner core board of the embodiment of the present invention; Figure 3 is Figure 2 a schematic cross-sectional view taken along line A-A of

[0029] The high-density circuit board with double-sided treatment of the same pads is fabricated according to a design pattern, and the design pattern includes a pad pattern 1030 located on the surface of the circuit board.

[0030] S10: Fabricate an inner core board 10 with inner layer circuits 1010. After intermediate process machining, a multilayer board is formed. Make surface circuits on the multilayer board, including making a pad pattern 1030. The pad pattern 1030 includes a first region and a second region. Then make a solder mask layer, and the whole board forms a surface circuit board.

[0031] Furthermore, before making the surface circuits, make blind vias 1020 on the multilayer board to connect the inner layer circuits 1010 and the pad pattern 1030; the circuit board includes an effective area 100 and an ineffective area 200. Conductive copper foils 300 are distributed in the ineffective area 200. Make via holes 400 within the range of the conductive copper foils 300, and the via holes 400 connect the inner layer circuits 1010.

[0032] By first fabricating the inner core board 10 and then fabricating the blind vias 1020, the positions of the blind vias 1020 correspond to the pad patterns 1030, achieving the effect of connecting the pad patterns 1030 and the inner layer traces 1010, providing a processing basis for the subsequent electroplating with gold process.

[0033] Since the pad patterns 1030 in this embodiment require two types of surface treatments, due to the high-density circuit design of the circuit board, its surface traces (including the upper surface traces 1040 and the lower surface traces 1050) are relatively dense, and it is difficult to arrange the electroplating with gold leads on the surface traces.

[0034] Therefore, in order to enable the electroplating with gold leads to be guided from the inner layer traces 1010 to the positions of the pad patterns 1030 without affecting the layout of the surface traces, this embodiment designs a connection method through the blind vias 1020, effectively avoiding directly arranging the electroplating with gold leads in the surface traces, which may easily cause potential problems such as small line spacing leading to signal interference.

[0035] Optionally, the blind vias 1020 can be connected to the inner layer traces 1010 of the sub-outer layer, or can be connected to the inner layer traces 1010 of other layers according to the depth distribution conditions. Therefore, the blind vias 1020 connecting the inner layer traces 1010 have greater spatial conditions for selecting the line distribution.

[0036] Optionally, the manufacturing process of the blind vias 1020 is as follows: fabricate and form the inner core board 10 with the inner layer traces 1010, perform typesetting and lamination according to the stack-up structure of the circuit board, then drill holes with a laser, and then perform filling electroplating on the blind vias 1020 to form the blind vias 1020, and then fabricate the surface trace pattern.

[0037] Optionally, the blind vias 1020 are fabricated by using the method of laser drilling or mechanical drilling.

[0038] Please refer to Figure 4 、 Figure 5 and Figure 6 , Figure 4 which is a plan view of the electroplating with gold board according to the embodiment of the present invention; Figure 5 is Figure 4 the schematic cross-sectional view taken along line B-B of Figure 6 is Figure 5 the schematic view of the enlarged partial area FD of

[0039] First, the surface circuit of the inner core board 10 is fabricated, which includes the design of the pad pattern 1030. In particular, the pad pattern 1030 is subdivided into two different first regions and second regions, which respectively correspond to the soldering region (the electroplated gold layer 2020 is formed in the subsequent process) and the contact region (the OSP layer 3010 is formed in the subsequent process), providing a necessary processing basis for applying different surface treatment processes according to different partitions in the subsequent processes. Then, the solder mask layer (including the upper surface solder mask layer 2030 and the lower surface solder mask layer 2040) is fabricated to protect the circuit board from the external environment, such as preventing oxidation, avoiding short circuits, and improving electrical insulation performance.

[0040] Furthermore, the inner layer circuit 1010 is misaligned with the surface circuit.

[0041] The inner layer circuit 1010 and the surface circuit are staggered in the planar direction of the circuit board 40. Since the inner layer circuit 1010 mainly serves as an auxiliary circuit and provides the function of conductive leads when fabricating the pad pattern 1030, the inner layer circuit 1010 can be non-linear, avoiding the routing design of the surface circuit, facilitating the subsequent process of cutting the inner layer circuit 1010, and effectively avoiding the risk of damage to the surface circuit caused by drilling or cutting operations.

[0042] Please refer to Figure 7 and Figure 8 Figure 7 which is a planar schematic diagram of the OSP board according to the embodiment of the present invention; Figure 8 is Figure 7 the schematic cross-sectional view taken along line C-C of

[0043] S20: Fabricate the dry film pattern 2010 on the surface circuit board. The opening of the dry film pattern 2010 corresponds to the first region, and then electroplated gold processing is performed. The electroplated gold layer 2020 is formed on the surface of the first region, and the whole board forms the electroplated gold board 20.

[0044] Furthermore, the opening of the dry film pattern 2010 also includes the chuck clamping position 500 during electroplated gold processing.

[0045] Furthermore, the opening size of the dry film pattern 2010 is pre-expanded unilaterally compared with the size of the first region.

[0046] Since there are certain errors in the processing steps of exposure, development, and etching for fabricating the dry film pattern 2010, by pre-expanding the designed size SC of the opening of the dry film pattern 2010 to form the pre-expanded size YC, a certain tolerance range can be provided for these process steps to ensure that the finally formed circuit pattern meets the design requirements.

[0047] ​Furthermore, OSP treatment is a commonly used surface treatment method to prevent copper oxidation, but its shelf life is relatively short, and ablation or peeling may occur during subsequent storage. Therefore, by enlarging the first area (i.e., the electroplated gold layer 2020 area), it is possible to cover to a certain extent the area that originally required OSP surface treatment, reducing the risk of copper surface oxidation caused by the failure of the OSP layer 3010. If the area of the OSP layer 3010 is too large, it may be exposed for various reasons during subsequent processing, resulting in copper surface oxidation of the circuit. Enlarging the first area can effectively avoid this situation, and even minor deviations during the manufacturing process will not affect the quality and reliability of the final product.

[0048] Furthermore, since a good metallized surface can provide a more reliable solder joint, and compared with OSP treatment, electroplated gold treatment provides better soldering performance and durability. Therefore, appropriately enlarging the first area helps to improve the soldering quality and reduce the risk of solder joint voids and de-soldering.

[0049] Optionally, the opening size of the dry film pattern 2010 is pre-expanded by 20 μm to 100 μm on each side compared to the size of the first area.

[0050] Please refer to Figures 9 to 15 , Figure 9 a schematic plan view of an OSP board with controlled-depth holes fabricated according to an embodiment of the present invention; Figure 10 is Figure 9 a schematic D-D cross-sectional view of Figure 11 a schematic plan view of the controlled-depth hole design data according to an embodiment of the present invention; Figure 12 a schematic plan view of a circuit board according to an embodiment of the present invention; Figure 13 a schematic plan view of a circuit board pad pattern design data according to an embodiment of the present invention; Figure 14 a metallurgical microscope observation diagram of a circuit board pad pattern according to an embodiment of the present invention; Figure 15 a metallurgical microscope observation diagram of another circuit board pad pattern according to an embodiment of the present invention.

[0051] S30: Remove the dry film pattern 2010, perform OSP surface treatment on the second area to form an OSP board 30, and through subsequent processing steps, form a circuit board 40.

[0052] Furthermore, subsequent processing steps include cutting the inner layer circuit 1010 to avoid the inner layer circuit 1010 being connected to the surface circuit, resulting in problems such as short circuits.

[0053] Preferably, after electroplating and before OSP surface treatment, the inner layer circuit 1010 is cut. Since the OSP layer 3010 is relatively fragile, by adjusting the processing procedure and moving the mechanical processing of cutting the inner layer circuit 1010 before the OSP surface treatment, problems such as abrasion or scratching of the OSP layer 3010 can be effectively avoided.

[0054] Optionally, the manufacturing method of cutting the inner layer circuit 1010 is as follows: a depth-controlled hole 3020 is made corresponding to the inner layer circuit 1010, and the depth of the depth-controlled hole 3020 is from the surface of the circuit board to the inner layer circuit 1010.

[0055] Optionally, the manufacturing method of cutting the inner layer circuit 1010 is as follows: a through hole is made corresponding to the inner layer circuit 1010, which is applicable when the board body of the circuit board is relatively thin and there are no circuit distributions on both the upper and lower surfaces of the circuit board 40 corresponding to the position where the through hole is made.

[0056] Optionally, before the OSP surface treatment, micro-etching treatment is carried out, which does not damage the electroplated gold layer 2020 and the solder mask layer (including the upper surface solder mask layer 2030 and the lower surface solder mask layer 2040), and at the same time provides a clean and uniformly rough surface condition for the production of the OSP surface treatment. Further, the thickness of the etched copper is controlled within 3μm to 10μm.

[0057] Then, OSP surface treatment is carried out on the second area to form an organic antioxidant film on the copper surface, and its main function is to cover the copper surface to prevent it from oxidizing during storage and transportation.

[0058] Among them, the electroplated gold layer 2020 formed in the first area is the contact pad, and the OSP layer 3010 formed in the second area is the support pad. When a contact component needs to be set on the surface of the circuit board 40, a stencil can be used to print solder paste on the area of the OSP layer 3010, the contact component is set in alignment, and through the manufacturing method of reflow soldering, the solder feet of the contact component are welded to the second area, while the first area corresponds to the contact point of the contact component.

[0059] It should be noted that before preparing to weld components, a soldering flux is usually applied to the surface of the circuit board. The soldering flux generally contains components such as organic acids and can quickly dissolve the OSP layer 3010. Therefore, during the actual soldering process, this OSP film will be quickly melted away, thus exposing the underlying copper surface for soldering operations.

[0060] In other words, the OSP surface treatment is only a temporary protection measure during the stage from the shipment of the finished circuit board to the start of soldering components. Different from some other surface treatment methods that may remain on the circuit board after soldering, the OSP layer 3010 will not be retained in the final product. It is only an auxiliary surface treatment for the process before the finished circuit board is shipped to the soldering of components on the circuit board, enabling its contact points to maintain the best soldering state and being smoothly removed during soldering without causing any negative impact on the soldering quality. This not only ensures the efficiency of the production process but also guarantees the quality and reliability of the final electronic product.

[0061] Moreover, the manufacturing process of the OSP surface treatment is simple and efficient. Its processing efficiency per unit time is several times that of electroplated gold processing, so it can significantly improve the production efficiency and is especially suitable for mass production. In addition, the materials used in the OSP surface treatment are relatively environmentally friendly, and the wastewater generated is more convenient and efficient to treat, thus reducing the pressure on the environment.

[0062] It is worth noting that in this embodiment, a series of multi-group experiments with controlled variables are designed and implemented. These experiments aim to verify that on the same pad pattern 1030, two different surface treatments with effective differentiation can be formed, while ensuring that there is no mutual influence or interference between them, that is, there is no mutual influence or interference during the processing, subsequent soldering, and use.

[0063] Through analysis, testing, and verification, the double surface treatment combination of "electroplated gold combined with OSP" is obtained as the best combination, and the electroplated gold layer 2020 and the OSP layer 3010 are compatible and independent on the same pad.

[0064] It is worth noting that the process of experimental verification is as follows: First, combinations of electroplated gold combined with immersion gold, electroplated gold combined with immersion tin, electroplated gold combined with immersion silver, and electroplated gold combined with hot air solder leveling are selected to fabricate the same pad pattern 1030 on the double surface. However, these combinations require the secondary production of the dry film pattern 2010 to separately protect and expose different areas of the pads, fabricate different surface treatments, increasing the complexity and cost of the process. At the same time, due to the large processing error of the dry film pattern 2010, the surface treatment may not fully meet the design requirements, affecting the product quality. Most importantly, the interaction between the two metal surface treatments may cause mutual influence of chemical reactions or surface defects, making it difficult to effectively apply in mass production.

[0065] Re-selection: Immersion gold combined with OSP, immersion silver combined with OSP, immersion tin combined with OSP, and hot air solder leveling (HASL) combined with OSP are used to fabricate the same solder pad pattern 1030 on both surfaces. Since the immersion gold layer formed by chemical deposition has a relatively low density and hardness, the surface has a certain roughness, which may make it difficult for the OSP layer 3010 to adhere evenly, resulting in problems such as contamination or residues during later use, affecting the quality and reliability of the final product. Especially during multiple soldering processes, the consumption rate of the OSP layer 3010 accelerates, which may increase the risk of exposure of the underlying metal.

[0066] Please refer to again Figure 14 and Figure 15 ; Through a large number of verifications, it is found that the combination of electroplated gold and OSP for fabricating the double-sided treatment of the same solder pad is the optimal combination. Since the electroplated gold layer 2020 formed by electroplated gold surface treatment has a high density and a smooth surface quality, it has better durability and reliability. The OSP layer 3010 can selectively adhere to the surface of the copper layer without adhering to the electroplated gold layer 2020 or the solder mask layer (including the upper solder mask layer 2030 and the lower solder mask layer 2040). This means that it can provide temporary protection for the target copper layer to prevent oxidation and ensure the reliability during the subsequent soldering process without affecting the electroplated gold area.

[0067] The above are only the preferred embodiments of the present invention, and do not limit the patent scope of the present invention. Any equivalent structural transformation made under the inventive concept of the present invention by using the content of the specification and drawings of the present invention, or directly / indirectly applied in other related technical fields, is included in the patent protection scope of the present invention.

Claims

1. A method for manufacturing a high-density circuit board with double-sided pad surface treatment, wherein the circuit board is manufactured according to a design pattern, and the design pattern includes pad patterns located on the surface of the circuit board, characterized in that, The manufacturing method includes the following steps: S10: Fabricate an inner core board with inner-layer circuits. After intermediate processing, form a multilayer board, and fabricate surface circuits on the multilayer board, including fabricating the pad pattern, where the pad pattern includes a first region and a second region, and then fabricate a solder mask, and the whole board forms a surface circuit board; S20: Fabricate a dry film pattern on the surface circuit board, where the opening of the dry film pattern corresponds to the first region, and then perform electroplating with gold processing, and the whole board forms an electroplated gold board; S30: Remove the dry film pattern, perform OSP surface treatment on the second region, and after subsequent processing, form the circuit board.

2. The manufacturing method of a high-density circuit board with double-sided treatment of the same pad as claimed in claim 1, wherein Before fabricating the surface circuits, fabricate blind vias on the multilayer board to connect the inner-layer circuits and the pad pattern; the circuit board includes an effective area and an ineffective area, where conduction copper foils are distributed in the ineffective area, and via holes are fabricated within the range of the conduction copper foils, and the via holes connect the inner-layer circuits.

3. The manufacturing method of a high-density circuit board with double surface treatment of the same pad as claimed in claim 1, wherein, The opening size of the dry film pattern is pre-larger than the size of the first region on one side.

4. The manufacturing method of a high-density circuit board with double surface treatment of the same pad as claimed in claim 1, wherein, The opening of the dry film pattern also includes a chuck clamping position during electroplating with gold processing.

5. The manufacturing method of a high-density circuit board with double-sided treatment of the same pad as claimed in claim 1, wherein, Before performing the OSP surface treatment, perform micro-etching treatment.

6. The manufacturing method of a high-density circuit board with double surface treatment of the same pad as claimed in claim 1, characterized in that The inner-layer circuits and the surface circuits are misaligned.

7. The manufacturing method of a high-density circuit board with double surface treatment of the same pad as claimed in claim 1, wherein After the electroplating with gold processing and before the OSP surface treatment, cut off the inner-layer circuits.

8. The manufacturing method of a high-density circuit board with double surface treatment of the same pad as claimed in claim 1, wherein, The subsequent processing includes cutting off the inner-layer circuits.

9. A method for manufacturing a high-density circuit board with double surface treatment of the same pad, as claimed in claim 7 or 8, characterized in that, The manufacturing method for cutting off the inner-layer circuits is: fabricate depth-controlled holes corresponding to the inner-layer circuits, and the depth of the depth-controlled holes is from the surface of the circuit board to the inner-layer circuits.

10. A method for manufacturing a high-density circuit board with double surface treatment of the same pad, as claimed in claim 7 or 8, characterized in that, The manufacturing method for cutting off the inner-layer circuits is: fabricate through holes corresponding to the inner-layer circuits.

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