TBC solar cell capable of improving UV attenuation, preparation method thereof and cell module

Abstract

The invention belongs to the technical field of solar cells, and particularly relates to a TBC solar cell capable of improving UV attenuation and a preparation method thereof, and a cell assembly. During light injection, the light radiation intensity difference of a back surface and a front surface is controlled within the range, the front surface radiation intensity is greatly reduced, and the light radiation intensity of the front surface is strictly controlled within a relatively low range, so that the light radiation intensity of the front surface is greatly reduced. The release of hydrogen in a front passivation film to the crystalline silicon surface and the substrate during light injection is reduced, so that the hydrogen passivation level of the front surface is reduced, and the interface silicon-hydrogen bond content is reduced; meanwhile, the light radiation intensity far greater than that of the front side is provided, the light injection for irradiating the back side is increased, and the rapid hydrogen passivation of the back side is facilitated, so that the uncontrollable heat influence caused by high light irradiation is reduced by limiting the light irradiation intensity of the front side in a lower range, and the release of hydrogen in a front side passivation film to the crystalline silicon surface and the substrate during light injection is reduced; therefore, the UV attenuation of the battery is reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field of solar cells, and particularly relates to a TBC solar cell for improving UV attenuation, a preparation method thereof, and a battery module. Background Art

[0002] With the development of the photovoltaic industry, the conversion efficiency of crystalline silicon solar cells has been continuously improved and gradually approaches the theoretical limit. In order to further increase the light-receiving area of the battery, high-efficiency batteries are experiencing a trend of development from double-sided contact to back contact (BC). The absence of electrode shielding on the front side can bring a 2-3% increase in short-circuit current (Isc). In terms of surface passivation technology, BC cells can be further divided into TBC cells based on tunneling oxide passivation contact (TOPCon) technology, HBC cells based on heterojunction (HJT) technology, and HPBC cells based on hybrid passivation technology (Al-BSF, PERC, TOPCon, HJT, etc.). Among them, the TBC cell has the highest cost performance and the most promising industrialization prospects.

[0003] Different from traditional double-sided TOPCon cells, the front side of TBC cells has no emitter, the surface doping concentration is relatively low, which is the silicon wafer substrate concentration, and the surface is passivated with alumina and silicon nitride. Therefore, the TBC cell depends much more on alumina chemical passivation than traditional double-sided TOPCon cells, and the efficiency attenuation caused by ultraviolet radiation (UV) is also much greater than that of double-sided TOPCon cells.

[0004] The existing TBC technology route has no special treatment for this problem, and the front passivation film layer and light injection process still follow the double-sided TOPCon process flow. This process fully hydrogen passivates the front surface of the battery, and realizes excellent open-circuit voltage (Voc) by saturating the dangling bonds on the crystalline silicon surface with hydrogen atoms. However, this set of processes will form a large number of silicon-hydrogen bonds on the crystalline silicon surface, and ultraviolet radiation will cause some silicon-hydrogen bonds to break, reducing the surface chemical passivation effect. At the same time, due to the low doping concentration on the front side of TBC and the weak field passivation effect, the surface recombination rate increases significantly, resulting in relatively serious UV attenuation.

[0005] It should be noted that this part of the content of the present invention only provides the background technology related to the present invention, and does not necessarily constitute the prior art or well-known technology. Summary of the Invention

[0006] The purpose of the present invention is to solve the problem that the surface chemical passivation effect of existing TBC cells is reduced and the UV attenuation is serious due to ultraviolet radiation, thereby reducing the conversion efficiency of the battery.

[0007] To achieve the above purpose, in the first aspect, the present invention provides a preparation method of a TBC solar cell for improving UV attenuation, including: Prepare a silicon wafer with a pyramidal suede surface on the front and an N region, a channel region, and a P region arranged at intervals on the back; Prepare a passivation and antireflection layer on both the front and back of the silicon wafer; Screen-print grid lines on the back of the silicon wafer and sinter them; Optically inject the sintered silicon wafer; when optically injecting, the ratio of the irradiation intensity on the front and back of the silicon wafer is less than 0.002.

[0008] Optionally, the irradiation intensity on the front of the silicon wafer during sintering is less than or equal to 0.1 sun.

[0009] Optionally, the irradiation intensity on the front of the silicon wafer during optical injection is less than or equal to 0.1 sun.

[0010] Optionally, the ratio of the irradiation intensity on the front and back of the silicon wafer during sintering is less than 0.002.

[0011] Optionally, during sintering, the back of the silicon wafer is assisted by LED heating, and the front of the silicon wafer is heated by an electric heating wire or infrared.

[0012] Optionally, during optical injection, the back of the silicon wafer is assisted by LED heating, and the front of the silicon wafer is heated by an electric heating wire or infrared.

[0013] Optionally, the sintering temperature is 600 - 800 °C; and / or, the optical injection temperature is 300 - 700 °C.

[0014] Optionally, the passivation and antireflection layer includes a passivation layer and an antireflection layer, and the passivation layer is closer to the silicon wafer than the antireflection layer.

[0015] Optionally, the passivation layer is an alumina film layer with a thickness of 3 - 20 nm.

[0016] Optionally, the antireflection layer includes multiple layers of silicon nitride film layers, and the refractive index of the multiple layers of silicon nitride film layers decreases sequentially from the side close to the silicon wafer to the side far from the silicon wafer; among them, one or more layers of silicon nitride film layers close to the silicon wafer together form a UV absorption layer, and the refractive index range of the UV absorption layer is 2.3 - 2.7, and the total thickness is 2 - 20 nm.

[0017] Optionally, a hydrogen barrier layer is also prepared between the antireflection layer and the passivation layer, and the thickness of the hydrogen barrier layer is 1 - 10 nm.

[0018] Optionally, the preparation of the silicon wafer with a pyramidal suede surface on the front and an N region, a channel region, and a P region arranged at intervals on the back includes: Provide a polished substrate; A first tunneling silicon oxide layer, a first doped polysilicon layer, and a first doped element silicon oxide layer are sequentially formed on the back surface of the substrate; The first tunneling silicon oxide layer, the first doped polysilicon layer, and the first doped element silicon oxide layer are patterned to form a first opening region; the first opening region corresponds to the N region and the channel region of the final cell structure; A second tunneling silicon oxide layer, a second doped polysilicon layer, and a second doped element silicon oxide layer are sequentially formed on the back surface of the substrate; A preset region on the back surface of the substrate is patterned, and the patterned region corresponds to the P region and the channel region of the final cell structure, wherein an overlapping portion of the patterned region and the first opening region is the channel region; The first doped element silicon oxide layer, the second doped element silicon oxide layer, the first doped polysilicon layer, the second doped polysilicon layer, the first tunneling oxide layer, and the second tunneling oxide layer on the front surface and the side plating-around region of the substrate are removed, and the front surface of the substrate is textured and cleaned; meanwhile, the second doped element oxide layer, the second doped polysilicon layer, and the second tunneling oxide layer in the P region and the channel region on the back surface of the silicon wafer are removed, and finally, the first doped element silicon oxide layer in all regions on the back surface is removed, so as to obtain a silicon wafer with a pyramidal textured surface on the front surface and the N region, the channel region, and the P region arranged at intervals on the back surface.

[0019] In a second aspect, an embodiment of the present invention further provides a TBC solar cell for improving UV attenuation, which is prepared by using the preparation method described in the first aspect.

[0020] In a third aspect, an embodiment of the present invention further provides a battery module, including the TBC solar cell for improving UV attenuation described in the second aspect.

[0021] The embodiment of the present invention has at least the following beneficial effects: The TBC solar cell for improving UV attenuation and its preparation method provided by the embodiments of the present invention, during light injection, by controlling the difference in light radiation intensity between the back and front sides of the silicon wafer, the ratio of the irradiation intensity of the front side to that of the back side is made lower than 0.002. Since hydrogen passivation is achieved on the back side of the silicon wafer through high-intensity light injection during light injection, but during front-side light injection, high-intensity light injection will inevitably cause excessive migration and release of hydrogen in each layer such as the passivation film and the substrate, which can lead to UV attenuation of the battery. Therefore, in the present invention, by controlling the difference in light radiation intensity between the back and front sides within the above range, the front-side irradiation intensity is greatly reduced. By strictly controlling the light radiation intensity of the front side within a lower range, the release of hydrogen from the front-side passivation film layer to the surface and substrate of the crystalline silicon during light injection is reduced, the hydrogen passivation level of the front side is decreased, and the content of silicon-hydrogen bonds at the interface is reduced; at the same time, a light radiation intensity much greater than that of the front side is provided to increase the light injection for the back-side irradiation, which is conducive to rapid hydrogen passivation of the back side. In addition, due to high irradiation intensity often using high-power light irradiation equipment, and the characteristics of the vacuum environment during the battery preparation process make it difficult for heat to conduct, resulting in the uncontrollable heat brought by high-light irradiation affecting the front and back sides of the battery, especially when suppressing the release of hydrogen from the front-side passivation film to the surface and substrate of the crystalline silicon during light injection on the front side of the battery, the influence brought by high-intensity irradiation will increase significantly, exacerbating the UV attenuation of the battery. Therefore, by restricting the light irradiation intensity of the front side within a lower range, it is beneficial to reduce the uncontrollable heat influence brought by high-light irradiation, reduce the release of hydrogen from the front-side passivation film to the surface and substrate of the crystalline silicon during light injection, reduce the UV attenuation of the battery, and thus improve the loss of battery conversion efficiency under UV irradiation.

[0022] Furthermore, by increasing the thickness of the passivation layer, the hydrogen release amount of the passivation film layer is reduced, and silicon oxide or silicon oxynitride with better thermal stability is added between alumina and silicon nitride, thereby improving the hydrogen-blocking ability of the film layer. The refractive index of the silicon nitride film layer is above 2.3. The ultraviolet light transmission is reduced through a high-refractive-index antireflection layer, and multi-angle optimization is carried out to reduce the influence of UV on the surface passivation functional film layer of the solar cell, and further improve the loss of battery conversion efficiency under UV irradiation. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0024] Figure 1 It is a flowchart of a preparation method of a TBC solar cell for improving UV attenuation provided by the embodiments of the present invention; Figure 2It is a schematic flow diagram of step S100 in a method for manufacturing a TBC solar cell for improving UV attenuation provided by an embodiment of the present invention; Figure 3 It is a process structure diagram corresponding to step S101 in a method for manufacturing a TBC solar cell for improving UV attenuation provided by an embodiment of the present invention; Figure 4 It is a process structure diagram corresponding to step S102 in a method for manufacturing a TBC solar cell for improving UV attenuation provided by an embodiment of the present invention; Figure 5 It is a process structure diagram corresponding to step S103 in a method for manufacturing a TBC solar cell for improving UV attenuation provided by an embodiment of the present invention; Figure 6 It is a process structure diagram corresponding to step S104 in a method for manufacturing a TBC solar cell for improving UV attenuation provided by an embodiment of the present invention; Figure 7 It is a process structure diagram corresponding to step S105 in a method for manufacturing a TBC solar cell for improving UV attenuation provided by an embodiment of the present invention; Figure 8 It is a process structure diagram corresponding to step S106 in a method for manufacturing a TBC solar cell for improving UV attenuation provided by an embodiment of the present invention; Figure 9 It is a process structure diagram corresponding to step S200 in a method for manufacturing a TBC solar cell for improving UV attenuation provided by an embodiment of the present invention; Figure 10 It is a schematic structural diagram of a TBC solar cell for improving UV attenuation provided by an embodiment of the present invention.

[0025] Description of the drawings: 1 - Substrate; 2 - First tunneling silicon oxide layer; 3 - First doped polysilicon layer; 4 - First doped element silicon oxide layer; 5 - First opening region; 5a - N region; 6 - Second tunneling silicon oxide layer; 7 - Second doped polysilicon layer; 8 - Second doped element silicon oxide layer; 9 - Second opening region; 9a - P region; 10 - Channel region; 11 - Pyramid texture; 12 - Passivation and antireflection layer; 13 - Grid line. Detailed implementation manners

[0026] Next, the technical solutions of the present invention will be clearly and completely described in conjunction with the embodiments. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0027] Those skilled in the art can understand that, unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as the general understanding of those of ordinary skill in the art to which this invention pertains. It should also be understood that terms such as those defined in a general dictionary should be understood to have a meaning consistent with their meaning in the context of the prior art, and will not be interpreted with an idealized or overly formal meaning unless specifically defined as herein.

[0028] It should be further understood that the term "comprising" used in the specification of the present invention means the presence of the stated features, integers, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or their groups. The phrase "and / or" used herein includes any and all units and all combinations of one or more of the associated listed items.

[0029] In a first aspect, as Figure 1 shown, an embodiment of the present invention provides a method for preparing a TBC solar cell for improving UV attenuation, comprising the following steps: S100. Prepare a silicon wafer with a pyramidal texture 11 on the front side and an N region 5a, a channel region 10, and a P region 9a arranged at intervals on the back side.

[0030] It should be noted that the silicon wafer in step S100 is a semi-finished product of a solar cell (see Figure 8 ), and the preparation of the N region 5a, the channel region 10, and the P region 9a in the solar cell has been completed for this silicon wafer. Since there are certain differences in different solar cell structures, the specific cell structure is not specifically limited in this embodiment.

[0031] Optionally, as Figure 2 shown, the specific preparation method of the silicon wafer in step S100 includes: S101. Provide a polished silicon wafer, see Figure 3 .

[0032] Specifically, the silicon wafer is obtained by alkaline polishing treatment to obtain a polished silicon wafer. The silicon wafer has a front side and a back side. The front side refers to the light-receiving surface where the solar cell normally operates, and the back side is the opposite surface of the light-receiving surface. Figure 2 The upper surface of the silicon wafer shown in

[0033] is the front side, and the lower surface is the back side. In the embodiments of the present invention, generally, the side close to the silicon wafer is the inside, and the side far from the silicon wafer is the outside. The silicon wafer is of N type or P type. In this embodiment, the N type is taken as an example for illustration. Figure 4 .

[0034] Specifically, for the formation of the first tunneling silicon oxide layer 2, there are mainly thermal oxidation methods (including dry oxygen oxidation and wet oxygen oxidation), chemical vapor deposition (CVD) methods (including plasma enhanced chemical vapor deposition (PECVD) method and low pressure chemical vapor deposition (LPCVD) method), room temperature wet oxidation method, etc. In this embodiment, the dry oxygen thermal oxidation method is taken as an example for illustration. The oxidation temperature range is 550 - 650 °C to form the first tunneling silicon oxide layer 2, and the thickness of the first tunneling silicon oxide layer 2 is 1 - 2 nm. Optionally, the first intrinsic polysilicon layer is deposited by the LPCVD method, and the temperature range is 550 - 650 °C, and the thickness range of the first intrinsic polysilicon layer is 50 - 500 nm. Optionally, the first intrinsic polysilicon layer is doped by high temperature diffusion to obtain the first doped polysilicon layer 3, and the diffusion temperature range is 800 - 1050 °C.

[0035] Optionally, the high temperature diffusion includes a high temperature oxidation step to convert the outermost layer of the first doped polysilicon layer 3 into the first doped element silicon oxide layer 4, with a thickness range of 50 - 150 nm, and the high temperature oxidation temperature range is 950 - 1050 °C.

[0036] Optionally, the first doped element is boron, the first doped polysilicon layer 3 is boron-doped polysilicon to form the semiconductor film layer of the N region 5a, and the first doped element silicon oxide layer 4 is a borosilicate glass (BSG) layer. Optionally, the thickness of the BSG layer is 50 - 150 nm.

[0037] S103. Pattern the first tunneling silicon oxide layer 2, the first doped polysilicon layer 3, and the first doped element silicon oxide layer 4, and form the first opening region 5; the first opening region 5 corresponds to the N region 5a and the channel region 10 of the final battery structure. Among them, the overlapping part of the first opening region 5 and the second opening region 9 in S105 is the channel region 10. For details, refer to Figure 5 。

[0038] Specifically, a method of combining laser film opening with wet etching is used to etch an opening on the back of the silicon wafer to form the first opening region 5 (the first opening region 5 exposes the back of the silicon wafer), that is, etch away the first doped element silicon oxide layer 4, the first doped polysilicon layer 3, and the first tunneling silicon oxide layer 2 within the first opening region 5. Optionally, the laser wavelength range is 300 - 1100 nm, the scanning speed range is 10 - 100 m / s, and the frequency range is 100 kHz - 100 MHz. The wet etching uses a mixed solution of an alkaline solution and an SiO2 protection additive.

[0039] S104. Prepare the second tunneling silicon oxide layer 6, the second doped polysilicon layer 7, and the second doped element silicon oxide layer 8 on the back of the silicon wafer in sequence, as Figure 6 shown.

[0040] Specifically, there are currently mainly thermal oxidation methods (including dry oxygen oxidation and wet oxygen oxidation), chemical vapor deposition (CVD) methods (including plasma enhanced chemical vapor deposition (PECVD) method and low pressure chemical vapor deposition (LPCVD) method), room temperature wet oxidation method, etc. for forming the second tunneling silicon oxide layer 6. Optionally, the dry oxygen thermal oxidation method is used, with an oxidation temperature range of 550 - 650 °C to form the second tunneling silicon oxide layer 6, and the thickness of the second tunneling silicon oxide layer 6 is 1 - 2 nm. Optionally, the second intrinsic polysilicon layer is deposited by the LPCVD method, with a temperature range of 550 - 650 °C, and the thickness range of the second intrinsic polysilicon layer is 50 - 300 nm; optionally, the second intrinsic polysilicon layer is doped by high temperature diffusion to obtain the second doped polysilicon layer 7, with a diffusion temperature range of 750 - 950 °C.

[0041] Optionally, the high temperature diffusion includes a high temperature oxidation step to convert the outermost side of the second doped polysilicon layer 7 into a second doped element silicon oxide layer 8, with a thickness range of 20 - 100 nm and a high temperature oxidation temperature range of 850 - 950 °C.

[0042] Optionally, the second doped element is phosphorus, the second doped polysilicon layer 7 is phosphorus doped polysilicon to form the semiconductor film layer of the P region 9a, and the second doped element silicon oxide layer 8 is a phosphosilicate glass (PSG) layer. Optionally, the thickness of the PSG layer is 20 - 100 nm.

[0043] It should be noted that if the first doped polysilicon layer 3 and the second doped polysilicon layer 7 are formed by the method of depositing amorphous silicon at low temperature (such as PECVD), after step S104, a separate high temperature annealing is required to crystallize the deposited amorphous silicon layers into the first doped polysilicon layer 3 and the second doped polysilicon layer 7 respectively. The temperature range of the high temperature annealing is 900 - 1000 °C.

[0044] S105, pattern the second opening region 9 on the back of the substrate 1. The second opening region 9 corresponds to the P region 9a and the channel region 10 of the final battery structure, where the overlapping part of the second opening region 9 and the first opening region 5 is the channel region 10. For details, refer to Figure 7 .

[0045] Specifically, the second doped element oxide layer within the patterned region is modified and is easily etched by the alkaline solution. Optionally, the patterning method is the laser opening film method. Optionally, the laser wavelength range is 300 - 1100 nm, the scanning speed range is 10 - 100 m / s, and the frequency range is 100 kHz - 100 MHz.

[0046] S106, Remove the first doped element silicon oxide layer 4, the second doped element silicon oxide layer 8, the first doped polysilicon layer 3, the second doped polysilicon layer 7, the first tunneling oxide layer and the second tunneling oxide layer on the front and side plating-around areas of the substrate 1, and perform texturing cleaning on the front of the substrate 1; meanwhile, remove the second doped element oxide layer, the second doped polysilicon layer 7 and the second tunneling oxide layer in the P region 9a and the channel region 10 on the back of the silicon wafer, and finally remove the first doped element silicon oxide layer 4 in all areas on the back.

[0047] Specifically, as Figure 8 shown, remove all the film layers on the front and side plating-around areas of the silicon wafer through three consecutive wet processes. Among them, in the first wet process, all the film layers such as the first doped element silicon oxide layer 4, the second doped element silicon oxide layer 8, the first doped polysilicon layer 3, the second doped polysilicon layer 7, the first tunneling oxide layer and the second tunneling oxide layer on the front and side plating-around areas of the silicon wafer can be removed by an acid solution. The acid solution is a mixed liquid containing hydrofluoric acid, nitric acid and sulfuric acid.

[0048] Optionally, in the first wet process, in a chain wet equipment, the front of the silicon wafer is downward to implement the above process. In the second wet process, the silicon wafer can be textured by a mixed liquid containing an alkaline solution, a texturing additive and an SiO2 protection additive. While forming a pyramid texture 11 on the front, remove the second doped element oxide layer, the second doped polysilicon layer 7 and the second tunneling oxide layer in the P region 9a and the channel region 10 on the back of the silicon wafer, and etch the single crystal silicon in the channel region by a depth of 1 - 5 μm. The channel region can be a polished surface or a pyramid texture. In the third wet process, remove the first doped element silicon oxide layer 4 in all areas on the back by hydrofluoric acid.

[0049] Optionally, both the second wet process and the third wet process are carried out in a tank wet equipment.

[0050] Optionally, RCA cleaning is carried out after the second wet process and the third wet process to improve the surface secondary cleanliness of the silicon wafer.

[0051] S200, as Figure 9 shown, prepare a passivation and antireflection layer on both the front and back of the silicon wafer.

[0052] Optionally, the passivation and antireflection layer 12 includes a passivation layer and an antireflection layer, and the passivation layer is closer to the silicon wafer than the antireflection layer.

[0053] Optionally, the passivation layer is an alumina film layer, and the thickness of the alumina film layer is 3 - 20 nm. Optionally, the thickness of the alumina film layer on the front of the silicon wafer is 5 - 8 nm, slightly higher than the conventional thickness range (the conventional thickness is generally about 4 nm).

[0054] In this embodiment, by appropriately increasing the thickness of the alumina film layer, the hydrogen barrier ability of the film layer is increased, thereby reducing the release of hydrogen in the front antireflection layer to the silicon surface and the substrate, reducing the hydrogen passivation level on the front side, reducing the content of silicon-hydrogen bonds at the interface, and being beneficial to reducing the UV attenuation of the battery.

[0055] Optionally, the deposition method of the alumina film layer is ALD (Atomic Layer Deposition) or PECVD (Plasma Enhanced Chemical Vapor Deposition), which is beneficial to improving the hydrogen barrier ability of the passivation film.

[0056] Optionally, the antireflection layer in this embodiment includes multiple layers of silicon nitride film layers, and the refractive index of the multiple layers of silicon nitride film layers decreases sequentially from the side close to the silicon wafer to the side far from the silicon wafer, that is, the refractive index of the silicon nitride film layer close to the silicon wafer (inner layer) is larger, while the refractive index of the silicon nitride film layer far from the silicon wafer (outer layer) is smaller.

[0057] Among them, one or more layers of silicon nitride film layers close to the silicon wafer (partial silicon nitride film layers in the antireflection layer) jointly form a UV absorption layer, and the refractive index range of the UV absorption layer is 2.3 to 2.7, and the total thickness is 2 to 20 nm. For example: the antireflection layer includes 5 layers of silicon nitride film layers, and the UV absorption layer includes the 2 layers of silicon nitride film layers closest to the silicon wafer. The refractive indices of these 2 layers of silicon nitride film layers are relatively high, and the refractive indices are both within the range of 2.3 to 2.7. Moreover, the refractive index of the innermost layer of silicon nitride film layer is the highest, for example, 2.6, the refractive index of the other 1 layer of silicon nitride film layer in the UV absorption layer is 2.4, while the refractive indices of the remaining 3 layers of silicon nitride layers close to the outer layer are all less than 2.3 and decrease sequentially.

[0058] Optionally, the total thickness range of the UV absorption layer in the antireflection layer is 5 - 15 nm, that is, by using a silicon nitride film layer with a high refractive index and high thickness on the front side, it is beneficial to reduce the transmission of ultraviolet light, thereby further reducing the influence of front irradiation, and further reducing the damage rate of ultraviolet light to the silicon-hydrogen bonds at the silicon interface, which is beneficial to further reducing the UV attenuation of the battery.

[0059] Optionally, a hydrogen barrier layer is further provided between the antireflection layer and the passivation layer, and the thickness of the hydrogen barrier layer is 1 to 10 nm. Optionally, the hydrogen barrier layer is a silicon oxide layer or a silicon oxynitride film layer. Optionally, the thickness of the hydrogen barrier layer is 2 to 5 nm. The above-mentioned film layers can be prepared by methods such as deposition, and no specific limitation is made here. It should be noted that if the hydrogen barrier layer is a silicon oxide layer, it can be prepared between the passivation layer and the silicon wafer. If the hydrogen barrier layer is a silicon oxynitride layer, considering the preparation efficiency and cost, it is generally prepared between the passivation layer and the antireflection layer, so that it can be prepared using the same equipment as the antireflection layer.

[0060] In this embodiment, by adding silicon oxide or silicon oxynitride with better stability between the alumina film layer and the silicon nitride film layer, it is beneficial to improve the hydrogen-blocking ability of the film layer. At the same time, the thickness of the alumina film layer is increased, thereby increasing the difficulty of hydrogen migration, reducing the release of hydrogen in the front passivation film to the silicon crystal surface and the substrate, reducing the hydrogen passivation level on the front side, and reducing the content of silicon-hydrogen bonds at the interface, which is beneficial to further reducing the UV attenuation of the battery.

[0061] S300, screen-print the grid lines on the back of the silicon wafer and sinter them.

[0062] Specifically, the grid line electrodes are prepared on the back of the silicon wafer by screen printing and cured by high-temperature sintering. The sintering temperature is generally 600-800°C.

[0063] S400, perform light injection on the sintered silicon wafer; when performing light injection, the ratio of the irradiation intensity on the front side to the irradiation intensity on the back side of the silicon wafer is lower than 0.002. The ratio of the irradiation intensity on the front side to the irradiation intensity on the back side of the silicon wafer during light injection can be selected as 0.002, 0.0018, 0.0016, 0.0014, 0.0018, 0.0013, 0.001, 0.0008, 0.0006, 0.0004, etc.

[0064] Optionally, the light injection temperature is 300-700°C.

[0065] Optionally, after step S400, it further includes: testing and sorting; the purpose of testing and sorting is to select the batteries that meet the electrical requirements.

[0066] The embodiment of the present invention provides a preparation method of a TBC solar cell for improving UV attenuation. During light injection, by controlling the difference in light radiation intensity between the back side and the front side of the silicon wafer, the ratio of the irradiation intensity on the front side to the irradiation intensity on the back side is lower than 0.002. Since hydrogen passivation is achieved on the back side of the silicon wafer through high-intensity light injection during light injection, but when light injection is performed on the front side, high-intensity light injection will inevitably cause excessive migration and release of hydrogen in each layer such as the passivation film and the substrate, which may lead to UV attenuation of the battery. Therefore, in the present invention, by controlling the difference in light radiation intensity between the back side and the front side within the above range, the irradiation intensity on the front side is greatly reduced. By strictly controlling the light radiation intensity on the front side within a lower range, the release of hydrogen in the front passivation film to the silicon crystal surface and the substrate during light injection is reduced, the hydrogen passivation level on the front side is reduced, and the content of silicon-hydrogen bonds at the interface is reduced; at the same time, a light radiation intensity far greater than that on the front side is provided to increase the light injection on the back side irradiation, which is beneficial to the rapid hydrogen passivation on the back side. Thus, by restricting the light irradiation intensity on the front side within a lower range, it is beneficial to reduce the release of hydrogen in the front passivation film to the silicon crystal surface and the substrate during light injection, thereby reducing the UV attenuation of the battery. In addition, by increasing the refractive index of the innermost silicon nitride film layer on the front side, the transmittance of ultraviolet rays during front irradiation is further reduced.

[0067] Optionally, in step S300, the irradiation intensity on the front side of the silicon wafer during sintering is less than or equal to 0.1 sun.

[0068] Specifically, during sintering, light with a certain irradiation intensity will be generated more or less while heating at a high temperature. If the generated light irradiation intensity is too high, it will increase the hydrogen passivation level on the front side during the sintering process and increase the possibility of UV attenuation of the battery. By limiting the irradiation intensity on the front side during sintering to be less than or equal to 0.1 sun, the release of hydrogen from the front passivation film to the surface and substrate of the crystalline silicon can be effectively inhibited, the hydrogen passivation level on the front side can be reduced, the content of silicon-hydrogen bonds at the interface can be reduced, and the UV attenuation of the battery can be reduced.

[0069] Optionally, in step S400, the irradiation intensity on the front side of the silicon wafer during light injection is less than or equal to 0.1 sun.

[0070] Specifically, when the irradiation intensity on the front side during light injection is in the range of less than or equal to 0.1 sun, the release of hydrogen from the front passivation film to the surface and substrate of the crystalline silicon can be effectively inhibited, the hydrogen passivation level on the front side can be reduced, the content of silicon-hydrogen bonds at the interface can be reduced, and thus the UV attenuation of the battery can be reduced.

[0071] Optionally, in step S300, the ratio of the irradiation intensity on the front side to the irradiation intensity on the back side of the silicon wafer during sintering is lower than 0.002.

[0072] Specifically, by controlling the difference in light radiation intensity between the back side and the front side during sintering, the ratio of the irradiation intensity on the front side to the irradiation intensity on the back side is made lower than 0.002. In this way, by controlling a certain high light irradiation intensity on the back side during sintering, the pre-passivation of hydrogen on the back side during the sintering process can be realized to a certain extent, the hydrogen passivation efficiency can be improved, and at the same time, the light radiation intensity on the front side during sintering is controlled in a lower range. The effect can refer to the light intensity control during light injection to further control the influence of the light intensity during sintering on the front side of the battery, thereby further reducing the UV attenuation of the battery.

[0073] Optionally, in step S300, the back side of the silicon wafer is heated by LED auxiliary heating during sintering, and the front side of the silicon wafer is heated by an electric heating wire or infrared heating.

[0074] Optionally, in step S400, the back side of the silicon wafer is heated by LED auxiliary heating during light injection, and the front side of the silicon wafer is heated by an electric heating wire or infrared heating.

[0075] In this embodiment, by using different heating methods with different irradiations for the front side and the back side of the battery during sintering and light injection, it is beneficial to achieve high-difference irradiation intensity conditions for the front side and the back side, and further beneficial to reducing the UV attenuation of the battery.

[0076] In a second aspect, an embodiment of the present invention further provides a TBC solar cell for improving UV attenuation, which is prepared by using the preparation method of the foregoing embodiment.

[0077] Specifically, the specific structure of the TBC solar cell prepared by adopting steps S101 to S106 and S200 to S400 is as follows Figure 10 shown and includes: Substrate 1; the back surface of substrate 1 is provided with a P region 9a, a channel region 10, and an N region 5a at intervals to facilitate the subsequent formation of the PN junction of the solar cell. The side surface and the front surface of substrate 1 are textured to form a pyramid texture surface 11. The passivation and antireflection layer 12 is prepared on the front surface, back surface, and side surface of the entire silicon wafer, and grid lines 13 are prepared on the passivation and antireflection layer 12 located in the N region 5a and the P region 9a to facilitate the formation of the positive and negative electrodes of the solar cell.

[0078] It should be noted that for the detailed description of the specific structure of the TBC solar cell, reference can be made to the content of the foregoing embodiments, and details will not be repeated here.

[0079] The TBC solar cell provided by the embodiment of the present invention greatly reduces the irradiation intensity on the front surface of the battery by controlling the light radiation intensity difference between the back surface and the front surface. By strictly controlling the light radiation intensity on the front surface within a lower range, the release of hydrogen from the front passivation film to the silicon surface and the substrate during light injection is reduced, the hydrogen passivation level on the front surface is reduced, and the content of silicon-hydrogen bonds at the interface is reduced; at the same time, a light radiation intensity much greater than that on the front surface is provided, increasing the light injection for the back surface irradiation, which is beneficial to the rapid hydrogen passivation of the back surface. Therefore, by limiting the light irradiation intensity on the front surface within a lower range, it is beneficial to reduce the release of hydrogen from the front passivation film to the silicon surface and the substrate during light injection, thereby reducing the UV attenuation of the battery.

[0080] In a third aspect, the embodiment of the present invention provides a battery module, including the TBC solar cell in the foregoing embodiment.

[0081] The preparation method of the TBC solar cell in the embodiment of the present invention may further include other conventional required steps, which can be selected according to actual needs, and details will not be elaborated here.

[0082] The embodiments of the present invention will be described in detail below. They are exemplary and are only used to explain the present invention and should not be construed as a limitation to the present invention.

[0083] Embodiment 1 A method for preparing a TBC solar cell for improving UV attenuation includes the following steps: S100. Prepare and form a silicon wafer with a pyramid texture surface 11 on the front surface and including an N region 5a, a channel region 10, and a P region 9a arranged at intervals on the back surface.

[0084] S200, prepare an alumina film layer, a silicon oxynitride film layer, and multiple silicon nitride film layers on both the front and back sides of the silicon wafer. Among them, the thickness of the alumina film layer is 6 nm, the thickness of the silicon oxynitride film layer is 3 nm, the thickness of the innermost silicon nitride film layer (i.e., the one closest to the alumina film layer) is 10 nm, and the refractive index is 2.4.

[0085] S300, screen-print grid lines on the back side of the silicon wafer and sinter them. When sintering, the ratio of the irradiation intensity on the front side to the back side of the silicon wafer is 0.0017. When light is injected, the irradiation intensity on the front side of the silicon wafer is 0.1 sun, and the irradiation intensity on the back side of the silicon wafer is 60 sun.

[0086] S400, perform light injection on the sintered silicon wafer; when light is injected, the ratio of the irradiation intensity on the front side to the back side of the silicon wafer is 0.0017. When light is injected, the irradiation intensity on the front side of the silicon wafer is 0.1 sun, and the irradiation intensity on the back side of the silicon wafer is 60 sun. The light source is above, the front side of the silicon wafer faces downwards, and it is back to the light source.

[0087] The TBC solar cell prepared by the above method has a cell conversion efficiency of 26.25%, and its attenuation rate for UV60 is 1.14%. Among them, the attenuation rate test method is to measure the conversion efficiency of the cell before and after UV attenuation by IV test respectively, that is, the attenuation rate = (efficiency before attenuation - efficiency after attenuation) / efficiency before attenuation.

[0088] Example 2 Refer to the method of Example 1, the difference is that in step S300, when sintering, the ratio of the irradiation intensity on the front side to the back side of the silicon wafer is 0.01. When light is injected, the irradiation intensity on the front side of the silicon wafer is 0.1 sun, and the irradiation intensity on the back side of the silicon wafer is 10 sun.

[0089] The TBC solar cell prepared by the above method has a cell conversion efficiency of 26.08%, and its attenuation rate for UV60 is 1.10%.

[0090] Example 3 Refer to the method of Example 1, the difference is that in step S300, when sintering, the irradiation intensity on the front side of the silicon wafer is 0.3 sun, and other conditions are the same as in Example 1.

[0091] The TBC solar cell prepared by the above method has a cell conversion efficiency of 26.23%, and its attenuation rate for UV60 is 1.32%.

[0092] Example 4 Refer to the method of Example 1, the difference is that in step S400, when light is injected, the irradiation intensity on the front side of the silicon wafer is 0.5 sun, and other conditions are the same as in Example 1.

[0093] The TBC solar cell prepared by the above method has an efficiency of 26.26% before attenuation, and its attenuation rate for UV60 is 1.56%.

[0094] Example 5 The method of Example 1 was referred to, with the difference that in step S300, the thickness of the alumina film layer was 4 nm. The TBC solar cell prepared by the method of Example 5 had an efficiency of 26.19% before attenuation and an attenuation rate for UV60 of 1.48%.

[0095] Example 6 The method of Example 1 was referred to, with the difference that in step S300, a hydrogen barrier layer was not prepared between the passivation layer and the antireflection layer. The TBC solar cell prepared by the method of Example 6 had an efficiency of 26.26% before attenuation and an attenuation rate for UV60 of 1.66%.

[0096] Example 7 The method of Example 1 was referred to, with the difference that in step S300, the thickness of the innermost silicon nitride film layer on the front side of the silicon wafer was 15 nm and the refractive index was 2.2. The TBC solar cell with improved UV attenuation prepared by the method of Example 7 had an efficiency of 26.24% before attenuation and an attenuation rate for UV60 of 1.51%.

[0097] Comparative Example 1 The method of Example 1 was referred to, with the difference that in step S400, the ratio of the irradiation intensity on the front side to the irradiation intensity on the back side of the silicon wafer during light injection was 10, the corresponding front-side irradiation intensity was 10 sun, and the back-side irradiation intensity was 1 sun. The TBC solar cell with improved UV attenuation prepared by the method of Comparative Example 1 had an efficiency of 26.28% before attenuation and an attenuation rate for UV60 of 2.57%.

[0098] Test Example The TBC solar cells with improved UV attenuation obtained in the above examples and comparative examples were subjected to performance tests, and the results are shown in Table 1.

[0099] Table 1 Comparison of performance test results of each example and comparative example

[0100] From the above results, it can be seen that, compared with the comparative example, adopting the embodiment scheme of the present invention can greatly reduce the front irradiance intensity. By strictly controlling the light radiation intensity on the front within a lower range, the release of hydrogen from the front passivation film to the silicon surface and the substrate during light injection is reduced, thereby reducing the hydrogen passivation level on the front, decreasing the content of silicon-hydrogen bonds at the interface, and further reducing the UV attenuation of the battery. Further, according to Embodiment 1 and Embodiments 2-7, by adopting the preferred specific preparation method and specific battery structure scheme of the present invention, by restricting the front light irradiance intensity within a lower range, the release of hydrogen from the front passivation film to the silicon surface and the substrate during light injection is reduced. At the same time, stronger light injection on the back can ensure that the battery efficiency is not affected.

[0101] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus cannot be understood as a limitation to the present invention.

[0102] The terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, unless otherwise stated, the meaning of "a plurality" is two or more.

[0103] In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, the terms "mounted", "connected" and "connected" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection or an integral connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations. In the description of this specification, the specific features, structures, materials or characteristics may be combined in a suitable manner in any one or more embodiments or examples.

[0104] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or equivalently replace some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for preparing a TBC solar cell with improved UV attenuation, characterized in that, Including: Preparing a silicon wafer with a pyramid-shaped suede surface on the front and an N region, a channel region, and P regions arranged at intervals on the back; Preparing a passivation and antireflection layer on both the front and back of the silicon wafer; Screen-printing grid lines on the back of the silicon wafer and sintering; Optically injecting the sintered silicon wafer; when optically injecting, the ratio of the irradiation intensity of the front to the back of the silicon wafer is less than 0.

002.

2. The preparation method of the TBC solar cell according to claim 1, wherein, When sintering, the irradiation intensity of the front of the silicon wafer is less than or equal to 0.1 sun.

3. The preparation method of the TBC solar cell according to claim 1, characterized in that When optically injecting, the irradiation intensity of the front of the silicon wafer is less than or equal to 0.1 sun.

4. The preparation method of the TBC solar cell according to any one of claims 1 to 3, characterized in that, When sintering, the ratio of the irradiation intensity of the front to the back of the silicon wafer is less than 0.

002.

5. The preparation method of the TBC solar cell according to claim 4, wherein When sintering, the back of the silicon wafer is assisted by LED heating, and the front of the silicon wafer is heated by an electric heating wire or infrared.

6. The preparation method of the TBC solar cell according to claim 1, characterized in that, When optically injecting, the back of the silicon wafer is assisted by LED heating, and the front of the silicon wafer is heated by an electric heating wire or infrared.

7. The manufacturing method of the TBC solar cell according to claim 1, characterized in that, The sintering temperature is 600 - 800 °C; and / or, the optical injection temperature is 300 - 700 °C.

8. The preparation method of the TBC solar cell according to claim 1, characterized in that The passivation and antireflection layer includes a passivation layer and an antireflection layer, and the passivation layer is closer to the silicon wafer than the antireflection layer.

9. The manufacturing method of the TBC solar cell according to claim 8, characterized in that, The passivation layer is an alumina film layer with a thickness of 3 - 20 nm.

10. The method for preparing a TBC solar cell according to claim 8, characterized in that, The antireflection layer includes multiple silicon nitride film layers, and the refractive index of the multiple silicon nitride film layers decreases sequentially from the side close to the silicon wafer to the side far from the silicon wafer; among them, one or more silicon nitride film layers close to the silicon wafer together form a UV absorption layer, and the refractive index range of the UV absorption layer is 2.3 - 2.7, and the total thickness is 2 - 20 nm.

11. The method for preparing a TBC solar cell according to any one of claims 8 to 10, characterized in that, A hydrogen barrier layer is also prepared between the antireflection layer and the passivation layer, and the thickness of the hydrogen barrier layer is 1 - 10 nm.

12. The preparation method of the TBC solar cell according to any one of claims 1 to 10, characterized in that, The preparation of the silicon wafer with a pyramid-shaped suede surface on the front and an N region, a channel region, and P regions arranged at intervals on the back includes: Providing a polished substrate; Sequentially preparing a first tunneling oxide layer, a first doped polysilicon layer, and a first doped element oxide layer on the back of the substrate; Patterning the first tunneling oxide layer, the first doped polysilicon layer, and the first doped element oxide layer to form a first opening region; the first opening region corresponds to the N region and the channel region of the final cell structure; Sequentially preparing a second tunneling oxide layer, a second doped polysilicon layer, and a second doped element oxide layer on the back of the substrate; Patterning the second opening region on the back of the substrate, and the second opening region corresponds to the P region and the channel region of the final cell structure, where the overlapping part of the second opening region and the first opening region is the channel region; Removing the first doped element oxide layer, the second doped element oxide layer, the first doped polysilicon layer, the second doped polysilicon layer, the first tunneling oxide layer, and the second tunneling oxide layer on the front and the side plating area around the substrate, and performing texturing and cleaning on the front of the substrate; at the same time, removing the second doped element oxide layer, the second doped polysilicon layer, and the second tunneling oxide layer in the P region and the channel region on the back of the silicon wafer, and finally removing the first doped element oxide layer in all areas on the back, so as to obtain a silicon wafer with a pyramid-shaped suede surface on the front and an N region, a channel region, and P regions arranged at intervals on the back.

13. A TBC solar cell for improving UV attenuation, characterized in that, Prepared by using the preparation method according to any one of claims 1 to 12.

14. A battery assembly, characterized in that, Comprising the TBC solar cell according to claim 13.

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