Substrate structure and power supply device
By applying a highly adhesive coating between the conductor patterns of the electronic substrate, the migration problem caused by the peeling of the resist layer in high temperature and multi-humidity environment is solved, and the insulation between the conductor patterns and the stability of the power supply device are achieved.
Patent Information
- Application Number
- CN202380018355.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-01
- Publication Date
- 2025-07-01
AI Technical Summary
In high temperature and humidity environments, the resist layer on the electronic substrate may peel off, resulting in the migration of ionized metal between the conductor patterns and affecting the stability of the power supply device.
In the region between the conductor patterns, the substrate is covered with a coating with higher adhesion than the resist layer to ensure insulation and suppress migration.
Even if the resist layer is peeled off, the highly adhesive coating can maintain insulating properties, suppress migration between conductor patterns, and improve the stability of the power supply device.
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Figure CN120240000A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a substrate structure and a power supply device. Background Art
[0002] Conventionally, a power supply device including an electronic substrate having a DC / DC converter circuit has been known (for example, Patent Document 1). On the surface of the electronic substrate of the DC / DC converter circuit, a resist layer is formed.
[0003] Prior Art Documents
[0004] Patent Documents
[0005] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2001-24344 Summary of the Invention
[0006] Technical Problem to be Solved by the Invention
[0007] Here, when the power supply device is used in an engine room of a vehicle or the like, the electronic substrate is exposed to a high-temperature and high-humidity environment. In this case, the resist layer may peel off from the substrate. On the other hand, a pair of conductor patterns with a large voltage difference are sometimes formed on the substrate in an arranged manner. If peeling of the resist layer occurs between the pair of conductor patterns, a problem of migration occurs in which ionized metal moves along the surface of the substrate.
[0008] Therefore, an object of the present disclosure is to provide a substrate structure and a power supply device capable of suppressing migration.
[0009] Technical Means for Solving the Problem
[0010] A substrate structure according to an aspect of the present disclosure includes: a substrate; a pair of conductor patterns formed on a main surface of the substrate and arranged separately from each other; and a resist layer covering the main surface of the substrate, and a coating having adhesiveness higher than that of the resist layer covers the substrate in a state of contacting the substrate in at least a part of a region between the pair of conductor patterns.
[0011] A substrate structure according to an aspect of the present disclosure has: a pair of conductor patterns formed on a main surface of the substrate and arranged separately from each other. In contrast, a coating having adhesiveness higher than that of the resist layer covers the substrate in a state of contacting the substrate in at least a part of a region between the pair of conductor patterns. According to this structure, even when the resist layer peels off from the main surface of the substrate, the coating in a state of contacting the substrate with high adhesiveness can ensure insulation in the region between the pair of conductor patterns. Therefore, migration between the pair of conductor patterns can be suppressed. Thus, migration can be suppressed.
[0012] Alternatively, an opening may be formed in the resist layer with respect to at least a part of the region and the opening of the conductor pattern, and a coating may be formed in the opening. In this case, protection can be provided by the coating over a wide range including the vicinity of the conductor pattern.
[0013] Alternatively, the resist layer may cover the conductor pattern, an opening may be formed in the resist layer with respect to at least a part of the region, and a coating may be formed in the opening. In this case, the amount of the coating can be suppressed as compared with the case where the conductor pattern is covered with the coating.
[0014] Alternatively, in the resist layer, a first opening that opens at a position on one conductor pattern side in the region and a second opening that opens at a position on the other conductor pattern side in the region may be formed, the resist layer may remain between the first opening and the second opening, and a coating may be formed in the first opening and the second opening. In this case, by leaving the resist layer, adhesion of solder to the main surface of the substrate can be suppressed.
[0015] Alternatively, in the region between a pair of conductor patterns, the planar shape of the main surface of the substrate may be continuous from one conductor pattern to the other conductor pattern. Migration can be suppressed by the coating even without forming a slit in the substrate.
[0016] Alternatively, in the resist layer, an opening may be formed with respect to at least a part of the region, and the coating may cover the resist layer at the edge of the opening. In this case, the adhesiveness of the boundary between the resist layer and the coating can be improved.
[0017] Alternatively, one conductor pattern and the other conductor pattern may extend in a parallel manner. In this case, since the separation distance between the conductor patterns is constant, the same insulation structure can be applied in the extending direction of the conductor patterns.
[0018] The power supply device according to one aspect of the present disclosure may also have the above-described substrate structure.
[0019] According to this power supply device, the same operations and effects as those of the above-described substrate structure can be obtained.
[0020] Effects of the Invention
[0021] According to one aspect of the present disclosure, a substrate structure and a power supply device capable of suppressing migration can be provided. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Figure 1 The power supply device showing an embodiment of the present disclosure is shown.
[0023] Figure 2 It is a circuit diagram showing a DC / DC converter circuit of an embodiment of the present disclosure.
[0024] Figure 3 (a) of [Figure number] is a top view of the substrate structure, Figure 3 and (b) of [Figure number] is a cross-sectional view along the Figure 3 line IIIb-IIIb shown in (a) of [Figure number].
[0025] Figure 4 is an enlarged view showing the structure near the end in the width direction of the coating.
[0026] Figure 5 is a diagram for explaining the manufacturing method of the substrate structure.
[0027] Figure 6 is a diagram showing the substrate structure of the comparative example.
[0028] Figure 7 is a diagram showing the substrate structure of the comparative example.
[0029] Figure 8 (a) and (b) of [Figure number] show the substrate structure of the comparative example, Figure 8 and (c) of [Figure number] is a diagram showing the substrate structure of the modified example.
[0030] Figure 9 is a diagram showing the substrate structure of the modified example.
[0031] Figure 10 is a diagram showing the substrate structure of the modified example.
[0032] Figure 11 is a diagram showing the substrate structure of the modified example.
[0033] Figure 12 is a diagram showing the substrate structure of the modified example.
[0034] Figure 13 is a diagram showing the substrate structure of the modified example.
[0035] Figure 14 is a diagram showing the substrate structure of the modified example.
[0036] Figure 15 is a diagram showing the substrate structure of the modified example.
[0037] Figure 16 is a diagram showing the substrate structure of the modified example.
[0038] Figure 17 is a diagram showing the substrate structure of the modified example. Detailed Description of the Invention
[0039] Hereinafter, several embodiments of the present disclosure will be described in detail. However, the present disclosure is not limited to the following embodiments.
[0040] Referring toFigure 1 , the power supply device 100 having the substrate structure of the present disclosure embodiment will be described. Figure 1 The power supply device 100 of the present disclosure embodiment is shown.
[0041] As Figure 1 shown, the power supply device 100 is constituted by assembling the cover body 4 to the housing member 2 in a state of housing the electronic substrate 3. The power supply device 100 is, for example, a unit such as a DC / DC converter. The electronic substrate 3 includes a DC / DC converter circuit. This power supply device 100 is, for example, mounted in an engine room of an automobile or the like and used in a high-temperature and high-humidity environment.
[0042] Next, an example of the DC / DC converter circuit having the substrate structure 1 of the present embodiment will be described. Figure 2 is a circuit diagram showing the DC / DC converter circuit 105 of the present disclosure embodiment. As Figure 2 shown, the DC / DC converter circuit 105 includes a DC power supply circuit 110, an inverter circuit 120, and a DC voltage supply unit 140.
[0043] The DC power supply circuit 110 includes a smoothing capacitor Ci connected to the power supply ES1. The inverter circuit 120 is a circuit that converts a DC voltage into a high-frequency AC voltage. The inverter circuit 120 forms a bridge by a first switching element SW1 and a third switching element SW3 connected to the positive side output of the DC power supply circuit 110, and a fourth switching element SW4 opposite to the first switching element SW1 and a second switching element SW2 opposite to the third switching element SW3. A branch point DP1 between the first switching element SW1 and the second switching element SW2, and a branch point DP2 between the third switching element SW3 and the fourth switching element SW4 are connected to the main transformer MT via the reactor Lr and the reactor Lr. In addition, outside the power supply circuit system, a control unit DR1 is provided. The control unit DR1 is connected to the switching elements SW1 to SW4 via lines L4 to L7 and controls the switching elements SW1 to SW4. The A to D portions of the lines L4 to L7 drawn from the control unit DR1 extend to the A to D of the switching elements SW1 to SW4. In addition, the control unit DR1 is connected to the secondary side synchronous rectification switches (the portions indicated by E and F) of the rectification circuit 135 described later and controls these switches.
[0044] The DC voltage supply unit 140 includes a rectification circuit 135 that rectifies the output of the main transformer MT and converts it into a DC voltage, a DC reactor Lch, and a capacitor Co. The DC voltage supply unit 140 supplies a desired DC voltage to the power supply ES2. The main transformer MT is a transformer that converts the high-frequency AC voltage on the primary side into a voltage suitable for output.
[0045] The above DC / DC converter circuit 105 has a high-voltage section 150 to which a high voltage is applied. The line L1 between the power supply HV and the third switching element SW3 forms the high-voltage section 150. The voltage in the high-voltage section 150 is not particularly limited and is, for example, 400 to 800 V. In addition, the DC / DC converter circuit 105 has a low-voltage section 151 that is adjacent to the high-voltage section 150 and has a lower voltage. Specifically, the line L2 between the power supply HV and the branch point DP3 (which branches to the smoothing capacitor Ci) forms the low-voltage section 151 with a low voltage. The line L3 between the branch point DP1 and the main transformer MT forms the low-voltage section 151. The lines L4 to L7 for inputting signals to the switching elements SW1 to SW4 form the low-voltage section 151.
[0046] Next, with reference to Figure 3 , the substrate structure 1 of the present embodiment will be described. Figure 3 FIG. (a) is a top view of the substrate structure 1. Figure 3 FIG. (b) is a cross-sectional view taken along the line IIIb-IIIb shown in Figure 3 FIG. (a). The substrate structure 1 is a structure applied to the vicinity of the high-voltage section 150 and the low-voltage section 151 in the electronic substrate 3 (refer to Figure 1 ). As shown in Figure 3 , the substrate structure 1 includes a substrate 6, a pair of conductor patterns 7A, 7B, a resist layer 8, and a coating 9.
[0047] The substrate 6 is a flat base member on which electronic components (not shown) are mounted. The substrate 6 has a main surface 6a that serves as the mounting surface for each electronic component. In addition, in the following description, the direction orthogonal to the main surface 6a is defined as the vertical direction, and the side of the main surface 6a is referred to as the "upper side" for explanation. However, the vertical direction here is a direction set for convenience of explanation and does not limit the attitude of the power supply device 100 (refer to Figure 1 ) during use. The substrate 6 includes a ceramic sheet and a conductive layer and is formed by laminating them. The material of the substrate 6 is not particularly limited, and for example, glass epoxy, ceramic, etc. can also be used. Inside the substrate 6, a plurality of layers of conductive layers 11 are formed.
[0048] The conductor patterns 7A, 7B are formed on the main surface 6a of the substrate 6. The conductor patterns 7A, 7B extend in a specified direction and are arranged separately from each other. In addition, the direction in which the conductor patterns 7A, 7B extend is defined as the extension direction D1, and the direction in which the conductor patterns 7A, 7B are separated is defined as the width direction D2. In the present embodiment, the conductor patterns 7A, 7B extend linearly in the extension direction D1. One conductor pattern 7A and the other conductor pattern 7B extend in a parallel manner. The conductor patterns 7A, 7B may be made of any conductive material and are not particularly limited. For example, Cu, tungsten, etc. can be used.
[0049] Here, a conductor pattern 7A is a conductor pattern of a high-voltage portion 150 to which a high voltage is applied. The conductor pattern 7A is a pattern corresponding to the line L1 (refer to Figure 2 ). Another conductor pattern 7B is a conductor pattern of a low-voltage portion 151 to which a low voltage is applied. The conductor pattern 7B is a pattern corresponding to any one of the lines L2, L3, L4 to L7 (refer to Figure 2 ) included in the low-voltage portion 151. In this way, the high-voltage portion 150 and the low-voltage portion 151 are set in a state with a large potential difference and in an arranged state. The separation distance in the width direction D2 between the conductor pattern 7A and the conductor pattern 7B is not particularly limited, and from the viewpoint of miniaturization, it can be set in the range of 0.1 to 5 mm.
[0050] The region between the pair of conductor patterns 7A and 7B is defined as "region E1". Region E1 represents a portion where the planar shape of the main surface 6a of the substrate 6 is continuous from one conductor pattern 7A to the other conductor pattern 7B. For example, when there is a slit (refer to Figure 5 , 6 ) that is recessed with respect to the substrate 6 in region E1, the planar shape of the main surface 6a is cut off at the portion of the slit. Therefore, by making the planar shape of the main surface 6a continuous in region E1, a structure without a slit or the like is formed.
[0051] The resist layer 8 is a layer that covers the main surface 6a of the substrate 6. The resist layer 8 can prevent solder or the like from adhering to the main surface 6a of the substrate 6 by mistake. The material of the resist layer 8 is not particularly limited, and for example, an epoxy resin or the like can be used. In addition, the thickness of the resist layer 8 is not particularly limited and can be 0 to 150 μm. The resist layer 8 has lower insulation than the coating layer 9 and does not satisfy the specified reference value. For example, the resist layer 8 is less than 10 μm, which is the reference value for insulation.
[0052] In the resist layer 8, an opening 12 is formed that is open with respect to region E1 and the conductor patterns 7A and 7B. In the present embodiment, the opening 12 extends to the outside in the width direction D2 beyond the conductor patterns 7A and 7B. The opening 12 extends along the extending direction D1. In a plan view, the edge portion 12a of the opening 12 extends linearly in a manner parallel to the conductor patterns 7A and 7B. In the opening 12, there is no resist layer 8 in a plan view. Therefore, in the opening 12, the main surface 6a is not covered by the resist layer 8 and is exposed.
[0053] The coating 9 is a member that covers the main surface 6a by being formed in the opening 12. Thus, in at least a part of the region E1 between the pair of conductor patterns 7A and 7B, the coating 9 covers the substrate 6 in a state of being in contact with the substrate 6. In the present embodiment, the coating 9 covers the substrate 6 in the entire region E1 and in a portion outside the conductor patterns 7A and 7B in the width direction D2 in a manner corresponding to the opening 12, and is in contact with the main surface 6a. In addition, by covering the conductor patterns 7A and 7B, the coating 9 is also in contact with the upper surfaces and side surfaces of the conductor patterns 7A and 7B. The upper surface of the coating 9 is disposed at a position higher than the upper surface of the resist layer 8. The coating 9 has higher insulation than the resist layer 8. The material of the coating 9 may be any material having insulation, and is not particularly limited. For example, silicone resin, acrylic resin, etc. may be used. The coating 9 is 10 μm or more as a reference value of insulation. In addition, the coating 9 has higher adhesiveness to the substrate 6 than the resist layer 8. The coating 9 has higher adhesion durability to the substrate 6 after durability than the resist layer 8. In addition, after durability means after using the power supply device 100 for a specified period in the high-temperature and high-humidity environment of the engine room. For example, the adhesion or close adhesion durability of the coating 9 to the substrate 6 is 0.1 [MPa] or more.
[0054] Figure 4 is an enlarged view showing the structure near the end 9a in the width direction D2 of the coating 9. As Figure 4 (a) of shows, the end 9a of the coating 9 can extend to the position of the inner peripheral surface 12b of the opening 12. Thus, the coating 9 has a structure that does not straddle the edge portion 12a of the upper opening 12 of the resist layer 8. In addition, as Figure 4 (b) shows, the end 9a of the coating 9 can extend to the outside in the width direction D2 beyond the inner peripheral surface 12b of the opening 12. Thus, the coating 9 covers the resist layer 8 of the edge portion 12a of the opening 12.
[0055] Refer to Figure 5 to describe the manufacturing method of the substrate structure 1. In addition, Figure 5 The upper parts of (a) and (b) show a top view of the substrate structure 1, and the lower parts show a cross-sectional view of the substrate structure. As Figure 5 (a) of shows, the conductor patterns 7A and 7B are formed on the main surface 6a of the substrate 6. Next, as Figure 5 (b) of shows, a resist layer 8 is formed on the main surface 6a of the substrate 6. At this time, an opening 12 is formed in the resist layer 8. Next, as Figure 3 shown, the coating 9 is formed by filling a coating material in the opening 12.
[0056] Next, the functions and effects of the substrate structure 1 and the power supply device 100 of the present embodiment will be described.
[0057] First, refer toFigure 6 , the substrate structure 200 of Comparative Example 1 will be described. As shown in Figure 6 (a) and (b) of, in the substrate structure 200 of Comparative Example 1, the entire main surface 6a of the substrate 6 is covered with the resist layer 8. Here, when the power supply device is used in the engine room of a vehicle or the like, the electronic substrate is exposed to a high-temperature and high-humidity environment. In this case, the resist layer 8 may peel off from the substrate 6. On the other hand, on the substrate 6, a pair of conductor patterns 7A and 7B with a large voltage difference are formed in an arranged manner. Since the resist layer 8 peels off between the pair of conductor patterns 7A and 7B, and in addition, the resist layer 8 is not a layer made of an insulating material, ionized metal moves along the surface of the substrate 6, causing a migration problem. For this problem, even if the coated area E1 is covered from above the resist layer 8, the same problem occurs. On the other hand, as shown in Figure 6 (c), when migration is suppressed by increasing the separation distance between the conductor patterns 7A and 7B, there is a problem that the size of the substrate structure 200 becomes large.
[0058] Referring to Figure 7 , 8 , the substrate structure 300 of Comparative Example 2 will be described. As shown in Figure 7 , 8 , in the substrate structure 300 of Comparative Example 2, migration is suppressed by providing a slit ST that penetrates the substrate 6 in the region E. As shown in Figure 7 (a) of, a substrate 6 with an increased distance between the conductor patterns 7A and 7B is prepared. As shown in Figure 7 (b) of, a slit ST is formed in the region E1. Here, the slit ST is formed in such a way that the insulation distance between the end of the conductive layer 11 in the substrate 6 and the inner side surface of the slit ST is set to X. However, since the slit ST is formed by machining, the processing cost increases. In addition, in order to ensure the insulation distance, it is necessary to increase the region E1 to a certain extent. Therefore, the substrate size becomes large. In addition, when a high voltage is applied, moisture and the like easily invade from the gaps between the layers of the substrate 6 in the slit ST, and migration may occur. For example, moisture may invade from the gaps between the prepreg materials as the interlayer of the substrate 6, causing migration of the conductive layer 11 as the in-layer pattern.
[0059] In order to reduce the substrate size, as shown in Figure 8 (a) of, a substrate with a short distance between the conductor patterns 7A and 7B is prepared. As shown in Figure 8As shown in (b) thereof, a slit ST is formed in region E1. Here, the conductive layer 11 is exposed on the inner side surface of the slit ST. In this case, since machining of the slit ST is also required, the processing cost increases. In addition, since the conductive layer 11 is exposed on the inner side surface of the slit ST, insulation failure is caused by corrosion or moisture of the conductive layer 11. In addition, there is a problem that the insulation distance in the layer-to-layer (thickness direction) is insufficient. In addition, a substrate structure 400 in which a coating 9 is formed by filling a resin material into the slit ST can also be adopted. However, compared with the method shown in Figure 3 shown, a resin material considering adhesiveness and curability needs to be coated so that it can be filled into the narrow slit ST. In addition, in the structure shown in Figure 7 (b), a coating can also be formed in the slit ST.
[0060] In contrast, the substrate structure 1 of the present embodiment has: a pair of conductor patterns 7A and 7B, which are formed on the main surface 6a of the substrate 6 and are arranged separately from each other. In contrast, in at least a part of the region E1 between the pair of conductor patterns 7A and 7B, a coating 9 having adhesiveness higher than that of the resist layer 8 covers the substrate 6 in a state of being in contact with the substrate 6. According to this structure, even when the resist layer 8 is peeled off from the main surface 6a of the substrate 6, the coating 9 in a state of being in contact with the substrate 6 with high adhesiveness can ensure insulation in the region E1 between the pair of conductor patterns 7A and 8B. Therefore, migration between the pair of conductor patterns 7A and 7B can be suppressed. Thereby, migration can be suppressed.
[0061] It is also possible that openings 12 are formed in the resist layer 8, which are open with respect to at least a part of the region E1 and the conductor patterns 7A and 7B, and the coating 9 is formed in the openings 12. In this case, a wide range including the vicinity of the conductor patterns 7A and 7B can be protected by the coating 9.
[0062] It is also possible that in the region E1 between the pair of conductor patterns 7A and 7B, the planar shape of the main surface 6a of the substrate 6 is continuous from one conductor pattern 7A to the other conductor pattern 7B. Even when the slit ST is not formed in the substrate 6, migration can be suppressed by the coating 9. Compared with the substrate structure 400 in Figure 8 (c), migration can be suppressed while suppressing the processing cost.
[0063] It is also possible that openings 12 are formed in the resist layer 8, which are open with respect to at least a part of the region E1, and the coating 9 covers the resist layer 8 at the edge portion 12a of the openings 12. In this case, the adhesiveness of the boundary portion between the resist layer 8 and the coating 9 can be improved.
[0064] Alternatively, a conductor pattern 7A and another conductor pattern 7B may extend in a parallel manner. In this case, since the separation distance between the conductor patterns 7A and 7B is constant, the same insulation structure can be applied in the extending direction D1 of the conductor patterns 7A and 7B.
[0065] The power supply device 100 of the present embodiment may also have the above-described substrate structure 1.
[0066] According to this power supply device 100, the same functions and effects as those of the above-described substrate structure 1 can be obtained.
[0067] The present invention is not limited to the above-described embodiments.
[0068] For example, the structure shown in Figure 9 may also be adopted. It may also be as shown in Figure 9 (c), where a resist layer 8 covers the conductor patterns 7A and 7B, and an opening 12 that opens at least partially with respect to the region E1 is formed in the resist layer 8, and a coating 9 is formed in the opening 12. In this case, compared with the case where the conductor patterns 7A and 7B are covered by the coating 9, the amount of the coating 9 can be suppressed.
[0069] In addition, during manufacturing, as shown in Figure 9 (a), the conductor patterns 7A and 7B are formed on the main surface 6a of the substrate 6. Then, as shown in Figure 9 (b), a resist layer 8 is formed on the main surface 6a of the substrate 6 and on the conductor patterns 7A and 7B. At this time, an opening 12 is formed in the resist layer 8. Then, as shown in Figure 9 (c), the coating 9 is formed by filling a coating material in the opening 12.
[0070] Figure 9 (d) and (e) of Figure 9 are enlarged views showing the structure near the end 9a of the coating 9. It may also be as shown in Figure 9 (d), where the end 9a of the coating 9 extends to the position of the inner peripheral surface 12b of the opening 12. Thus, the coating 9 has a structure that does not straddle the edge 12a of the opening 12 of the resist layer 8. In addition, it may also be as shown in
[0071] (e), where the end 9a of the coating 9 extends to the side of the conductor pattern 7B further than the inner peripheral surface 12b of the opening 12. Thus, the coating 9 covers the resist layer 8 at the edge 12a of the opening 12. Figure 10 The structure shown in Figure 10As shown in FIGS. (b) and (c), in the resist layer 8, a first opening 12A is formed which opens at a position on one side of the conductor pattern 7A in the region E1; and a second opening 12B is formed which opens at a position on the other side of the conductor pattern 7B in the region E1. The resist layer 8 remains between the first opening 12A and the second opening 12B. Further, in Figure 10 , in the resist layer 8, the portion remaining between the openings 12A and 12B is denoted as the remaining portion 8a. The coating 9 may also be formed on the first opening 12A and the second opening 12B. As Figure 10 shown in FIG. (a), with respect to the substrate 6, a resist layer 8 is formed, and openings 12A and 12B are formed in the resist layer 8. In contrast, in Figure 10 FIG. (b), the coating 9 is formed so as to cover the openings 12A and 12B together. In Figure 10 FIG. (c), the coating 9 is formed separately with respect to the respective openings 12A and 12B. In this case, by leaving the resist layer 8 between the conductor patterns 7A and 7B, adhesion of solder to the main surface 6a of the substrate 6 can be suppressed.
[0072] The structure shown in Figure 11 may also be adopted. As Figure 11 shown in FIG. (b), the resist layer 8 may cover a part of the conductor pattern 7A. The opening 12 is provided with respect to the region E1 and the conductor patterns 7A and 7B. A part of the conductor pattern 7A is covered by the covering portion 13 of the resist layer 8. As Figure 11 shown in FIG. (a), with respect to the substrate 6, a resist layer 8 is formed, the resist layer 8 forms an opening 12, and has a covering portion 13. In contrast, as Figure 11 shown in FIG. (b), the coating 9 is formed with respect to the opening 12 and the covering portion 13.
[0073] The structure shown in Figure 12 may also be adopted. As Figure 12 shown in FIG. (b), one conductor pattern 7A is not a linear pattern but a pattern of an entire plane that extends planar. The resist layer 8 is formed so as to cover the planar conductor pattern 7A and the linear conductor pattern 7B. The opening 12 is provided near the end portions in the width direction of the region E1 and the conductor pattern 7A. As Figure 12 shown in FIG. (a), a planar conductor pattern 7A and a linear conductor pattern 7B are formed with respect to the substrate 6, and a resist layer 8 having an opening 12 is formed. In contrast, as Figure 12 shown in FIG. (b), the coating 9 is formed with respect to the opening 12.
[0074] The structure shown in Figure 13 may also be adopted. Figure 13The structure shown, except that another conductor pattern 7B is not covered by the resist layer 8, is the same as Figure 12 the structure shown. As shown in Figure 13 (b) of, the opening 12 is provided with respect to another conductor pattern 7B. Thus, the coating 9 covers another conductor pattern 7B and the main surface 6a around it.
[0075] The structure shown in Figure 14 may also be adopted. Figure 14 The structure shown, except that the end of one conductor pattern 7A is also covered by the resist layer 8, is the same as Figure 12 the structure shown. As shown in Figure 14 (b) of, the opening 12 is provided with respect to the main surface 6a of a part of the region E1. The resist layer 8 covers the entire planar conductor pattern 7A and the entire linear conductor pattern 7B.
[0076] The structure shown in Figure 15 may also be adopted. As shown in Figure 15 (b) of, the two conductor patterns 7A and 7B are not linear patterns, but patterns of the entire surface that expand planar. The resist layer 8 is formed so as to cover the planar conductor patterns 7A and 7B. The opening 12 is provided with respect to the region E1 and near the ends in the width direction of the conductor patterns 7A and 7B. As shown in Figure 15 (a) of, with respect to the substrate 6, planar conductor patterns 7A and 7B are formed, and a resist layer 8 having an opening 12 is formed. In contrast, as shown in Figure 15 (b) of, a coating 9 is formed with respect to the opening 12.
[0077] The structure shown in Figure 16 may also be adopted. Figure 16 The structure shown, except that the ends of the conductor patterns 7A and 7B on both sides are covered by the resist layer 8, is the same as Figure 15 the structure shown. As shown in Figure 15 (b) of, the opening 12 is provided with respect to the main surface 6a of a part of the region E1. The resist layer 8 covers the entire planar conductor patterns 7A and 7B.
[0078] The structure shown in Figure 17 may also be adopted. Figure 17 The structure shown, except that only the end of one conductor pattern 7A is covered by the resist layer 8, is the same as Figure 12 the structure shown. As shown in Figure 17As shown in FIG. (b), the opening 12 is provided near the main surface 6a of a part of the region E1 and the end of the other conductor pattern 7B. The resist layer 8 covers the entire planar conductor pattern 7A and the part other than the end of the planar conductor pattern 7B.
[0079] In the above-described embodiment, as the power supply device, the case where it is disposed in the engine room of an automobile or the like has been described. However, the installation location of the power supply device is not particularly limited, and it may also be disposed in the vehicle interior or the like. In addition, as the device having a substrate structure, a power supply device including a DC / DC converter has been exemplified, but it is not particularly limited, and it may also be adopted in devices such as an inverter device and a charger device.
[0080] [Mode 1]
[0081] A substrate structure, wherein
[0082] comprises:
[0083] a substrate;
[0084] a pair of conductor patterns formed on the main surface of the substrate and arranged separately from each other; and
[0085] a resist layer covering the main surface of the substrate,
[0086] a coating having a higher adhesiveness than the resist layer covers the substrate in a state of being in contact with the substrate at at least a part of the region between the pair of conductor patterns.
[0087] [Mode 2]
[0088] The substrate structure according to Mode 1, wherein
[0089] an opening that opens with respect to at least a part of the region and the conductor pattern is formed in the resist layer, and the coating is formed in the opening.
[0090] [Mode 3]
[0091] The substrate structure according to Mode 1, wherein
[0092] the resist layer covers the conductor pattern,
[0093] an opening that opens with respect to at least a part of the region is formed in the resist layer, and the coating is formed in the opening.
[0094] [Mode 4]
[0095] The substrate structure according to Mode 1 or 2, wherein
[0096] formed in the resist layer are:
[0097] The first opening that opens at a position on one side of the conductor pattern in the region; and
[0098] The second opening that opens at a position on the other side of the conductor pattern in the region,
[0099] The resist layer remains between the first opening and the second opening,
[0100] The coating is formed on the first opening and the second opening.
[0101] [Mode 5]
[0102] According to the substrate structure described in any one of Modes 1 to 4, wherein,
[0103] In the region between a pair of the conductor patterns, from one conductor pattern to the other conductor pattern, the planar shape of the main surface of the substrate is continuous.
[0104] [Mode 6]
[0105] According to the substrate structure described in any one of Modes 1 to 5, wherein,
[0106] In the resist layer, an opening that opens at least in part of the region is formed, and the coating covers the resist layer at the edge of the opening.
[0107] [Mode 7]
[0108] According to the substrate structure described in any one of Modes 1 to 6, wherein,
[0109] One of the conductor patterns and the other conductor pattern extend in a parallel manner.
[0110] [Mode 8]
[0111] A power supply device, wherein,
[0112] It has the substrate structure described in any one of Modes 1 to 7.
[0113] Explanation of symbols
[0114] 1... Substrate structure, 6... Substrate, 6a... Main surface, 7A, 7B... Conductor patterns, 8... Resist layer, 9... Coating, 12... Opening, 12A... First opening, 12B... Second opening, 100... Power supply device.
Claims
1. A substrate structure, wherein: Comprising: A substrate; A pair of conductor patterns formed on the main surface of the substrate and arranged separately from each other; and A resist layer covering the main surface of the substrate, In at least a part of the region between the pair of conductor patterns, a coating having higher adhesiveness than the resist layer covers the substrate in a state of contacting the substrate.
2. The substrate structure according to claim 1, wherein: In the resist layer, an opening is formed that is open to at least a part of the region and the conductor pattern, and the coating is formed in the opening.
3. The substrate structure according to claim 1, wherein: The resist layer covers the conductor pattern, In the resist layer, an opening is formed that is open to at least a part of the region, and the coating is formed in the opening.
4. The substrate structure according to claim 1, wherein: In the resist layer, there are formed: A first opening that is open at a position on one side of the conductor pattern in the region; And A second opening that is open at a position on the other side of the conductor pattern in the region, The resist layer remains between the first opening and the second opening, The coating is formed in the first opening and the second opening.
5. The substrate structure according to claim 1, wherein: In the region between the pair of conductor patterns, from one conductor pattern to the other conductor pattern, the planar shape of the main surface of the substrate is continuous.
6. The substrate structure according to claim 1, wherein: In the resist layer, an opening is formed that is open to at least a part of the region, and the coating covers the resist layer at the edge of the opening.
7. The substrate structure according to claim 1, wherein: One conductor pattern and the other conductor pattern extend in a parallel manner.
8. A power supply device, wherein: It has the substrate structure according to any one of claims 1 to 7.
Citation Information
Patent Citations
Structure of small capacity telephone exchange
JP2001024344A