Quasi-threshold voltage acquisition method, quasi-threshold voltage acquisition circuit and junction temperature monitoring method of power semiconductor device

Abstract

The invention discloses a quasi-threshold voltage acquisition method, a quasi-threshold voltage acquisition circuit and a junction temperature monitoring method of a power semiconductor device, and belongs to the technical field of power semiconductor devices. The quasi-threshold voltage acquisition method comprises the following steps: acquiring a target voltage between a control end of a power semiconductor device and a first current input end under the condition that an induced voltage generated by a parasitic inductor between the first current input end and a second current input end of the power semiconductor device is greater than a reference voltage; taking the target voltage as a quasi threshold voltage; wherein the quasi threshold voltage is used as a threshold voltage in a threshold voltage method for monitoring the junction temperature of the power semiconductor device; the quasi-threshold voltage is greater than the minimum gate voltage required for forming a conductive channel of the power semiconductor device and is less than the gate voltage corresponding to the Miller platform. By using the technical scheme provided by the invention, the accuracy of quasi-threshold voltage acquisition can be improved, and the accuracy and reliability of junction temperature monitoring of the power semiconductor device are further improved.

Description

Technical Field

[0001] The present invention relates to the technical field of power semiconductor devices, and particularly to a method for collecting a quasi-threshold voltage of a power semiconductor device, a quasi-threshold voltage collection circuit, and a junction temperature monitoring method. Background Art

[0002] In the application of power semiconductor devices, the junction temperature is a key parameter. The junction temperature refers to the actual temperature inside the device when the device is in the working state. In power semiconductor devices, the junction temperature is a key indicator for measuring the reliability of power semiconductor devices. An excessively high junction temperature will affect the performance, lifespan, and reliability of power semiconductor devices.

[0003] Power semiconductor devices include Press Pack-Insulated Gate Bipolar Transistors (PP-IGBTs). A Press Pack-IGBT is an IGBT device in which internal chips are electrically connected to external electrodes by applying pressure. Press Pack-IGBTs have advantages such as high reliability, high capacity, double-sided heat dissipation, and a fail short mode, and are widely used in fields such as industrial control, smart grids, consumer electronics, and new energy vehicles. However, due to the mismatch of the thermal expansion coefficients between different materials in Press Pack-IGBTs, micro-movement wear may occur in Press Pack-IGBTs when the temperature changes. Long-term operation may cause damage to the contact surface, resulting in uneven pressure and a short-circuit phenomenon, affecting the reliability of the device. Therefore, accurate measurement and control of the junction temperature of Press Pack-IGBTs are crucial for ensuring the stable operation of the device and extending its service life.

[0004] In the prior art, methods for measuring the junction temperature of Press Pack-IGBTs include: integrating a temperature sensor in the chip, integrating a temperature sensor (such as a diode) inside the IGBT chip, and estimating the junction temperature by monitoring the voltage change of the diode. This method has high requirements for the chip processing technology. The temperature-sensitive electrical parameter method uses the characteristic that the electrical parameters (such as the collector-emitter voltage) of the IGBT chip change with temperature to indirectly measure the junction temperature. This method has low cost, fast response, is easy for online detection and integration. Fiber optic temperature sensors use fiber Bragg gratings or distributed fiber optic temperature sensors based on Brillouin scattering to measure temperature. This method can perform multi-point temperature extraction and measurement of two-dimensional temperature distribution, but it needs to be in contact with the chip and is greatly affected by temperature, resulting in affected measurement accuracy. Non-contact temperature testing: such as infrared imaging method, estimating the surface temperature by measuring the infrared energy radiated from the surface of the device. Due to the limitation of the device packaging structure, this method requires destroying the packaging to perform the measurement.

[0005] In summary, due to its non-destructive, low-cost, and easy-to-integrate characteristics, the temperature-sensitive electrical parameter method has become the preferred method for measuring the junction temperature of press-fit IGBTs. The threshold voltage, as a temperature-sensitive electrical parameter commonly used to measure press-fit IGBTs, has good sensitivity. However, the traditional threshold voltage method usually needs to be measured under the static state of the device and may not be able to capture the temperature changes of the device under actual dynamic operating conditions. Therefore, a more reliable solution is needed for junction temperature monitoring of power semiconductor devices. Summary of the Invention

[0006] The object of the present invention is to overcome the deficiencies in the prior art and provide a method for collecting the quasi-threshold voltage of a power semiconductor device, a quasi-threshold voltage collection circuit, and a junction temperature monitoring method, which can improve the accuracy and real-time performance of quasi-threshold voltage collection, and further improve the accuracy and reliability of junction temperature monitoring of power semiconductor devices, so as to extend the service life of power semiconductor devices.

[0007] To achieve the above object, the present invention is implemented by adopting the following technical solutions:

[0008] On the one hand, the present invention provides a method for collecting the quasi-threshold voltage of a power semiconductor device, and the method includes:

[0009] When the induced voltage generated by the parasitic inductance between the first current input terminal and the second current input terminal of the power semiconductor device is greater than the reference voltage, obtain the target voltage between the control terminal of the power semiconductor device and the first current input terminal;

[0010] Take the target voltage as the quasi-threshold voltage; wherein, the quasi-threshold voltage is used as the threshold voltage in the threshold voltage method for junction temperature monitoring of the power semiconductor device; the quasi-threshold voltage is greater than the minimum gate voltage required to form the conductive channel of the power semiconductor device and less than the gate voltage corresponding to the Miller plateau.

[0011] In some possible implementation manners, when the induced voltage generated by the parasitic inductance between the first current input terminal and the second current input terminal of the power semiconductor device is greater than the reference voltage, obtaining the target voltage between the control terminal of the power semiconductor device and the first current input terminal further includes:

[0012] Receive a driving signal for driving the power semiconductor device to conduct;

[0013] When the driving signal is valid and the induced voltage is greater than the reference voltage, obtain the target voltage.

[0014] On the other hand, a quasi-threshold voltage acquisition circuit for a power semiconductor device is provided. The circuit performs quasi-threshold voltage acquisition by using the quasi-threshold voltage acquisition method of the power semiconductor device described above. The circuit includes: a circuit driving module, a voltage generating module, an acquisition triggering module, and a voltage acquisition module; the voltage generating module includes the power semiconductor device; the acquisition triggering module includes a comparator and a data trigger;

[0015] One end of the circuit driving module is respectively connected to the control end of the power semiconductor device and the first input end of the data trigger; the first current input end of the power semiconductor device is connected to the first input end of the comparator; the output end of the comparator is connected to the second input end of the data trigger; the output end of the data trigger is connected to the first input end of the voltage acquisition module; the second input end of the voltage acquisition module is connected to the control end of the power semiconductor device;

[0016] The circuit driving module is used to drive the power semiconductor device to conduct;

[0017] The voltage generating module is used to generate the induced voltage through the power semiconductor device when the power semiconductor device is conducting;

[0018] The acquisition triggering module is used to trigger the voltage acquisition module to acquire the quasi-threshold voltage through the data trigger based on the driving signal sent by the circuit driving module and the output result of the comparator comparing the induced voltage with the reference voltage;

[0019] The voltage acquisition module is used to acquire the quasi-threshold voltage.

[0020] In some possible implementation manners, the circuit driving module includes a gate driving unit, a first resistor, and a first diode; one end of the gate driving unit is respectively connected to one end of the first resistor and the input end of the first diode, the other end of the first resistor is connected to the control end of the power semiconductor device, and the output end of the first diode is connected to the first input end of the acquisition triggering module.

[0021] In some possible implementation manners, the first current input end of the power semiconductor device is connected to the second current input end of the power semiconductor device, and there is a parasitic inductance between the first current input end and the second current input end.

[0022] In some possible embodiments, the acquisition trigger module further includes a second resistor and a reference voltage adjustment circuit. The second input terminal of the comparator is connected to one end of the second resistor; the other end of the second resistor is connected to the reference voltage adjustment circuit, and the first input terminal of the data trigger is connected to the output terminal of the first diode.

[0023] In some possible embodiments, the voltage acquisition module includes an acquirer. The first input terminal of the acquirer is connected to the output terminal of the data trigger, and the second input terminal of the acquirer is connected to the control terminal of the power semiconductor device.

[0024] On the other hand, a method for monitoring the junction temperature of a power semiconductor device is provided. The method includes:

[0025] Acquire the quasi-threshold voltage by using the quasi-threshold voltage acquisition method of the power semiconductor device described above;

[0026] Use the quasi-threshold voltage as the threshold voltage in the threshold voltage method to monitor the junction temperature of the power semiconductor device.

[0027] On the other hand, an electronic device is provided. The device includes a processor and a memory. At least one instruction and at least one program segment are stored in the memory. The at least one instruction and the at least one program segment are loaded and executed by the processor to implement the quasi-threshold voltage acquisition method of the power semiconductor device or the junction temperature monitoring method of the power semiconductor device described above.

[0028] On the other hand, a computer-readable storage medium is provided. At least one instruction and at least one program segment are stored in the computer storage medium. The at least one instruction and the at least one program segment are loaded and executed by a processor to implement the quasi-threshold voltage acquisition method of the power semiconductor device or the junction temperature monitoring method of the power semiconductor device described above.

[0029] Compared with the prior art, the beneficial effects achieved by the present invention:

[0030] In the present invention, when the induced voltage generated by the parasitic inductance between the first current input terminal and the second current input terminal of the power semiconductor device is greater than the reference voltage, the target voltage between the control terminal and the first current input terminal of the power semiconductor device is obtained, and the target voltage is used as the quasi-threshold voltage. The quasi-threshold voltage can be used as the threshold voltage in the threshold voltage method for monitoring the junction temperature of the power semiconductor device. The quasi-threshold voltage can be collected in real time during the device switching process, improving the accuracy and reliability of the quasi-threshold voltage collection. Moreover, the quasi-threshold voltage method can provide temperature feedback under the actual working state of the device, thereby improving the accuracy and reliability of the junction temperature monitoring of the power semiconductor device, enhancing the performance of the power semiconductor device and extending the service life of the power semiconductor device.

[0031] In the present invention, the quasi-threshold voltage of the power semiconductor device can be collected by the quasi-threshold voltage collection circuit of the power semiconductor device using the above-mentioned quasi-threshold voltage collection method of the power semiconductor device. The circuit includes a circuit driving module, a voltage generating module, a collection triggering module, and a voltage collection module; the voltage generating module includes the power semiconductor device; the collection triggering module includes a comparator and a data trigger; the circuit driving module can drive the power semiconductor device to conduct, and the voltage generating module can generate an induced voltage through the power semiconductor device when the power semiconductor device conducts; the collection triggering module can trigger the voltage collection module to collect the quasi-threshold voltage through the data trigger based on the driving signal sent by the circuit driving module and the output result of the comparator comparing the induced voltage with the reference voltage. It can quickly respond to the device temperature change based on the induced voltage when the power semiconductor device is turned on, making the response rapid and suitable for scenarios with fast thermal response; the temperature sensitivity of the junction temperature monitoring based on the quasi-threshold voltage can be changed by adjusting the reference voltage of the comparator to adapt to different measurement requirements and different working environments of the power semiconductor device; the induced voltage signal can be latched by the data trigger to avoid the risk of false triggering caused by voltage oscillation or noise during the switching transient process, improving the accuracy and reliability of the quasi-threshold voltage collection, and further improving the accuracy and robustness of the junction temperature monitoring.

[0032] In the present invention, by collecting the quasi-threshold voltage using the above-mentioned quasi-threshold voltage collection method of the power semiconductor device and using the quasi-threshold voltage as the threshold voltage in the threshold voltage method to monitor the junction temperature of the power semiconductor device, temperature feedback can be provided in real time under the actual working state of the device, improving the accuracy and reliability of the junction temperature monitoring of the power semiconductor device. Description of the Drawings

[0033] To more clearly illustrate the technical solutions and advantages in the embodiments of the present invention or the prior art, the following will briefly introduce the accompanying drawings required in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.

[0034] Figure 1 is a schematic flowchart of a method for collecting the quasi-threshold voltage of a power semiconductor device provided by an embodiment of the present invention;

[0035] Figure 2 is a schematic structural diagram of a circuit for collecting the quasi-threshold voltage of a power semiconductor device provided by an embodiment of the present invention;

[0036] Figure 3 is a schematic flowchart of a method for monitoring the junction temperature of a power semiconductor device provided by an embodiment of the present invention;

[0037] Figure 4 is a schematic diagram of a quasi-threshold voltage - junction temperature curve provided by an embodiment of the present invention;

[0038] Figure 5 is a schematic structural diagram of a device for collecting the quasi-threshold voltage of a power semiconductor device provided by an embodiment of the present invention;

[0039] Figure 6 is a schematic structural diagram of a device for monitoring the junction temperature of a power semiconductor device provided by an embodiment of the present invention;

[0040] Reference numerals: 100 - circuit driving module; 101 - gate driving unit; 102 - first resistor; 103 - first diode; 200 - voltage generating module; 201 - power semiconductor device; 2011 - first current input terminal; 2012 - second current input terminal; 300 - acquisition triggering module; 301 - comparator; 302 - data trigger; 303 - second resistor; 400 - voltage acquisition module; 401 - voltage acquirer. Detailed implementation manners

[0041] In order to enable those skilled in the art of the present technology to better understand the technical solutions in the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0042] It should be noted that in the description of the present invention, the claims and the above-mentioned drawings, the terms "first", "second", etc. are used to distinguish similar objects, and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present invention described here can be implemented in an order other than those illustrated or described here. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or server that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0043] In the embodiments of the present invention, the term "module" or "unit" refers to a computer program with a predetermined function or a part of a computer program, which works together with other related parts to achieve a predetermined goal, and can be implemented in whole or in part by using software, hardware (such as a processing circuit or a memory), or a combination thereof. Similarly, one processor (or multiple processors or memories) can be used to implement one or more modules or units. In addition, each module or unit can be a part of the overall module or unit that includes the function of that module or unit.

[0044] Hereinafter, various exemplary embodiments, features and aspects of the present invention will be described in detail with reference to the drawings. The same reference numerals in the drawings denote elements having the same or similar functions. Although various aspects of the embodiments are shown in the drawings, the drawings do not have to be drawn to scale unless otherwise specified.

[0045] The special term "exemplary" used here means "serving as an example, an embodiment or an illustration". Any embodiment described here as "exemplary" does not have to be construed as superior to or better than other embodiments.

[0046] In this article, the term "and / or" only describes the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the term "at least one" in this article means any one of a plurality or any combination of at least two of a plurality. For example, including at least one of A, B, and C can represent any one or more elements selected from the set composed of A, B, and C.

[0047] In addition, for a better description of the present invention, numerous specific details are given in the following specific embodiments. Those skilled in the art should understand that the present invention can also be implemented without some specific details. In some instances, methods, means, elements and circuits well-known to those skilled in the art are not described in detail in order to highlight the gist of the present invention.

[0048] Figure 1 This is a schematic flowchart of a method for collecting the quasi-threshold voltage of a power semiconductor device provided by an embodiment of the present invention. This specification provides method operation steps such as in the embodiment or flowchart, but based on routine or non-creative labor, more or fewer operation steps may be included. The step order listed in the embodiment is only one way among the execution orders of numerous steps and does not represent the only execution order. When the actual system or server product executes, it can be executed in the order of the method shown in the embodiment or the drawings or executed in parallel (for example, in an environment of parallel processors or multi-threaded processing). Specifically, as Figure 1 shown, the above method may include:

[0049] S101: When the induced voltage generated by the parasitic inductance between the first current input terminal and the second current input terminal of the power semiconductor device is greater than the reference voltage, obtain the target voltage between the control terminal and the first current input terminal of the power semiconductor device;

[0050] In a specific embodiment, the power semiconductor device can be an electronic device directly used in the main circuit for processing electric energy to realize the conversion or control of electric energy; optionally, the power semiconductor device can include Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), press-pack IGBT, etc. Optionally, when the power semiconductor device is a press-pack IGBT, the first current input terminal of the power semiconductor device can be the emitter of the press-pack IGBT, the second current input terminal of the power semiconductor device can be the Kelvin emitter of the press-pack IGBT, and when the power semiconductor device is a press-pack IGBT, the control terminal of the power semiconductor device can be the gate of the press-pack IGBT;; when the power semiconductor device is a MOSFET, the first current input terminal of the power semiconductor device can be the source of the MOSFET, the second current input terminal of the power semiconductor device can be the Kelvin source of the MOSFET, and when the power semiconductor device is a MOSFET, the control terminal of the power semiconductor device can be the gate of the MOSFET. Optionally, the reference voltage can be set in combination with the actual measurement requirements and the actual working environment of the power semiconductor device.

[0051] In a specific embodiment, a voltage is generated by the parasitic inductance between the Kelvin emitter E` and the emitter E of the press-pack IGBT. When the device current di CEvaries with the increase of / dt, there is a rising-edge voltage, and under this condition, the gate-emitter voltage of the press-fit IGBT can be obtained. Optionally, a parasitic inductance between the Kelvin source S` and the source S of the MOSFET generates a voltage when the device current di DS varies with the increase of / dt, there is a rising-edge voltage, and under this condition, the gate-source voltage of the MOSFET can be obtained.

[0052] Optionally, the induced voltage on the parasitic inductance between the first current input terminal and the second current input terminal is a direct result of the change in the device current and can quickly reflect the switching state of the device. Therefore, when the device temperature changes and causes a change in the device switching characteristics, the induced voltage on the parasitic inductance will respond quickly; so when the induced voltage generated by the parasitic inductance is greater than the reference voltage when the power semiconductor device is turned on, obtaining the target voltage can quickly respond to the change in the device temperature and is applicable to application scenarios that require fast thermal response.

[0053] S102: Take the target voltage as the quasi-threshold voltage; where the quasi-threshold voltage is used as the threshold voltage in the threshold voltage method for monitoring the junction temperature of the power semiconductor device; the quasi-threshold voltage is greater than the minimum gate voltage required to form the conductive channel of the power semiconductor device and less than the gate voltage corresponding to the Miller plateau.

[0054] In a specific embodiment, the quasi-threshold voltage can be a specific voltage corresponding to the start of the conduction current flow during the transient conduction of the power semiconductor device; optionally, the quasi-threshold voltage is generally after the threshold voltage and before the Miller plateau. The threshold voltage can be the minimum gate voltage required for the power semiconductor device to start forming a conductive channel, and the Miller plateau can be a phenomenon where the gate voltage remains relatively stable at a certain stage during the switching process of the power semiconductor device. Optionally, the quasi-threshold voltage has a negative temperature coefficient. As the temperature increases, the quasi-threshold induced voltage is low. Therefore, the quasi-threshold voltage can be used as a temperature-sensitive parameter to monitor the junction temperature of the power semiconductor device.

[0055] In an alternative embodiment, when the induced voltage generated by the parasitic inductance between the first current input terminal and the second current input terminal of the power semiconductor device is greater than the reference voltage, obtaining the target voltage between the control terminal and the first current input terminal of the power semiconductor device further includes:

[0056] Receiving a drive signal for driving the power semiconductor device to conduct;

[0057] Obtaining the target voltage when the drive signal is valid and the induced voltage is greater than the reference voltage.

[0058] In a specific embodiment, when the driving signal is valid and the induced voltage is greater than the reference voltage, the target voltage is obtained and used as the quasi-threshold voltage, which can suppress the noise interference in the static or non-switching state, avoid incorrect signal acquisition, improve the accuracy and reliability of the quasi-threshold voltage acquisition, and further improve the accuracy and reliability of the junction temperature monitoring of the power semiconductor device.

[0059] In an alternative embodiment, Figure 2 FIG. is a schematic structural diagram of a quasi-threshold voltage acquisition circuit for a power semiconductor device provided by an embodiment of the present invention; this circuit is used to acquire the quasi-threshold voltage. Optionally, this circuit can use the quasi-threshold voltage acquisition method of the power semiconductor device described above to acquire the quasi-threshold voltage; as Figure 2 shown, this circuit includes a circuit driving module 100, a voltage generating module 200, an acquisition triggering module 300, and a voltage acquisition module 400; the voltage generating module 200 includes a power semiconductor device 201; the acquisition triggering module 300 includes a comparator 301 and a data trigger 302;

[0060] One end of the circuit driving module 100 is respectively connected to the control end of the power semiconductor device 201 and the first input end of the data trigger 302; the first current input end 2011 of the power semiconductor device 201 is connected to the first input end of the comparator 301; the output end of the comparator is connected to the second input end of the data trigger 302; the output end of the data trigger 302 is connected to the first input end of the voltage acquisition module 400; the second input end of the voltage acquisition module 400 is connected to the control end of the power semiconductor device 201;

[0061] The circuit driving module 100 is used to drive the power semiconductor device 201 to conduct;

[0062] The voltage generating module 200 is used to generate an induced voltage through the power semiconductor device 201 when the power semiconductor device 201 is conducting;

[0063] The acquisition triggering module 300 is used to trigger the voltage acquisition module 400 to acquire the quasi-threshold voltage through the data trigger 302 based on the driving signal sent by the circuit driving module 100 and the output result of the comparator 301 comparing the induced voltage with the reference voltage;

[0064] The voltage acquisition module 400 is used to acquire the quasi-threshold voltage.

[0065] In an alternative embodiment, the circuit driving module 100 includes a gate driving unit 101, a first resistor 102, and a first diode 103; one end of the gate driving unit 101 is respectively connected to one end of the first resistor 102 and the input end of the first diode 103, the other end of the first resistor 102 is connected to the control end of the power semiconductor device 201, and the output end of the first diode 103 is connected to the first input end of the acquisition trigger module.

[0066] In a specific embodiment, the gate driving unit 101 can be used to send driving signals for turning on or off the power semiconductor device. The first resistor 102 can be used to suppress the voltage oscillation that may be caused by parasitic inductance during the on or off process of the device; it can limit the driving current and protect the control end of the power semiconductor device. Specifically, the first resistor 102 is a gate resistor. The first diode 103 can be used to ensure the unidirectionality of the driving signal transmission, flowing from the gate driving unit 101 to the data trigger 302, and can block the noise interference of other circuits, ensuring the stability of the signal received by the data trigger 302, thereby improving the reliability, robustness, and anti-interference ability of the circuit.

[0067] Optionally, the other end of the gate driving unit 101 can be connected to a PWM (Pulse Width Modulation), and the PWM can be used to provide a stable control signal to the gate driving unit 101 to control the gate driving unit 101, and further control the on-off state of the power semiconductor device 201.

[0068] Optionally, the output end of the first diode 103 is also connected to one end of a third resistor, and the other end of the third resistor is grounded. The third resistor can play a role in voltage division and current limiting protection of the voltage signal output by the gate driving unit 101, thereby ensuring the stability and reliability of the circuit.

[0069] In an alternative embodiment, the first current input end 2011 of the power semiconductor device 201 is connected to the second current input end 2012 of the power semiconductor device, and there is parasitic inductance between the first current input end 2011 and the second current input end 2012.

[0070] In a specific embodiment, the conduction current can flow through the first current input end 2011 and the second current input end 2012 of the power semiconductor device 201 to other circuits.

[0071] In a specific embodiment, the output terminal of the power semiconductor device 201 can be connected to a power supply. The power semiconductor device 201 can serve as a switching device of the circuit to control the on / off of the circuit. Optionally, when the power semiconductor device 201 is a press-pack IGBT, the output terminal of the power semiconductor device 201 can be the collector of the press-pack IGBT; when the power semiconductor device 201 is a MOSFET, the output terminal of the power semiconductor device 201 can be the drain of the MOSFET.

[0072] The voltage generation module 200 further includes a second diode. The second current input terminal 2012 of the power semiconductor device 201 is connected to the input terminal of the second diode, and the output terminal of the second diode is connected to the power supply. The second diode can be used to prevent reverse current from flowing through the circuit, protecting the power semiconductor device 201 and other circuit components; it can also be used to suppress the transient voltage that appears in the circuit, protecting the components from damage.

[0073] In an alternative embodiment, the acquisition trigger module 300 further includes a second resistor 303 and a reference voltage adjustment circuit. The second input terminal of the comparator 301 is connected to one end of the second resistor 303; the other end of the second resistor 303 is connected to the reference voltage adjustment circuit, and the first input terminal of the data trigger 302 is connected to the output terminal of the first diode 103.

[0074] In an alternative embodiment, the voltage acquisition module 400 includes an acquirer 401. The first input terminal of the acquirer 401 is connected to the output terminal of the data trigger 302, and the second input terminal of the acquirer 401 is connected to the control terminal of the power semiconductor device 201.

[0075] In a specific embodiment, the comparator 301 is used to compare the induced voltage and the reference voltage. It can adjust the reference voltage in combination with the reference voltage adjustment circuit, changing the temperature sensitivity of device junction temperature monitoring based on the quasi-threshold voltage, and thus can adapt to different monitoring requirements and working environments. The reference voltage adjustment circuit can be used to adjust the reference voltage. Optionally, the other end of the second resistor 303 can be connected to the power supply, and the reference voltage can be changed by connecting to different power supplies. The second resistor 303 can play a role in voltage division and current limiting protection of the voltage output by the reference voltage adjustment circuit, thereby ensuring the stability and reliability of the circuit.

[0076] The data trigger 302 can be used to trigger the output of the voltage acquisition module based on the output result compared by the comparator 301 and the drive signal sent by the gate drive unit 101. Optionally, the data trigger 302 can latch the output result compared by the comparator 301 to ensure that when the drive signal sent by the gate drive unit 101 is valid and the parasitic inductance induced voltage exceeds the reference voltage, the output of the voltage acquisition module 400 is triggered. And the data trigger 302 can avoid false triggering caused by voltage oscillation or noise during the switching transient process, so as to normally trigger the collector to collect the quasi-threshold voltage, improve the accuracy and reliability of the quasi-threshold voltage acquisition, and further improve the accuracy and reliability of the junction temperature monitoring. Optionally, the data trigger 302 can be a D trigger.

[0077] Optionally, the acquisition trigger module 300 further includes a third diode. The input end of the third diode is connected to one end of the second resistor 303, and the output end of the third diode is grounded. The third diode can be used to protect the second input end of the comparator from being impacted by too high or too low voltages; it can limit the voltage amplitude transmitted to the second input end of the comparator through the second voltage to ensure that the voltage does not exceed the range that the comparator can safely process.

[0078] In a specific embodiment, the collector 401 can be used to collect the quasi-threshold voltage. Optionally, the collector can be an analog-to-digital converter (ADC). Optionally, the output end of the collector 401 can be connected to the microprocessor, and the microprocessor can be used to analyze and process the quasi-threshold voltage.

[0079] In a specific embodiment, the quasi-threshold voltage acquisition circuit of the above power semiconductor device can use the quasi-threshold voltage acquisition method of the above power semiconductor device to collect the quasi-threshold voltage, which can include:

[0080] The circuit drive module sends a drive signal to drive the power semiconductor device to conduct;

[0081] When the power semiconductor device is conducting, a parasitic inductance induced voltage is generated between the first current input end and the second current input end of the power semiconductor device;

[0082] The data trigger, based on the drive signal sent by the circuit drive module and the output result of the comparator comparing the induced voltage with the reference voltage, triggers the voltage acquisition module to collect the quasi-threshold voltage;

[0083] The voltage acquisition module collects the quasi-threshold voltage.

[0084] In a specific embodiment, the quasi-threshold voltage acquisition circuit of the above power semiconductor device acquires the quasi-threshold voltage by using the quasi-threshold voltage acquisition method of the above power semiconductor device, and may further include:

[0085] The gate drive unit sends a drive signal, and the drive signal flows into the power semiconductor device via a first resistor to drive the power semiconductor device to conduct;

[0086] When the power semiconductor device is conducting, an induced voltage is generated across the parasitic inductance between the first current input terminal and the second current input terminal of the power semiconductor device;

[0087] The comparator compares the induced voltage with a reference voltage. When the induced voltage is greater than the reference voltage, the comparator outputs a high level; wherein, the reference voltage is determined based on a reference voltage adjustment circuit;

[0088] When the output result of the comparator is a high level and the drive signal is a high level, the data flip-flop outputs a high level to trigger the acquirer to acquire the quasi-threshold voltage;

[0089] The acquirer acquires the quasi-threshold voltage.

[0090] In a specific embodiment, a voltage is generated across the parasitic inductance between the Kelvin emitter E` and the emitter E of the press-fit IGBT. When the device current di CE / dt increases and changes, this rising-edge voltage can be used to trigger the acquisition trigger module to trigger the voltage acquisition module to acquire the quasi-threshold voltage. Optionally, a voltage is generated across the parasitic inductance between the Kelvin source S` and the source S of the MOSFET. When the device current di DS / dt increases and changes, this rising-edge voltage can be used to trigger the acquisition trigger module to trigger the voltage acquisition module to acquire the quasi-threshold voltage.

[0091] Optionally, the voltage drop across the parasitic inductance between the first current input terminal and the second current input terminal is a direct result of the change in the device current and can quickly reflect the switching state of the device. Therefore, when the device temperature changes and causes the switching characteristics of the device to change, the voltage drop across the parasitic inductance will respond quickly; therefore, the voltage drop across the parasitic inductance when the power semiconductor device is turned on is used to trigger the acquisition trigger module to trigger the voltage acquisition module to acquire the quasi-threshold voltage, which can quickly respond to changes in the device temperature and is suitable for application scenarios that require fast thermal response.

[0092] In a specific embodiment, the driving signal sent by the gate driving unit is input to the data flip-flop via the first diode; the driving signal sent by the gate driving unit and the output result of the comparator comparing the induced voltage with the reference voltage are input to the data flip-flop. Only when the driving signal is at a high level and the output result of the comparator is at a high level, the output of the data flip-flop will be at a high level. That is, during the switching transient, when the driving signal is valid and the induced voltage exceeds the set threshold, the data flip-flop triggers the collector to collect the quasi-threshold voltage. The data flip-flop can suppress the noise interference in the static or non-switching state, avoid the false triggering caused by the noise, ensure that the collector is triggered to collect the quasi-threshold voltage only during the correct switching transient, improve the accuracy and reliability of the quasi-threshold voltage acquisition, and further improve the accuracy and reliability of the junction temperature monitoring.

[0093] In an alternative embodiment, Figure 3 is a schematic flowchart of a method for monitoring the junction temperature of a power semiconductor device provided by an embodiment of the present invention; as Figure 3 shown, the above method may include:

[0094] S301: Collect the quasi-threshold voltage by using the quasi-threshold voltage acquisition method of the power semiconductor device;

[0095] S302: Use the quasi-threshold voltage as the threshold voltage in the threshold voltage method to monitor the junction temperature of the power semiconductor device.

[0096] In a specific embodiment, Figure 4 is a schematic diagram of the curve of the quasi-threshold voltage - junction temperature provided by an embodiment of the present invention; as Figure 4 shown, the quasi-threshold voltage decreases as the temperature rises. Therefore, based on the pre-fitted curve of the quasi-threshold - junction temperature and the analyzed and determined quasi-threshold voltage, the junction temperature data of the power semiconductor device can be determined.

[0097] In the above embodiment, based on the quasi-threshold voltage for monitoring the junction temperature of the power semiconductor device, real-time monitoring can be carried out during the device turn-on transient to determine the temperature change of the device under the actual working condition; and the induced voltage generated by the parasitic inductance between the first current input terminal and the second current input terminal of the power semiconductor device during device turn-on can be used for junction temperature monitoring under dynamic conditions, thereby improving the accuracy of junction temperature monitoring; and the change of the load current has little influence on the quasi-threshold voltage and can be ignored, so that the process of junction temperature monitoring is not interfered by the change of the load current, and thus the reliability of junction temperature monitoring can be improved.

[0098] Optionally, after determining the junction temperature data of the power semiconductor device, based on the junction temperature data of the power semiconductor device, measures are taken to adjust the temperature of the power semiconductor device to protect the power semiconductor device and extend its service life.

[0099] As can be seen from the technical solutions provided in the embodiments of this specification above, when the induced voltage generated by the parasitic inductance between the first current input terminal and the second current input terminal of the power semiconductor device is greater than the reference voltage, this specification obtains the target voltage between the control terminal and the first current input terminal of the power semiconductor device, and uses the target voltage as the quasi-threshold voltage. The quasi-threshold voltage can be used as the threshold voltage in the threshold voltage method for junction temperature monitoring of the power semiconductor device. The quasi-threshold voltage can be collected in real time during the device switching process, improving the accuracy and reliability of the quasi-threshold voltage collection. Moreover, the quasi-threshold voltage method can provide temperature feedback under the actual working state of the device, thereby improving the accuracy and reliability of the junction temperature monitoring of the power semiconductor device to enhance the performance of the power semiconductor device and extend its service life. This specification uses the quasi-threshold voltage collection method of the power semiconductor device described above to collect the quasi-threshold voltage through the quasi-threshold voltage collection circuit of the power semiconductor device. The circuit includes a circuit driving module, a voltage generating module, a collection triggering module, and a voltage collection module; the voltage generating module includes a power semiconductor device; the collection triggering module includes a comparator and a data trigger; the circuit driving module can drive the power semiconductor device to conduct, and the voltage generating module can generate an induced voltage through the power semiconductor device when the power semiconductor device conducts; the collection triggering module can trigger the voltage collection module to collect the quasi-threshold voltage through the data trigger based on the driving signal sent by the circuit driving module and the output result of the comparator comparing the induced voltage with the reference voltage, and can quickly respond to the device temperature change based on the induced voltage when the power semiconductor device is turned on, making the response rapid and suitable for scenarios with fast thermal response; the temperature sensitivity of the junction temperature monitoring based on the quasi-threshold voltage can be changed by adjusting the reference voltage of the comparator to adapt to different measurement requirements and different working environments of the power semiconductor device; the induced voltage signal can be latched by the data trigger to avoid the risk of false triggering caused by voltage oscillation or noise during the switching transient process, so as to improve the accuracy and reliability of the quasi-threshold voltage collection, and further improve the accuracy and robustness of the junction temperature monitoring. This specification collects the quasi-threshold voltage by using the quasi-threshold voltage collection method of the power semiconductor device described above, uses the quasi-threshold voltage as the threshold voltage in the threshold voltage method, and conducts junction temperature monitoring of the power semiconductor device, which can provide temperature feedback in real time under the actual working state of the device and improve the accuracy and reliability of the junction temperature monitoring of the power semiconductor device.

[0100] An embodiment of the present invention further provides a quasi-threshold voltage acquisition device for a power semiconductor device. Correspondingly, Figure 5 FIG. Figure 5 is a schematic structural diagram of a quasi-threshold voltage acquisition device for a power semiconductor device provided by an embodiment of the present invention; as Figure 5 shown, the above device includes:

[0101] A voltage acquisition module 510, configured to acquire a target voltage between the control terminal of the power semiconductor device and the first current input terminal when the induced voltage generated by the parasitic inductance between the first current input terminal and the second current input terminal of the power semiconductor device is greater than a reference voltage;

[0102] A quasi-threshold voltage determination module 520, configured to use the target voltage as the quasi-threshold voltage; wherein, the quasi-threshold voltage is used as the threshold voltage in the threshold voltage method for performing junction temperature monitoring of the power semiconductor device; the quasi-threshold voltage is greater than the minimum gate voltage required to form a conductive channel of the power semiconductor device and less than the gate voltage corresponding to the Miller plateau.

[0103] In an optional embodiment, the voltage acquisition module 510 is specifically configured to receive a driving signal for driving the power semiconductor device to conduct; and acquire the target voltage when the driving signal is valid and the induced voltage is greater than the reference voltage.

[0104] An embodiment of the present invention further provides a junction temperature monitoring device for a power semiconductor device. Correspondingly, Figure 6 FIG. Figure 6 is a schematic structural diagram of a junction temperature monitoring device for a power semiconductor device provided by an embodiment of the present invention; as Figure 6 shown, the above device includes:

[0105] A quasi-threshold voltage acquisition module 610, configured to acquire a quasi-threshold voltage by using the quasi-threshold voltage acquisition method for the power semiconductor device;

[0106] A junction temperature monitoring module 620, configured to use the quasi-threshold voltage as the threshold voltage in the threshold voltage method to perform junction temperature monitoring of the power semiconductor device.

[0107] Regarding the devices in the above embodiments, the specific manners in which each module performs operations have been described in detail in the embodiments related to the method, and will not be elaborated herein.

[0108] An embodiment of the present invention further provides an electronic device, which includes a processor and a memory. At least one instruction, at least one program, a code set or an instruction set is stored in the memory. The at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by the processor to implement the quasi-threshold voltage acquisition method or the junction temperature monitoring method of the power semiconductor device as described in any one of the method embodiments.

[0109] An embodiment of the present invention further provides a computer storage medium, which can be arranged in a server to store at least one instruction, at least one program, a code set or an instruction set for implementing the method embodiment. The at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by the processor to implement the quasi-threshold voltage acquisition method or the junction temperature monitoring method of the power semiconductor device as described in any one of the method embodiments.

[0110] Optionally, in an embodiment of the present invention, the above storage medium may be located in at least one of multiple network servers in a computer network. Optionally, in an embodiment of the present invention, the above storage medium may include, but is not limited to, various media that can store program codes such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disc.

[0111] Those skilled in the art should understand that the embodiments of the present invention can be provided as a method, a system, or a computer program product. Therefore, the present invention can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present invention can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0112] The present invention is described with reference to the flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate for implementing in the process Figure 1 a process or multiple flowcharts and / or blocks Figure 1means for the functions specified in one or more boxes.

[0113] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to operate in a particular manner, such that the instructions stored in the computer-readable memory produce a manufacture including an instruction means that implements the functions specified in one Figure 1 one or more flowcharts and / or boxes Figure 1 means for the functions specified in one or more boxes.

[0114] These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus, such that a series of operational steps are performed on the computer or other programmable apparatus to produce a computer-implemented process, whereby the instructions executed on the computer or other programmable apparatus provide steps for implementing the functions specified in one Figure 1 one or more flowcharts and / or boxes Figure 1 means for the functions specified in one or more boxes.

[0115] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each box in the flowchart or block diagram may represent a module, a segment of a program, or a portion of an instruction, and the module, segment of a program, or portion of an instruction contains one or more executable instructions for implementing the specified logical function. In some alternative implementations, the functions noted in the boxes may occur in a different order than noted in the figures. For example, two consecutive boxes may in fact be executed substantially in parallel, or they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each box in the block diagrams and / or flowcharts, and combinations of boxes in the block diagrams and / or flowcharts, can be implemented by a dedicated hardware-based system that performs the specified functions or actions, or by a combination of dedicated hardware and computer instructions.

[0116] Finally, it should be noted that the above embodiments of the present invention have been described in conjunction with the accompanying drawings, but the present invention is not limited to the above specific embodiments. The above specific embodiments are merely illustrative and not restrictive. Under the inspiration of the present invention, those of ordinary skill in the art can also make many forms without departing from the spirit and scope of the present invention as protected by the claims. All of these are within the scope of the present invention.

Claims

1. A method for collecting the quasi-threshold voltage of a power semiconductor device, characterized in that The method includes: When the induced voltage generated by the parasitic inductance between the first current input terminal and the second current input terminal of the power semiconductor device is greater than the reference voltage, obtaining the target voltage between the control terminal of the power semiconductor device and the first current input terminal; Using the target voltage as the quasi-threshold voltage; wherein, the quasi-threshold voltage is used as the threshold voltage in the threshold voltage method for monitoring the junction temperature of the power semiconductor device; the quasi-threshold voltage is greater than the minimum gate voltage required to form the conductive channel of the power semiconductor device and less than the gate voltage corresponding to the Miller plateau.

2. The method for collecting the quasi-threshold voltage of the power semiconductor device according to claim 1, wherein The step of, when the induced voltage generated by the parasitic inductance between the first current input terminal and the second current input terminal of the power semiconductor device is greater than the reference voltage, obtaining the target voltage between the control terminal of the power semiconductor device and the first current input terminal further includes: Receiving a drive signal for driving the power semiconductor device to conduct; When the drive signal is valid and the induced voltage is greater than the reference voltage, obtaining the target voltage.

3. A quasi-threshold voltage acquisition circuit for a power semiconductor device, characterized in that, The circuit performs quasi-threshold voltage acquisition by using the quasi-threshold voltage acquisition method of the power semiconductor device according to claim 1 or 2. The circuit includes: a circuit drive module, a voltage generation module, an acquisition trigger module, and a voltage acquisition module; the voltage generation module includes the power semiconductor device; the acquisition trigger module includes a comparator and a data trigger; One end of the circuit drive module is respectively connected to the control terminal of the power semiconductor device and the first input terminal of the data trigger; the first current input terminal of the power semiconductor device is connected to the first input terminal of the comparator; the output terminal of the comparator is connected to the second input terminal of the data trigger; the output terminal of the data trigger is connected to the first input terminal of the voltage acquisition module; the second input terminal of the voltage acquisition module is connected to the control terminal of the power semiconductor device; The circuit drive module is used to drive the power semiconductor device to conduct; The voltage generation module is used to generate the induced voltage through the power semiconductor device when the power semiconductor device conducts; The acquisition trigger module is used to trigger the voltage acquisition module to acquire the quasi-threshold voltage through the data trigger based on the drive signal sent by the circuit drive module and the output result of the comparator comparing the induced voltage with the reference voltage; The voltage acquisition module is used to acquire the quasi-threshold voltage.

4. The quasi-threshold voltage acquisition circuit of the power semiconductor device according to claim 3, characterized in that, The circuit drive module includes a gate drive unit, a first resistor, and a first diode; one end of the gate drive unit is respectively connected to one end of the first resistor and the input terminal of the first diode, the other end of the first resistor is connected to the control terminal of the power semiconductor device, and the output terminal of the first diode is connected to the first input terminal of the acquisition trigger module.

5. The quasi-threshold voltage acquisition circuit of the power semiconductor device according to claim 3, characterized in that, The first current input terminal of the power semiconductor device is connected to the second current input terminal of the power semiconductor device, and there is a parasitic inductance between the first current input terminal and the second current input terminal.

6. The quasi-threshold voltage acquisition circuit of the power semiconductor device according to claim 3, characterized in that, The acquisition trigger module further includes a second resistor and a reference voltage adjustment circuit. The second input terminal of the comparator is connected to one end of the second resistor; the other end of the second resistor is connected to the reference voltage adjustment circuit, and the first input terminal of the data trigger is connected to the output terminal of the first diode.

7. The quasi-threshold voltage acquisition circuit of the power semiconductor device according to claim 3, characterized in that, The voltage acquisition module includes an acquirer. The first input terminal of the acquirer is connected to the output terminal of the data trigger, and the second input terminal of the acquirer is connected to the control terminal of the power semiconductor device.

8. A method for monitoring the junction temperature of a power semiconductor device, characterized in that, The method includes: Acquiring a quasi-threshold voltage by using the quasi-threshold voltage acquisition method of the power semiconductor device according to claim 1 or 2; Using the quasi-threshold voltage as the threshold voltage in the threshold voltage method to monitor the junction temperature of the power semiconductor device.

9. An electronic device, which includes a processor and a memory. At least one instruction and at least one program segment are stored in the memory. The at least one instruction and the at least one program segment are loaded and executed by the processor to implement the quasi-threshold voltage acquisition method of the power semiconductor device according to any one of claims 1 to 2 or the junction temperature monitoring method of the power semiconductor device according to claim 8.

10. A computer storage medium, in which at least one instruction and at least one program segment are stored. The at least one instruction and the at least one program segment are loaded and executed by a processor to implement the quasi-threshold voltage acquisition method of the power semiconductor device according to any one of claims 1 to 2 or the junction temperature monitoring method of the power semiconductor device according to claim 8.

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