Right-angle structure and preparation method thereof
By forming vertical lines in the hard mask and selectively etching, the rounded corner defect problem caused by uneven light of photoresist is solved, and the preparation of high-precision right-angle structure is achieved, which improves circuit performance and reduces costs.
Patent Information
- Application Number
- CN202510403119.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-01
- Publication Date
- 2025-07-04
AI Technical Summary
In the prior art, photoresist has uneven etching rates caused by different degrees of light exposure, forming rounded corner defects, affecting the electrical performance and reliability of right-angle structures, and has high cost.
By forming a first line in the first direction in the first hard mask, a vertical second line is formed in the second hard mask, and selectively etched at the intersection points to form a right-angle structure, a two-exposure etching process is used to overcome optical proximity effects and pattern distortions.
It effectively suppresses optical proximity effect and pattern distortion in lithography, improves the electrical performance and reliability of the circuit, and reduces the preparation cost.
Smart Images
Figure CN120261273A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of semiconductor manufacturing processes, and in particular, to a right-angle structure and a preparation method thereof. Background Art
[0002] In semiconductor manufacturing processes, the geometric shape accuracy of transistors and interconnect lines in integrated circuits directly determines the electrical performance and reliability of devices. Among them, as one of the basic elements of key components such as transistor gates, interconnect lines, and contact holes, the ability to precisely form a right-angle structure is crucial for ensuring the electrical performance and reliability of the circuit. The precise formation of the right-angle structure also helps to reduce the feature size and promote the development of the manufacturing process technology towards more advanced nodes to meet the growing market demands for high-performance computing and device miniaturization.
[0003] In existing semiconductor manufacturing processes, as the semiconductor process nodes continue to advance downward and the feature size continues to shrink, the optical proximity effect in lithography becomes more and more serious, thus seriously affecting the fidelity of the pattern. Although it is possible to manufacture microstructures with sharp corners and straight edges through precise exposure technology to reduce resistance and capacitance and improve signal transmission speed, due to lithography resolution limitations and diffraction effects (traditional optical lithography technology is limited by the light source wavelength and numerical aperture. When the feature size approaches or is smaller than the light source wavelength, the diffraction of light will cause the edges of the pattern projected onto the photoresist to become blurred, especially at the right-angle corners, resulting in significant rounding), proximity effects (during the lithography process, due to the imperfections of the optical system and diffraction effects, the phenomenon that the pattern on the mask after exposure is not exactly the same as the pattern on the mask when projected onto the photoresist), the physical properties of the photoresist and the mask (during the mask manufacturing process, the etching precision error will be directly transmitted to the lithography pattern, and the development characteristics of the photoresist (such as anisotropic dissolution rate) may cause the deformation of the right-angle structure after development. In addition, the thickness uniformity and insufficient etching resistance of the photoresist will also amplify the distortion of the pattern in the subsequent bulk etching step) and the mechanical precision of the equipment, etc., ultimately resulting in the blurring of the edges of the right-angle pattern or presenting a certain round corner, thereby reducing the electrical performance and reliability of the circuit.
[0004] Therefore, how to improve the forming accuracy of the right-angle structure to reduce resistance and capacitance, improve signal transmission speed, and reduce costs while ensuring the high precision of the right-angle structure has become an urgent problem to be solved at present. Summary of the Invention
[0005] In view of the above-mentioned disadvantages of the prior art, the purpose of the present application is to provide a right-angle structure and a preparation method thereof, so as to solve the problems in the prior art that the rates are different due to the different degrees of exposure of the photoresist to light, resulting in the removal of the photoresist at the edge part of the exposed area to form a rounded corner, and the resulting decline in the electrical performance and reliability of the circuit.
[0006] To achieve the above and other related purposes, the present application provides a preparation method of a right-angle structure, and the preparation method includes the following steps:
[0007] Provide a semiconductor substrate, form a first hard mask on the front surface of the semiconductor substrate, and form a first line along a first direction in the first hard mask, and the first line exposes the semiconductor substrate;
[0008] Form a second hard mask on the first hard mask, form a second line along a second direction in the second hard mask, the first direction is perpendicular to the second direction, and the semiconductor substrate is exposed at the intersection of the first line and the second line, and the second hard mask has the same material as the first hard mask;
[0009] Etch the semiconductor substrate exposed at the intersection of the first line and the second line to form a right-angle structure.
[0010] Optionally, the materials for forming the first hard mask include silicon dioxide, silicon nitride, SOI or APF materials, and the materials for forming the second hard mask include silicon dioxide, silicon nitride, SOI or APF materials.
[0011] Optionally, the step of forming the first line is: spin-coat a first photoresist on the first hard mask, perform precise exposure and development on the first photoresist to form a patterned first photoresist layer, perform a first etching process on the first hard mask based on the first photoresist layer to form the first line, and then remove the first photoresist layer.
[0012] Optionally, the step of forming the second line is: spin-coat a second photoresist on the second hard mask, perform precise exposure and development on the second photoresist to form a patterned second photoresist layer, perform a second etching process on the second hard mask based on the second photoresist layer to form the second line, and then remove the second photoresist layer.
[0013] Optionally, the second photoresist completely covers the bottom and side walls of the first line.
[0014] Optionally, the first etching process includes a reactive ion etching process or an electron beam etching process, and the second etching process includes a reactive ion etching process or an electron beam etching process.
[0015] Optionally, the first etching process has a uniform etching rate, and the second etching process has a uniform etching rate.
[0016] Optionally, the thickness of the first hard mask layer is equal to the thickness of the second hard mask layer.
[0017] Optionally, the width of the second line is greater than the width of the first line.
[0018] The present invention also provides a right-angle structure obtained by the method for preparing the right-angle structure described above.
[0019] As described above, the right-angle structure and the method for preparing the same according to the present invention have the following beneficial effects: The preparation method forms a first line along a first direction in a first hard mask layer and a second line perpendicular to the first line in a second hard mask layer, and then selectively etches at the intersection of the first line and the second line to form the required right-angle structure. The right-angle structure formed by the two exposure and etching processes overcomes the problem that the etching rate is different due to different degrees of light irradiation of the photoresist in the exposure area, resulting in partial removal of the photoresist at the edge of the exposure area and thus forming a rounded corner defect. It effectively suppresses the optical proximity effect and pattern distortion existing in lithography, meets the accuracy requirements of advanced process nodes, improves the electrical performance and reliability of the circuit. In addition, since the required accuracy can be achieved without a large optical technology correction, the cost can also be reduced. Description of the Drawings
[0020] Figure 1 It shows a process flow chart of the method for preparing the right-angle structure in the present invention.
[0021] Figure 2 It shows a schematic structural diagram of a semiconductor substrate and a first hard mask layer formed in an embodiment of the present invention.
[0022] Figure 3 It shows a schematic structural diagram of the first line formed when observed in the first direction in an embodiment of the present invention.
[0023] Figure 4 It shows a schematic structural diagram of the second hard mask layer formed when observed in the second direction in an embodiment of the present invention.
[0024] Figure 5 It shows a schematic structural diagram of the second line formed when observed in the second direction in an embodiment of the present invention.
[0025] Figure 6 It shows a schematic structural diagram after removing the second photoresist layer in the embodiment of the present invention.
[0026] Figure 7 It shows a schematic structural diagram of the right-angle structure formed in the embodiment of the present invention.
[0027] Description of the reference numerals
[0028] 10. Semiconductor substrate; 11. First hard mask layer; 12. First photoresist layer; 13. First line; 14. Second hard mask layer; 15. Second photoresist layer; 16. Second line; 17. Right-angle structure; S1 - S3: Steps. Detailed implementation manners
[0029] The following describes in detail the implementation manners of the present invention in combination with specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0030] When detailing the embodiments of the present invention, for the convenience of description, the schematic diagrams showing the device structure will be enlarged locally not in accordance with the general scale, and the schematic diagrams are only examples and should not limit the scope of protection of the present invention here. In addition, in actual production, three-dimensional spatial dimensions including length, width, and depth should be included.
[0031] For the convenience of description, spatial relationship terms such as "under", "below", "lower than", "beneath", "above", "on" may be used herein to describe the relationship between one element or feature shown in the drawings and other elements or features. It will be understood that these spatial relationship terms are intended to include other directions of the device in use or operation besides the directions depicted in the drawings.
[0032] In the context of the present application, the structure where the first feature is "above" the second feature may include embodiments where the first and second features are in direct contact, and may also include embodiments where additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
[0033] It should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation may be arbitrarily changed, and the component layout type may also be more complex.
[0034] This embodiment provides a method for preparing a right-angle structure. Please refer to Figure 1 , which shows a process flow chart of the method for preparing the right-angle structure, including the following steps:
[0035] S1: Provide a semiconductor substrate 10, form a first hard mask 11 on the front surface of the semiconductor substrate 10, and form a first line 13 along a first direction in the first hard mask 11. The first line 13 exposes the semiconductor substrate 10.
[0036] S2: Form a second hard mask 14 on the first hard mask 11, and form a second line 16 along a second direction in the second hard mask 14. The first direction is perpendicular to the second direction, and the semiconductor substrate 10 is exposed at the intersection of the first line 13 and the second line 16. The second hard mask 14 has the same material as the first hard mask 11.
[0037] S3: Etch the semiconductor substrate 10 exposed at the intersection of the first line 13 and the second line 16 to form a right-angle structure 17.
[0038] The following further introduces the method for preparing the right-angle structure 17 in conjunction with the accompanying drawings. It should be noted that the above sequence does not strictly represent the sequence of the method for preparing the right-angle structure 17 protected by the present invention, and those skilled in the art can change it according to the actual preparation steps. Specifically, as follows:
[0039] In step S1, please refer to Figure 1 , Figure 2 and Figure 3 , provide a semiconductor substrate 10, form a first hard mask 11 on the front surface of the semiconductor substrate 10, and form a first line 13 along a first direction in the first hard mask 11. The first line 13 exposes the semiconductor substrate 10.
[0040] Specifically, as Figure 2As shown, in an embodiment of the present invention, a semiconductor substrate 10 is provided. The semiconductor substrate 10 has a front side and a back side that are oppositely arranged. The material of the semiconductor substrate 10 includes but is not limited to a silicon substrate and a silicon carbide substrate, and also includes semiconductor devices or semiconductor structures that have been formed. The shape of the semiconductor substrate 10 can be circular, square, or any other desired shape. And before forming the first hard mask 11 on the semiconductor substrate 10, the semiconductor substrate 10 can be cleaned first. For example, the semiconductor substrate 10 is placed in an ultrasonic cleaning machine for cleaning. The liquid in the ultrasonic cleaning machine is an ethanol solution with a volume fraction of 60% to 75%. The ultrasonic cleaning time is 5 minutes to 15 minutes, so as to ensure that the contaminants on the surface of the semiconductor substrate 10 can be effectively removed. Then, the glass is rinsed with deionized water, and the water temperature is controlled at 25°C to 45°C. After that, the semiconductor substrate 10 is dried by blowing air from multiple angles to obtain a clean semiconductor substrate 10.
[0041] As an example, the material for forming the first hard mask 11 includes silicon dioxide, silicon nitride, SOI, or APF material.
[0042] In this embodiment, as Figure 2 shown, a deposition process can be used, such as physical vapor deposition, chemical vapor deposition, atomic layer deposition, or plasma-enhanced chemical vapor deposition, etc., to form the first hard mask 11 on the front side of the semiconductor substrate 10. The first hard mask 11 is prepared for the subsequent formation of the first line 13. Preferably, the material of the first hard mask 11 can be SOI. Specifically, a uniform and dense layer of SOI is grown on the front side of the semiconductor substrate 10 as the first hard mask 11 during the etching process.
[0043] As an example, the steps for forming the first line 13 are as follows: spin-coat a first photoresist on the first hard mask 11, perform precise exposure and development on the first photoresist to form a patterned first photoresist layer 12, perform a first etching process on the first hard mask 11 based on the first photoresist layer 12 to form the first line 13, and then remove the first photoresist layer 12.
[0044] Specifically, as Figure 2As shown, in this embodiment, after growing the first hard mask 11, a first photoresist is spin-coated on the first hard mask 11 using a spin-coating process with a rotation speed of 3000 rpm and a time of 20 s. A first pre-baking process is performed on the first photoresist to form a first photoresist layer 12. Specifically, the temperature of the first pre-baking is 100 - 130 °C, and the drying time is 60 - 120 s. For example, the pre-baking temperature is 120 °C and the drying time is 60 s, so as to ensure that the formed first photoresist layer 12 can be fully dried and have a good bonding force with the first hard mask 11. Then, the first photoresist layer 12 is precisely exposed and developed to pattern the position of the first line 13 corresponding to the first photoresist layer 12, as Figure 3 shown, a first etching process is performed on the first hard mask 11 along the first direction of the first hard mask 11 through the patterned first photoresist layer 12 to obtain a first line 13 that penetrates the first hard mask 11 and exposes the semiconductor substrate 10. In this embodiment, the first etching process includes a reactive ion etching process or an electron beam etching process. The reactive ion etching process has anisotropic etching characteristics and the first etching process has a uniform etching rate, achieving better etching profile control, so that the formed first line 13 has a uniform edge roughness and the morphology of the first line 13 can better meet the process requirements. Then, an ashing process is used to remove the first photoresist layer 12.
[0045] In step S2, please refer to Figure 1 、 Figure 4 and Figure 5 , a second hard mask 14 is formed on the first hard mask 11. A second line 16 along the second direction is formed in the second hard mask 14. The first direction is perpendicular to the second direction, and the semiconductor substrate 10 is exposed at the intersection of the first line 13 and the second line 16. The second hard mask 14 has the same material as the first hard mask 11.
[0046] As an example, the material for forming the second hard mask 14 includes silicon dioxide, silicon nitride, SOI or APF material.
[0047] In this embodiment, as Figure 4As shown, a deposition process such as physical vapor deposition, chemical vapor deposition, atomic layer deposition, or plasma-enhanced chemical vapor deposition can be used to form the second hard mask 14 on the first hard mask 11. The second hard mask 14 prepares for the subsequent formation of the second line 16. Preferably, the second hard mask 14 has the same material as the first hard mask 11. Therefore, the material of the second hard mask 14 can also be SOI. Specifically, a uniform and dense SOI layer is grown on the first hard mask 11 as the second hard mask 14 during the etching process, and the thickness of the second hard mask 14 is equal to that of the first hard mask 11.
[0048] As an example, the steps of forming the second line 16 are as follows: spin-coat a second photoresist on the second hard mask 14, perform precise exposure and development on the second photoresist to form a patterned second photoresist layer 15, perform a second etching process on the second hard mask 14 based on the second photoresist layer 15 to form the second line 16, and then remove the second photoresist layer 15.
[0049] Specifically, as Figure 4 shown, in this embodiment, after growing the second hard mask 14, the second photoresist is spin-coated on the second hard mask 14 using a spin-coating process with a rotation speed of 3000 rpm and a time of 20 s, and a second pre-baking process is performed on the second photoresist to form the second photoresist layer 15. Since the second hard mask 14 covers the bottom and sidewalls of the first line 13, the second photoresist layer 15 formed here must cover the bottom and sidewalls of the first line 13, so as to ensure that the first line 13 only undergoes one exposure, effectively suppressing the optical proximity effect existing in lithography.
[0050] Specifically, the temperature of the second pre-baking is 100 - 130 °C, and the drying time is 60 - 120 s. For example, the pre-baking temperature is 120 °C and the drying time is 60 s, so as to ensure that the formed second photoresist layer 15 can be fully dried and has a good bonding force with the second hard mask 14. Then, precise exposure and development are performed on the second photoresist layer 15 to pattern the position of the second line 16 corresponding to the second photoresist layer 15. As Figure 5 shown, a second etching process is performed on the second hard mask 14 along the second direction of the second hard mask 14 through the patterned second photoresist layer 15 to obtain the second line 16 that penetrates the second hard mask 14 and exposes the first hard mask 11. The first direction is perpendicular to the second direction, that is, the first line 13 is perpendicular to the second line 16, and the semiconductor substrate 10 is exposed at the intersection of the first line 13 and the second line 16.
[0051] In this embodiment, the second etching process includes a reactive ion etching process or an electron beam etching process. The reactive ion etching process has anisotropic etching characteristics and the second etching process has a uniform etching rate, achieving better etching profile control so that the formed second line 16 has a uniform edge roughness, and the morphology of the second line 16 better meets the process requirements. Then, an ashing process is used to remove the second photoresist layer 15.
[0052] In step S3, refer to Figure 1 , Figure 6 and Figure 7 , etch the semiconductor substrate 10 exposed at the intersection of the first line 13 and the second line 16 to form a right-angle structure 17.
[0053] Specifically, as Figure 6 shown, a wet etching process is used to etch the semiconductor substrate 10 exposed at the intersection of the first line 13 and the second line 16. The width of the second line 16 is greater than the width of the first line 13, thereby forming a right-angle structure 17 with a rectangular cross-sectional structure. In this embodiment, an alkaline solution is selected to etch the semiconductor substrate 10 exposed at the intersection of the first line 13 and the second line 16, specifically, it can be a KOH solution with a concentration of 30%.
[0054] Further, as Figure 7 shown, a wet etching process is used to etch away the first hard mask layer 11 and the second hard mask layer 14, and finally the required right-angle structure 17 is formed in the semiconductor substrate 10.
[0055] In another embodiment of the present invention, another right-angle structure is also proposed, and the right-angle structure is obtained by using the preparation method of the right-angle structure in the above embodiment.
[0056] In summary, a right-angle structure and a preparation method thereof provided by the present invention form a first line along a first direction in a first hard mask layer, and a second line perpendicular to the first line in a second hard mask layer, and then selectively etch at the intersection of the first line and the second line to form the required right-angle structure. The right-angle structure formed by two exposure and etching processes overcomes the problem that the etching rates of the photoresist in the exposed areas are different due to different degrees of light irradiation, resulting in partial removal of the photoresist at the edge parts of the exposed areas and thus forming rounded corner defects, effectively suppressing the optical proximity effect and pattern distortion existing in lithography, thereby meeting the precision requirements of the manufacturing process, improving the electrical performance and reliability of the circuit. In addition, since the required precision can be achieved without a large optical technology correction, the cost can also be reduced.
[0057] The above embodiments are only illustrative of the principles and effects of the present application and are not intended to limit the present application. Any person familiar with this technology can modify, change or combine the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed in the present application should still be covered by the claims of the present application.
Claims
1. A preparation method of a right-angle structure, characterized in that, The preparation method includes the following steps: Provide a semiconductor substrate, form a first hard mask on the front surface of the semiconductor substrate, and form a first line along a first direction in the first hard mask, and the first line exposes the semiconductor substrate; Form a second hard mask on the first hard mask, and form a second line along a second direction in the second hard mask, the first direction is perpendicular to the second direction, and the semiconductor substrate is exposed at the intersection of the first line and the second line, and the second hard mask has the same material as the first hard mask; Etch the semiconductor substrate exposed at the intersection of the first line and the second line to form a right-angle structure.
2. The preparation method of the right-angle structure according to claim 1, wherein, The material for forming the first hard mask includes silicon dioxide, silicon nitride, SOI or APF material, and the material for forming the second hard mask includes silicon dioxide, silicon nitride, SOI or APF material.
3. The preparation method of the right-angle structure according to claim 2, characterized in that, The step of forming the first line is: spin-coat a first photoresist on the first hard mask, perform precise exposure and development on the first photoresist to form a patterned first photoresist layer, perform a first etching process on the first hard mask based on the first photoresist layer to form the first line, and then remove the first photoresist layer.
4. The manufacturing method of the right-angle structure according to claim 3, characterized in that, The step of forming the second line is: spin-coat a second photoresist on the second hard mask, perform precise exposure and development on the second photoresist to form a patterned second photoresist layer, perform a second etching process on the second hard mask based on the second photoresist layer to form the second line, and then remove the second photoresist layer.
5. The preparation method of the right-angle structure according to claim 4, characterized in that The second photoresist completely covers the bottom and sidewalls of the first line.
6. The preparation method of the right-angle structure according to any one of claims 1 to 5, characterized in that, The first etching process includes a reactive ion etching process or an electron beam etching process, and the second etching process includes a reactive ion etching process or an electron beam etching process.
7. The preparation method of the right-angle structure according to claim 6, characterized in that, The first etching process has a uniform etching rate, and the second etching process has a uniform etching rate.
8. The preparation method of the right-angle structure according to claim 6, characterized in that, The thickness of the first hard mask is equal to the thickness of the second hard mask.
9. The preparation method of the right-angle structure according to claim 6, characterized in that, The width of the second line is greater than the width of the first line.
10. A right-angle structure, characterized in that, The right-angle structure in the substrate is obtained by the preparation method of the right-angle structure in the substrate according to any one of claims 1 to 9.