Dynamic identification system and method based on light-operated nerve synaptic array

Abstract

The invention provides a dynamic recognition system and method based on a light-operated nerve synapse array, and relates to the technical field of photoelectric pulses, and the system comprises a lens imaging module which is configured to collect light signals and transmit the light signals to the light-operated nerve synapse array so as to adjust the resistance value of the light-operated nerve synapse array; the displacement buffer module is configured to receive the serial input signal of the micro-control unit, convert the serial input signal into a parallel output signal, and transmit the parallel output signal to the light-operated nerve synapse array after the register is filled up; the light-operated nerve synapse array comprises a plurality of light-operated nerve synapses, and under the condition that the parallel output signal is low level, the corresponding target light-operated nerve synapses work and are connected with the analog-to-digital converter; the analog-to-digital converter is configured to collect a voltage value of the target light-operated nerve synapse and determine a resistance value of the target light-operated nerve synapse based on the voltage value; and the dynamic imaging module is configured to convert the resistance value into a gray value image.

Description

Technical Field

[0001] The present invention relates to the field of optoelectronic pulse technology, and particularly to a dynamic recognition system and method based on an optically controlled neural synapse array. Background Art

[0002] With the advent of the Internet of Things era, motion detection and recognition (MDR) has become a core requirement in various intelligent scenarios such as smart homes, artificial vision, security monitoring, autonomous vehicles, and military defense. Traditional motion capture methods usually require the installation of three-dimensional sensors to collect images frame by frame, and then rely on a computer to process a large amount of image data. This not only depends on a large number of high-quality single-frame images and complex data conversion, transmission, storage, and processing operations between different modules, but also consumes high computing energy, which is not conducive to miniaturization and integration. Biological neural synapses can change their functions or structures through excitatory or inhibitory characteristics under the influence of neural activities or experiences to achieve synaptic memory. The optically controlled neural synapse is a device that simulates biological synapse behavior. The optoelectronic synapse has unique functions: when the optical signal stimulus is removed, its response will not return to zero in a short time, but will store part of the signal in the device, thereby realizing cumulative storage of the signal. Such a mechanism can be used to simulate the plasticity of biological synapses to achieve the plasticity of optoelectronic synapses. However, current research on the simulation of biological synapse behavior mostly stays at the basic simulation of the synaptic plasticity behavior of a single device, which is difficult to meet the requirements of motion detection and recognition. Summary of the Invention

[0003] In view of this, the present invention proposes a dynamic recognition system and method based on an optically controlled neural synapse array.

[0004] The technical solution of the present invention is realized as follows: In the first aspect of the present invention, a dynamic recognition system based on an optically controlled neural synapse array is provided, including: a lens imaging module, a displacement buffer module, an optically controlled neural synapse array, an analog-to-digital converter, and a dynamic imaging module; wherein,

[0005] The lens imaging module is configured to collect target sequential optical signals and transmit the target sequential optical signals to the optically controlled neural synapse array to adjust the resistance value of the optically controlled neural synapse array;

[0006] The displacement buffer module is configured to receive a serial input signal from a microcontroller unit, convert the serial input signal into a parallel output signal, and transmit the parallel output signal to the optically controlled neural synapse array after the register is full;

[0007] The optical control neural synapse array includes multiple optical control neural synapses. When the parallel output signal is at a low level, the corresponding target optical control neural synapse operates and is connected to the analog-to-digital converter;

[0008] The analog-to-digital converter is configured to collect the timing voltage value of the target optical control neural synapse and determine the timing resistance value of the target optical control neural synapse based on the timing voltage value;

[0009] The dynamic imaging module is configured to convert the timing resistance value into a grayscale image.

[0010] Based on the above technical solutions, preferably, the optical control neural synapse array includes at least: a first optical control neural synapse and a second optical control neural synapse;

[0011] When the parallel output signal connected to the first optical control neural synapse is at a low level, the second optical control neural synapse is connected to a high level, the first optical control neural synapse operates, and the second optical control neural synapse is disconnected.

[0012] Based on the above technical solutions, preferably, the resistance value of the target optical control neural synapse satisfies:

[0013]

[0014] where V REF is the voltage signal at the emitter of the PNP transistor in the target optical control neural synapse, V testi is the timing voltage value collected by the analog-to-digital converter, R c is the resistance value of the reference resistor, R i is the resistance value of the i-th optical control neural synapse, R BJT is the on-resistance.

[0015] Based on the above technical solutions, preferably, it further includes a filtering sub-module; the filtering sub-module is configured to perform Kalman filtering on the voltage value collected by the analog-to-digital converter.

[0016] More preferably, a second aspect of the present invention provides a dynamic recognition method based on an optical control neural synapse array, which is applied to the dynamic recognition system based on the optical control neural synapse array described in the first aspect, and includes:

[0017] Collect the target timing optical signal and transmit the target timing optical signal to the optical control neural synapse array;

[0018] Apply a parallel voltage signal to the optical control neural synapse array to obtain the timing resistance values of multiple optical control neural synapses in the optical control neural synapse array under the parallel voltage signal;

[0019] Convert the sequential resistance values into a grayscale value image, and determine the dynamics of the observation target based on the grayscale values of the grayscale value image.

[0020] Based on the above technical solutions, preferably, the optoelectronic synaptic array includes a first optoelectronic synapse and a second optoelectronic synapse; the step of applying a parallel voltage signal to the optoelectronic synaptic array and obtaining the sequential resistance values of multiple optoelectronic synapses in the optoelectronic synaptic array under the parallel voltage signal includes:

[0021] Apply a low-level voltage signal to the first optoelectronic synapse and a high-level voltage signal to the second optoelectronic synapse, and obtain the sequential resistance value of the first optoelectronic synapse.

[0022] Based on the above technical solutions, preferably, the optoelectronic synapse includes a PNP transistor; the step of applying a parallel voltage signal to the optoelectronic synaptic array and obtaining the sequential resistance values of multiple optoelectronic synapses in the optoelectronic synaptic array under the parallel voltage signal includes:

[0023] When a high-level voltage signal is connected to the emitter of the PNP transistor, apply a low-level voltage signal to the base of the PNP transistor, and obtain the sequential resistance value of the target optoelectronic synapse.

[0024] Based on the above technical solutions, preferably, the step of converting the sequential resistance values into a grayscale value image and determining the dynamics of the observation target based on the grayscale values of the grayscale value image includes:

[0025] Convert the sequential resistance values of all optoelectronic synapses in the optoelectronic synaptic array into corresponding grayscale value images, and obtain image fusion features; the image fusion features include grayscale values and image trajectories;

[0026] Determine the moving speed and moving direction of the observation target based on the grayscale values and image trajectories.

[0027] Even more preferably, a third aspect of the present invention provides an electronic device, including a processor and a memory; the memory stores a computer program, wherein the computer program, when executed by the processor, implements the dynamic recognition method based on an optoelectronic synaptic array described in the second aspect.

[0028] Even more preferably, a fourth aspect of the present invention provides a computer storage medium, on which a computer program is stored, wherein the computer program, when executed by a processor, implements the dynamic recognition method based on an optoelectronic synaptic array described in the second aspect.

[0029] A dynamic recognition system based on a photo-controlled neural synapse array according to the present invention has the following beneficial effects compared with the prior art:

[0030] 1. By integrating multiple photo-controlled neural synapses and utilizing the sensitivity of the photo-controlled neural synapses to optical signals, the change in resistance value is visualized as the change in image depth value to analyze the visual attenuation process of the monitoring target, so as to be able to restore the motion trajectory of the object, achieve a unique "visual residue" effect, present a "dynamic" effect on a single-frame image, and thus realize motion capture, improving the accuracy and efficiency of dynamic monitoring of the observation target.

[0031] 2. The spatio-temporal information of the monitoring target can be deduced from the depth value information on a single-frame image to complete dynamic trajectory recognition. MDR can be realized without using the complex algorithms of traditional MDR to analyze and learn multiple frames of images, greatly simplifying the calculation process and improving the monitoring efficiency.

[0032] 3. The adopted dual-terminal photo-controlled neural synapses replace a large number of traditional MDR hardware system modules, making the whole system highly integrated, controlled by an MCU, capable of simultaneously processing and transmitting information, without complex connections, facilitating the integration and miniaturization of the device, and reducing the requirement for the memory capacity, effectively reducing the hardware cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0034] Figure 1 It is a schematic structural diagram of a dynamic recognition system based on a photo-controlled neural synapse array provided by an embodiment of the present invention;

[0035] Figure 2 It is a schematic diagram of the signal transmission sequence provided by an embodiment of the present invention;

[0036] Figure 3 It is a schematic structural diagram of a photo-controlled neural synapse array provided by an embodiment of the present invention;

[0037] Figure 4 It is a schematic structural diagram of a photo-controlled neural synapse device provided by an embodiment of the present invention;

[0038] Figure 5 It is a schematic diagram of a monitoring scenario provided by an embodiment of the present invention;

[0039] Figure 6Schematic diagram of path gray values corresponding to different time positions provided by the embodiments of the present invention;

[0040] Figure 7 Schematic diagram of the structure of the test circuit board provided by the embodiments of the present invention;

[0041] Figure 8 Schematic flow chart of a dynamic recognition method based on an optically controlled neural synapse array provided by the embodiments of the present invention;

[0042] Figure 9 Schematic diagram of the structure of an electronic device provided by the embodiments of the present invention. Detailed implementation manners

[0043] Next, in combination with the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0044] In some embodiments, as Figure 1 shown, Figure 1 Schematic diagram of the structure of a dynamic recognition system based on an optically controlled neural synapse array provided by the embodiments of the present invention; A dynamic recognition system based on an optically controlled neural synapse array provided by the present invention includes: a lens imaging module 110, a displacement buffer module 120, an optically controlled neural synapse array 130, an analog-to-digital converter 140, and a dynamic imaging module 150; wherein,

[0045] The lens imaging module 110 is configured to collect target timing optical signals and transmit the target timing optical signals to the optically controlled neural synapse array to adjust the resistance value of the optically controlled neural synapse array.

[0046] The displacement buffer module 120 is configured to receive the serial input signal of the micro control unit 160, convert the serial input signal into a parallel output signal, and transmit the parallel output signal to the optically controlled neural synapse array after the register is full.

[0047] The optically controlled neural synapse array 130 includes a plurality of optically controlled neural synapses. In the case where the parallel output signal is at a low level, the corresponding target optically controlled neural synapse works and is connected to the analog-to-digital converter.

[0048] The analog-to-digital converter 140 is configured to collect the timing voltage value of the target optically controlled neural synapse and determine the timing resistance value of the target optically controlled neural synapse based on the timing voltage value.

[0049] The dynamic imaging module 150 is configured to convert the sequential resistance values into a grayscale image.

[0050] In this embodiment, the lens imaging module 110 mainly includes a lens, a lens barrel, an aperture, and a focusing system. By capturing external light, the light is converged on the optoelectronic synapse array; by scanning each optoelectronic synapse on the optoelectronic synapse array, the resistance value of each optoelectronic synapse is obtained for subsequent data processing and imaging. To save hardware resources and computing power consumption, only a single analog-to-digital converter 140 can be used to perform analog-to-digital conversion on each optoelectronic synapse, and the ability to switch the conversion object is achieved by the displacement buffer module 120. The displacement buffer module 120 is mainly composed of a shift register and a storage register, and its function is realized by storing and sending input signals.

[0051] In an alternative embodiment, the microcontroller unit 160 uses an STM32F103C8T6 chip, based on the ARM Cortex-M3 core, with a main frequency of 72 MHz, built-in 64 KB Flash memory and 20 KB SRAM, supporting a variety of peripheral interfaces, including 3 SPI interfaces, 2 I2C interfaces, 3 USART interfaces, and multiple GPIO ports. The microcontroller unit 160 is connected to the analog-to-digital converter module 140 through the SPI interface to receive digital signals in real time. The displacement buffer module 120 can be composed of an 8-bit shift register chain, a clock synchronization circuit, and a parallel output latch, and is used to receive the serial input signal from the microcontroller unit 160 and convert it into a parallel output signal. The module supports a maximum clock frequency of 50 MHz, a working voltage of 3.3 V, and is compatible with the GPIO level of the STM32F103C8T6. When the 8-bit data fills the register, the microcontroller unit 160 notifies the module through an interrupt signal (INT), and the module then outputs the signal to the optoelectronic synapse array in parallel through the output latch. Here, please refer to Figure 2 , Figure 2 which is a schematic diagram of the signal transmission sequence provided by the embodiment of the present invention. The analog-to-digital converter module 140 is used to convert the input voltage signal into a digital signal for subsequent digital signal processing. The analog-to-digital converter module includes a sampling circuit, a quantization circuit, and an encoding circuit. The sampling circuit is used to sample the analog signal, the quantization circuit converts the sampled signal into discrete levels, and the encoding circuit converts the quantized signal into a binary digital signal. The resolution of the analog-to-digital converter module can be 16 bits, the sampling rate is 1 MSPS (one million samples per second), the signal-to-noise ratio is 90 dB, and the conversion accuracy is ±0.01%.

[0052] In some embodiments, the optoelectronic synapse array includes at least: a first optoelectronic synapse and a second optoelectronic synapse;

[0053] When the parallel output signal accessed by the first optically controlled neural synapse is at a low level, the second optically controlled neural synapse accesses a high level, the first optically controlled neural synapse works, and the second optically controlled neural synapse disconnects.

[0054] It should be noted that the first optically controlled neural synapse and the second optically controlled neural synapse are any two optically controlled neural synapses on the optically controlled neural synapse array. In addition to the first optically controlled neural synapse and the second optically controlled neural synapse, the optically controlled neural synapse array may also include other optically controlled neural synapses, and the specific number thereof is not limited here.

[0055] Exemplarily, please refer to Figure 3 , Figure 3 is a schematic structural diagram of the optically controlled neural synapse array provided by the embodiment of the present invention; taking a 5×5 array as an example for illustration, the optically controlled neural synapse array is composed of 25 small modules, and each small module contains a PNP type triode and an optically controlled neural synapse device. Five small modules extracted from the 5×5 array are described. The displacement buffer module outputs the data Vin stored in the register in parallel to the optically controlled neural synapse array. For the PNP triode, when the emitter is connected to a high level, a low level is input to the base, and the collector is equivalent to being connected to a high level. When a high level is input to the base, the collector is equivalent to being disconnected. Here, in the initial state, the register outputs all high levels, causing all triodes to disconnect; afterwards, a low level is output to the triode of the first optically controlled neural synapse, making one end of this synapse conduct a high level, and other triodes remain disconnected. At this time, the triode of the first optically controlled neural synapse conducts, and the on-resistance is RBJT. The synapse and the reference resistor will form a closed loop, and the voltage test point connected to the analog-to-digital converter will sample the voltage signal Vtest1 here and send it back to the analog-to-digital converter to collect the voltage value of the first optically controlled neural synapse. Since other triodes are disconnected at this time and do not participate in voltage division, the resistance value R1 of the first optically controlled neural synapse can be calculated. Then, a high level is input to the triode of the first optically controlled neural synapse, a low level is input to the triode of the second optically controlled neural synapse, and other triodes remain disconnected to obtain Vtest2 and R2. A low level is input to the triode of the third optically controlled neural synapse... and so on. By expanding the displacement buffer module and the number of arrays, arrays of 10×10, 50×50... and even 256×256 can be realized. The above process will keep looping and continuously refresh the resistance values of each synapse. It should be noted that the increase in the resistance value of each optically controlled neural synapse basically follows a linear relationship with the change in light intensity, and the resistance decay rate of each optically controlled neural synapse is basically the same. When an object passes over the optically controlled neural synapse, the change in light intensity can be simplified into a rectangular pulse model.

[0056] In some embodiments, the resistance value of the target optically controlled neural synapse satisfies:

[0057]

[0058] Among them, V REF is the voltage signal at the emitter of the PNP transistor in the target optically controlled neural synapse, and V testi is the timing voltage value collected by the analog-to-digital converter. R c is the resistance value of the reference resistor, and R i is the resistance value of the i-th optically controlled neural synapse, and R BJT is the on-resistance.

[0059] In one example, please refer to Figure 4 , Figure 4 which is a schematic structural diagram of the optically controlled neural synapse device provided by an embodiment of the present invention. Among them, the optically controlled neural synapse device is a two-terminal optically controlled neural synapse composed of conductive glass, zinc oxide, perovskite and gold. Zinc oxide is the common base of all synapses, which is equivalent to one end of all optically controlled neural synapses in the circuit being connected together, and the other end is connected to the collector of the triode. The base of the triode is connected to the parallel output signal port of the displacement buffer module, and the emitter is connected to VREF. This voltage is used as the reference voltage of the analog-to-digital converter, generally 3.3V. And the common-base zinc oxide is connected to a pair of reference resistors Rc, and the midpoint between the two is connected to the analog signal input terminal of the analog-to-digital converter, serving as the voltage test point of the analog-to-digital converter module. When the analog-to-digital converter completes sampling, it automatically triggers a DMA request, directly stores the resistance data into the specified memory area, and the sampling values of all analog-to-digital converters will be continuously updated with the pulse timing. Due to the compactness of the timing and the influence of other external factors.

[0060] For the dynamic imaging module 150, after obtaining all the resistance sampling values, the resistance sampling values are converted into a grayscale value image, and the grayscale value image is displayed through the OLED display screen. Taking the experiment of dynamic detection of a small car as an example, please refer to Figure 5 , Figure 5 which is a schematic diagram of the monitoring scenario provided by an embodiment of the present invention, showing the running speed and direction (Velocity and Direction) of the small car; the small car travels from the upper left to the lower right. With the update of the sampling value and the grayscale value image, the grayscale of the place where the small car has traveled will continuously deepen with time, but it will not immediately return to the original grayscale, but will "forget" with time, because the time sequence of the small car passing through a certain point is different, and the degree of "forgetting" of the driving path is different, which is reflected in the numerical value as different ADC sampling values. In addition, please refer to Figure 6 , Figure 6Schematic diagram of path gray values corresponding to different time positions provided by the embodiments of the present invention; the path gray values corresponding to different time positions are inconsistent. It can be understood that for the image gray value at the same position, the longer the time, the smaller the gray value; for the image gray value at the same moment, the farther the position, the smaller the gray value. Based on this, the speed of the trolley can be judged according to the resistance attenuation values of different optoelectronic synapses, and it is also easy to judge the direction of the trolley. Dynamic recognition can be performed in the same frame of image, and the motion trajectory of the monitoring target can be restored.

[0061] In an alternative embodiment, the specific principle of using the resistance attenuation of optoelectronic synapses to determine the motion trajectory of the monitoring target is as follows:

[0062] The change of the resistance value of the optoelectronic synapse with time can be expressed as:

[0063] R i (t) = R i0 +αI i (t) - βt;

[0064] Among them, R i (t) is the resistance value of the i-th optoelectronic synapse at time t, R i0 is the initial resistance value of the i-th optoelectronic synapse, α is the change coefficient of the resistance value with light intensity, I i (t) is the light intensity received by the i-th optoelectronic synapse at time t; β is the resistance attenuation rate.

[0065] Use the reference optoelectronic synapse not illuminated to correct the actual attenuation rate:

[0066]

[0067] R ref (t1), R ref (t2) are the resistance values of the reference pixel at times t1 and t2 respectively.

[0068] When the monitoring target covers the optoelectronic synapse and the resistance value suddenly increases, trigger the displacement buffer module to transmit parallel output signals to the optoelectronic synapse array:

[0069] R i (t) = R i0 +αI max ·H(t - t i ) - β(t - t i );

[0070] Among them, H(t) is the step function (1 when t≥0, otherwise 0); t i is the time when the monitoring target reaches the i-th optoelectronic synapse.

[0071] Define the trigger threshold as 50% of the photoinduced resistance change:

[0072] R th = R i0 + 0.5αI max ;

[0073] Arrange the trigger times of the 5×5 array according to spatial positions to construct a time matrix:

[0074]

[0075] t x，y represents the trigger time of the pixel with coordinates (x, y).

[0076] Calculate the gradient of the time matrix using the Sobel kernel:

[0077] Horizontal gradient kernel:

[0078] Vertical gradient kernel:

[0079] Gradient component: * represents the convolution operation.

[0080]

[0081] By aligning the time series of multiple opto - neural synapses through dynamic time warping, the path time difference can be extracted:

[0082] Δt path = DTW(t path ); DTW is the dynamic time warping algorithm for aligning non - uniform time series.

[0083] In some embodiments, the dynamic recognition system based on the opto - neural synapse array further includes a filtering sub - module; the filtering sub - module is configured to perform Kalman filtering on the voltage values collected by the analog - to - digital converter.

[0084] Due to the compactness of the time sequence and the influence of other external factors, the measured ADC voltage sampling values are often inaccurate, which further affects the accuracy of the resistance value. Therefore, it is necessary to perform Kalman filtering on the ADC sampling process to improve the accuracy of the voltage sampling values. In one example, please refer to Figure 7 , Figure 7 is the structural schematic diagram of the test circuit board provided by the embodiment of the present invention; by verifying the circuit structure and circuit principle on the PCB, all data have been successfully obtained.

[0085] In some embodiments, the second aspect of the present invention provides a dynamic recognition method based on an opto - neural synapse array, which is applied to the dynamic recognition system based on the opto - neural synapse array described in the first aspect, and includes:

[0086] S810, collect the target time-sequential optical signal and transmit the target time-sequential optical signal to the opto-controlled neural synapse array;

[0087] S820, apply a parallel voltage signal to the opto-controlled neural synapse array and obtain the time-sequential resistance values of multiple opto-controlled neural synapses in the opto-controlled neural synapse array under the parallel voltage signal;

[0088] S830, convert the time-sequential resistance values into a grayscale value image and determine the dynamics of the observed target based on the grayscale values of the grayscale value image.

[0089] In some embodiments, the opto-controlled neural synapse array includes a first opto-controlled neural synapse and a second opto-controlled neural synapse; applying a parallel voltage signal to the opto-controlled neural synapse array and obtaining the time-sequential resistance values of multiple opto-controlled neural synapses in the opto-controlled neural synapse array under the parallel voltage signal includes:

[0090] Apply a low-level voltage signal to the first opto-controlled neural synapse and a high-level voltage signal to the second opto-controlled neural synapse to obtain the time-sequential resistance value of the first opto-controlled neural synapse.

[0091] In some embodiments, the opto-controlled neural synapse includes a PNP triode; applying a parallel voltage signal to the opto-controlled neural synapse array and obtaining the time-sequential resistance values of multiple opto-controlled neural synapses in the opto-controlled neural synapse array under the parallel voltage signal includes:

[0092] When a high-level voltage signal is connected to the emitter of the PNP triode, apply a low-level voltage signal to the base of the PNP triode to obtain the time-sequential resistance value of the target opto-controlled neural synapse.

[0093] In some embodiments, converting the time-sequential resistance values into a grayscale value image and determining the dynamics of the observed target based on the grayscale values of the grayscale value image includes:

[0094] Convert the time-sequential resistance values of all the opto-controlled neural synapses in the opto-controlled neural synapse array into corresponding grayscale value images to obtain image fusion features; the image fusion features include grayscale values and image trajectories;

[0095] Determine the moving speed and moving direction of the observed target based on the grayscale values and image trajectories.

[0096] It should be noted that the dynamic recognition method based on the opto-controlled neural synapse array provided in the embodiments of the present application and the dynamic recognition system based on the opto-controlled neural synapse array provided in the embodiments of the present application are based on the same application concept. Therefore, the specific implementation of this embodiment can refer to the implementation of the aforementioned dynamic recognition system based on the opto-controlled neural synapse array, and the repeated parts will not be elaborated.

[0097] In some embodiments, please refer toFigure 9 , Figure 9 This is a schematic structural diagram of an electronic device provided by an embodiment of the present application. An electronic device 900 provided by an embodiment of the present application includes a processor 910 and a memory 920; the memory 920 stores a computer program, wherein the computer program, when executed by the processor, implements the above-mentioned dynamic recognition system based on an optically controlled neural synapse array.

[0098] Specifically, the processor 910 may include, for example, a general microprocessor, an instruction set processor, and / or a related chipset, and / or a dedicated microprocessor (such as an application specific integrated circuit (ASIC)), and so on. The processor 910 may also include on-board memory for caching purposes. The processor 910 may be a single processing unit or multiple processing units for performing different actions of the method flow according to the embodiment of the present application.

[0099] The memory 920 may be, for example, any medium capable of containing, storing, transmitting, propagating, or transporting instructions. For example, the memory 920 may include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, components, or propagation media. Specific examples of the memory 920 include: magnetic storage devices, such as magnetic tapes or hard disk drives (HDDs); optical storage devices, such as compact discs (CD-ROMs); may also be, such as random access memory (RAM) or flash memory; and / or wired / wireless communication links.

[0100] The present application also provides a computer-readable medium having a computer program stored thereon, and the program, when executed by the processor, implements the above-mentioned dynamic recognition system based on an optically controlled neural synapse array. The computer-readable medium may be included in the device / device / system described in the above embodiment; or may exist separately and not be assembled into the device / device / system. The above computer-readable medium carries one or more programs, and when the one or more programs are executed, the method according to the embodiment of the present application is implemented.

[0101] According to an embodiment of the present application, a computer-readable medium may be a computer-readable signal medium, a computer-readable storage medium, or any combination of the two. A computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples of the computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, a computer-readable storage medium may be any tangible medium that contains or stores a program, which can be used by or in conjunction with an instruction execution system, apparatus, or device. In the present application, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries computer-readable program code. Such a propagated data signal may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium may be transmitted by any appropriate medium, including but not limited to: wireless, wired, optical fiber cable, radio frequency signal, etc., or any suitable combination of the above.

[0102] Those skilled in the art can understand that the features recited in the various embodiments and / or claims of the present application can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly recited in the present application. In particular, without departing from the spirit and teachings of the present application, the features recited in the various embodiments and / or claims of the present application can be combined and / or combined in various ways. All such combinations and / or combinations fall within the scope of the present application. Therefore, the scope of the present application should not be limited to the above embodiments, but should be determined not only by the appended claims, but also by the equivalents of the appended claims. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A dynamic recognition system based on an optically controlled neural synapse array, characterized in that, Including: a lens imaging module, a displacement buffer module, a light-controlled neural synapse array, an analog-to-digital converter, and a dynamic imaging module; wherein, the lens imaging module is configured to collect a target time-sequential optical signal and transmit the target time-sequential optical signal to the light-controlled neural synapse array to adjust the resistance value of the light-controlled neural synapse array; the displacement buffer module is configured to receive a serial input signal from a microcontroller unit, convert the serial input signal into a parallel output signal, and transmit the parallel output signal to the light-controlled neural synapse array after the register is filled; the light-controlled neural synapse array includes a plurality of light-controlled neural synapses. When the parallel output signal is at a low level, the corresponding target light-controlled neural synapse operates and is connected to the analog-to-digital converter; the analog-to-digital converter is configured to collect the time-sequential voltage value of the target light-controlled neural synapse and determine the time-sequential resistance value of the target light-controlled neural synapse based on the time-sequential voltage value; the dynamic imaging module is configured to convert the time-sequential resistance value into a grayscale value image.

2. The dynamic recognition system based on the opto-controlled neural synapse array according to claim 1, characterized in that, The light-controlled neural synapse array includes at least: a first light-controlled neural synapse and a second light-controlled neural synapse; When the parallel output signal connected to the first light-controlled neural synapse is at a low level, the second light-controlled neural synapse is connected to a high level, the first light-controlled neural synapse operates, and the second light-controlled neural synapse is disconnected.

3. The dynamic recognition system based on the opto-controlled neural synapse array according to claim 1, characterized in that, The resistance value of the target light-controlled neural synapse satisfies: Among them, V REF is the voltage signal of the emitter of the PNP transistor in the target optoelectronic synapse, and V testi is the sequential voltage value collected by the analog-to-digital converter. R c is the resistance value of the photo resistor, and R i is the resistance value of the i-th optoelectronic synapse, and R BJT is the on-resistance.

4. The dynamic recognition system based on an optically controlled neural synapse array according to claim 1, wherein, It further includes a filtering sub-module; the filtering sub-module is configured to perform Kalman filtering on the voltage value collected by the analog-to-digital converter.

5. A dynamic recognition method based on an optically controlled neural synapse array, applied to the dynamic recognition system based on the optically controlled neural synapse array described in claims 1-4, characterized in that, Including: collecting a target time-sequential optical signal and transmitting the target time-sequential optical signal to the light-controlled neural synapse array; applying a parallel voltage signal to the light-controlled neural synapse array to obtain the time-sequential resistance values of a plurality of light-controlled neural synapses in the light-controlled neural synapse array under the parallel voltage signal; converting the time-sequential resistance value into a grayscale value image and determining the dynamics of the observed target based on the grayscale value of the grayscale value image.

6. The dynamic recognition method based on the opto-controlled neural synapse array according to claim 5, wherein The light-controlled neural synapse array includes a first light-controlled neural synapse and a second light-controlled neural synapse; the applying a parallel voltage signal to the light-controlled neural synapse array to obtain the time-sequential resistance values of a plurality of light-controlled neural synapses in the light-controlled neural synapse array under the parallel voltage signal includes: applying a low-level voltage signal to the first light-controlled neural synapse and a high-level voltage signal to the second light-controlled neural synapse to obtain the time-sequential resistance value of the first light-controlled neural synapse.

7. The dynamic recognition method based on the opto-controlled neural synapse array according to claim 5, wherein The light-controlled neural synapse includes a PNP triode; the applying a parallel voltage signal to the light-controlled neural synapse array to obtain the time-sequential resistance values of a plurality of light-controlled neural synapses in the light-controlled neural synapse array under the parallel voltage signal includes: When the emitter of the PNP triode is connected to a high-level voltage signal, applying a low-level voltage signal to the base of the PNP triode to obtain the time-sequential resistance value of the target light-controlled neural synapse.

8. The dynamic recognition method based on an optically controlled neural synapse array according to claim 5, wherein The converting the time-sequential resistance value into a grayscale value image and determining the dynamics of the observed target based on the grayscale value of the grayscale value image includes: Convert the sequential resistance values of all the opto - controlled neural synapses in the opto - controlled neural synapse array into corresponding grayscale value images, and obtain image fusion features; the image fusion features include grayscale values and image trajectories. Determine the moving speed and moving direction of the observation target based on the grayscale values and image trajectories.

9. An electronic device, comprising a processor and a memory; the memory stores a computer program, wherein, When executed by the processor, the computer program implements the dynamic recognition method based on an opto - controlled neural synapse array according to any one of claims 5 - 8.

10. A computer storage medium, characterized in that, It stores a computer program, wherein when the computer program is executed by a processor, it implements the dynamic recognition method based on an opto - controlled neural synapse array according to any one of claims 5 - 8.

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