Method for preparing silicon oxide insulating layer through normal-pressure chemical vapor deposition

Abstract

The invention provides a method for preparing a silicon oxide insulating layer through normal-pressure chemical vapor deposition, which comprises the following steps of: S10, etching a blind hole with a certain depth-to-width ratio on a silicon substrate by using photoresist as a mask plate; wherein the blind holes with a certain depth-to-width ratio can be arranged to be various blind holes with different depth-to-width ratios; and S20, deionized water is introduced into oxygen for humidification treatment, then wet oxygen is introduced into a CVD reaction cavity, the air pressure of the CVD cavity is atmospheric pressure, CVD is heated, the temperature is raised to 1000 DEG C, heat preservation is conducted for 3-5 h, the silicon substrate and the wet oxygen are fully reacted, and the silicon substrate and the wet oxygen are taken out after being naturally cooled to the room temperature. According to the technical scheme, the growth steps are simple, needed reactants and equipment conditions are simple, the silicon substrate, oxygen and water serve as reactants, the silicon oxide insulating layer with good uniformity and quality can be generated on the side wall of the blind hole, and it is guaranteed that the TSV device has the good insulation characteristic.

Description

Technical Field

[0001] The present invention relates to the field of advanced chip packaging technology, and particularly to a method for preparing a silicon oxide insulating layer by atmospheric pressure chemical vapor deposition. Background Art

[0002] 2.5D / 3D packaging and chiplets are current advanced packaging technologies. The core lies in achieving planar or vertical interconnection between chips through a silicon substrate (TSV interposer) to construct a high-density and short-path interconnection solution. The manufacturing process of TSV mainly includes the following steps: First, circuits and devices are prepared on the wafer surface, and then vias are etched; then an insulating layer is deposited on the inner wall of the etched vias, and a conductive metal is filled in the insulating layer; finally, the processing is completed through polishing. It should be noted that the thickness, uniformity, and step coverage of the insulating layer on the sidewall of the TSV via directly affect the device performance, while the surface roughness of the sidewall of the via after etching has an important impact on the quality of the subsequent metal coating.

[0003] Currently, the mainstream methods for depositing the silicon oxide sidewall insulating layer include depositing the silicon oxide insulating layer by magnetron sputtering and growing the silicon oxide sidewall insulating layer by PECVD (plasma enhanced chemical vapor deposition) using TEOS (tetraethyl orthosilicate) as the source. However, both of these methods require relatively complex equipment and reaction sources, and other reactants need to be prepared when using the above two methods. Specifically: (1) When growing the silicon oxide sidewall insulating layer by PECVD using TEOS as the source, its disadvantage is that the reactants and reaction conditions used are relatively complex, and a radio frequency source and liquid TEOS need to be used as source reactants. (2) For magnetron sputtering, its disadvantage is that a corresponding silicon oxide target needs to be prepared, and magnetron sputtering has relatively poor growth effects on blind holes with high aspect ratios, and it is difficult to guarantee the uniformity and film quality, which is not conducive to subsequent coating of TSV. Summary of the Invention

[0004] In view of the above technical problems, the present invention discloses a method for preparing a silicon oxide insulating layer by atmospheric pressure chemical vapor deposition, aiming to solve the problem of the complexity of the equipment and reactants used in the prior art.

[0005] For this, the technical solution adopted by the present invention is as follows: A method for preparing a silicon oxide insulating layer by atmospheric pressure chemical vapor deposition, comprising the following steps: Step S10, using a photoresist as a mask on a silicon substrate to etch blind holes with a certain aspect ratio; wherein, the blind holes with a certain aspect ratio can be set as multiple blind holes with different aspect ratios; Step S20: Deionized water is introduced into oxygen for humidification treatment. Subsequently, the humid oxygen is introduced into the CVD reaction chamber. The pressure in the CVD reaction chamber is atmospheric pressure. The CVD is heated to a temperature of 900 - 1100 °C and kept at this temperature for 3 - 5 h to allow the silicon substrate to fully react with the wet oxygen. After natural cooling to room temperature, it is taken out.

[0006] In this technical solution, by introducing the reaction of generating silicon oxide and water from wet oxygen and silicon at high temperature into CVD, a method for growing a TSV silicon oxide insulating layer by CVD under atmospheric pressure is obtained. Other methods for growing the TSV silicon oxide sidewall insulating layer, such as PECVD and magnetron sputtering, have the disadvantages of complex equipment and reactants. At the same time, it is difficult to ensure the uniformity of the growth of the sidewall insulating layer. The method of the technical solution of the present invention uses the silicon, oxygen, and water of the silicon substrate itself as reactants and uses CVD as the equipment. The equipment is simple, and a sidewall insulating layer with good uniformity and quality is grown on the TSV sidewall. This method can be widely used in the design and manufacture of TSVs for growing TSV sidewall insulating layers using simple equipment and reactants.

[0007] As a further improvement of the present invention, in step S10, the photoresist is AZ4620, and this photoresist has a very high etching selectivity under the lithography machine; further, the etching rate ratio of the photoresist to the silicon substrate is 1:10.

[0008] As a further improvement of the present invention, in step S20, the oxygen flow rate is 280 - 320 sccm. Further, the oxygen flow rate is 300 sccm.

[0009] As a further improvement of the present invention, in step S20, when heating the CVD, it is first heated to 700 °C at a heating rate of 20 - 30 °C / min, and then heated to 1000 °C at a heating rate of 5 - 15 °C / min.

[0010] As a further improvement of the present invention, in step S20, when heating the CVD, it is first heated to 700 °C at a heating rate of 25 °C / min, and then heated to 1000 °C at a heating rate of 10 °C / min.

[0011] As a further improvement of the present invention, in step S20, oxygen is provided by an oxygen cylinder, and an anti - back - suction oil bubble device is connected between the oxygen cylinder and the CVD. There is deionized water in the anti - back - suction oil bubble device, and the oxygen is humidified in the anti - back - suction oil bubble device before entering the CVD.

[0012] As a further improvement of the present invention, in step S10, the diameter of the blind hole is not less than 3 μm. Further, the diameter of the blind hole is 10 - 25 μm, and the depth is 80 - 110 μm.

[0013] Compared with the prior art, the beneficial effects of the present invention are as follows: Adopting the technical solution of the present invention, the growth steps are simple, and the required reactants and equipment conditions are simple. Using the silicon wafer of the silicon substrate itself, oxygen and water as reactants, a silicon oxide insulating layer with good uniformity and quality can be formed on the side walls of the blind holes, ensuring that the TSV device has good insulation characteristics and guaranteeing the reliability of subsequent film coating. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is the internal structure diagram observed under a scanning electron microscope after laser cutting of a blind hole with a diameter of 11.35um and a depth of 82.06um in Example 1 of the present invention after 3 hours of CVD growth; among them, (a), (b), and (c) are scanning electron microscope pictures of different parts respectively.

[0015] Figure 2 It is the internal structure diagram observed under a scanning electron microscope after laser cutting of a blind hole with a diameter of 15.82um and a depth of 94.16um in Example 2 of the present invention after 3 hours of CVD growth; among them, (a), (b), and (c) are scanning electron microscope pictures of different parts respectively.

[0016] Figure 3 It is the internal structure diagram observed under a scanning electron microscope after cutting of a blind hole with a diameter of 20.47um and a depth of 101.0um in Example 3 of the present invention after 3 hours of CVD growth; among them, (a), (b), and (c) are scanning electron microscope pictures of different parts respectively.

[0017] Figure 4 It is the internal structure diagram observed under a scanning electron microscope after laser cutting of a blind hole with a diameter of 11.35um and a depth of 82.06um in Example 4 of the present invention after 4 hours of CVD growth; among them, (a), (b), and (c) are scanning electron microscope pictures of different parts respectively.

[0018] Figure 5 It is the internal structure diagram observed under a scanning electron microscope after laser cutting of a blind hole with a diameter of 15.82um and a depth of 94.16um in Example 5 of the present invention after 4 hours of CVD growth; among them, (a), (b), and (c) are scanning electron microscope pictures of different parts respectively.

[0019] Figure 6 It is the internal structure diagram observed under a scanning electron microscope after cutting of a blind hole with a diameter of 20.47um and a depth of 101.0um in Example 6 of the present invention after 4 hours of CVD growth; among them, (a), (b), and (c) are scanning electron microscope pictures of different parts respectively. DETAILED DESCRIPTION OF THE INVENTION

[0020] The following further elaborates on the preferred embodiments of the present invention.

[0021] A method for preparing a silicon oxide insulating layer by atmospheric pressure chemical vapor deposition. The chip includes a wafer (silicon substrate), and through holes are provided in the wafer. The method for preparing the silicon oxide insulating layer by atmospheric pressure chemical vapor deposition includes the following steps: S10: Using photoresist as a mask on the silicon substrate, etching blind holes with a certain aspect ratio, and the blind holes with a certain aspect ratio can be set as multiple blind holes with different aspect ratios; S20: First, oxygen is introduced into deionized water at a constant flow rate for humidification treatment, and then the humid oxygen is introduced into the CVD reaction chamber. The pressure in the CVD reaction chamber is atmospheric pressure. In terms of temperature control, it is first heated to 700 °C at a uniform speed for 30 minutes, and then heated for another 30 minutes to reach the target temperature of 1000 °C. Keep the temperature constant at 1000 °C to allow the silicon substrate to fully react with the wet oxygen. After the reaction is completed, heating is stopped, and the sample is taken out after naturally cooling to room temperature in the chamber.

[0022] S30: Cutting the wafer along the diameter of the blind hole to obtain the cut wafer; S40: Observing the internal structure of the blind holes in the cut silicon substrate.

[0023] Further, step S10 includes: using AZ4620 high-selectivity photoresist as an etching mask (the etching speed ratio of the photoresist to the silicon substrate is 1:10).

[0024] Further, in step S20, the oxygen flow rate is 300 sccm.

[0025] Further, the diameter of the grown blind hole is not less than 3 μm.

[0026] Further, in step S20, the reaction occurring in the CVD is that the silicon wafer reacts with wet oxygen at high temperature to generate silicon oxide and water.

[0027] Further, in step S20, an anti-backflow oil bubble generator is used, and a certain amount of deionized water is introduced into the container.

[0028] Further, in step S20, an anti-backflow oil bubble device is connected between the oxygen cylinder and the CVD, and the oxygen is first introduced into the anti-backflow oil bubble device to be humidified before entering the CVD.

[0029] Further, in step S30, the wafer cutting method used is laser stealth cutting.

[0030] Further, in step S40, the internal structure of the blind holes in the cut wafer is observed by scanning electron microscopy.

[0031] The technical solution of the present invention will be further described in detail below in conjunction with specific embodiments and drawings. It should be understood that the following embodiments are only used to explain the present invention and are not used to limit the present invention. Embodiment 1

[0032] A method for growing a TSV silicon oxide insulating layer by CVD under normal pressure in a chip, wherein the wafer material is a silicon substrate, and the method includes the following steps: S10. Provide a wafer, use ultraviolet photoresist (AZ4620) as a mask on the wafer, and etch a blind hole with a diameter of 11.35 um and a depth of 82.06 um; S20. Continuously introduce a certain flow rate of oxygen into the CVD reaction chamber. The oxygen is first introduced into deionized water for humidification treatment before entering the chamber, and then the CVD is heated to 700 °C for 30 minutes and then heated to 1000 °C for 30 minutes. Keep the temperature at 1000 °C for the wafer to react with wet oxygen for 3 hours, and finally take out the sample after natural cooling; S30. Cut the wafer along the diameter of the blind hole to obtain the cut wafer; further, the wafer cutting method used is laser stealth cutting.

[0033] S40. Adhere the cut surface of the cut wafer to a glass slide with conductive adhesive, and move it to a scanning electron microscope (FESEM (field emission scanning electron microscope)) to observe the internal structure of the through hole. The internal characterization content includes the silicon oxide sidewall insulating layer at the TSV opening, the silicon oxide sidewall insulating layer in the middle of the TSV, and the silicon oxide sidewall insulating layer at the bottom of the TSV. Embodiment 2

[0034] The chip in this embodiment is a silicon substrate with TSVs, and a layer of silicon oxide thin film is grown inside the TSVs as an insulating layer. The difference between its steps and those of Embodiment 1 is as follows: The diameter of the TSV is 15.82 um and the depth is 94.16 um. Embodiment 3

[0035] The chip in this embodiment is a silicon substrate with TSVs, and a layer of silicon oxide thin film is grown inside the TSVs as an insulating layer. The difference between its steps and those of Embodiment 1 is as follows: The diameter of the TSV is 20.47 um and the depth is 101.0 um. Embodiment 4

[0036] The chip in this embodiment is a silicon substrate with TSVs, and a layer of silicon oxide thin film is grown inside the TSVs as an insulating layer. The difference between it and Embodiment 1 is as follows: In step S20, the reaction time between the wafer and the silicon wafer is 4 hours. Embodiment 5

[0037] The chip in this embodiment is a silicon substrate with TSVs, and a silicon oxide thin film is grown inside the TSVs as an insulating layer. The difference from Embodiment 2 is that: In step S20, the reaction time between the wafer and the silicon wafer is 4 hours. Embodiment 6

[0038] The chip in this embodiment is a silicon substrate with TSVs, and a silicon oxide thin film is grown inside the TSVs as an insulating layer. The difference from Embodiment 3 is that: In step S20, the reaction time between the wafer and the silicon wafer is 4 hours.

[0039] The internal structure diagrams observed in Embodiments 1 to 6 are respectively as Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 shown.

[0040] It can be seen from Figure 1 that the cut sample is a silicon substrate with TSVs having a diameter of 11.35 um and a depth of 82.06 um, and a silicon oxide thin film is grown as an insulating layer. The CVD growth duration is 3 hours. First, the blind holes are cut by laser scribing and the sidewall morphology of the sample is observed by FESEM; it can be seen that a silicon oxide insulating layer with good uniformity and relatively thick is obtained.

[0041] It can be seen from Figure 2 that the cut sample is a silicon substrate with TSVs having a diameter of 15.82 um and a depth of 94.16 um, and a silicon oxide thin film is grown as an insulating layer. The CVD growth duration is 3 hours. First, the blind holes are cut by laser scribing and the sidewall morphology of the sample is observed by FESEM; it can be seen that a silicon oxide insulating layer with good uniformity and relatively thick is obtained.

[0042] It can be seen from Figure 3 that the cut sample is a silicon substrate with TSVs having a diameter of 20.47 um and a depth of 101.0 um, and a silicon oxide thin film is grown as an insulating layer. The CVD growth duration is 3 hours. First, the blind holes are cut by laser scribing and the sidewall morphology of the sample is observed by FESEM; it can be seen that a silicon oxide insulating layer with good uniformity and relatively thick is obtained.

[0043] It can be seen from Figure 4 that the cut sample is a silicon substrate with TSVs having a diameter of 11.35 um and a depth of 82.06 um, and a silicon oxide thin film is grown as an insulating layer. The CVD growth duration is 4 hours. First, the blind holes are cut by laser scribing and the sidewall morphology of the sample is observed by FESEM; it can be seen that a silicon oxide insulating layer with good uniformity and relatively thick is obtained.

[0044] As can be seen Figure 5 from Figure 5 , the cut sample is a silicon substrate with a TSV having a diameter of 15.82 um and a depth of 94.16 um, and a silicon oxide thin film is grown as an insulating layer. The CVD growth time is 4 hours. First, the blind hole is cut by laser stealth dicing, and the sidewall morphology of the sample is observed by FESEM. It can be seen that a silicon oxide insulating layer with good uniformity and relatively thick is obtained.

[0045] As can be seen Figure 6 from Figure 6 , the cut sample is a silicon substrate with a TSV having a diameter of 20.47 um and a depth of 101.0 um, and a silicon oxide thin film is grown as an insulating layer. The CVD growth time is 4 hours. First, the blind hole is cut by laser stealth dicing, and the sidewall morphology of the sample is observed by FESEM. It can be seen that a silicon oxide insulating layer with good uniformity and relatively thick is obtained.

[0046] In summary, the technical solution of the present invention introduces the reaction principle that wet oxygen reacts with silicon to generate silicon oxide and water into the chemical vapor deposition (CVD) process, and develops a method for growing a silicon through hole (TSV) silicon oxide insulating layer by CVD under atmospheric pressure. The obtained insulating layer has good uniformity and high quality.

[0047] In the existing TSV silicon oxide sidewall insulating layer growth technologies, such as plasma enhanced chemical vapor deposition (PECVD) and magnetron sputtering, there are problems such as complex equipment structures and a large variety of reactants, and challenges also exist in ensuring the uniformity of the sidewall insulating layer growth. In sharp contrast, the method proposed by the present invention cleverly uses the silicon element, oxygen, and water in the silicon substrate itself as reactants. The equipment only requires a CVD device and an anti-backflow oil bubble generator, greatly simplifying the equipment composition. Through this method, an insulating layer with good uniformity and high quality can be grown on the TSV sidewall. This method has significant advantages and broad application prospects, and can be widely applied to the field of TSV design and fabrication, providing an effective way to grow the TSV sidewall insulating layer using simple equipment and reactants.

[0048] The above content is a further detailed description of the present invention in combination with specific preferred embodiments. It cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention belongs, without departing from the concept of the present invention, several simple deductions or substitutions can still be made, which should all be regarded as belonging to the protection scope of the present invention.

Claims

1. A method for preparing a silicon oxide insulating layer by atmospheric pressure chemical vapor deposition, characterized in that, Including: Step S10: Using a photoresist as a mask on a silicon substrate to etch blind holes with a certain aspect ratio; wherein, the blind holes with a certain aspect ratio can be set as multiple blind holes with different aspect ratios. Step S20: Pass deionized water into oxygen for humidification treatment, and then introduce the humid oxygen into the CVD reaction chamber. The pressure in the CVD reaction chamber is atmospheric pressure. Heat the CVD to a temperature of 900 - 1100 °C, keep it warm for 3 - 5 h, so that the silicon substrate fully reacts with the wet oxygen, and take it out after natural cooling to room temperature.

2. The method for preparing a silicon oxide insulating layer by atmospheric pressure chemical vapor deposition according to claim 1, wherein: In step S10, the photoresist is AZ4620.

3. The method for preparing a silicon oxide insulating layer by atmospheric pressure chemical vapor deposition according to claim 1, wherein: In step S20, the oxygen flow rate is 280 - 320 sccm.

4. The method for preparing a silicon oxide insulating layer by atmospheric pressure chemical vapor deposition according to claim 1, wherein: In step S20, when heating the CVD, first heat it to 700 °C at a heating rate of 20 - 30 °C / min, and then heat it to 1000 °C at a heating rate of 5 - 15 °C / min.

5. The method for preparing a silicon oxide insulating layer by atmospheric pressure chemical vapor deposition according to claim 4, wherein: In step S20, when heating the CVD, first heat it to 700 °C at a heating rate of 25 °C / min, and then heat it to 1000 °C at a heating rate of 10 °C / min.

6. The method for preparing a silicon oxide insulating layer by atmospheric pressure chemical vapor deposition according to claim 1, characterized in that: In step S20, oxygen is provided by an oxygen cylinder, and an anti-backflow oil bubble device is connected between the oxygen cylinder and the CVD. There is deionized water in the anti-backflow oil bubble device, and the oxygen is wetted in the anti-backflow oil bubble device before entering the CVD.

7. The method for preparing a silicon oxide insulating layer by atmospheric pressure chemical vapor deposition according to any one of claims 1 to 6, characterized in that: In step S10, the diameter of the blind holes is 10 - 25 μm, and the depth is 80 - 110 μm.

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