Wireless power transmission system and transceiver circuit thereof

Abstract

The invention discloses a wireless power transmission system and a transceiving circuit thereof, the wireless power transmission system comprises a control module and a transceiving module, the control module is connected with the transceiving module, the control module comprises a measurement feedback unit, and the measurement feedback unit comprises a plurality of operational amplifiers, a plurality of resistors, a plurality of connectors, a plurality of MOS tubes, a diode and a capacitor. The in-phase end of the operational amplifier U1 in the plurality of operational amplifiers is connected with the drain electrode of the MOS tube Q2, the anti-phase end of the operational amplifier U1 is connected with the in-phase end of the operational amplifier U4, the cathode of the diode D1 and one end of the capacitor C1, and the output end of the operational amplifier U1 is connected with the anode of the diode D1; the inverting end of the operational amplifier U4 is connected with the output end of the operational amplifier U4; the source electrode of the MOS tube Q2 is connected with the P1 end of the connector; the other end of the capacitor C1 is connected with the grounding end. The transmitting frequency of the transmitting unit can be measured and adjusted based on the resonant frequency of the receiving unit, and deviation between the actual resonant frequency and the nominal value caused by deviation of element parameters such as capacitors and inductors along with temperature or aging is prevented.

Description

Technical Field

[0001] The present invention relates to the technical field of wireless power transmission, and particularly to a wireless power transmission system and its transmitting and receiving circuits. Background Art

[0002] CN113206553A discloses a wireless power transmission system and its transmitting circuit and receiving circuit. This circuit can achieve the maximum efficiency of energy transmission by adjusting the impedance of the receiving circuit to resonate and match with the oscillation frequency of the transmitting circuit. However, in actual use, the parameter values of components such as capacitors and inductors shift with temperature or aging, resulting in a deviation between the actual resonance frequency and the nominal value. Therefore, a wireless power transmission system and its transmitting and receiving circuits are proposed, which can measure and adjust the transmitting frequency of the transmitting unit based on the resonance frequency of the receiving unit, prevent the parameter values of components such as capacitors and inductors from shifting with temperature or aging, resulting in a deviation between the actual resonance frequency and the nominal value, and can automatically set the anti-frequency deviation reference threshold range while measuring and adjusting, and automatically correct the frequency deviation when the frequency deviation occurs in any one of the transmitting unit / receiving unit, so that the frequency deviation can be corrected in time when it occurs in any unit during the operation of the system. When the frequency deviation occurs in both the transmitting unit / receiving unit, the measurement and adjustment are re-performed and the anti-frequency deviation reference threshold range is automatically set. Summary of the Invention

[0003] In view of the above technical problems, the object of the present invention is to provide a wireless power transmission and receiving circuit, which includes a control module and a transmitting and receiving module. The control module is connected to the transmitting and receiving module. The control module includes a measurement and feedback unit. The measurement and feedback unit includes several operational amplifiers, several resistors, several connectors, several MOS transistors, a diode, and a capacitor. The non-inverting input terminal of operational amplifier U1 in the several operational amplifiers is connected to the drain of MOS transistor Q2, the inverting input terminal is connected to the non-inverting input terminal of operational amplifier U4, the cathode of diode D1, and one end of capacitor C1, and the output terminal is connected to the anode of diode D1; the inverting input terminal of operational amplifier U4 is connected to the output terminal of operational amplifier U4; the source of MOS transistor Q2 is connected to the P1 terminal of the connector; the other end of capacitor C1 is connected to the ground terminal.

[0004] Further, the non-inverting input terminal of operational amplifier U2 in the several operational amplifiers in the measurement and feedback unit is connected to one end of resistor R2 and one end of resistor R3, the inverting input terminal is connected to one end of resistor R4 and one end of resistor R5, and the output terminal is connected to the other end of resistor R4; the non-inverting input terminal of operational amplifier U5 is connected to the P2 terminal of the connector, the inverting input terminal is connected to the output terminal of operational amplifier U5 and the other end of resistor R5; the other end of resistor R2 is connected to the output terminal of operational amplifier U4; the other end of resistor R3 is connected to the ground terminal.

[0005] Further, the inverting input terminal of operational amplifier U3 among several operational amplifiers in the measurement feedback unit is connected to the output terminal of operational amplifier U2, the non-inverting input terminal is connected to the non-inverting input terminal of operational amplifier U1 and one end of resistor R1, and the output terminal is connected to the gates of MOS transistor Q1 and MOS transistor Q2; the drain of MOS transistor Q1 is connected to the inverting input terminal of operational amplifier U4, the source, one end of resistor R6 and the terminal of connector P3 are connected; the other end of resistor R1 and the other end of resistor R6 are connected to the ground terminal.

[0006] Further, the control module further includes a frequency deviation prevention unit, and the frequency deviation prevention unit includes several operational amplifiers, several resistors, several connectors, and several MOS transistors. The non-inverting input terminal of operational amplifier U6 among the several operational amplifiers is connected to one end of resistor R11 and one end of resistor R12, the inverting input terminal is connected to one end of resistor R9 and one end of resistor R10, and the output terminal is connected to the other end of resistor R9; the other end of resistor R11 is connected to the output terminal of operational amplifier U5; the other end of resistor R12 is connected to the output terminal of operational amplifier U4; the other end of resistor R10 is connected to the ground terminal.

[0007] Further, the non-inverting input terminal of operational amplifier U7, the inverting input terminal of operational amplifier U8 among several operational amplifiers in the frequency deviation prevention unit are connected to the terminal of connector P1, the inverting input terminal is connected to the output terminal of operational amplifier U6, and the output terminal, one end of resistor R14 are connected to the terminal of connector P4; the non-inverting input terminal of operational amplifier U8 is connected to the output terminal of operational amplifier U2, and the output terminal, one end of resistor R13 are connected to the terminal of connector P5; the other end of resistor R13 and the other end of resistor R14 are connected to the ground terminal.

[0008] Further, the gates of MOS transistor Q5, MOS transistor Q6, one end of resistor R8 and the gate of MOS transistor Q1 among several MOS transistors in the frequency deviation prevention unit are connected, the source is connected to the terminal of connector P4; the source of MOS transistor Q6 is connected to the terminal of connector P5; the drains of MOS transistor Q5, MOS transistor Q6 and the other end of resistor R8 are connected to the ground terminal.

[0009] Further, the drain of MOS transistor Q3 among several MOS transistors in the frequency deviation prevention unit is connected to the output terminal of operational amplifier U3, the gate, the gate of MOS transistor Q4, one end of resistor R7 are connected to the terminal of connector P6; the drain of MOS transistor Q4 is connected to one end of capacitor C1; the sources of MOS transistor Q3, MOS transistor Q4 and the other end of resistor R7 are connected to the ground terminal.

[0010] Further, the transceiver module includes an adjustment unit, a transmission unit, and a reception unit. The transmission unit is connected to the adjustment unit and the reception unit. The adjustment unit is used to adjust the signal frequency fed back by the transmission unit and feed back a reset signal to the control module, and the transmission unit is used to feed back a frequency signal to the reception unit.

[0011] Further, a wireless power transmission system includes the transceiver circuit described in any one of the above.

[0012] The beneficial effects of the present invention compared with the prior art are as follows:

[0013] The present invention can measure and adjust the transmission frequency of the transmission unit based on the resonance frequency of the receiving unit, prevent the parameters of components such as capacitors and inductors from shifting with temperature or aging, resulting in a deviation between the actual resonance frequency and the nominal value, and can automatically set the anti-frequency deviation reference threshold range while measuring and adjusting, and automatically correct the frequency deviation when the frequency deviation occurs in either the transmission unit or the receiving unit. When the frequency deviation occurs in any unit during the operation of the system, it can be corrected in a timely manner. When the frequency deviation occurs in both the transmission unit and the receiving unit, the measurement and adjustment are re-performed, and the anti-frequency deviation reference threshold range is automatically set. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for the prior art and the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0015] Figure 1 It is a schematic diagram of the control module circuit provided by the present invention.

[0016] Figure 2 It is a schematic diagram of the transceiver module structure provided by the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0017] In order to make the purpose and advantages of the present invention more clear, the following specifically describes the present invention in conjunction with the embodiments. It should be understood that the following text is only used to describe one or several specific embodiments of the present invention, and does not strictly limit the protection scope of the specific claims of the present invention.

[0018] The present invention discloses a wireless power transmission and reception circuit, including a control module and a transceiver module. The control module is connected to the transceiver module. The control module includes a measurement and feedback unit. The measurement and feedback unit includes several operational amplifiers, several resistors, several connectors, several MOS transistors, a diode, and a capacitor. The non-inverting input terminal of the operational amplifier U1 in the several operational amplifiers is connected to the drain of the MOS transistor Q2, the inverting input terminal is connected to the non-inverting input terminal of the operational amplifier U4, the cathode of the diode D1, and one end of the capacitor C1, and the output terminal is connected to the anode of the diode D1; the inverting input terminal of the operational amplifier U4 is connected to the output terminal of the operational amplifier U4; the source of the MOS transistor Q2 is connected to the terminal P1 of the connector; the other end of the capacitor C1 is connected to the ground terminal.

[0019] Such as Figure 1As shown, specifically, the non-inverting input terminal of operational amplifier U2 among several operational amplifiers in the measurement feedback unit is connected to one end of resistor R2 and one end of resistor R3, the inverting input terminal is connected to one end of resistor R4 and one end of resistor R5, and the output terminal is connected to the other end of resistor R4; the non-inverting input terminal of operational amplifier U5 is connected to terminal P2 of the connector, the inverting input terminal is connected to the output terminal of operational amplifier U5 and the other end of resistor R5; the other end of resistor R2 is connected to the output terminal of operational amplifier U4; the other end of resistor R3 is connected to the ground terminal.

[0020] As Figure 1 As shown, specifically, the non-inverting input terminal of operational amplifier U3 among several operational amplifiers in the measurement feedback unit is connected to the output terminal of operational amplifier U2, the inverting input terminal is connected to the non-inverting input terminal of operational amplifier U1 and one end of resistor R1, and the output terminal is connected to the gates of MOS transistor Q1 and MOS transistor Q2; the drain of MOS transistor Q1 is connected to the inverting input terminal of operational amplifier U4, and the source and one end of resistor R6 are connected to terminal P3 of the connector; the other end of resistor R1 and the other end of resistor R6 are connected to the ground terminal.

[0021] As Figure 1 As shown, specifically, the control module further includes a frequency deviation prevention unit, and the frequency deviation prevention unit includes several operational amplifiers, several resistors, several connectors, and several MOS transistors. The non-inverting input terminal of operational amplifier U6 among the several operational amplifiers is connected to one end of resistor R11 and one end of resistor R12, the inverting input terminal is connected to one end of resistor R9 and one end of resistor R10, and the output terminal is connected to the other end of resistor R9; the other end of resistor R11 is connected to the output terminal of operational amplifier U5; the other end of resistor R12 is connected to the output terminal of operational amplifier U4; the other end of resistor R10 is connected to the ground terminal.

[0022] As Figure 1 As shown, specifically, the non-inverting input terminal of operational amplifier U7 and the inverting input terminal of operational amplifier U8 among several operational amplifiers in the frequency deviation prevention unit are connected to terminal P1 of the connector, the inverting input terminal is connected to the output terminal of operational amplifier U6, and the output terminal, one end of resistor R14 are connected to terminal P4 of the connector; the non-inverting input terminal of operational amplifier U8 is connected to the output terminal of operational amplifier U2, and the output terminal, one end of resistor R13 are connected to terminal P5 of the connector; the other end of resistor R13 and the other end of resistor R14 are connected to the ground terminal.

[0023] As Figure 1 As shown, specifically, the gates of MOS transistor Q5 and MOS transistor Q6, one end of resistor R8, and the gate of MOS transistor Q1 among several MOS transistors in the frequency deviation prevention unit are connected, and the source is connected to terminal P4 of the connector; the source of MOS transistor Q6 is connected to terminal P5 of the connector; the drains of MOS transistor Q5, MOS transistor Q6, and the other end of resistor R8 are connected to the ground terminal.

[0024] As Figure 1As shown, specifically, the drain of MOS transistor Q3 among several MOS transistors in the frequency offset prevention unit is connected to the output terminal of operational amplifier U3, and the gate is connected to the gate of MOS transistor Q4, one end of resistor R7, and terminal P6 of the connector; the drain of MOS transistor Q4 is connected to one end of capacitor C1; the sources of MOS transistors Q3 and Q4, the other end of resistor R7 are connected to the ground terminal.

[0025] As Figure 2 shown, specifically, the transceiver module includes an adjustment unit, a transmission unit, and a reception unit. The transmission unit is connected to the adjustment unit and the reception unit. The adjustment unit is used to adjust the signal frequency fed back by the transmission unit and feed back a reset signal to the control module. The transmission unit is used to feed back a frequency signal to the reception unit.

[0026] As Figure 1 、 Figure 2 shown, specifically, a wireless power transmission system includes the transceiver circuit described in any one of the above.

[0027] Refer to Figure 1 、 Figure 2 At the initial stage, the transmission unit in the transmission module feeds back a signal with a continuously changing frequency to the reception unit. The frequency range is set on the transmission unit. A current sensor is also provided in the transceiver circuit. The current sensor detects the amplitude of the signal current received by the reception unit and converts it into a voltage signal, which is then fed back to the measurement feedback unit connector P1 in the control module. The greater the current, the higher the amplitude of the voltage signal. The signal at terminal P1 of the connector is fed back to the non-inverting terminal of operational amplifier U1 after passing through the source and drain of MOS transistor Q2. Operational amplifier U1 outputs. The signal at the output terminal of operational amplifier U1 is fed back to the inverting terminal of operational amplifier U1 through diode D1, enabling the signal at the inverting terminal of operational amplifier U1 to follow the signal at terminal P1 of the connector when the signal at terminal P1 of the connector rises. At the same time, the potential of capacitor C1 rises, thereby performing peak detection on the signal received by the reception unit in the transceiver module to measure the resonant frequency of the reception unit. When the signal at terminal P1 of the connector is at a peak, the signal frequency fed back by the transmission unit at this time is the signal frequency required when the reception unit is at the resonant frequency. When the frequency signal of the transmission unit continues to change, the amplitude of the signal at terminal P1 of the connector decreases, and diode D1 prevents reverse conduction. The amplitude of the signal at the inverting terminal of operational amplifier U1 is measured at the peak signal amplitude. At the same time, the signal at the inverting terminal of operational amplifier U1 is fed back to the non-inverting terminal of operational amplifier U4. The output terminal and the inverting terminal of operational amplifier U4 are connected in negative feedback, causing operational amplifier U4 to follow and output the measured peak signal. This signal is the measured signal. In this way, when the reception unit initially obtains the signal feedback from the transmission unit, the measurement feedback unit can measure the transmission unit based on the resonant frequency of the reception unit.

[0028] Refer to Figure 1, the connector P2 is used to receive the set anti-frequency deviation reference signal, which is set at the terminal and fed back to the connector P2 by the terminal. The signal at the connector P2 end is fed back to the non-inverting input terminal of the operational amplifier U5. The output terminal of the operational amplifier U5 and the inverting input terminal of the operational amplifier U5 are negatively feedback-connected to make the operational amplifier U5 follow and output the anti-frequency deviation reference signal. At the same time, the measured signal passes through the resistor R2 and the resistor R3 to the ground terminal. The signal at the resistor R3 end is fed back to the non-inverting input terminal of the operational amplifier U2. The non-inverting input terminal of the operational amplifier U2 is negatively feedback-connected to the inverting input terminal of the operational amplifier U2 through the resistor R4. The anti-frequency deviation reference signal is fed back to the inverting input terminal of the operational amplifier U2 after passing through the resistor R5, so that the output terminal of the operational amplifier U2 outputs the lower limit value of the anti-frequency deviation reference threshold range based on the signal amplitudes of the measured signal and the anti-frequency deviation reference signal. At the same time, the signal at the output terminal of the operational amplifier U2 is fed back to the non-inverting input terminal of the operational amplifier U3. The signal at the connector P1 end passes through the MOS transistor Q2 and is synchronously fed back to the inverting input terminal of the operational amplifier U3. The resistor R1 is the pull-down resistor for the inverting input terminal of the operational amplifier U3 and the non-inverting input terminal of the operational amplifier U1. When the operational amplifier U4 feeds back the measured signal and the signal amplitude at the connector P1 end gradually decreases and is lower than the lower limit value of the anti-frequency deviation reference threshold range, the operational amplifier U3 outputs. The signal at the output terminal of the operational amplifier U3 is fed back to the gate of the MOS transistor Q1. The voltage difference between the gate and the source of the MOS transistor Q1 is higher than the conduction threshold, and the MOS transistor Q1 conducts. The measured signal passes through the drain, source of the MOS transistor Q1, and the resistor R6 to the ground terminal. The signal at the resistor R6 end is fed back to the transmitting unit through the connector P3. At this time, the transmitting unit feeds back a signal with a fixed frequency to the receiving unit based on its signal amplitude. The lower the amplitude setting of the anti-frequency deviation reference signal, the faster the receiving unit obtains the feedback response of the measured signal. At the same time, the signal at the output terminal of the operational amplifier U3 is synchronously fed back to the gate of the MOS transistor Q2. The voltage difference between the gate and the source of the MOS transistor Q2 is higher than the conduction threshold, and the MOS transistor Q2 is cut off. The non-inverting input terminal of the operational amplifier U1 loses the signal feedback from the connector P1 end. In this way, after the measurement feedback unit measures the transmitting unit based on the resonant frequency of the receiving unit, the transmitting unit completes the measurement adjustment, adapts to the resonant frequency of the receiving unit, and at the same time cuts off the signal feedback from the connector P1 to the non-inverting input terminal of the operational amplifier U1, preventing the parameter deviation of components such as capacitors and inductors due to temperature or aging, resulting in a deviation between the actual resonant frequency and the nominal value.

[0029] Refer to Figure 1, the signal at the output terminal of the operational amplifier U5 is fed back to the non-inverting input terminal of the operational amplifier U6 through the resistor R11, the signal at the output terminal of the operational amplifier U4 is fed back to the non-inverting input terminal of the operational amplifier U6 through the resistor R12, the signal at the output terminal of the operational amplifier U6 passes through the resistor R9 and the resistor R10 to the ground terminal, the signal at the resistor R10 terminal is fed back to the inverting input terminal of the operational amplifier U6, and the operational amplifier U6 outputs the upper limit value of the anti-frequency deviation reference threshold range based on the measured signal, so as to automatically set the anti-frequency deviation reference threshold range while the transmitting unit performs measurement and adjustment. When the frequency deviation occurs in either the transmitting unit or the receiving unit and the signal at the connector P1 terminal drops and is lower than the lower limit value of the anti-frequency deviation reference threshold range, the operational amplifier U8 outputs. The signal at the output terminal of the operational amplifier U8 passes through the resistor R13 to the ground terminal, and the signal at the resistor R13 terminal is the correction signal. This signal is fed back to the adjustment unit in the transceiver module through the connector P5. When the adjustment unit obtains this signal feedback, it adjusts the signal frequency fed back by the transmitting unit to be consistent with the resonant frequency of the receiving unit, so as to correct the frequency deviation when the frequency deviation occurs in either the transmitting unit or the receiving unit during the operation of the system. When the adjustment unit obtains the correction signal and cannot adjust the signal frequency fed back by the transmitting unit to be consistent with the resonant frequency of the receiving unit within a certain period of time, at this time, it means that the transmitting frequency of the transmitting unit and the resonant frequency of the receiving unit both have frequency deviations. The adjustment unit feeds back a reset signal to the connector P6 of the anti-frequency deviation unit in the control module. The signal at the connector P6 terminal is fed back to the gates of the MOS transistors Q3 and Q4. The resistor R7 is used to discharge the parasitic capacitances of the gates of the MOS transistors Q3 and Q4. The voltage difference between the gate and the source of the MOS transistor Q3 is higher than the conduction threshold, and the MOS transistor Q3 conducts. The signal at the output terminal of the operational amplifier U3 passes through the drain, source of the MOS transistor Q3 to the ground terminal, and the signal at the output terminal of the operational amplifier U3 is pulled to the ground potential. The voltage difference between the gate and the source of the MOS transistor Q4 is higher than the conduction threshold, and the MOS transistor Q4 conducts. The signal at the capacitor C1 terminal passes through the drain, source of the MOS transistor Q4 to the ground terminal, and the signal at the non-inverting input terminal of the operational amplifier U4 is pulled to the ground potential. At this time, the measurement feedback unit and the anti-frequency deviation unit are reset synchronously, so as to enable the measurement feedback unit to re-measure and adjust the transmitting unit in the transceiver module and the anti-frequency deviation unit to re-complete the automatic setting of the anti-frequency deviation reference threshold range when the transmitting frequency of the transmitting unit and the resonant frequency of the receiving unit both have frequency deviations. When the load suddenly changes or is mismatched, causing the load impedance at the receiving end to suddenly decrease (such as short circuit or connecting a low-impedance device), it will cause abnormal accumulation of current at the receiving end, causing the signal at the connector P1 terminal to rise. When the signal at the connector P1 terminal rises and is higher than the upper limit value of the anti-frequency deviation reference threshold range, the operational amplifier U7 outputs. The signal at the output terminal of the operational amplifier U7 passes through the resistor R14 to the ground terminal, and the signal at the resistor R14 terminal is the abnormal signal received by the receiving unit. This signal is fed back to the terminal through the connector P4, and the terminal performs corresponding power-off and warning processing. The signal at the output terminal of the operational amplifier U3 is synchronously fed back to the gates of the MOS transistors Q5 and Q6.The resistor R8 is used to discharge the parasitic capacitances of the gates of MOS transistors Q1, Q2, Q5, and Q6. When the operational amplifier U3 is cutoff, the voltage difference between the gate and the source of MOS transistor Q5 is lower than the conduction threshold, and MOS transistor Q5 conducts. The signal at the output terminal of operational amplifier U7 passes through the source and drain of MOS transistor Q5 to the ground terminal, pulling the signal at the output terminal of operational amplifier U7 to the ground potential. The voltage difference between the gate and the source of MOS transistor Q6 is lower than the conduction threshold, and MOS transistor Q6 conducts. The signal at the output terminal of operational amplifier U8 passes through the source and drain of MOS transistor Q6 to the ground terminal, pulling the signal at the output terminal of operational amplifier U6 to the ground potential, thereby restricting the signal feedback of connectors P4 and P5 before the measurement in the transmitting unit.

[0030] For those skilled in the art, it is obvious that the present invention is not limited to the details of the above-described exemplary embodiments, and the present invention can be implemented in other specific forms without departing from the spirit or basic characteristics of the present invention. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting. The scope of the present invention is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be embraced by the present invention. Any reference signs in the claims should not be construed as limiting the claimed invention.

Claims

1. A wireless power transmission and reception circuit, characterized in that It includes a control module and a transceiver module, and the control module is connected to the transceiver module. The control module includes a measurement feedback unit, and the measurement feedback unit includes several operational amplifiers, several resistors, several connectors, several MOS transistors, a diode, and a capacitor. The non-inverting input terminal of operational amplifier U1 in the several operational amplifiers is connected to the drain of MOS transistor Q2, the inverting input terminal is connected to the non-inverting input terminal of operational amplifier U4, the cathode of diode D1, and one end of capacitor C1, and the output terminal is connected to the anode of diode D1; the inverting input terminal of operational amplifier U4 is connected to the output terminal of operational amplifier U4; the source of MOS transistor Q2 is connected to the terminal of connector P1; the other end of capacitor C1 is connected to the ground terminal.

2. The wireless power transmission and reception circuit according to claim 1, wherein In the measurement feedback unit, the non-inverting input terminal of operational amplifier U2 in the several operational amplifiers is connected to one end of resistor R2 and one end of resistor R3, the inverting input terminal is connected to one end of resistor R4 and one end of resistor R5, and the output terminal is connected to the other end of resistor R4; the non-inverting input terminal of operational amplifier U5 is connected to the terminal of connector P2, the inverting input terminal is connected to the output terminal of operational amplifier U5 and the other end of resistor R5; the other end of resistor R2 is connected to the output terminal of operational amplifier U4; the other end of resistor R3 is connected to the ground terminal.

3. The wireless power transmission and reception circuit according to claim 2, wherein In the measurement feedback unit, the non-inverting input terminal of operational amplifier U3 in the several operational amplifiers is connected to the output terminal of operational amplifier U2, the inverting input terminal is connected to the non-inverting input terminal of operational amplifier U1 and one end of resistor R1, and the output terminal is connected to the gate of MOS transistor Q1 and the gate of MOS transistor Q2; the drain of MOS transistor Q1 is connected to the inverting input terminal of operational amplifier U4, and the source, one end of resistor R6 are connected to the terminal of connector P3; the other end of resistor R1 and the other end of resistor R6 are connected to the ground terminal.

4. The wireless power transmission and reception circuit according to claim 2, wherein The control module further includes an anti-frequency deviation unit, and the anti-frequency deviation unit includes several operational amplifiers, several resistors, several connectors, several MOS transistors. The non-inverting input terminal of operational amplifier U6 in the several operational amplifiers is connected to one end of resistor R11 and one end of resistor R12, the inverting input terminal is connected to one end of resistor R9 and one end of resistor R10, and the output terminal is connected to the other end of resistor R9; the other end of resistor R11 is connected to the output terminal of operational amplifier U5; the other end of resistor R12 is connected to the output terminal of operational amplifier U4; the other end of resistor R10 is connected to the ground terminal.

5. The wireless power transmission and reception circuit according to claim 4, characterized in that, In the anti-frequency deviation unit, the non-inverting input terminal of operational amplifier U7 in the several operational amplifiers, the inverting input terminal of operational amplifier U8 are connected to the terminal of connector P1, the inverting input terminal is connected to the output terminal of operational amplifier U6, and the output terminal, one end of resistor R14 are connected to the terminal of connector P4; the non-inverting input terminal of operational amplifier U8 is connected to the output terminal of operational amplifier U2, and the output terminal, one end of resistor R13 are connected to the terminal of connector P5; the other end of resistor R13 and the other end of resistor R14 are connected to the ground terminal.

6. The wireless power transmission and reception circuit according to claim 5, wherein In the anti-frequency deviation unit, the gate of MOS transistor Q5 in the several MOS transistors is connected to the gate of MOS transistor Q6, one end of resistor R8, the gate of MOS transistor Q1, and the source is connected to the terminal of connector P4; the source of MOS transistor Q6 is connected to the terminal of connector P5; the drain of MOS transistor Q5, the drain of MOS transistor Q6, and the other end of resistor R8 are connected to the ground terminal.

7. The wireless power transmission and reception circuit according to claim 3, wherein In the frequency offset prevention unit, the drain of MOS transistor Q3 among several MOS transistors is connected to the output terminal of operational amplifier U3, and the gate is connected to the gate of MOS transistor Q4, one end of resistor R7, and terminal P6 of the connector; the drain of MOS transistor Q4 is connected to one end of capacitor C1; the sources of MOS transistors Q3 and Q4, the other end of resistor R7 are connected to the ground terminal.

8. A wireless power transmission and reception circuit, characterized in that The transceiver module includes an adjustment unit, a transmission unit, and a reception unit. The transmission unit is connected to the adjustment unit and the reception unit. The adjustment unit is used to adjust the signal frequency fed back by the transmission unit and feed back a reset signal to the control module, and the transmission unit is used to feed back a frequency signal to the reception unit.

9. A wireless power transmission system, wherein the wireless power transmission system has the transceiver circuit according to any one of the above claims 1-8.

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