Non-polar gallium nitride-based enhanced HEMT with low source-drain contact resistance

Abstract

The invention provides a non-polar gallium nitride-based enhanced HEMT (High Electron Mobility Transistor) with low source-drain contact resistance, and relates to the technical field of semiconductors. Comprising an m-plane substrate, an unintentionally doped GaN buffer layer, a Fe doped GaN layer, a GaN channel layer, an AlN insertion layer and an AlGaN barrier layer which are sequentially arranged from bottom to top, the plurality of grooves are arranged in the edge areas of the two sides of the AlGaN barrier layer at intervals, penetrate through the AlGaN barrier layer and are in contact with the upper surface of the AlN insertion layer, and target GaN is arranged in each groove so as to form longitudinal AlGaN / GaN superlattice structures on the two sides; the GaN cap layer is formed on the middle region of the AlGaN barrier layer; the grid electrode is formed on the GaN cap layer; the source electrode is formed on the AlGaN / GaN superlattice structure on one side; and the drain electrode is formed on the AlGaN / GaN superlattice structure on the other side. In this way, the contact resistance is reduced without being affected by the polarization effect.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular, to a non-polar gallium nitride-based enhancement-mode high electron mobility transistor (HEMT) with low source-drain contact resistance. Background Art

[0002] As one of the representatives of the third-generation semiconductors, GaN materials have excellent properties such as wide bandgap, high frequency, high power, high voltage resistance, high temperature resistance, and radiation resistance, and are ideal materials for fabricating high-power devices and optoelectronic devices with high temperature and high frequency. Due to the asymmetric crystal structure of GaN, there is a strong spontaneous polarization and piezoelectric polarization inside. In electronic devices, the polarization effect can induce a two-dimensional electron gas with a high surface density, and it has a high electron mobility. Therefore, it is widely used in high-frequency high-power or high-voltage electronic devices. Traditional GaN-based HEMT devices are generally depletion-mode devices. Even without doping, a high-density two-dimensional electron gas will be formed at the heterojunction interface. Therefore, the device is in the on state when the gate voltage is zero, and only by applying a negative gate voltage can the device be turned off. The typical value of the threshold voltage is about -4V. Enhancement-mode devices play a crucial role in the safe operation of power electronic devices. Only by realizing enhancement-mode devices can the requirements of the gate drive circuit be met, thereby simplifying the complexity of the circuit system and reducing the system cost. Therefore, enhancement-mode GaN-based electronic devices have become the current research hotspots and focuses.

[0003] Currently, the existing methods for realizing enhancement-mode HEMTs mainly include thin barriers, P cap layers, trench gate etching, F ion implantation in the region under the gate, etc. However, in order to realize enhancement-mode HEMTs, it is necessary to deplete the electrons existing in the channel. The above-mentioned existing technologies deplete electrons by grooving, ion implantation, etc., so as to pinch off the channel. The reason for depleting electrons is that the polarization effect induces a large amount of two-dimensional electron gas, and the high concentration of two-dimensional electron gas makes it difficult to fabricate enhancement-mode devices. The above-mentioned existing technologies are based on polar-plane heterojunctions to reduce the two-dimensional electron gas in the channel, so that the existing technologies are affected by the polarization effect. Due to the existence of the AlGaN barrier layer, the work function difference between the AlGaN barrier layer and the metal is relatively large, resulting in a relatively high source-drain contact resistance. Summary of the Invention

[0004] The purpose of the embodiments of the present invention is to provide a non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance, which solves the problems that the existing technologies are affected by the polarization effect and have a relatively high source-drain contact resistance.

[0005] To solve the above technical problems, the embodiments of the present invention provide the following technical solutions:

[0006] The first aspect of the present invention provides a non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance, comprising: an m-plane substrate, an unintentionally doped GaN buffer layer, an Fe-doped GaN layer, a GaN channel layer, an AlN insertion layer, and an AlGaN barrier layer, which are sequentially arranged from bottom to top;

[0007] A plurality of grooves are arranged at intervals in the edge regions on both sides of the AlGaN barrier layer. The plurality of grooves penetrate through the AlGaN barrier layer and contact the upper surface of the AlN insertion layer. The interior of each groove is provided with a target GaN to form longitudinal AlGaN / GaN superlattice structures on both sides. The longitudinal AlGaN / GaN superlattice structures on both sides are perpendicular to the upper surface of the AlN insertion layer;

[0008] A GaN cap layer is formed on the middle region of the AlGaN barrier layer;

[0009] A gate is formed on the GaN cap layer;

[0010] A source is formed on the longitudinal AlGaN / GaN superlattice structure on one side;

[0011] A drain is formed on the longitudinal AlGaN / GaN superlattice structure on the other side.

[0012] In some modified embodiments of the first aspect of the present invention, the m-plane substrate is one of an m-plane SiC substrate, an m-plane sapphire substrate, and an m-plane GaN substrate.

[0013] In some modified embodiments of the first aspect of the present invention, the thickness of the Fe-doped GaN layer is 1-1.5 μm, and the Fe doping concentration is 10 16 ~10 19 cm -3 .

[0014] In some modified embodiments of the first aspect of the present invention, the thickness of the unintentionally doped GaN buffer layer is 1-2 μm, the thickness of the GaN channel layer is 300-800 nm, and the thickness of the AlN insertion layer is 1-3 nm.

[0015] In some modified embodiments of the first aspect of the present invention, the thickness of the AlGaN barrier layer is 15-100 nm. The doping ions of the AlGaN barrier layer include silicon ions, and the doping concentration is 1×10 17 ~5×10 20 cm -3 , and the Al component is 10%-90%.

[0016] In some modified embodiments of the first aspect of the present invention, the target GaN in the longitudinal AlGaN / GaN superlattice structures on both sides is periodically arranged, and the number of the target GaN is 3-100.

[0017] In some modified embodiments of the first aspect of the present invention, the thickness of the GaN cap layer is 1 - 100 nm. The GaN cap layer is an undoped GaN cap layer or a doped GaN cap layer. The doping ions of the doped GaN cap layer include magnesium ions, and the doping concentration is 1×10 17 ~5×10 20 cm -3 。

[0018] In some modified embodiments of the first aspect of the present invention, the materials of the source and the drain are both Ti / Al / Ni / Au stacked layer materials, and the thickness of the Ti / Al / Ni / Au stacked layer materials is 15 / 85 / 30 / 40 nm.

[0019] In some modified embodiments of the first aspect of the present invention, the material of the gate is Ni / Au stacked layer materials, and the thickness of the Ni / Au stacked layer materials is 30 / 100 nm.

[0020] The second aspect of the present invention provides a method for preparing a non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT, including:

[0021] Pre-treating the m-plane substrate;

[0022] Growing an unintentionally doped GaN buffer layer on the pre-treated m-plane substrate;

[0023] Growing an Fe-doped GaN layer on the unintentionally doped GaN buffer layer;

[0024] Growing a GaN channel layer on the Fe-doped GaN layer;

[0025] Growing an AlN insertion layer on the GaN channel layer;

[0026] Growing an AlGaN barrier layer on the AlN insertion layer;

[0027] Using plasma reactive ion etching technology to etch a plurality of grooves in the two side edge regions of the AlGaN barrier layer. The plurality of grooves penetrate through the AlGaN barrier layer and contact the upper surface of the AlN insertion layer, and the plurality of grooves are arranged at intervals;

[0028] Growing target GaN in each groove to form longitudinal AlGaN / GaN superlattice structures on both sides, and the longitudinal AlGaN / GaN superlattice structures on both sides are perpendicular to the upper surface of the AlN insertion layer;

[0029] Growing a GaN cap layer on the middle region of the AlGaN barrier layer;

[0030] Using plasma reactive ion etching technology to etch a region under the gate on the GaN cap layer;

[0031] Using an electron beam evaporation process, a first metal stack is deposited on the longitudinal AlGaN / GaN superlattice structures on both sides, and the first metal stack is annealed to form source and drain electrodes;

[0032] Using an electron beam evaporation process, a second metal stack is deposited on the under-gate region, and the second metal stack is annealed to form a gate electrode. The second metal stack and the first metal stack are different metal stacks.

[0033] Compared with the prior art, a non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance provided by the present invention includes an m-plane substrate, an unintentionally doped GaN buffer layer, an Fe-doped GaN layer, a GaN channel layer, an AlN insertion layer, and an AlGaN barrier layer which are sequentially arranged from bottom to top; a plurality of grooves are arranged at intervals in the edge regions on both sides of the AlGaN barrier layer. The plurality of grooves penetrate through the AlGaN barrier layer and contact the upper surface of the AlN insertion layer. Each groove is internally provided with target GaN to form longitudinal AlGaN / GaN superlattice structures on both sides. The longitudinal AlGaN / GaN superlattice structures on both sides are perpendicular to the upper surface of the AlN insertion layer; a GaN cap layer is formed on the middle region of the AlGaN barrier layer; a gate electrode is formed on the GaN cap layer; a source electrode is formed on the AlGaN / GaN superlattice structure on one side; and a drain electrode is formed on the AlGaN / GaN superlattice structure on the other side. In this way, the orientation of the non-polar AlGaN / GaN heterostructure is perpendicular to the polar axis and is not affected by the polarization effect. The two-dimensional electron gas is regulated by the AlGaN barrier layer; the longitudinal AlGaN / GaN superlattice structures on both sides are used to form quantum wells and subbands to change the electron state density distribution, reduce the electron injection barrier and increase the transmission probability. The multi-layer interfaces of the longitudinal AlGaN / GaN superlattice structures can "bury" the defects causing interface states, thereby reducing the electron scattering probability at the interface, making the electron transmission rate higher, and further reducing the contact resistance. Description of the Drawings

[0034] By reading the following detailed description with reference to the accompanying drawings, the above and other objects, features, and advantages of the exemplary embodiments of the present invention will become readily understood. In the drawings, several embodiments of the present invention are shown in an exemplary and non-limiting manner, and the same or corresponding reference numerals represent the same or corresponding parts, wherein:

[0035] Figure 1 Schematically shows a structural diagram of a non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance;

[0036] Figure 2 Schematically shows a flowchart of a preparation method of a non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance;

[0037] Figure 3 Schematically shows a schematic diagram of the process preparation of a non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance.

[0038] Description of reference numerals

[0039] 1. m-plane substrate; 2. Unintentionally doped GaN buffer layer; 3. Fe-doped GaN layer; 4. GaN channel layer; 5. AlN insertion layer; 6. AlGaN barrier layer; 7. Multiple grooves; 8. Target GaN; 9. GaN cap layer; 10. Gate; 11. Source; 12. Drain. Detailed implementation manners

[0040] The exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present invention are shown in the drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided so that the present invention can be more thoroughly understood and the scope of the present invention can be fully conveyed to those skilled in the art.

[0041] It should be noted that: Unless otherwise specified, the technical terms or scientific terms used in the present invention should have the ordinary meaning understood by those skilled in the art to which the present invention belongs.

[0042] The methods in the embodiments of the present invention will be described in detail below.

[0043] Figure 1 Schematically shows a structural diagram of a non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance, including: an m-plane substrate 1, an unintentionally doped GaN buffer layer 2, an Fe-doped GaN layer 3, a GaN channel layer 4, an AlN insertion layer 5, and an AlGaN barrier layer 6 arranged in sequence from bottom to top;

[0044] Multiple grooves 7, spaced apart and arranged in the two side edge regions of the AlGaN barrier layer 6, the multiple grooves 7 penetrate through the AlGaN barrier layer 6 and contact the upper surface of the AlN insertion layer 5, and a target GaN 8 is arranged inside each groove to form longitudinal side AlGaN / GaN superlattice structures on both sides, and the longitudinal AlGaN / GaN superlattice structures on both sides are perpendicular to the upper surface of the AlN insertion layer 5;

[0045] A GaN cap layer 9, formed on the middle region of the AlGaN barrier layer 6;

[0046] A gate 10, formed on the GaN cap layer 9;

[0047] A source 11, formed on one side of the AlGaN / GaN superlattice structure;

[0048] The drain 12 is formed on the AlGaN / GaN superlattice structure on the other side.

[0049] Specifically, the m-plane substrate 1 is a cleaned and pre-treated substrate. The pre-treatment refers to removing possible residual metal impurities on the surface, rinsing repeatedly, drying, and heat treatment.

[0050] The depth direction of the plurality of grooves 7 is perpendicular to the upper surface of the AlN insertion layer 5.

[0051] In the embodiment of the present invention, the m-plane substrate 1 is one of an m-plane SiC substrate, an m-plane sapphire substrate, and an m-plane GaN substrate.

[0052] In the embodiment of the present invention, the thickness of the Fe-doped GaN layer 3 is 1 - 1.5 μm, and the Fe doping concentration is 10 16 ~10 19 cm -3 。

[0053] In the embodiment of the present invention, the thickness of the unintentionally doped GaN buffer layer 2 is 1 - 2 μm, the thickness of the GaN channel layer 4 is 300 - 800 nm, and the thickness of the AlN insertion layer 5 is 1 - 3 nm.

[0054] In the embodiment of the present invention, the thickness of the AlGaN barrier layer 6 is 15 - 100 nm. The doping ions of the AlGaN barrier layer 6 include silicon ions, and the doping concentration is 1×10 17 ~5×10 20 cm -3 , and the Al component is 10% - 90%.

[0055] In the embodiment of the present invention, the target GaN 8 in the longitudinal AlGaN / GaN superlattice structures on both sides is periodically arranged, and the number of the target GaN 8 is 3 - 100.

[0056] In the embodiment of the present invention, the thickness of the GaN cap layer 9 is 1 - 100 nm. The GaN cap layer 9 is an undoped GaN cap layer 9 or a doped GaN cap layer 9. The doping ions of the doped GaN cap layer 9 include magnesium ions, and the doping concentration is 1×10 17 ~5×10 20 cm -3 。

[0057] In the embodiment of the present invention, the materials of the source 11 and the drain 12 are both Ti / Al / Ni / Au stacked layer materials, and the thickness of the Ti / Al / Ni / Au stacked layer materials is 15 / 85 / 30 / 40 nm.

[0058] In the embodiment of the present invention, the material of the gate 10 is Ni / Au stacked layer materials, and the thickness of the Ni / Au stacked layer materials is 30 / 100 nm.

[0059] Based on the above Figure 1 implementation method, it can be seen that the non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT according to the embodiment of the present invention includes an m-plane substrate 1, an unintentionally doped GaN buffer layer 2, an Fe-doped GaN layer 3, a GaN channel layer 4, an AlN insertion layer 5, and an AlGaN barrier layer 6 which are sequentially arranged from bottom to top; a plurality of grooves 7 which are spaced apart and arranged in the two side edge regions of the AlGaN barrier layer 6, the plurality of grooves 7 penetrate through the AlGaN barrier layer 6 and contact the upper surface of the AlN insertion layer 5, and a target GaN 8 is arranged inside each groove to form longitudinal AlGaN / GaN superlattice structures on both sides, and the longitudinal AlGaN / GaN superlattice structures on both sides are perpendicular to the upper surface of the AlN insertion layer 5; a GaN cap layer 9 which is formed on the middle region of the AlGaN barrier layer 6; a gate 10 which is formed on the GaN cap layer 9; a source 11 which is formed on one side of the longitudinal AlGaN / GaN superlattice structure; and a drain 12 which is formed on the other side of the longitudinal AlGaN / GaN superlattice structure. In this way, the orientation of the non-polar AlGaN / GaN heterostructure is perpendicular to the polar axis and is not affected by the polarization effect, and the two-dimensional electron gas is regulated by the AlGaN barrier layer 6; the longitudinal AlGaN / GaN superlattice structures on both sides are adopted to form quantum wells and subbands to change the electron state density distribution, reduce the electron injection barrier and increase the transmission probability, and the multi-layer interfaces of the longitudinal AlGaN / GaN superlattice structure can "bury" the defects causing interface states, thereby reducing the scattering probability of electrons at the interface, making the electron transmission rate larger, and further reducing the contact resistance.

[0060] Figure 2 Schematically shows the preparation method of the non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT in the embodiment of the present invention. Refer to Figure 2 as shown, the preparation method of the non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT may include:

[0061] S201. Pretreat the m-plane substrate 1.

[0062] Specifically, use one of the substrates of m-plane SiC, m-plane sapphire, and m-plane GaN. First, clean the substrate to remove surface contaminants, and then pretreat these substrates. The pretreatment refers to removing some metal impurities that may remain on the surface, repeatedly rinsing, drying, and heat treatment.

[0063] Figure 3 Schematically shows the schematic diagram of the process preparation process of the non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT, where Figure 3 (a) in it is the pretreated m-plane substrate 1.

[0064] S202. On the pre-treated m-plane substrate 1, grow an unintentionally doped GaN buffer layer 2.

[0065] Specifically, Figure 3 Schematically shows a process preparation schematic diagram of a non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT, where Figure 3 (b) therein is a process schematic diagram for growing the unintentionally doped GaN buffer layer 2. Using Metal-Organic Chemical Vapor Deposition (MOCVD) or Molecular Beam Epitaxy (MBE), grow an unintentionally doped GaN buffer layer 2 with a thickness of 1 - 2 μm on the pre-treated m-plane substrate 1.

[0066] S203. On the unintentionally doped GaN buffer layer 2, grow an Fe-doped GaN layer 3.

[0067] Specifically, Figure 3 Schematically shows a process preparation schematic diagram of a non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT, where Figure 3 (c) therein is a process schematic diagram for growing the Fe-doped GaN layer 3. On the unintentionally doped GaN buffer layer 2, using MOCVD or MBE process, grow an Fe-doped GaN layer 3 with a thickness of 1 - 1.5 μm, and the Fe doping concentration is 10 16 ~10 19 cm -3 .

[0068] S204. On the Fe-doped GaN layer 3, grow a GaN channel layer 4.

[0069] The GaN channel layer 4 is a non-polar layer and can be referred to as a non-polar GaN channel layer 4.

[0070] Specifically, Figure 3 Schematically shows a process preparation schematic diagram of a non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT, where Figure 3 (d) therein is a process schematic diagram for growing the GaN channel layer 4. On the Fe-doped GaN layer 3, using MOCVD or MBE process, grow a non-polar GaN channel layer 4 with a thickness of 300 - 800 nm.

[0071] S205. On the GaN channel layer 4, grow an AlN insertion layer 5.

[0072] Specifically, Figure 3 Schematically shows a process preparation schematic diagram of a non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT, where Figure 3In (e), it is a process schematic diagram for growing the AlN insertion layer 5. On the non-polar GaN channel layer 4, an AlN insertion layer 5 with a thickness of 1 - 3 nm is grown using the MOCVD or MBE process.

[0073] S206. On the AlN insertion layer 5, an AlGaN barrier layer 6 is grown.

[0074] The doping ions of the AlGaN barrier layer 6 include silicon ions, and it can be called a non-polar Si-doped AlGaN barrier layer 6.

[0075] Specifically, Figure 3 It schematically shows a process preparation schematic diagram of a non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT, where Figure 3 In (f), it is a process schematic diagram for growing the AlGaN barrier layer 6. On the AlN insertion layer 5, a non-polar Si-doped AlGaN barrier layer 6 with a thickness of 15 - 100 nm is grown using the MOCVD or MBE process. The Al component is 10% - 90%, and the Si doping concentration is 1×10 17 ~5×10 20 cm -3 .

[0076] S207. Using plasma reactive ion etching technology, a plurality of grooves 7 arranged at intervals are etched in the two side edge regions of the AlGaN barrier layer 6. The plurality of grooves 7 penetrate through the AlGaN barrier layer 6 and contact the upper surface of the AlN insertion layer 5.

[0077] Among them, the plurality of grooves 7 are arranged at intervals.

[0078] Specifically, Figure 3 It schematically shows a process preparation schematic diagram of a non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT, where Figure 3 In (g), it is a process schematic diagram for etching out the plurality of grooves 7. In the two side edge regions of the AlGaN barrier layer 6, that is, the regions where the source electrode 11 and the drain electrode 12 need to be formed subsequently, 3 - 100 grooves arranged at intervals are selectively etched using plasma reactive ion etching technology. The 3 - 100 grooves penetrate through the AlGaN barrier layer 6 and contact the upper surface of the AlN insertion layer 5.

[0079] S208. A target GaN 8 is grown in each groove to form a longitudinal AlGaN / GaN superlattice structure on both sides.

[0080] Among them, the longitudinal AlGaN / GaN superlattice structures on both sides are perpendicular to the upper surface of the AlN insertion layer 5.

[0081] Specifically, Figure 3Schematically shows a schematic diagram of the process for fabricating a non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance, where Figure 3 (h) in it is a schematic diagram of the process for growing the target GaN8. Using MOCVD or MBE process, the target GaN8 is grown in each groove to form a longitudinal AlGaN / GaN superlattice structure perpendicular to both sides of the AlN insertion layer 5. The number of the target GaN8 is 3 - 100. The number of the target GaN8 is the same as the number of the multiple grooves 7.

[0082] S209. On the middle region of the AlGaN barrier layer 6, grow a GaN cap layer 9.

[0083] Specifically, Figure 3 Schematically shows a schematic diagram of the process for fabricating a non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance, where Figure 3 (i) in it is a schematic diagram of the process for growing the GaN cap layer 9. On the AlGaN barrier layer 6, using MOCVD or MBE process, grow a doped GaN cap layer 9 or an undoped GaN cap layer 9 with a thickness of 1 - 100 nm. Since the above non-polar AlGaN / GaN heterostructure suppresses the generation of high-density two-dimensional electron gas, there is a case of directly forming an enhancement mode. Therefore, the GaN cap layer 9 can be an undoped GaN cap layer 9, which is used as a contact layer when there are no electrons in the channel. The GaN cap layer 9 can also be a P-GaN cap layer 9 with a Mg doping concentration of 1×10 17 ~5×10 20 cm -3 to deplete the electrons in the region under the gate to achieve enhancement mode when there is a certain density of two-dimensional electron gas (2DEG) in the channel.

[0084] S210. Using plasma reactive ion etching technology, etch out the region under the gate on the GaN cap layer 9.

[0085] Specifically, Figure 3 Schematically shows a schematic diagram of the process for fabricating a non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance, where Figure 3 (j) in it is a schematic diagram of the process for etching out the region under the gate. On the GaN cap layer 9, using plasma reactive ion etching technology, perform selective etching to leave the region under the gate.

[0086] S211. Using electron beam evaporation process, deposit a first metal stack on the longitudinal AlGaN / GaN superlattice structures on both sides, and perform annealing treatment on the first metal stack to form a source electrode 11 and a drain electrode 12.

[0087] Specifically, Figure 3Schematically shown is a schematic diagram of the process for fabricating a non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance, where Figure 3 (k) in it is a schematic diagram of the process for forming source electrode 11 and drain electrode 12. On the longitudinal AlGaN / GaN superlattice structures on both sides, Ti / Al / Ni / Au metal (15 nm / 85 nm / 30 nm / 40 nm) is deposited by electron beam evaporation, and then rapid thermal annealing is performed at 900 °C in an N2 environment to form the source-drain contact electrodes of the device.

[0088] S212. By using the electron beam evaporation process, a second metal stack is deposited on the under-gate region, and the second metal stack is annealed to form gate electrode 10.

[0089] Among them, the second metal stack and the first metal stack are different metal stacks.

[0090] Specifically, Figure 3 Schematically shown is a schematic diagram of the process for fabricating a non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance, where Figure 3 (l) in it is a schematic diagram of the process for forming gate electrode 10. On the middle GaN cap layer 9, that is, the under-gate region, Ni / Au metal (30 nm / 100 nm) is deposited by electron beam evaporation, and thermal annealing is performed at 600 °C in an O2 environment to form the gate contact electrode.

[0091] The key points and protected points of the present invention are based on a non-polar m-plane AlGaN / GaN heterojunction. The m-plane GaN-based heterojunction eliminates the influence of the polarization effect, and the 2DEG concentration in the AlGaN / GaN heterojunction can be adjusted by the thickness of the barrier layer and the concentration of n-type doping; by utilizing the characteristic that there is no polarization field along the growth direction on the non-polar plane, an enhancement-mode HEMT device with a higher threshold voltage is realized. In addition, a longitudinal AlGaN / GaN superlattice structure is used as the source-drain contact region to reduce the source-drain contact resistance, thereby reducing the forward on-resistance of the device, and realizing an enhancement-mode HEMT device with adjustable threshold voltage, high forward current, and excellent performance.

[0092] As an optional implementation manner of the present invention, a specific embodiment of the present invention is given: fabricating a GaN-based enhancement-mode device using an m-plane SiC substrate, with an unintentionally doped GaN buffer layer 2 having a thickness of 1.5 μm, an Fe-doped GaN layer 3 having a thickness of 1 μm, a GaN channel layer 4 having a thickness of 400 nm, an AlN insertion layer 5 having a thickness of 1 nm, an AlGaN barrier layer 6 having a thickness of 30 nm, and a GaN cap layer 9, that is, a P-GaN cap layer 9 having a thickness of 40 nm.

[0093] The specific implementation manner of this embodiment is as follows:

[0094] Step 1: Pretreat the m-plane SiC substrate.

[0095] First, immerse the m-plane SiC substrate in an acetone solution, then perform ultrasonic cleaning, and then wash away the acetone with anhydrous ethanol and dry it to remove surface impurities and contaminants; then, treat it with an acidic or alkaline solution to remove some metal impurities that may remain on the surface, and then repeatedly rinse it with deionized water to ensure that the surface chemical reagents are washed away. Subsequently, perform a drying treatment to keep the m-plane SiC substrate in a dry state. The cleaned m-plane SiC substrate is heat-treated in a hydrogen atmosphere at a high temperature (1000 - 1200 °C), and the hydrogen flow rate can be set to 1 - 5 L / min. Step 1 is mainly to remove the oxide layer on the surface of the m-plane SiC substrate, make the surface smoother and more activated, and provide a good foundation for subsequent epitaxial growth.

[0096] Step 2: Grow an unintentionally doped GaN buffer layer 2.

[0097] Place the m-plane SiC substrate in the MOCVD reaction chamber, set the temperature in the reaction chamber to 1000 °C, at a pressure of 200 Torr, use trimethylgallium (TMGa) at 50 sccm and ammonia (NH3) at 4000 sccm as raw materials, and hydrogen (H2) as the carrier gas for deposition to grow an unintentionally doped GaN buffer layer 2 with a thickness of 1.5 μm to relieve lattice mismatch and reduce stress.

[0098] Step 3: Epitaxially grow an Fe-doped GaN layer 3.

[0099] Set the temperature in the reaction chamber to 1050 °C, introduce a stable carrier gas flow, at a pressure of 200 Torr, introduce 40 sccm of trimethylgallium (TMGa), 3500 sccm of ammonia (NH3), and an Fe doping source (a specific iron organic compound, such as Fe(CO)5, etc.), precisely control the flow rates of each source, the pressure and temperature of the reaction chamber, and deposit and grow on the unintentionally doped GaN buffer layer 2. Continuously monitor and adjust the process parameters until an Fe-doped GaN layer 3 with a thickness of 1 μm is grown.

[0100] Step 4: Epitaxially grow a GaN channel layer 4.

[0101] Keep the temperature of the reaction chamber at 1000 °C, the pressure at 200 Torr, introduce a nitrogen source with a flow rate of 2000 sccm, a gallium source with a flow rate of 20 sccm, and 2000 sccm of hydrogen as the carrier gas, and grow a 400-nm GaN channel layer 4 on the Fe-doped GaN layer 3.

[0102] Step 5: Grow an AlN insertion layer 5.

[0103] Raise the temperature of the reaction chamber to 1100 - 1200 °C, introduce hydrogen and stabilize its flow rate, then introduce trimethylaluminum and ammonia respectively. Control the flow rate of trimethylaluminum at 3 sccm and the flow rate of ammonia at 500 sccm. At the same time, maintain the pressure in the reaction chamber at 200 Torr, so that the reaction gases undergo a chemical reaction and deposit on the GaN channel layer 4. During the growth, monitor the growth thickness and quality of the AlN insertion layer 5 through in-situ monitoring technology, and fine-tune the process parameters according to the monitoring results to ensure the growth of a 1-nm-thick AlN insertion layer 5.

[0104] Step Six: Grow the AlGaN barrier layer 6.

[0105] First, control the temperature of the reaction chamber at 1150 °C. After introducing the carrier gas to stabilize the gas flow, introduce trimethylaluminum, trimethylgallium, ammonia, and a silicon doping source (such as silane) simultaneously. Control the flow rate of trimethylaluminum at about 10 sccm, the flow rate of trimethylgallium at about 3 sccm, the flow rate of ammonia at 2000 sccm, and adjust the flow rate of silane between 0.1 - 1 sccm according to the doping concentration requirements. Keep the pressure in the reaction chamber at 200 Torr, so that the reaction gases react and deposit on the AlN insertion layer 5. During the growth process, use various monitoring means to monitor the thickness and crystal quality, and adjust the process parameters in real-time according to the monitoring data until a 30-nm-thick Si-doped AlGaN barrier layer 6 is grown.

[0106] Step Seven: Etch the AlGaN barrier layer 6 to etch out multiple grooves 7 arranged at intervals.

[0107] Coat photoresist, perform photolithography exposure and development to form a source-drain region pattern on the photoresist layer. Subsequently, use dry etching to etch the AlGaN layer in the source-drain region. That is, place the sample after growing the AlGaN barrier layer 6 in the reaction chamber of an inductively coupled plasma (ICP) etching equipment, evacuate the air, introduce etching gases such as chlorine and precisely control the flow rate, RF power, and etching time to etch the AlGaN layer in the source-drain region. Finally, select the corresponding photoresist remover and combine it with ultrasonic cleaning (reasonably control the parameters) to remove the photoresist to form multiple grooves 7 arranged at intervals.

[0108] Step Eight: Grow the target GaN 8 to grow an AlGaN / GaN superlattice structure.

[0109] Put the sample into the MOCVD reaction chamber, evacuate the air, introduce the carrier gas and control the pressure, heat up to 1000 °C, use 10 sccm of trimethylgallium (TMGa) and 1500 sccm of ammonia (NH3) as raw materials, cover the area outside the multiple grooves 7, and grow the target GaN 8 in the area of the multiple grooves 7 to construct a longitudinal AlGaN / GaN superlattice structure.

[0110] Step Nine: Growing a p-GaN cap layer 9.

[0111] In an MOCVD reaction chamber, while maintaining a temperature of 1050 °C, a pressure of 200 Torr, and an appropriate carrier gas flow rate, trimethylgallium (TMG) with a flow rate of 30 sccm and ammonia (NH3) with a flow rate of 1500 sccm are introduced as growth sources, and bis(cyclopentadienyl)magnesium (Cp2Mg) is introduced as a doping source with a flow rate of approximately 3 sccm to grow a 40-nm-thick p-GaN cap layer 9.

[0112] Step Ten: Etching the p-GaN cap layer 9.

[0113] The sample containing the p-GaN cap layer 9 is cleaned, coated with photoresist, exposed and developed through photolithography to form a pattern of the under-gate region on the photoresist layer; subsequently, the p-GaN cap layer 9 in the non-under-gate region is etched by dry etching; finally, a corresponding photoresist remover is selected and combined with ultrasonic cleaning (parameters are reasonably controlled) to remove the photoresist, so as to achieve the purpose of only retaining the p-GaN cap layer 9 in the under-gate region.

[0114] Step Eleven: Fabricating source-drain metal electrodes.

[0115] The Ti / Al / Ni / Au metal (15 nm / 85 nm / 30 nm / 40 nm) is deposited by electron beam evaporation process, and then rapidly thermally annealed at 900 °C in an N2 environment to form the source-drain contact electrodes of the device, namely the source-drain metal electrodes.

[0116] Step Twelve: Fabricating gate metal electrodes.

[0117] The Ni / Au metal (30 nm / 100 nm) is deposited by electron beam evaporation process and thermally annealed at 600 °C in an O2 environment to form the gate contact electrodes, namely the gate metal electrodes.

[0118] The non-polar m-plane AlGaN / GaN heterojunction proposed by the present invention avoids the influence of the polarization effect, adjusts the 2DEG by the thickness and doping concentration of the barrier layer, can solve the pain point that it is difficult to deplete the channel electrons in the p-GaN cap layer 9, and adopts a vertical AlGaN / GaN superlattice structure to achieve a low source-drain contact resistance, and can realize an enhanced HEMT device with a higher threshold voltage and a low contact resistance. It is very beneficial to the safe operation of power electronic devices. Therefore, the present invention can well promote the research and application of enhanced HEMT devices and has great application prospects in the field of high-frequency and high-power electronic devices.

[0119] It should be noted here that the description of the embodiments of the preparation method of the non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT above is similar to the description of the embodiments of the non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT, and has beneficial effects similar to those of the embodiments of the non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT. For the technical details not disclosed in the embodiments of the preparation method of the non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT of the embodiments of the present invention, please refer to the description of the embodiments of the non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT of the present invention for understanding.

[0120] The above is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance, characterized in that, It includes an m-plane substrate, an unintentionally doped GaN buffer layer, an Fe-doped GaN layer, a GaN channel layer, an AlN insertion layer, and an AlGaN barrier layer, which are sequentially arranged from bottom to top; A plurality of grooves are arranged at intervals in the two side edge regions of the AlGaN barrier layer. The plurality of grooves penetrate through the AlGaN barrier layer and contact the upper surface of the AlN insertion layer. A target GaN is arranged inside each groove to form longitudinal AlGaN / GaN superlattice structures on both sides, and the longitudinal AlGaN / GaN superlattice structures on both sides are perpendicular to the upper surface of the AlN insertion layer; A GaN cap layer is formed on the middle region of the AlGaN barrier layer; A gate is formed on the GaN cap layer; A source electrode is formed on the longitudinal AlGaN / GaN superlattice structure on one side; A drain electrode is formed on the longitudinal AlGaN / GaN superlattice structure on the other side.

2. The non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance according to claim 1, wherein The m-plane substrate is one of an m-plane SiC substrate, an m-plane sapphire substrate, and an m-plane GaN substrate.

3. The non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance according to claim 1, characterized in that, The thickness of the Fe-doped GaN layer is 1 to 1.5 μm, and the Fe doping concentration is 10 16 ~10 19 cm -3 。 4. The non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance according to claim 1, characterized in that, The thickness of the unintentionally doped GaN buffer layer is 1-2 μm, the thickness of the GaN channel layer is 300-800 nm, and the thickness of the AlN insertion layer is 1-3 nm.

5. The non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance according to claim 1, wherein The thickness of the AlGaN barrier layer is 15 to 100 nm. The doping ions of the AlGaN barrier layer include silicon ions, and the doping concentration is 1×10 17 ~5×10 20 cm -3 , and the Al component is 10% to 90%.

6. The non-polar GaN-based enhancement-mode HEMT with low source-drain contact resistance according to claim 1, characterized in that, The target GaN in the longitudinal AlGaN / GaN superlattice structures on both sides is periodically arranged, and the number of the target GaN is 3-100.

7. The non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance according to claim 1, characterized in that, The thickness of the GaN cap layer is 1 to 100 nm. The GaN cap layer is an undoped GaN cap layer or a doped GaN cap layer. The doping ions of the doped GaN cap layer include magnesium ions, and the doping concentration is 1×10 17 ~5×10 20 cm -3 .

8. The non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance according to claim 1, characterized in that The materials of the source electrode and the drain electrode are both Ti / Al / Ni / Au stacked layer materials, and the thickness of the Ti / Al / Ni / Au stacked layer materials is 15 / 85 / 30 / 40 nm.

9. The non-polar gallium nitride-based enhancement-mode HEMT with low source-drain contact resistance according to claim 1, wherein The material of the gate is Ni / Au stacked layer materials, and the thickness of the Ni / Au stacked layer materials is 30 / 100 nm.

10. A preparation method of a gallium nitride-based enhancement-mode HEMT with a non-polar low source-drain contact resistance, characterized in that, It is applicable to the non-polar low source-drain contact resistance gallium nitride-based enhancement-mode HEMT according to any one of claims 1-9, including: Pre-treating the m-plane substrate; Growing an unintentionally doped GaN buffer layer on the pre-treated m-plane substrate; Growing an Fe-doped GaN layer on the unintentionally doped GaN buffer layer; Growing a GaN channel layer on the Fe-doped GaN layer; Growing an AlN insertion layer on the GaN channel layer; Growing an AlGaN barrier layer on the AlN insertion layer; Using plasma reactive ion etching technology to etch a plurality of grooves in the two side edge regions of the AlGaN barrier layer. The plurality of grooves penetrate through the AlGaN barrier layer and contact the upper surface of the AlN insertion layer, and the plurality of grooves are arranged at intervals; Growing a target GaN in each groove to form longitudinal AlGaN / GaN superlattice structures on both sides, and the longitudinal AlGaN / GaN superlattice structures on both sides are perpendicular to the upper surface of the AlN insertion layer; Growing a GaN cap layer on the middle region of the AlGaN barrier layer; Using plasma reactive ion etching technology to etch a region under the gate on the GaN cap layer; Using an electron beam evaporation process, a first metal stack is deposited on the longitudinal AlGaN / GaN superlattice structures on both sides, and the first metal stack is annealed to form source and drain electrodes; Using an electron beam evaporation process, a second metal stack is deposited on the under-gate region, and the second metal stack is annealed to form a gate electrode. The second metal stack and the first metal stack are different metal stacks.

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