Polishing composition for semiconductor process, substrate, and method for manufacturing semiconductor device

Abstract

The embodiment of the invention provides a polishing composition for a semiconductor process, a substrate, a method for manufacturing a semiconductor device, and the like. The present embodiment can provide a polishing composition for a semiconductor process, which has improved polishing rate, selectivity, and the like, and improved dispersibility, and can also provide a method for producing a substrate to be polished using the polishing composition for a semiconductor process.

Description

Technical Field

[0001] This embodiment relates to a polishing method for a substrate using a polishing composition capable of achieving excellent selectivity in polishing, improved dispersibility, and ensuring dispersion stability, a polishing composition, a substrate polished by the polishing method of the substrate, and the like. Background Art

[0002] As semiconductor devices become more miniaturized and high-density, finer patterning techniques are being used. Accordingly, the surface structure of semiconductor devices has become more complex, and the step difference between layers has become larger. When manufacturing semiconductor devices, as a planarization technique for removing the step difference generated in a specific film formed on a substrate, a chemical mechanical polishing (hereinafter simply referred to as "CMP") process is used.

[0003] In the CMP process, a slurry is supplied to a polishing pad, and the surface is polished while pressing and rotating the substrate. The object to be planarized varies depending on the process step, and the physical properties of the slurry applied at this time also differ.

[0004] Regarding the polishing after forming metal wirings, it is necessary to maintain a sufficient polishing rate and polishing speed while minimizing recesses or corrosion, etc.

[0005] Prior Art Documents

[0006] Patent Documents

[0007] Korean Patent Publication No. 10-2019-0105770

[0008] Korean Patent Publication No. 10-2019-0060226 Summary of the Invention

[0009] Problems to be Solved by the Invention

[0010] An object of this embodiment is to provide a polishing composition for a semiconductor process, which has an improved polishing rate, selectivity, etc., and has improved dispersibility.

[0011] Another object of this embodiment is to provide a method for manufacturing a polished substrate using a polishing composition for a semiconductor process.

[0012] Solutions to the Problems

[0013] In order to achieve the above object, a polishing composition for a semiconductor process according to an embodiment includes metal oxide particles having functional groups exposed on the surface as abrasive particles.

[0014] The above surface contains a first functional group having an epoxy group at the end and a second functional group having an amine group at the end, and the content of the second functional group is greater than that of the first functional group.

[0015] In one embodiment, the above metal oxide particles may be metal oxide particles modified with a silane compound having the above first functional group at one end and a silane compound having the above second functional group.

[0016] In one embodiment, the ratio of the above first functional group to the above second functional group may be a molar ratio of 1:1 to 15.

[0017] In one embodiment, the above metal oxide particles may be any one selected from the group consisting of colloidal silica, fumed silica, cerium dioxide, alumina, titanium dioxide, zirconium oxide, and combinations thereof.

[0018] In one embodiment, the diameter (D 50 ) of the above metal oxide particles may be 10 nm to 120 nm.

[0019] In one embodiment, the polishing composition for semiconductor processes described above may further contain a non-ionic polymer and a chelating agent.

[0020] In one embodiment, the pH of the polishing composition for semiconductor processes described above may be 2 to 5.

[0021] In one embodiment, the polishing index of the silicon oxide film of the polishing composition for semiconductor processes described above may be represented by the following formula 1 above.

[0022] [Formula 1]

[0023] Silicon oxide film polishing index = Silicon oxide film polishing rate / Concentration of metal oxide particles in the polishing composition for semiconductor processes (wt%)

[0024] In one embodiment, in the polishing composition for semiconductor processes described above, the polishing rate of the silicon oxide film based on the polishing rate of tungsten, i.e., the selectivity, may be 25 or more.

[0025] In one embodiment, in the polishing composition for semiconductor processes described above, based on D 50 , the time point at which the particle size increases by 10% or more may be 12 months or more.

[0026] In one embodiment, in the polishing composition for semiconductor processes described above, tungsten, a diffusion barrier film, and a silicon oxide film can be polished simultaneously.

[0027] To achieve the above object, a method of manufacturing a substrate according to an embodiment includes a process of polishing the substrate by using the polishing composition for semiconductor processes described above.

[0028] To achieve the above object, a method of manufacturing a semiconductor device according to an embodiment includes: a step of forming an insulating film on a substrate; a step of polishing a part of the insulating film according to a pre-designed wiring pattern; a step of forming a tungsten metal film on the polished insulating film to prepare a substrate before polishing; and a polishing step of polishing the substrate before polishing.

[0029] The above polishing step includes a process of polishing the substrate before polishing by using the polishing composition for semiconductor processes as a slurry.

[0030] Effects of the Invention

[0031] The present embodiment can provide a polishing composition for semiconductor processes, in which the polishing rate, selectivity, etc. are improved and the dispersibility is improved. The present embodiment can provide a polishing composition for semiconductor processes with further improved storage stability. When using the polishing composition for semiconductor processes, planarization can also be performed with excellent selectivity on the surface where tungsten, a diffusion barrier film, and an insulating film are all present. Detailed Embodiment

[0032] The present embodiment will be described in more detail herein so that those of ordinary skill in the art to which the present invention pertains can easily practice the present invention. However, the present embodiment can be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

[0033] In this specification, when describing that one component "includes" another component, unless otherwise stated to the contrary, it means that other components can also be included, rather than excluding other components.

[0034] In this specification, when describing that one component is "connected" to another component, it includes not only the case of "direct connection" but also the case of "connection with other components intervening therebetween".

[0035] In this specification, "B is located on A" means that B is located on A in a manner of directly contacting A, or means that B is located on A in a state where other layers are sandwiched between A and B, and is not limited to the meaning that B is located on A in a manner of contacting the surface of A.

[0036] In this specification, the term "a combination thereof" included in the Markush-type description means a mixture or combination of one or more selected from the group consisting of a plurality of constituent elements described in the Markush-type description, and thus means including one or more selected from the group consisting of the above plurality of constituent elements.

[0037] In this specification, the description of "A and / or B" means "A, B, or A and B".

[0038] In this specification, unless otherwise specified, terms such as "first", "second", or "A", "B", etc. are used to distinguish the same terms from each other.

[0039] In this specification, unless otherwise specified, the singular representation can be interpreted to include the singular or plural meanings as understood from the context.

[0040] Hereinafter, the present invention will be described in more detail.

[0041] One embodiment for achieving the above object provides a polishing composition for a semiconductor process, the polishing composition for a semiconductor process containing metal oxide particles having functional groups exposed on the surface as abrasive particles, the surface including a first functional group having an epoxy group at the end and a second functional group having an amine group at the end, and the content of the second functional group being greater than the content of the first functional group.

[0042] As the metal oxide particles, metal oxide particles applicable to a polishing composition for a semiconductor process can be used. For example, the metal oxide can be any one selected from the group consisting of colloidal silica, fumed silica, cerium dioxide, alumina, titanium dioxide, zirconia, and combinations thereof. Specifically, as the above metal oxide particles, colloidal silica, fumed silica, cerium dioxide, or a mixture thereof can be used.

[0043] The metal oxide particles have a surface on which functional groups are exposed. For example, in order to improve the polishing rate of a silicon oxide film, the surface of colloidal silica having a nanoscale size is modified with an amine group or the like. However, this causes a change in the surface zeta potential of the metal oxide particles, and such a change in the zeta potential value may have an adverse effect on the long-term storage stability of the polishing composition for a semiconductor process. To improve this, in this embodiment, a functional group for modifying the surface to a positively charged property and a functional group for modifying the surface to a nonionic functional group are introduced simultaneously.

[0044] The metal oxide particles have a modified surface.

[0045] The above surface includes a first functional group having an epoxy group at the end and a second functional group having an amine group at the end.

[0046] On the above surface, the content of the second functional group can be greater than the content of the first functional group. When the metal oxide particles having such a surface are used as abrasive particles, they can have an appropriate resilience against the polishing pad. And, the occurrence of defects such as scratches that may occur due to the abrasive particles during polishing of the substrate can be further reduced.

[0047] The ratio of the above-mentioned first functional group to the above-mentioned second functional group can be a molar ratio of 1:1 to 15. The ratio of the above-mentioned first functional group to the above-mentioned second functional group can be a molar ratio of 1:1 to 12. The ratio of the above-mentioned first functional group to the above-mentioned second functional group can be a molar ratio of 1:1 to 8. The ratio of the above-mentioned first functional group to the above-mentioned second functional group can be a molar ratio of 1:1 to 6. The ratio of the above-mentioned first functional group to the above-mentioned second functional group can be a molar ratio of 1:1.2 to 3.8. When the above-mentioned first functional group and the above-mentioned second functional group are applied in such a ratio, the possibility of defects occurring during polishing can be reduced, and at the same time, the storage stability of the polishing composition can be further improved.

[0048] For example, a silane compound having the above-mentioned functional group at one end can be applied to the above-mentioned metal oxide particles to introduce the above-mentioned functional group onto the surface of the above-mentioned metal oxide.

[0049] For example, the silane compound having the first functional group can be an amino silane, a ureido silane, and combinations thereof, or can also be an amino silane.

[0050] For example, the above-mentioned amino silane can be any one selected from the group consisting of 3-aminopropyltriethoxysilane, bis[(3-triethoxysilyl)propyl]amine, 3-aminopropyltrimethoxysilane, bis[(3-trimethoxysilyl)propyl]amine, 3-aminopropylmethyldiethoxysilane, 3-aminopropylmethyldimethoxysilane, N-[3-(trimethoxysilyl)propyl]ethylenediamine, N-bis[3-(trimethoxysilyl)propyl]-1,2-ethylenediamine, N-[3-(triethoxysilyl)propyl]ethylenediamine, diethylenetriaminopropyltrimethoxysilane, diethylenetriaminopropylmethyldimethoxysilane, diethylaminomethyltriethoxysilane, diethylaminopropyltrimethoxysilane, diethylaminopropyltriethoxysilane, dimethylaminopropyltrimethoxysilane, N-[3-(trimethoxysilyl)propyl]butylamine, and combinations thereof.

[0051] The above-mentioned ureido silane can be any one selected from the group consisting of 3-ureidopropyltriethoxysilane, 3-ureidopropyltrimethoxysilane, and combinations thereof.

[0052] The silane compound having the above-mentioned second functional group can be an epoxy silane.

[0053] For example, the above-mentioned epoxy silane is any one selected from the group consisting of 3-glycidoxypropyltrimethoxysilane, 3-glycidoxypropyltriethoxysilane, 3-(2,3-epoxypropoxypropyl)methyldiethoxysilane, 2-(3,4-epoxycyclohexyl)ethyltrimethoxysilane, and combinations thereof.

[0054] Based on 100 parts by weight of the above metal oxide particles, 1 to 10 parts by weight of a silane compound can be used. Based on 100 parts by weight of the above metal oxide particles, 3 to 8 parts by weight of a silane compound can be used. In this case, surface modification of the metal oxide particles can be sufficiently carried out, and a thin film layer is not formed on the metal oxide particles, so that the polishing rate of the abrasive particles can be maintained at a desired level.

[0055] The content of the above silane compound is the sum of the content of the silane compound having a first functional group and the content of the silane compound having a second functional group.

[0056] The diameter (D 50 ) of the above metal oxide particles can be 10 nm to 120 nm. The diameter (D 50 ) of the above metal oxide particles can be 20 nm to 100 nm. The diameter (D 50 ) of the above metal oxide particles can be 20 nm to 60 nm. When the diameter of the above metal oxide particles exceeds 120 nm, the possibility of generating defects such as scratches on the polished target substrate may increase. When the above diameter is less than 20 nm, the dispersibility of the particles may be poor. When the above diameter is 20 nm to 60 nm, excellent physical properties can be obtained when used as a polishing slurry for a substrate having a fine wiring width.

[0057] The diameter described above is based on the Nano-ZS device of Malvern, UK, which measures the particle size by the dynamic light scattering (DLS) method.

[0058] Based on the entire polishing composition for semiconductor processes, the content of the abrasive particles can be 0.5 wt% to 8 wt%. Based on the entire polishing composition for semiconductor processes, the content of the abrasive particles can be 0.5 wt% to 5 wt%. Based on the entire polishing composition for semiconductor processes, the content of the abrasive particles can be 2 wt% to 4 wt%. When the polishing composition for semiconductor processes contains abrasive particles within the above content range, the effects of dispersion stability and reduction of defects on the polished substrate surface can be obtained simultaneously. The above polishing composition for semiconductor processes may further contain a non-ionic polymer.

[0059] Nonionic polymers can improve the dispersibility of abrasive particles. Specifically, nonionic polymers can adsorb onto the above-mentioned abrasive particles to increase dispersibility, and the unadsorbed nonionic polymers can further increase the dispersion stability due to steric hindrance effects, etc. Also, due to the nonionic nature of the above polymers, the polishing composition for semiconductor processes has more stable dispersion stability even in the acidic environment described below. In addition, the occurrence of defects caused by polishing the substrate during the polishing process can be reduced.

[0060] The above nonionic polymer can be at least any one selected from the group consisting of polyethylene glycol, polypropylene glycol, polyvinylpyrrolidone, polyethylene oxide, polypropylene oxide, polyalkylene oxides, polyethylene oxide, polyethylene oxide - propylene oxide copolymer, cellulose, methylcellulose, methylhydroxyethylcellulose, methylhydroxypropylcellulose, hydroxyethylcellulose, carboxymethylcellulose, carboxymethylhydroxyethylcellulose, sulfoethylcellulose, and carboxymethylsulfoethylcellulose.

[0061] The nonionic polymer can be a nonionic polymer having a weight average molecular weight of less than 25,000 g / mol. When the weight average molecular weight of the above nonionic polymer is less than 25,000 g / mol, the nonionic polymer can have excellent solubility and dispersibility. The nonionic polymer can be a nonionic polymer having a weight average molecular weight of 1,000 g / mol or more and less than 25,000 g / mol. When using a nonionic polymer within the above range, the polishing composition for semiconductor processes can have more excellent solubility, dispersion stability, etc., which is also advantageous in terms of polishing characteristics.

[0062] Based on the entire polishing composition for semiconductor processes, the content of the nonionic polymer can be 0.01 wt% to 5 wt%. Based on the entire polishing composition for semiconductor processes, the content of the nonionic polymer can be 0.1 wt% to 2 wt%. In this case, the occurrence of defects on the polished substrate surface is reduced, and the reattachment of particles to the polished substrate surface after polishing can be effectively suppressed.

[0063] Chelating agents adsorb metals or metal ions to facilitate removal. Specifically, metals that can be generated during the polishing process are likely to reattach to the polished surface or remain in subsequent processes, resulting in defects. In particular, metals such as tungsten are relatively easy to dissolve in a specific environment but have the property of being easily reattached to the surface, so chelating agents can be used as a sequestering agent to prevent this from happening.

[0064] For example, the chelating agent may be at least one selected from the group consisting of butyric acid, citric acid, tartaric acid, succinic acid, oxalic acid, acetic acid, adipic acid, capric acid, caproic acid, caprylic acid, carboxylic acid, glutaric acid, glutamic acid, glycolic acid, thioglycolic acid, formic acid, mandelic acid, fumaric acid, lactic acid, lauric acid, malic acid, maleic acid, malonic acid, myristic acid, phthalic acid, isophthalic acid, terephthalic acid, citraconic acid, propionic acid, pyruvic acid, stearic acid, valeric acid, benzoic acid, phenylacetic acid, naphthoic acid, aspartic acid, amino acid, and ethylenediaminetetraacetic acid. As the above amino acid, glycine, α-alanine, β-alanine, L-aspartic acid, N-methylglycine (methylglycine), and combinations thereof can be used.

[0065] The chelating agent may contain two or more carboxyl groups or hydroxyl groups in the molecule. As the chelating agent, two or more chelating agents containing two or more carboxyl groups or hydroxyl groups in the molecule can be used. Specifically, the above chelating agent may include one selected from the group consisting of ethylenediaminetetraacetic acid (EDTA), Glycine, carboxylic acids, and combinations thereof. The above carboxylic acid refers to a compound containing at least one or two or more carboxyl groups in the molecule.

[0066] Based on the entire polishing composition for semiconductor processes described above, the content of the chelating agent may be from 0.003% by weight to 0.5% by weight. Based on the entire polishing composition for semiconductor processes described above, the content of the chelating agent may be from 0.005% by weight to 0.3% by weight. When the content of the above chelating agent is less than 0.003% by weight, the polishing rate decreases, or the possibility of surface defects such as dents increases. When the content of the above chelating agent is greater than 0.5% by weight, the possibility of over-polishing increases.

[0067] The polishing composition for semiconductor processes may further contain an oxidizing agent.

[0068] The oxidizing agent forms an environment that is more easily planarized by oxidizing metals such as tungsten, and plays a role in increasing the polishing rate and etching rate.

[0069] The oxidizing agent may be at least any one selected from the group consisting of hydrogen peroxide, urea hydrogen peroxide, urea, percarbonate, periodic acid, periodate, perchloric acid, perchlorate, perbromic acid, perbromate, perboric acid, perborate, permanganic acid, permanganate, persulfate, bromate, chlorate, chlorite, chromate, iodate, iodic acid, ammonium peroxydisulfate, benzoyl peroxide, calcium peroxide, barium peroxide, sodium peroxide, and carbamide peroxide.

[0070] Based on the overall polishing composition for semiconductor processes described above, the content of the oxidizing agent can be from 0.01% by weight to 5% by weight. When the content of the above oxidizing agent is less than 0.01% by weight, the polishing rate is too slow, or the polishing of metal parts such as tungsten is insufficient. When the content of the above oxidizing agent exceeds 5% by weight, an oxide film will instead grow on the metal parts, so the quality such as the flatness of the polished surface may be reduced.

[0071] The polishing composition for semiconductor processes can be an acidic solution. Specifically, the pH of the above polishing composition for semiconductor processes can be from 2 to 5. The pH of the above polishing composition for semiconductor processes can be from 3 to 4.5. When the acidic environment is maintained within the above range, while preventing excessive corrosion of metal components or the polishing apparatus, the polishing rate and quality can be maintained above a certain level.

[0072] In order to prepare the polishing composition for semiconductor processes as an acidic solution, in addition to the solvent, an acid component can be added to the above composition. The above acid component can be applied to the polishing composition for semiconductor processes together with a pH regulator.

[0073] For example, the acid component can be at least any one selected from the group consisting of hydrochloric acid, phosphoric acid, sulfuric acid, hydrofluoric acid, bromic acid, iodic acid, formic acid, malonic acid, maleic acid, oxalic acid, acetic acid, adipic acid, citric acid, propionic acid, fumaric acid, lactic acid, salicylic acid, pimelic acid, benzoic acid, succinic acid, phthalic acid, butyric acid, glutaric acid, glutamic acid, glycolic acid, aspartic acid, tartaric acid, and their salts.

[0074] The above pH regulator can be one selected from the group consisting of ammonia, aminomethylpropanol, tetramethylammonium hydroxide, potassium hydroxide, sodium hydroxide, magnesium hydroxide, rubidium hydroxide, cesium hydroxide, sodium bicarbonate, sodium carbonate, imidazole, and their combinations.

[0075] The above acid component and pH regulator can be applied in appropriate amounts according to the intended pH.

[0076] In the polishing composition for semiconductor processes, as the remaining components in addition to the above components and the additional components to be described below, a solvent can also be included. The above solvent can be water, and preferably ultrapure water can be applied.

[0077] When the polishing composition for semiconductor processes contains the above characteristic components, it has excellent polishing performance and excellent storage stability.

[0078] Specifically, with the D of the above abrasive particles 50Based on this, the time point when the particle size increases by more than 10% can be more than 12 months. Compared with the particles without specific surface modification in this embodiment, this effect is equivalent to more than about twice the effect. The abrasive particles having such an effect have improved dispersion stability. Therefore, even after substantial long-term storage, the particles can be stably dispersed and are easy to store for a long time.

[0079] Moreover, in the case of a polishing composition partially used for semiconductor processes, immediately before use, an acid component can be mixed into the above polishing composition to maintain particle dispersion stability. The polishing composition for semiconductor processes of this embodiment also has very excellent particle dispersion stability in a state where all acid components are included, which is a characteristic that can further improve the convenience of use.

[0080] The polishing composition for semiconductor processes can polish tungsten, a diffusion barrier film, and a silicon oxide film simultaneously.

[0081] Continuous research is being conducted on the polishing composition for semiconductor processes so that the polishing composition for semiconductor processes has appropriate characteristics for each step of complex and multi-stage semiconductor manufacturing.

[0082] As the wiring width of semiconductor devices becomes narrower, it is necessary to achieve a micro wire width of 7 μm to 10 μm using a metal such as tungsten. By forming a polishing portion on an insulating layer according to a wiring design, after forming a tungsten wiring layer on the polishing portion, it is planarized to form a wiring. At this time, the polishing includes a primary polishing process for removing bulk tungsten and a secondary polishing process for simultaneously polishing the insulating layer and the tungsten wiring layer.

[0083] In the case of tungsten, there may be a significant difference in polishing performance between metallic tungsten and tungsten oxide. Therefore, if a polishing composition with strong chemical polishing performance is applied in the above primary polishing process, it is difficult to apply the same polishing composition as in the primary polishing process in the above secondary polishing process. This is because when planarizing the surface where the insulating layer and the tungsten wiring layer are simultaneously exposed, the possibility of defects increases due to their different polishing degrees.

[0084] For the purpose of improving adhesion performance, etc., a barrier layer (diffusion barrier layer) can be located between an insulating layer such as SiO2 and a tungsten wiring layer. Exemplarily, the above barrier layer can contain titanium or titanium nitride.

[0085] When a barrier layer is applied on a substrate, in the above secondary polishing process, the insulating layer, the barrier layer, and the wiring layer are all exposed in a plane and polished. Since the strength of each material of the above layers and the polishing degree for the polishing liquid are different, it is difficult to polish the above layers while maintaining a polishing speed above a certain level without defects such as depressions occurring.

[0086] The selectivity of the polishing composition for semiconductor processes can be 25 or more. The above selectivity refers to the polishing rate of the silicon oxide film based on the polishing rate of tungsten. This means that the polishing rate of the silicon oxide film is 25 times greater than that of tungsten. The above selectivity can be 30 or more. The above selectivity can be 50 or less. The above selectivity can be 45 or less. The above selectivity can be 40 or less. When the above selectivity is within the above range, during the secondary polishing process, the surface of the object to be polished can be appropriately polished without defects such as depressions occurring.

[0087] The polishing composition for semiconductor processes also has the characteristic that the polishing index of the silicon oxide film is above a certain level. This polishing index represents the polishing rate of the silicon oxide film per unit weight of the abrasive particles contained in the composition.

[0088] The polishing index of the silicon oxide film is represented by the following formula 1.

[0089] [Formula 1]

[0090] Polishing index of silicon oxide film = Polishing rate of silicon oxide film / Concentration of metal oxide particles (wt%) in the polishing composition for semiconductor processes

[0091] The above polishing index of the polishing composition for semiconductor processes can be or more. The above polishing index can be or more. The above polishing index of the polishing composition for semiconductor processes can be or less. The above polishing index can be or less. The above polishing index can be or less. When the above polishing index of the silicon oxide film is less than 250, the polishing speed of the silicon oxide film is low, resulting in reduced polishing efficiency. When the above polishing index of the silicon oxide film is greater than 500, the possibility of polishing defects increases.

[0092] The polishing composition for semiconductor processes also has the characteristic that the tungsten polishing index is above a certain level. This tungsten polishing index represents the polishing rate of tungsten per unit weight of the polishing composition for semiconductor processes contained in the composition.

[0093] The tungsten polishing index is represented by the following formula 2.

[0094] [Formula 2]

[0095] Tungsten polishing index = Tungsten polishing rate / Concentration of metal oxide particles (wt%) in the polishing composition for semiconductor processes

[0096] The above tungsten polishing index of the polishing composition for semiconductor processes can be or more. The above polishing index can be or more. The above silica film polishing index of the polishing composition for semiconductor processes can be or less. The above polishing index can be or less. When the above tungsten polishing index is less than 8, the tungsten polishing speed is low, resulting in a decrease in polishing efficiency. When the above tungsten polishing index is greater than 15, the possibility of polishing defects increases.

[0097] The method for manufacturing a polished substrate according to the present embodiment includes a process of polishing a substrate by applying the above-described polishing composition for semiconductor processes as a slurry.

[0098] The above substrate can be a semiconductor substrate. Specifically, it can be a substrate as described below: an insulating film is formed on a planarized semiconductor substrate, and after polishing a part of the insulating film according to a pre-designed wiring shape, a tungsten metal film is formed on the polished part. If necessary, a diffusion barrier layer can be formed between the above insulating film and the above tungsten metal film.

[0099] As materials for forming the above insulating film, the above tungsten metal film, the above diffusion barrier layer, etc., as long as they are commonly used materials, can be used without limitation.

[0100] The process of polishing the substrate can be performed in at least two steps.

[0101] The process of polishing the above substrate can include: a primary polishing process for planarizing the surface substantially exposing the tungsten metal film (abbreviated as a bulk tungsten layer); and a secondary polishing process for planarizing the surface of the substrate that has undergone the primary polishing process and exposes the insulating layer, tungsten metal film, etc.

[0102] The above-described polishing composition for semiconductor processes can be applied to the secondary polishing process.

[0103] The specific description of the polishing composition for semiconductor processes is repeated with the above description, and thus its description will be omitted.

[0104] The polished substrate prepared in the above-described manner can have a polished surface with fewer defects.

[0105] Hereinafter, the present invention will be described in more detail by way of specific examples. The following examples are merely illustrative for helping to understand the present invention, and the scope of the present invention is not limited thereto.

[0106] 1. Preparation of the polishing composition

[0107] Prepared suitable for D 50 The abrasive particles of the metal oxide particles are prepared by surface-modifying colloidal silica particles having a diameter of 40 μm. The colloidal silica particles are surface-modified with a silane compound so that the total amount of 3-aminopropyltriethoxysilane (3-aminopropylethoxysilane) as an aminosilane and 3-glycidoxypropyltriethoxysilane (3-glycidoxypropyltriethoxysilane) as an epoxysilane is 5 parts by weight based on 100 parts by weight of the colloidal silica particles. The applicable ratio (molar basis) of each silane compound is based on the content shown in Table 1 below.

[0108] Ultrapure water is used as a solvent, 3% by weight of the above-mentioned abrasive particles, 0.1% by weight of glycine is used as a chelating agent, and 50 ppm (based on weight) of a fluorine-based surfactant (weight average molecular weight of 350 g / mol) is used as a dispersant, and acetic acid is further added to prepare a polishing composition with a pH of 4 for semiconductor processing.

[0109] Table 1

[0110]

[0111] 2. Evaluation of physical properties of polishing composition

[0112] (1) Polishing evaluation

[0113] For thickness of approx. of tungsten wafer and thickness of approx. Specifically, polishing was performed for 60 seconds under the conditions of a pressure of 2.2 psi, a carrier speed of 103 rpm, a platen speed of 57 rpm, and a slurry flow rate of 300 ml / min.

[0114] After the polishing process is completed, the thickness of each wafer is measured, and the polishing rate (polishing speed; The results are shown in the table.

[0115] (2) Evaluation of defects

[0116] After polishing under the same conditions as the CMP evaluation, a self-made cleaning chemical solution was sprayed at a flow rate of 2,000 ml / min (cc / min) for 60 seconds at a brush rotation speed of 500 rpm to perform the cleaning process. The tungsten and silicon oxide wafers after the cleaning process were sealed in a front-opening unified pod (FOUP), and the total defect number was measured using the AIT-XP+ equipment stored by SKC. The blanket tungsten wafer and the blanket silicon wafer for measurement were circular wafers with a diameter of 300 mm each, and the entire surface of the wafers was evaluated using a 3.5 μm laser source.

[0117] (3) Evaluation of storage stability (Life time, service life)

[0118] Each polishing composition was stored at 45°C. The particle size of the abrasive grains was measured before storage, and the particle size was measured again every month. The time points at which the particle size increased by more than 5% are shown in Table 2 below.

[0119] Table 2

[0120]

[0121] * The polishing index is the value evaluated by Formula 1 and Formula 2.

[0122] Referring to Table 1 and Table 2 above, it can be seen that the examples with the surface characteristics of the present embodiment showed results above an appropriate level in terms of both the tungsten polishing rate and the silicon oxide film polishing rate, and the defects were relatively low. In the case of Comparative Example 3, the polishing speed was overall excellent, but there were too many defects in the silicon oxide film. In the cases of Comparative Examples 1, 2, and 4, there were disadvantages in terms of the polishing speed. In the case of Comparative Example 3, the storage stability was reduced by more than half compared to other examples and comparative examples.

[0123] The preferred embodiments of the present invention have been described in detail above, but the scope of protection of the present invention is not limited thereto. Various modifications and improvements made by those of ordinary skill in the art to the basic concepts of the present invention defined in the following claims also fall within the scope of protection of the present invention.

Claims

1. A polishing composition for semiconductor processes, characterized in that, it contains metal oxide particles, colloidal silica particles or fumed silica particles having functional groups exposed on the surface as abrasive particles, the above surface contains a first functional group having an epoxy group at the end and a second functional group having an amino group at the end, the above metal oxide particles, colloidal silica particles or fumed silica particles are modified by a silane compound having the above first functional group at one end and a silane compound having the above second functional group, based on 100 parts by weight of the above metal oxide particles, colloidal silica particles or fumed silica particles, 1 part by weight to 10 parts by weight of the above silane compound is used, the content of the above second functional group is greater than the content of the above first functional group, the ratio of the above first functional group to the above second functional group is a molar ratio of 1:1 to 15, the diameter D50 of the above metal oxide particles, colloidal silica particles or fumed silica particles is 10 nm to 120 nm, the pH of the above polishing composition is 2 to 5, the content of the above abrasive particles is 0.5% by weight to 8% by weight, the polishing composition for semiconductor processes further contains a nonionic polymer and a chelating agent.

2. The polishing composition for semiconductor processes according to claim 1, characterized in that, the above metal oxide particles are any one selected from the group consisting of cerium dioxide, alumina, titanium dioxide, zirconia and combinations thereof.

3. The polishing composition for semiconductor processes according to claim 1, characterized in that, The polishing index of the silicon oxide film represented by the following first formula is above First formula: Polishing index of silicon oxide film = Polishing rate of silicon oxide film / Concentration of metal oxide particles, colloidal silica particles or fumed silica particles in the polishing composition for semiconductor processes.

4. The polishing composition for semiconductor processes according to claim 1, characterized in that, The selection ratio of the polishing rate of the silicon oxide film based on the polishing rate of tungsten is 25 or more.

5. The polishing composition for semiconductor processes according to claim 1, characterized in that, Based on D50, the time point when the particle size increases by more than 10% is 12 months or more.

6. The polishing composition for semiconductor processes according to claim 1, characterized in that, Simultaneously polish tungsten, diffusion barrier film and silicon oxide film.

7. A method for manufacturing a substrate, characterized in that, it includes a process of polishing the substrate by applying the polishing composition for semiconductor processes according to claim 1 as a slurry.

8. A method for manufacturing a semiconductor device, characterized in that, it includes: a step of forming an insulating film on a substrate, a step of polishing a part of the above insulating film according to a pre-designed wiring pattern, a step of forming a tungsten metal film on the polished insulating film to prepare a substrate before polishing, and a polishing step of polishing the above substrate before polishing; the above polishing step includes a process of polishing the above substrate before polishing by applying the polishing composition for semiconductor processes according to claim 1 as a slurry.

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