A method for detecting sensor detachment in blood glucose testing

Abstract

This disclosure relates to a sensor detachment detection method for blood glucose testing, comprising: acquiring the sensor's test current; when the test current is greater than a standard value, outputting a first-level signal at the output terminal of the current processing circuit; triggering the detection circuit to perform multiple rounds of repeated detection; ending the loop detection when the cumulative number of times the counter is greater than or equal to a predetermined threshold; setting to enter a detachment detection mode, and determining sensor detachment when the current after amplification is still less than the current threshold. The above-mentioned technical solution of this application can avoid large currents generated by system circuit malfunctions, and uses multiple detections to filter out the influence of interference signals, avoiding false detections. This achieves reliable sensor detachment detection.

Description

Technical Field

[0001] This disclosure relates to the field of sensor technology, and in particular to a method for detecting sensor detachment in blood glucose detection. Background Technology

[0002] Diabetes is one of the most prevalent chronic diseases worldwide. Diabetic patients need to wear sensors on their skin to monitor their blood sugar levels. However, due to various reasons, these sensors can experience high current surges and detachment, affecting patient safety and recovery. Summary of the Invention

[0003] To overcome the problems existing in related technologies, this disclosure provides a method for detecting sensor detachment in blood glucose testing, in order to solve the problem that the failure to detect sensor detachment in a timely manner affects patient recovery in related technologies.

[0004] According to a first aspect of the present disclosure, a method for detecting sensor detachment in blood glucose detection is provided, comprising:

[0005] The trigger detection circuit detects the sensor and obtains the sensor's test current;

[0006] When the test current is greater than the standard value, the output terminal of the current processing circuit outputs a first level signal;

[0007] If the duration of the first level signal is greater than or equal to a predetermined time period, the counter is incremented by 1;

[0008] The trigger detection circuit performs multiple rounds of repeated detection;

[0009] The loop detection ends when the number of times the counter accumulates is greater than or equal to a predetermined threshold.

[0010] In the detachment detection mode, the test current is amplified by a predetermined factor to obtain the amplified current.

[0011] If the amplified current is less than the current threshold, it is determined that the sensor has detached.

[0012] The technical solutions provided by the embodiments of this disclosure may include the following beneficial effects:

[0013] The technical solution described above in this application involves a detection circuit that detects the sensor and acquires its test current. When the test current exceeds a standard value, the current processing circuit outputs a first-level signal. The validity of the first-level signal is determined, and valid signal counts are performed to filter out interference signals. The number of valid signal counts is also counted. The loop detection ends when the count accumulated by the counter is greater than or equal to a predetermined threshold. This avoids wasting resources by blindly entering the detachment detection mode. The test current is amplified and compared with a current threshold to determine if the sensor has detached.

[0014] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0015] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0016] Figure 1 This is a flowchart illustrating a sensor detachment detection method for blood glucose detection according to an exemplary embodiment;

[0017] Figure 2 This is a detection circuit diagram illustrated according to an exemplary embodiment;

[0018] Figure 3 This is a current processing circuit diagram illustrated according to an exemplary embodiment;

[0019] Figure 4 This is a counter circuit diagram illustrated according to an exemplary embodiment. Detailed Implementation

[0020] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.

[0021] It should be noted that all actions involving the acquisition of signals, information, or data in this application are carried out in compliance with the relevant data protection laws and policies of the country where the application is located, and with the authorization granted by the owner of the relevant device.

[0022] Based on this, this application proposes a sensor detachment detection method for blood glucose testing, see appendix. Figure 1 ,include:

[0023] In step S102, the trigger detection circuit detects the sensor and obtains the sensor's test current.

[0024] In this embodiment, when the detection circuit detects the sensor, it needs to apply a voltage to both ends of the sensor so that the sensor generates a test current.

[0025] In step S104, when the test current is greater than the standard value, the output terminal of the current processing circuit outputs a first level signal.

[0026] In this embodiment, software implementation is used. The tested current is calculated via an ADC and input into a processor. The processor stores a standard value, and the software within the processor runs a comparison program to compare the test current with the standard value. If the test current exceeds the standard value, the processor can use its built-in output port to implement system control, or control the output of the current processing circuit to output a first-level signal.

[0027] In this embodiment, it can also be implemented using hardware circuitry. In the current processing circuit, the test current is compared with the standard value. If the test current is greater than the standard value, the output terminal outputs a first level signal.

[0028] In step S106, if the duration of the first level signal is greater than or equal to a predetermined time period, the counter is incremented by 1.

[0029] In this embodiment, the predetermined time period can be flexibly set, for example, 10ms. The duration of the first level signal can be statistically analyzed. When the duration is less than 10ms, the first level signal is invalid. When the duration is greater than or equal to 10ms, the first level signal is valid, and the counter is incremented by one.

[0030] In step S108, the trigger detection circuit performs multiple rounds of repeated detection.

[0031] In this embodiment, after the counter is incremented by one, the trigger detection circuit performs another detection. If the obtained first level signal is valid, the counter is incremented again, and this process is repeated multiple times.

[0032] In step S110, if the number of times the counter accumulates is greater than or equal to a predetermined threshold, the loop detection ends.

[0033] In this embodiment, the predetermined threshold number can be flexibly set, for example, it can be set to 4. After multiple tests, if the counter accumulates a count greater than or equal to 4, it indicates that the first level signal is valid. The cyclic detection process of the detection circuit then ends.

[0034] In some embodiments, instead of using a hardware counter, counting can be performed in software, specifically within the processor.

[0035] In step S112, the above test current is amplified by a predetermined factor to obtain the amplified current.

[0036] In this embodiment, after determining that the first level signal is valid, an amplifier circuit can be used to amplify the test current to obtain an amplified current. Alternatively, software can be used within the processor to amplify the test current value to obtain the amplified current.

[0037] In step S114, if the amplified current is less than the current threshold, it is determined that the sensor has detached.

[0038] In this embodiment, the current threshold can be set flexibly. If the amplified current is less than the current threshold, it indicates that the test current is too small, thus confirming that the sensor has detached.

[0039] The technical solution described above in this application includes a detection circuit that detects the sensor and acquires its test current. When the test current exceeds a standard value, the current processing circuit outputs a first-level signal. The validity of the first-level signal is determined, and valid level signals are counted to filter out interference signals. The number of valid level signals is also counted. The loop detection ends when the accumulated count by the counter is greater than or equal to a predetermined threshold. The test current is amplified and compared with the current threshold to determine if the sensor has detached.

[0040] In some embodiments, if the amplified current is greater than or equal to the current threshold, it is determined that the sensor has not detached.

[0041] In this embodiment, if the amplified current is greater than or equal to the current threshold, it indicates that the sensor has not detached.

[0042] In some embodiments, if the number of times the counter accumulates is less than the predetermined threshold, the statistics are invalid and the detection continues.

[0043] In this embodiment, if the number of times the counter accumulates is less than the predetermined threshold, it is considered that the current statistical data is insufficient for effective analysis or judgment, and therefore monitoring and counting need to continue.

[0044] The technical solution of this application sets a predetermined quantity threshold, which helps improve the accuracy of statistical validity. Setting the quantity threshold to 1 may introduce errors and lead to incorrect statistics. Setting the quantity threshold too high will result in wasted resources. Setting a reasonable quantity threshold, such as 4 times, can improve statistical accuracy while avoiding resource waste.

[0045] In some embodiments, see Appendix Figure 2 The aforementioned detection circuit includes at least a first voltage source DAC01, a second voltage source DAC02, and a transimpedance amplifier OPA2. The first voltage source and the second voltage source have a voltage difference.

[0046] The first voltage source is connected to the reference electrode RE of the sensor.

[0047] The second voltage source is connected to the working electrode WE of the sensor.

[0048] The first voltage source DAC01 is connected to the positive input terminal of the operational amplifier OPA1. According to the concept of virtual short, after the switch SW_RE is closed and turned on, the voltage at the sensor RE terminal is equal to the voltage value of the first voltage source DAC01.

[0049] The operational amplifier outputs CE_OUT. In a branch connected to this output, there are two switches connected in series: SW_RECE and SW_REGND. One end of switch SW_REGND is grounded. The sensor's CE terminal is connected to this branch and to switch SW_CE.

[0050] In step S102, the trigger detection circuit detects the sensor, which may further include the following steps:

[0051] The first voltage source is applied to the reference electrode RE of the sensor, and the second voltage source is applied to the working electrode WE of the sensor to perform a power-on test. The working electrode of the sensor outputs a test current.

[0052] The first input terminal of the aforementioned transimpedance amplifier OPA2 is connected to the aforementioned second voltage DAC02. The second input terminal is connected to the working electrode WE of the aforementioned sensor and is connected to the aforementioned test current.

[0053] Between the second input terminal and the output terminal of the transimpedance amplifier OPA2, there is a first branch consisting of a resistor R and a first switch SW_TIA, and a second branch consisting of a second switch SW_CACB connected in parallel with the first branch.

[0054] The resistance value of the resistor R is the resistance value of the sensor.

[0055] The first terminal of the resistor R is connected to the first terminal of the first switch SW_TIA, and the second terminal of the first switch SW_TIA is connected to the first input terminal of the transimpedance amplifier OPA2. The second terminal of the resistor R is connected to the output terminal of the transimpedance amplifier OPA2. The output terminal of the transimpedance amplifier OPA2 outputs the test voltage WE_OUT.

[0056] The test voltage WE_OUT enters the first terminal of the digital-to-analog converter (ADC), is converted into a digital signal, and then enters the microprocessor (MCU). The aforementioned DAC02 then passes through a resistor to the second terminal of the ADC.

[0057] In some embodiments, in step S104, when the test current is greater than the standard value, the current processing circuit outputs a first level signal, including the following steps:

[0058] See appendix Figure 3 The aforementioned current processing circuit includes multiple mirror branches and a Schmitt trigger 21.

[0059] The mirror branch is used to mirror the input test current to obtain a mirror copy current.

[0060] The mirror copy current is compared with the set current standard value, and the corresponding analog electrical signal is output to the Schmitt trigger based on the comparison result.

[0061] The Schmitt trigger 21 described above is used to convert the input analog electrical signal into a digital electrical signal.

[0062] If the test current is greater than the standard value as determined by the comparison circuit, a first analog electrical signal is output to the Schmitt trigger 21. The Schmitt trigger 21 then outputs a first level signal.

[0063] In this embodiment, the first level signal can be a low level signal.

[0064] The advantage of a Schmitt trigger is that it takes an analog input and outputs a digital output. Analog values ​​have a floating range and do not precisely represent high or low levels. The Schmitt trigger converts the floating analog value into a digital output, clearly defining the first level signal for high or low levels for subsequent use.

[0065] In some embodiments, the current processing circuit includes: a first current mirror and a first MOSFET Q1, wherein the control terminal of the first MOSFET Q1 is connected to a first control signal SWN_TERM, and the source is connected to the drain of a second MOSFET Q2; the drain is connected to the drain of the input MOSFET Q01 in the first current mirror.

[0066] The control terminal of the second MOSFET Q2 is connected to the first terminal of the fifth switch S5 and the first terminal of the sixth switch S6, respectively.

[0067] The second terminal of the fifth switch S5 is connected to the third control signal CE-OUT.

[0068] The second terminal of the sixth switch S6 is input to the second control signal WE_OUT, which is the test voltage.

[0069] The source of the second MOSFET Q2 is connected to the drain of the third MOSFET Q3; the drain is connected to the source of the first MOSFET Q1.

[0070] The third MOSFET Q3 has its control terminal connected to the fourth control signal SWP_TERM; its source is grounded; its drain is connected to the source of the second MOSFET Q2; and its drain is connected to the third switch S3 and the fourth switch S4 respectively; the third switch S3 is connected to the reference electrode RE, and the fourth switch S4 is connected to the working electrode WE.

[0071] The source of the input MOS transistor Q01 in the first current mirror is connected to the first power supply.

[0072] The first power supply is VCC.

[0073] When the input terminal MOSFET Q01, the first MOSFET Q1, the second MOSFET Q2, and the third MOSFET Q3 in the first current mirror constitute the first input branch, and when the first MOSFET Q1, the second MOSFET Q2, and the third MOSFET Q3 are all closed and conducting, the current flowing through the first input branch is the test current.

[0074] The source of the second MOSFET Q2 and the drain of the third MOSFET Q3 are respectively connected to the first terminal of the fourth switch S4 and the first terminal of the third switch S3.

[0075] The second end of the fourth switch S4 is connected to the working electrode.

[0076] The second terminal of the aforementioned third switch S3 is connected to the reference electrode.

[0077] In some embodiments, the control terminal of the output MOSFET Q02 in the first current mirror is connected to the control terminal of the input MOSFET Q01 in the first current mirror.

[0078] The drain of the output MOSFET Q2 in the first current mirror is connected to the drain of the fourth MOSFET Q4, and the source of the fourth MOSFET Q4 is connected to the negative terminal of the second power supply.

[0079] In this embodiment, the second power source is VB.

[0080] The control terminal of the second MOSFET Q2 is connected to the fifth control switch S5 and the sixth control switch S6.

[0081] The second MOS transistor Q2 and the fourth MOS transistor Q4 in the first current mirror constitute the first mirror branch.

[0082] It also includes the fifth MOSFET Q5 and the sixth MOSFET Q6.

[0083] The source of the fifth MOSFET Q5 is connected to the first power supply, and the drain is connected to the source of the sixth MOSFET Q6. The control terminal of the sixth MOSFET Q6 is connected to the seventh control switch S7.

[0084] The drain of the sixth MOSFET Q6 is connected to the drain of the output MOSFET Q02 and the drain of the fourth MOSFET Q4, respectively.

[0085] It also includes the seventh MOSFET Q7 and the eighth MOSFET Q8.

[0086] The gate of the seventh MOSFET Q7 and the gate of the eighth MOSFET Q8 are connected.

[0087] The source of the seventh MOSFET Q7 and the source of the eighth MOSFET Q8 are connected to the first power supply.

[0088] The drain of the seventh MOSFET Q7 is connected to the drain of the ninth MOSFET Q9 and the drain of the tenth MOSFET Q10, respectively.

[0089] The drain of the eighth MOS transistor Q8 is connected to the first input terminal of the Schmitt trigger 21.

[0090] The drain of the ninth MOSFET Q9 is connected to the negative terminal of the second power supply.

[0091] The source of the tenth MOSFET Q10 is connected to the drain of the eleventh MOSFET Q11, and the source of the eleventh MOSFET Q11 is connected to the negative terminal of the second power supply.

[0092] The control terminal of the tenth MOSFET Q10 is connected to the eighth control switch S8.

[0093] The control terminal of the eleventh MOSFET Q11 is connected to the control terminals of the fourth MOSFET Q4 and the ninth MOSFET Q9, respectively.

[0094] The source of the twelfth MOSFET Q12 is connected to the first power supply; the drain is connected to the source of the thirteenth MOSFET; the control terminals are respectively connected to the control terminals of the seventh MOSFET Q7 and the eighth MOSFET Q8, as well as the drain of the seventh MOSFET Q7 and the drain of the ninth MOSFET Q9.

[0095] The drain of the thirteenth MOSFET Q13 is connected to the drain of the fifteenth MOSFET, the drain of the sixteenth MOSFET, and the drain of the seventeenth MOSFET.

[0096] The control terminal of the thirteenth MOSFET Q13 is connected to the ninth control switch S9.

[0097] The source of the fifteenth MOSFET Q15 is connected to the drain of the eighteenth MOSFET Q18, and the source of the eighteenth MOSFET Q18 is connected to the negative terminal of the second power supply.

[0098] The control terminal of the fifteenth MOSFET Q15 is connected to the zeroth control switch S0.

[0099] The source of the sixteenth MOSFET Q16 is connected to the drain of the nineteenth MOSFET Q19, and the source of the nineteenth MOSFET Q19 is connected to the negative terminal of the second power supply.

[0100] The control terminal of the sixteenth MOSFET Q16 is connected to the first control switch S1.

[0101] The source of the seventeenth MOSFET Q17 is connected to the drain of the twentieth MOSFET Q20, and the source of the twentieth MOSFET Q20 is connected to the negative terminal of the second power supply.

[0102] The control terminal of the seventeenth MOSFET Q17 is connected to the second control switch S2.

[0103] The control terminals of the eighteenth MOSFET Q18, the nineteenth MOSFET Q19, the twentieth MOSFET Q20, and the first input terminal of the Schmitt trigger 21 are connected together to the second power supply.

[0104] The output terminal of the Schmitt trigger 21 is used as the output terminal of the current processing circuit, outputting CUR_DET.

[0105] In some embodiments, see Appendix Figure 4 The above-mentioned incrementing of the counter by 1 when the duration of the first level signal is greater than or equal to a predetermined time period includes:

[0106] Configure a counter, a first NOR gate, a second NOR gate, a filter, a first NOT gate, and a second NOT gate;

[0107] The current detection signal is input to the filter.

[0108] The output of the filter is connected to the first input of the first NOR gate, and the second input of the first NOR gate is connected to the output of the counter.

[0109] The current detection signal is input to the first input terminal of the second NOR gate, and the second input terminal of the second NOR gate is connected to the output terminal of the first NOT gate; the DET_EN signal is input to the input terminal of the first NOT gate.

[0110] The output of the counter is also connected to the input of the second NOT gate, and the output of the second NOT gate outputs the first control signal SWN_TERM.

[0111] The counter outputs the fourth control signal SWP_TERM.

[0112] The first filter is used to filter out invalid electrical signals whose duration is less than a predetermined time period, thereby obtaining valid electrical signals whose duration is greater than or equal to the predetermined time period.

[0113] The scheduled time is 10 milliseconds.

[0114] In the above detection process, after each predetermined time interval, the detection circuit is reset via the SWP_TERM and SWN_TERM signals. The output CUR_DET of the Schmitt trigger will then toggle, initiating the next detection. However, if the entire system is functioning normally during this process, the changes in the CUR_DET signal will be filtered by the 40-millisecond filter, and the counter will not be cleared. Conversely, if the entire system is malfunctioning and the CUR_DET output never toggles, the 40-millisecond filter will fail to filter the CUR_DET signal, resulting in a low-level output that clears the counter. The Sn_DETECT status bit will then transmit the corresponding detection system malfunction status to the MCU.

[0115] The system can restart its detection in two scenarios. First, if four consecutive 10ms low-level CUR_DET signals are detected, the counter counts. When the counter reaches four, the MSB bit at the output terminal goes high, and the counter is locked. The system then uses the Sn_DETECT status bit to determine if the current threshold has been exceeded, and will restart the system after 400ms via the DET_EN restart signal. Second, if the 40ms filter detects that CUR_DET has remained low for 40ms, it indicates a system malfunction, and the system will restart after 400ms via the DET_EN restart signal.

[0116] In some embodiments, the dynamic process is described in detail in conjunction with the circuit described above.

[0117] See appendix Figure 2 and attached Figure 3 When VRE>VWE is applied, the current flows from I1 to RE to WE, and then to ground. SW_CACB and SW_RE need to be turned on, and SW_TIA, SW_CE, SW_RECE and SW_REGND need to be turned off. Then RE is set to DACO1 and WE is set to DACO2.

[0118] Set the threshold currents of the zero switch S0, the first switch S1, and the second switch S2 according to the threshold requirements. SWP_TREM and SWN_TREM are set to low level and high level respectively. The fourth switch S4 and the sixth switch S6 are turned on, and the third switch S3, the fifth switch S5, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are all turned off. At this time, the current flowing through I1 is the current flowing between WE and RE. Through the mirror branch, the current I1 is copied to the current I3, and the current I3 is copied to the current I4. The current I4 is compared with the set threshold current. According to the comparison result, different high and low levels are input into the Schmidt trigger, and there will be two inversion processes in the Schmidt trigger. The Schmidt trigger outputs CUR_DET. When the measured current I1 is greater than the threshold current, CUR_DET is at low level; when the measured current I1 is less than the threshold current, CUR_DET is at high level.

[0119] When VRE < VWE, the current flows from I1 to WE, then to RE, and then to ground. Turn on SW_RECE, SW_CE, and SW_RE, and turn off SW_TIA, SW_CACB, and SW_REGND. Then set RE to DACO1 and WE to DACO2.

[0120] Set the threshold currents of the zero switch S0, the first switch S1, and the second switch S2 according to the threshold requirements. SWP_TREM and SWN_TREM are set to low level and high level respectively. The third switch S3 and the fifth switch S5 are turned on, and the third switch S3, the fifth switch S5, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are all turned off. The current I1 is the current flowing between RE and WE. Through the mirror branch, the current I1 is copied as the current I3, and the current I3 is copied to the current I4. The current I4 is compared with the threshold current, and the Schmidt trigger outputs CUR_DET. When the measured current I1 is greater than the threshold current, CUR_DET is at low level; when the measured current I1 is less than the threshold current, CUR_DET is at high level.

[0121] See Appendix Figure 4 To prevent false detection, CUR_DET needs to be tested multiple times. If the I1 current is higher than the threshold current, CUR_DET becomes low level. At this time, the counter starts counting, and the filter is used to filter out pulses less than 10 mS. If the pulse duration exceeds 10 mS, the counter will increase by 1, and at the same time, set SWP_TERM to high level and SWN_TERM to low level. CUR_DET becomes high level, then set SWP_TERM to low level and SWN_TERM to high level, and restore to the normal detection state. If the loop repeats 4 times, the sensor detection circuit outputs the Sn_DETECT status bit.

[0122] See appendix Figure 3 When the seventh switch S7, the eighth switch S8, and the ninth switch S9 are all turned on, the anti-detachment function is activated. By turning on the seventh switch S7, the eighth switch S8, and the ninth switch S9, the current I1 is amplified to a predetermined multiple, such as 343 times, and then compared with the set threshold current. If a high level of CUR_DET is still detected, then 343 times the current I1 is still lower than the set threshold current, indicating that the sensor has been detached.

[0123] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of this disclosure. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.

[0124] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. A sensor fall-off detection method for blood glucose measurement, characterized by, The method comprises the following steps: The trigger detection circuit detects the sensor to obtain a test current of the sensor; When the test current is greater than a standard value, the output end of the current processing circuit outputs a first level signal; When the duration of the first level signal is greater than or equal to a predetermined time period, the counter is incremented by 1; The trigger detection circuit repeatedly detects for multiple rounds; When the number of times accumulated by the counter is greater than or equal to a predetermined number threshold, the loop detection is ended; The test current is amplified by a predetermined multiple to obtain an amplified current in the falling-off detection mode; When the amplified current is less than a current threshold, it is determined that the sensor falls off; The detection circuit comprises at least a first voltage source, a second voltage source and a transimpedance amplifier; the first voltage source and the second voltage source have a voltage difference; The first voltage source is connected to a reference electrode of the sensor; The second voltage source is connected to a working electrode of the sensor; The trigger detection circuit detects the sensor, which comprises the following steps: The first voltage source is applied to the reference electrode of the sensor, and the second voltage source is applied to the working electrode of the sensor to perform a power-on test, and the working electrode of the sensor outputs a test current; The first input end of the transimpedance amplifier inputs the second voltage, and the second input end is connected to the working electrode of the sensor to input the test current; The second input end and the output end of the transimpedance amplifier are provided with a first branch composed of a resistor and a first switch and a second branch composed of a second switch connected in parallel with the first branch; The resistance value of the resistor is the resistance value of the sensor; The first end of the resistor is connected to the first end of the first switch, and the second end of the first switch is connected to the first input end of the transimpedance amplifier; The second end of the resistor is connected to the output end of the transimpedance amplifier; The output end of the transimpedance amplifier outputs a test voltage.

2. The sensor fall-off detection method of blood glucose measurement according to claim 1, characterized by, When the amplified current is greater than or equal to the current threshold, it is determined that the sensor does not fall off.

3. The sensor fall-off detection method of blood glucose measurement according to claim 1, characterized by, If the number of times accumulated by the counter is less than the predetermined number threshold, the statistics are invalid, and the detection is continued.

4. The sensor falling-off detection method for blood glucose detection according to claim 1, wherein When the test current is greater than a standard value, the current processing circuit outputs a first level signal, which comprises the following steps: The current processing circuit comprises a plurality of mirror branches and a Schmitt trigger; The mirror branch is used for mirror copying the input test current to obtain a mirror copied current; The mirror copied current is compared with a set current standard value, and a corresponding analog electric signal is output to the Schmitt trigger according to the comparison result; The Schmitt trigger is used for converting the input analog electric signal into a digital electric signal; When the current standard value is greater than the standard value determined by the comparison circuit, a first analog electric signal is output to the Schmitt trigger; and the Schmitt trigger outputs a first level signal.

5. The sensor falling-off detection method for blood glucose detection according to claim 4, wherein The current processing circuit comprises a first current mirror; A first MOS transistor, a control end of the first MOS transistor is connected with a first control electric signal SWN_TERM, a source end is connected with a drain end of a second MOS transistor; a drain end is connected with a drain end of an input end MOS transistor in the first current mirror; A second MOS transistor, a control end of the second MOS transistor is connected with a second control electric signal and a third control electric signal; a source end is connected with a drain end of a third MOS transistor; a drain end is connected with a source end of the first MOS transistor; A third MOS transistor, a control end of the third MOS transistor is connected with a fourth control electric signal; a source end is connected with ground; a drain end is connected with a source end of the second MOS transistor; and the drain end is connected with a third switch and a fourth switch respectively; the third switch is connected with a reference electrode, and the fourth switch is connected with a working electrode; A source end of the input end MOS transistor in the first current mirror is connected with a first power supply; The control end of the second MOS transistor is connected with a first end of a fifth switch and a first end of a sixth switch respectively; A second end of the fifth switch is connected with a CE-OUT signal; A second end of the sixth switch inputs the test voltage; The source end of the second MOS transistor and the drain end of the third MOS transistor are connected with a first end of a fourth switch and a first end of a third switch respectively; A second end of the fourth switch is connected with a working electrode; A second end of the third switch is connected with a reference electrode.

6. The sensor fall-off detection method of blood glucose measurement according to claim 5, wherein, A control end of the input end MOS transistor in the first current mirror is connected with a control end of an output end MOS transistor in the first current mirror; A drain end of the output end MOS transistor is connected with a drain end of a fourth MOS transistor, and a source end of the fourth MOS transistor is connected with a negative electrode of a second power supply; Further comprising a fifth MOS transistor and a sixth MOS transistor; A source end of the fifth MOS transistor is connected with a first power supply, a drain end is connected with a source end of the sixth MOS transistor, and a control end of the sixth MOS transistor is connected with a seventh control switch; A drain end of the sixth MOS transistor is connected with a drain end of the output end MOS transistor and a drain end of the fourth MOS transistor respectively; Further comprising a seventh MOS transistor and an eighth MOS transistor; A gate of the seventh MOS transistor and a gate of the eighth MOS transistor are connected; A source end of the seventh MOS transistor and a source end of the eighth MOS transistor are connected with a first power supply; A drain end of the seventh MOS transistor is connected with a drain end of a ninth MOS transistor and a drain end of a tenth MOS transistor respectively; A drain end of the eighth MOS transistor is connected with a first input end of a Schmitt trigger; A drain end of the ninth MOS transistor is connected with a negative electrode of a second power supply; A source end of the tenth MOS transistor is connected with a drain end of an eleventh MOS transistor, and a source end of the eleventh MOS transistor is connected with a negative electrode of a second power supply; A control end of the eleventh MOS transistor is connected with control ends of the fourth MOS transistor and the ninth MOS transistor respectively; A source end of a twelfth MOS transistor is connected with a first power supply, a drain end is connected with a source end of a thirteenth MOS transistor, and a control end is connected with control ends of the seventh MOS transistor and the eighth MOS transistor and drain ends of the seventh MOS transistor and the ninth MOS transistor respectively; A drain end of the thirteenth MOS transistor is connected with drain ends of a fifteenth MOS transistor, a sixteenth MOS transistor and a seventeenth MOS transistor respectively. The source of the fifteenth MOS is connected to the drain of the eighteenth MOS, and the source of the eighteenth MOS is connected to the negative of the second power supply; The source of the sixteenth MOS is connected to the drain of the nineteenth MOS, and the source of the nineteenth MOS is connected to the negative of the second power supply; The source of the seventeenth MOS is connected to the drain of the twentieth MOS, and the source of the twentieth MOS is connected to the negative of the second power supply; The control end of the eighteenth MOS, the control end of the nineteenth MOS, the control end of the twentieth MOS and the first input end of the Schmitt trigger are connected together, and the second power supply is connected; The output end of the Schmitt trigger is used as the output end of the current processing circuit.

7. The sensor fall-off detection method of blood glucose measurement according to claim 1, wherein, In the case that the duration of the first level signal is greater than or equal to a predetermined time period, the counter is added by 1, comprising: Setting a counter, a first NOR gate, a second NOR gate, a filter, a first NOT gate and a second NOT gate; The current detection electrical signal is input into the filter; The output end of the filter is connected to the first input end of the first NOR gate, and the second input end of the first NOR gate is connected to the output end of the counter; The current detection electrical signal is input into the first input end of the second NOR gate, and the second input end of the second NOR gate is connected to the output end of the NOT gate; The output end of the counter is also connected to the input end of the second NOT gate; The filter is used for filtering, and invalid electrical signals with a duration of the first level signal less than a predetermined time period are filtered out to obtain valid electrical signals with a duration of the first level signal greater than or equal to a predetermined time period.

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